xref: /openbsd/sys/arch/amd64/include/cpu.h (revision 73471bf0)
1 /*	$OpenBSD: cpu.h,v 1.141 2021/08/31 17:40:59 dv Exp $	*/
2 /*	$NetBSD: cpu.h,v 1.1 2003/04/26 18:39:39 fvdl Exp $	*/
3 
4 /*-
5  * Copyright (c) 1990 The Regents of the University of California.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to Berkeley by
9  * William Jolitz.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. Neither the name of the University nor the names of its contributors
20  *    may be used to endorse or promote products derived from this software
21  *    without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  *
35  *	@(#)cpu.h	5.4 (Berkeley) 5/9/91
36  */
37 
38 #ifndef _MACHINE_CPU_H_
39 #define _MACHINE_CPU_H_
40 
41 /*
42  * Definitions unique to x86-64 cpu support.
43  */
44 #ifdef _KERNEL
45 #include <machine/frame.h>
46 #include <machine/segments.h>		/* USERMODE */
47 #include <machine/cacheinfo.h>
48 #include <machine/intrdefs.h>
49 #endif /* _KERNEL */
50 
51 #include <sys/device.h>
52 #include <sys/rwlock.h>
53 #include <sys/sched.h>
54 #include <sys/sensors.h>
55 #include <sys/srp.h>
56 
57 #ifdef _KERNEL
58 
59 /* VMXON region (Intel) */
60 struct vmxon_region {
61         uint32_t        vr_revision;
62 };
63 
64 /*
65  * VMX for Intel CPUs
66  */
67 struct vmx {
68 	uint64_t	vmx_cr0_fixed0;
69 	uint64_t	vmx_cr0_fixed1;
70 	uint64_t	vmx_cr4_fixed0;
71 	uint64_t	vmx_cr4_fixed1;
72 	uint32_t	vmx_vmxon_revision;
73 	uint32_t	vmx_msr_table_size;
74 	uint32_t	vmx_cr3_tgt_count;
75 	uint64_t	vmx_vm_func;
76 	uint8_t		vmx_has_l1_flush_msr;
77 };
78 
79 /*
80  * SVM for AMD CPUs
81  */
82 struct svm {
83 	uint32_t	svm_max_asid;
84 	uint8_t		svm_flush_by_asid;
85 	uint8_t		svm_vmcb_clean;
86 };
87 
88 union vmm_cpu_cap {
89 	struct vmx vcc_vmx;
90 	struct svm vcc_svm;
91 };
92 
93 struct x86_64_tss;
94 struct cpu_info {
95 	/*
96 	 * The beginning of this structure in mapped in the userspace "u-k"
97 	 * page tables, so that these first couple members can be accessed
98 	 * from the trampoline code.  The ci_PAGEALIGN member defines where
99 	 * the part that is *not* visible begins, so don't put anything
100 	 * above it that must be kept hidden from userspace!
101 	 */
102 	u_int64_t	ci_kern_cr3;	/* U+K page table */
103 	u_int64_t	ci_scratch;	/* for U<-->K transition */
104 
105 #define ci_PAGEALIGN	ci_dev
106 	struct device *ci_dev;
107 	struct cpu_info *ci_self;
108 	struct schedstate_percpu ci_schedstate; /* scheduler state */
109 	struct cpu_info *ci_next;
110 
111 	struct proc *ci_curproc;
112 	u_int ci_cpuid;
113 	u_int ci_apicid;
114 	u_int ci_acpi_proc_id;
115 	u_int32_t ci_randseed;
116 
117 	u_int64_t ci_kern_rsp;	/* kernel-only stack */
118 	u_int64_t ci_intr_rsp;	/* U<-->K trampoline stack */
119 	u_int64_t ci_user_cr3;	/* U-K page table */
120 
121 	/* bits for mitigating Micro-architectural Data Sampling */
122 	char		ci_mds_tmp[32];		/* 32byte aligned */
123 	void		*ci_mds_buf;
124 
125 	struct pmap *ci_proc_pmap;	/* last userspace pmap */
126 	struct pcb *ci_curpcb;
127 	struct pcb *ci_idle_pcb;
128 
129 	struct intrsource *ci_isources[MAX_INTR_SOURCES];
130 	u_int64_t	ci_ipending;
131 	int		ci_ilevel;
132 	int		ci_idepth;
133 	int		ci_handled_intr_level;
134 	u_int64_t	ci_imask[NIPL];
135 	u_int64_t	ci_iunmask[NIPL];
136 #ifdef DIAGNOSTIC
137 	int		ci_mutex_level;
138 #endif
139 
140 	volatile u_int	ci_flags;
141 	u_int32_t	ci_ipis;
142 
143 	u_int32_t	ci_feature_flags;
144 	u_int32_t	ci_feature_eflags;
145 	u_int32_t	ci_feature_sefflags_ebx;
146 	u_int32_t	ci_feature_sefflags_ecx;
147 	u_int32_t	ci_feature_sefflags_edx;
148 	u_int32_t	ci_feature_amdspec_ebx;
149 	u_int32_t	ci_feature_tpmflags;
150 	u_int32_t	ci_pnfeatset;
151 	u_int32_t	ci_efeature_eax;
152 	u_int32_t	ci_efeature_ecx;
153 	u_int32_t	ci_brand[12];
154 	u_int32_t	ci_amdcacheinfo[4];
155 	u_int32_t	ci_extcacheinfo[4];
156 	u_int32_t	ci_signature;
157 	u_int32_t	ci_family;
158 	u_int32_t	ci_model;
159 	u_int32_t	ci_cflushsz;
160 
161 	int		ci_inatomic;
162 
163 #define __HAVE_CPU_TOPOLOGY
164 	u_int32_t	ci_smt_id;
165 	u_int32_t	ci_core_id;
166 	u_int32_t	ci_pkg_id;
167 
168 	struct cpu_functions *ci_func;
169 	void (*cpu_setup)(struct cpu_info *);
170 	void (*ci_info)(struct cpu_info *);
171 
172 	struct device	*ci_acpicpudev;
173 	volatile u_int	ci_mwait;
174 #define	MWAIT_IN_IDLE		0x1	/* don't need IPI to wake */
175 #define	MWAIT_KEEP_IDLING	0x2	/* cleared by other cpus to wake me */
176 #define	MWAIT_ONLY		0x4	/* set if all idle states use mwait */
177 #define	MWAIT_IDLING	(MWAIT_IN_IDLE | MWAIT_KEEP_IDLING)
178 
179 	int		ci_want_resched;
180 
181 	struct x86_cache_info ci_cinfo[CAI_COUNT];
182 
183 	struct	x86_64_tss *ci_tss;
184 	void		*ci_gdt;
185 
186 	volatile int	ci_ddb_paused;
187 #define CI_DDB_RUNNING		0
188 #define CI_DDB_SHOULDSTOP	1
189 #define CI_DDB_STOPPED		2
190 #define CI_DDB_ENTERDDB		3
191 #define CI_DDB_INDDB		4
192 
193 #ifdef MULTIPROCESSOR
194 	struct srp_hazard	ci_srp_hazards[SRP_HAZARD_NUM];
195 #endif
196 
197 	struct ksensordev	ci_sensordev;
198 	struct ksensor		ci_sensor;
199 #if defined(GPROF) || defined(DDBPROF)
200 	struct gmonparam	*ci_gmon;
201 #endif
202 	u_int32_t	ci_vmm_flags;
203 #define	CI_VMM_VMX	(1 << 0)
204 #define	CI_VMM_SVM	(1 << 1)
205 #define	CI_VMM_RVI	(1 << 2)
206 #define	CI_VMM_EPT	(1 << 3)
207 #define	CI_VMM_DIS	(1 << 4)
208 	union		vmm_cpu_cap ci_vmm_cap;
209 	paddr_t		ci_vmxon_region_pa;
210 	struct vmxon_region *ci_vmxon_region;
211 
212 	int64_t		ci_tsc_skew;		/* counter skew vs cpu0 */
213 
214 	char		ci_panicbuf[512];
215 
216 	paddr_t		ci_vmcs_pa;
217 	struct rwlock	ci_vmcs_lock;
218 };
219 
220 #define CPUF_BSP	0x0001		/* CPU is the original BSP */
221 #define CPUF_AP		0x0002		/* CPU is an AP */
222 #define CPUF_SP		0x0004		/* CPU is only processor */
223 #define CPUF_PRIMARY	0x0008		/* CPU is active primary processor */
224 
225 #define CPUF_IDENTIFY	0x0010		/* CPU may now identify */
226 #define CPUF_IDENTIFIED	0x0020		/* CPU has been identified */
227 
228 #define CPUF_CONST_TSC	0x0040		/* CPU has constant TSC */
229 #define CPUF_USERSEGS	0x0080		/* CPU has curproc's segs and FS.base */
230 #define CPUF_INVAR_TSC	0x0100		/* CPU has invariant TSC */
231 #define CPUF_USERXSTATE	0x0200		/* CPU has curproc's xsave state */
232 
233 #define CPUF_SYNCTSC	0x0800		/* Synchronize TSC */
234 #define CPUF_PRESENT	0x1000		/* CPU is present */
235 #define CPUF_RUNNING	0x2000		/* CPU is running */
236 #define CPUF_PAUSE	0x4000		/* CPU is paused in DDB */
237 #define CPUF_GO		0x8000		/* CPU should start running */
238 #define CPUF_PARK	0x10000		/* CPU should self-park in real mode */
239 #define CPUF_VMM	0x20000		/* CPU is executing in VMM mode */
240 
241 #define PROC_PC(p)	((p)->p_md.md_regs->tf_rip)
242 #define PROC_STACK(p)	((p)->p_md.md_regs->tf_rsp)
243 
244 struct cpu_info_full;
245 extern struct cpu_info_full cpu_info_full_primary;
246 #define cpu_info_primary (*(struct cpu_info *)((char *)&cpu_info_full_primary + 4096*2 - offsetof(struct cpu_info, ci_PAGEALIGN)))
247 
248 extern struct cpu_info *cpu_info_list;
249 
250 #define CPU_INFO_ITERATOR		int
251 #define CPU_INFO_FOREACH(cii, ci)	for (cii = 0, ci = cpu_info_list; \
252 					    ci != NULL; ci = ci->ci_next)
253 
254 #define CPU_INFO_UNIT(ci)	((ci)->ci_dev ? (ci)->ci_dev->dv_unit : 0)
255 
256 /*
257  * Preempt the current process if in interrupt from user mode,
258  * or after the current trap/syscall if in system mode.
259  */
260 extern void need_resched(struct cpu_info *);
261 #define clear_resched(ci) (ci)->ci_want_resched = 0
262 
263 #if defined(MULTIPROCESSOR)
264 
265 #define MAXCPUS		64	/* bitmask */
266 
267 #define CPU_STARTUP(_ci)	((_ci)->ci_func->start(_ci))
268 #define CPU_STOP(_ci)		((_ci)->ci_func->stop(_ci))
269 #define CPU_START_CLEANUP(_ci)	((_ci)->ci_func->cleanup(_ci))
270 
271 #define curcpu()	({struct cpu_info *__ci;                  \
272 			asm volatile("movq %%gs:%P1,%0" : "=r" (__ci) \
273 				:"n" (offsetof(struct cpu_info, ci_self))); \
274 			__ci;})
275 #define cpu_number()	(curcpu()->ci_cpuid)
276 
277 #define CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY)
278 #define CPU_IS_RUNNING(ci)	((ci)->ci_flags & CPUF_RUNNING)
279 
280 extern struct cpu_info *cpu_info[MAXCPUS];
281 
282 void cpu_boot_secondary_processors(void);
283 
284 void cpu_kick(struct cpu_info *);
285 void cpu_unidle(struct cpu_info *);
286 
287 #define CPU_BUSY_CYCLE()	__asm volatile("pause": : : "memory")
288 
289 #else /* !MULTIPROCESSOR */
290 
291 #define MAXCPUS		1
292 
293 #ifdef _KERNEL
294 #define curcpu()		(&cpu_info_primary)
295 
296 #define cpu_kick(ci)
297 #define cpu_unidle(ci)
298 
299 #define CPU_BUSY_CYCLE()	do {} while (0)
300 
301 #endif
302 
303 /*
304  * definitions of cpu-dependent requirements
305  * referenced in generic code
306  */
307 #define	cpu_number()		0
308 #define CPU_IS_PRIMARY(ci)	1
309 #define CPU_IS_RUNNING(ci)	1
310 
311 #endif	/* MULTIPROCESSOR */
312 
313 #include <machine/cpufunc.h>
314 #include <machine/psl.h>
315 
316 static inline unsigned int
317 cpu_rnd_messybits(void)
318 {
319 	unsigned int hi, lo;
320 
321 	__asm volatile("rdtsc" : "=d" (hi), "=a" (lo));
322 
323 	return (hi ^ lo);
324 }
325 
326 #endif /* _KERNEL */
327 
328 #ifdef MULTIPROCESSOR
329 #include <sys/mplock.h>
330 #endif
331 
332 #define aston(p)	((p)->p_md.md_astpending = 1)
333 
334 #define curpcb		curcpu()->ci_curpcb
335 
336 /*
337  * Arguments to hardclock, softclock and statclock
338  * encapsulate the previous machine state in an opaque
339  * clockframe; for now, use generic intrframe.
340  */
341 #define clockframe intrframe
342 
343 #define	CLKF_USERMODE(frame)	USERMODE((frame)->if_cs, (frame)->if_rflags)
344 #define CLKF_PC(frame)		((frame)->if_rip)
345 #define CLKF_INTR(frame)	(curcpu()->ci_idepth > 1)
346 
347 /*
348  * Give a profiling tick to the current process when the user profiling
349  * buffer pages are invalid.  On the i386, request an ast to send us
350  * through usertrap(), marking the proc as needing a profiling tick.
351  */
352 #define	need_proftick(p)	aston(p)
353 
354 void signotify(struct proc *);
355 
356 /*
357  * We need a machine-independent name for this.
358  */
359 extern void (*delay_func)(int);
360 struct timeval;
361 
362 #define DELAY(x)		(*delay_func)(x)
363 #define delay(x)		(*delay_func)(x)
364 
365 
366 #ifdef _KERNEL
367 /* locore.S */
368 extern int biosbasemem;
369 extern int biosextmem;
370 extern int cpu;
371 extern int cpu_feature;
372 extern int cpu_ebxfeature;
373 extern int cpu_ecxfeature;
374 extern int cpu_perf_eax;
375 extern int cpu_perf_ebx;
376 extern int cpu_perf_edx;
377 extern int cpu_apmi_edx;
378 extern int ecpu_ecxfeature;
379 extern int cpu_id;
380 extern char cpu_vendor[];
381 extern int cpuid_level;
382 extern int cpuspeed;
383 extern int cpu_meltdown;
384 
385 /* cpu.c */
386 extern u_int cpu_mwait_size;
387 extern u_int cpu_mwait_states;
388 
389 /* identcpu.c */
390 void	identifycpu(struct cpu_info *);
391 int	cpu_amd64speed(int *);
392 
393 /* machdep.c */
394 void	dumpconf(void);
395 void	cpu_reset(void);
396 void	x86_64_proc0_tss_ldt_init(void);
397 void	cpu_proc_fork(struct proc *, struct proc *);
398 int	amd64_pa_used(paddr_t);
399 extern void (*cpu_idle_cycle_fcn)(void);
400 
401 struct region_descriptor;
402 void	lgdt(struct region_descriptor *);
403 
404 struct pcb;
405 void	savectx(struct pcb *);
406 void	switch_exit(struct proc *, void (*)(struct proc *));
407 void	proc_trampoline(void);
408 
409 /* clock.c */
410 extern void (*initclock_func)(void);
411 void	startclocks(void);
412 void	rtcinit(void);
413 void	rtcstart(void);
414 void	rtcstop(void);
415 void	i8254_delay(int);
416 void	i8254_initclocks(void);
417 void	i8254_startclock(void);
418 void	i8254_inittimecounter(void);
419 void	i8254_inittimecounter_simple(void);
420 
421 /* i8259.c */
422 void	i8259_default_setup(void);
423 
424 void cpu_init_msrs(struct cpu_info *);
425 void cpu_tsx_disable(struct cpu_info *);
426 
427 /* dkcsum.c */
428 void	dkcsumattach(void);
429 
430 /* bus_machdep.c */
431 void x86_bus_space_init(void);
432 void x86_bus_space_mallocok(void);
433 
434 /* powernow-k8.c */
435 void k8_powernow_init(struct cpu_info *);
436 void k8_powernow_setperf(int);
437 
438 /* k1x-pstate.c */
439 void k1x_init(struct cpu_info *);
440 void k1x_setperf(int);
441 
442 void est_init(struct cpu_info *);
443 void est_setperf(int);
444 
445 #ifdef MULTIPROCESSOR
446 /* mp_setperf.c */
447 void mp_setperf_init(void);
448 #endif
449 
450 #endif /* _KERNEL */
451 
452 /*
453  * CTL_MACHDEP definitions.
454  */
455 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
456 #define	CPU_BIOS		2	/* BIOS variables */
457 #define	CPU_BLK2CHR		3	/* convert blk maj into chr one */
458 #define	CPU_CHR2BLK		4	/* convert chr maj into blk one */
459 #define CPU_ALLOWAPERTURE	5	/* allow mmap of /dev/xf86 */
460 #define CPU_CPUVENDOR		6	/* cpuid vendor string */
461 #define CPU_CPUID		7	/* cpuid */
462 #define CPU_CPUFEATURE		8	/* cpuid features */
463 #define CPU_KBDRESET		10	/* keyboard reset under pcvt */
464 #define CPU_XCRYPT		12	/* supports VIA xcrypt in userland */
465 #define CPU_LIDACTION		14	/* action caused by lid close */
466 #define CPU_FORCEUKBD		15	/* Force ukbd(4) as console keyboard */
467 #define CPU_TSCFREQ		16	/* TSC frequency */
468 #define CPU_INVARIANTTSC	17	/* has invariant TSC */
469 #define CPU_PWRACTION		18	/* action caused by power button */
470 #define CPU_MAXID		19	/* number of valid machdep ids */
471 
472 #define	CTL_MACHDEP_NAMES { \
473 	{ 0, 0 }, \
474 	{ "console_device", CTLTYPE_STRUCT }, \
475 	{ "bios", CTLTYPE_INT }, \
476 	{ "blk2chr", CTLTYPE_STRUCT }, \
477 	{ "chr2blk", CTLTYPE_STRUCT }, \
478 	{ "allowaperture", CTLTYPE_INT }, \
479 	{ "cpuvendor", CTLTYPE_STRING }, \
480 	{ "cpuid", CTLTYPE_INT }, \
481 	{ "cpufeature", CTLTYPE_INT }, \
482 	{ 0, 0 }, \
483 	{ "kbdreset", CTLTYPE_INT }, \
484 	{ 0, 0 }, \
485 	{ "xcrypt", CTLTYPE_INT }, \
486 	{ 0, 0 }, \
487 	{ "lidaction", CTLTYPE_INT }, \
488 	{ "forceukbd", CTLTYPE_INT }, \
489 	{ "tscfreq", CTLTYPE_QUAD }, \
490 	{ "invarianttsc", CTLTYPE_INT }, \
491 	{ "pwraction", CTLTYPE_INT }, \
492 }
493 
494 #endif /* !_MACHINE_CPU_H_ */
495