1/* $OpenBSD: fiq_subr.S,v 1.4 2015/01/18 14:55:02 jsg Exp $ */ 2/* $NetBSD: fiq_subr.S,v 1.3 2002/04/12 18:50:31 thorpej Exp $ */ 3 4/* 5 * Copyright (c) 2001 Wasabi Systems, Inc. 6 * All rights reserved. 7 * 8 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed for the NetBSD Project by 21 * Wasabi Systems, Inc. 22 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 23 * or promote products derived from this software without specific prior 24 * written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39#include "assym.h" 40 41#include <arm/armreg.h> 42#include <arm/asm.h> 43#include <arm/cpuconf.h> 44 45#define SWITCH_TO_FIQ_MODE \ 46 mrs r2, cpsr ; \ 47 mov r3, r2 ; \ 48 bic r2, r2, #(PSR_MODE) ; \ 49 orr r2, r2, #(PSR_FIQ32_MODE) ; \ 50 msr cpsr_c, r2 51 52#define BACK_TO_SVC_MODE \ 53 msr cpsr_c, r3 54 55/* 56 * fiq_getregs: 57 * 58 * Fetch the FIQ mode banked registers into the fiqhandler 59 * structure. 60 */ 61ENTRY(fiq_getregs) 62 SWITCH_TO_FIQ_MODE 63 64 stmia r0, {r8-r13} 65 66 BACK_TO_SVC_MODE 67 mov pc, lr 68 69/* 70 * fiq_setregs: 71 * 72 * Load the FIQ mode banked registers from the fiqhandler 73 * structure. 74 */ 75ENTRY(fiq_setregs) 76 SWITCH_TO_FIQ_MODE 77 78 ldmia r0, {r8-r13} 79 80 BACK_TO_SVC_MODE 81 mov pc, lr 82 83/* 84 * fiq_nullhandler: 85 * 86 * Null handler copied down to the FIQ vector when the last 87 * FIQ handler is removed. 88 */ 89 .global _C_LABEL(fiq_nullhandler), _C_LABEL(fiq_nullhandler_end) 90_C_LABEL(fiq_nullhandler): 91 subs pc, lr, #4 92_C_LABEL(fiq_nullhandler_end): 93