1 /* $OpenBSD: bus.h,v 1.8 2021/02/16 12:33:22 kettenis Exp $ */ 2 /* 3 * Copyright (c) 2003-2004 Opsycon AB Sweden. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 */ 25 26 #ifndef _MACHINE_BUS_H_ 27 #define _MACHINE_BUS_H_ 28 29 #ifdef __STDC__ 30 #define CAT(a,b) a##b 31 #define CAT3(a,b,c) a##b##c 32 #else 33 #define CAT(a,b) a/**/b 34 #define CAT3(a,b,c) a/**/b/**/c 35 #endif 36 37 /* 38 * Bus access types. 39 */ 40 struct bus_space; 41 typedef u_long bus_addr_t; 42 typedef u_long bus_size_t; 43 typedef u_long bus_space_handle_t; 44 typedef struct bus_space *bus_space_tag_t; 45 typedef struct bus_space bus_space_t; 46 47 struct bus_space { 48 bus_addr_t bus_base; 49 void *bus_private; 50 u_int8_t (*_space_read_1)(bus_space_tag_t , bus_space_handle_t, 51 bus_size_t); 52 void (*_space_write_1)(bus_space_tag_t , bus_space_handle_t, 53 bus_size_t, u_int8_t); 54 u_int16_t (*_space_read_2)(bus_space_tag_t , bus_space_handle_t, 55 bus_size_t); 56 void (*_space_write_2)(bus_space_tag_t , bus_space_handle_t, 57 bus_size_t, u_int16_t); 58 u_int32_t (*_space_read_4)(bus_space_tag_t , bus_space_handle_t, 59 bus_size_t); 60 void (*_space_write_4)(bus_space_tag_t , bus_space_handle_t, 61 bus_size_t, u_int32_t); 62 u_int64_t (*_space_read_8)(bus_space_tag_t , bus_space_handle_t, 63 bus_size_t); 64 void (*_space_write_8)(bus_space_tag_t , bus_space_handle_t, 65 bus_size_t, u_int64_t); 66 void (*_space_read_raw_2)(bus_space_tag_t, bus_space_handle_t, 67 bus_addr_t, u_int8_t *, bus_size_t); 68 void (*_space_write_raw_2)(bus_space_tag_t, bus_space_handle_t, 69 bus_addr_t, const u_int8_t *, bus_size_t); 70 void (*_space_read_raw_4)(bus_space_tag_t, bus_space_handle_t, 71 bus_addr_t, u_int8_t *, bus_size_t); 72 void (*_space_write_raw_4)(bus_space_tag_t, bus_space_handle_t, 73 bus_addr_t, const u_int8_t *, bus_size_t); 74 void (*_space_read_raw_8)(bus_space_tag_t, bus_space_handle_t, 75 bus_addr_t, u_int8_t *, bus_size_t); 76 void (*_space_write_raw_8)(bus_space_tag_t, bus_space_handle_t, 77 bus_addr_t, const u_int8_t *, bus_size_t); 78 int (*_space_map)(bus_space_tag_t , bus_addr_t, 79 bus_size_t, int, bus_space_handle_t *); 80 void (*_space_unmap)(bus_space_tag_t, bus_space_handle_t, 81 bus_size_t); 82 int (*_space_subregion)(bus_space_tag_t, bus_space_handle_t, 83 bus_size_t, bus_size_t, bus_space_handle_t *); 84 void * (*_space_vaddr)(bus_space_tag_t, bus_space_handle_t); 85 paddr_t (*_space_mmap)(bus_space_tag_t, bus_addr_t, off_t, 86 int, int); 87 }; 88 89 #define bus_space_read_1(t, h, o) (*(t)->_space_read_1)((t), (h), (o)) 90 #define bus_space_read_2(t, h, o) (*(t)->_space_read_2)((t), (h), (o)) 91 #define bus_space_read_4(t, h, o) (*(t)->_space_read_4)((t), (h), (o)) 92 #define bus_space_read_8(t, h, o) (*(t)->_space_read_8)((t), (h), (o)) 93 94 #define bus_space_write_1(t, h, o, v) (*(t)->_space_write_1)((t), (h), (o), (v)) 95 #define bus_space_write_2(t, h, o, v) (*(t)->_space_write_2)((t), (h), (o), (v)) 96 #define bus_space_write_4(t, h, o, v) (*(t)->_space_write_4)((t), (h), (o), (v)) 97 #define bus_space_write_8(t, h, o, v) (*(t)->_space_write_8)((t), (h), (o), (v)) 98 99 #define bus_space_read_raw_2(t, h, o) \ 100 (*(t)->_space_read_2)((t), (h), (o)) 101 #define bus_space_read_raw_4(t, h, o) \ 102 (*(t)->_space_read_4)((t), (h), (o)) 103 #define bus_space_read_raw_8(t, h, o) \ 104 (*(t)->_space_read_8)((t), (h), (o)) 105 106 #define bus_space_write_raw_2(t, h, o, v) \ 107 (*(t)->_space_write_2)((t), (h), (o), (v)) 108 #define bus_space_write_raw_4(t, h, o, v) \ 109 (*(t)->_space_write_4)((t), (h), (o), (v)) 110 #define bus_space_write_raw_8(t, h, o, v) \ 111 (*(t)->_space_write_8)((t), (h), (o), (v)) 112 113 #define bus_space_read_raw_multi_2(t, h, a, b, l) \ 114 (*(t)->_space_read_raw_2)((t), (h), (a), (b), (l)) 115 #define bus_space_read_raw_multi_4(t, h, a, b, l) \ 116 (*(t)->_space_read_raw_4)((t), (h), (a), (b), (l)) 117 #define bus_space_read_raw_multi_8(t, h, a, b, l) \ 118 (*(t)->_space_read_raw_8)((t), (h), (a), (b), (l)) 119 120 #define bus_space_write_raw_multi_2(t, h, a, b, l) \ 121 (*(t)->_space_write_raw_2)((t), (h), (a), (b), (l)) 122 #define bus_space_write_raw_multi_4(t, h, a, b, l) \ 123 (*(t)->_space_write_raw_4)((t), (h), (a), (b), (l)) 124 #define bus_space_write_raw_multi_8(t, h, a, b, l) \ 125 (*(t)->_space_write_raw_8)((t), (h), (a), (b), (l)) 126 127 #define bus_space_map(t, o, s, c, p) (*(t)->_space_map)((t), (o), (s), (c), (p)) 128 #define bus_space_unmap(t, h, s) (*(t)->_space_unmap)((t), (h), (s)) 129 #define bus_space_subregion(t, h, o, s, p) \ 130 (*(t)->_space_subregion)((t), (h), (o), (s), (p)) 131 132 #define BUS_SPACE_MAP_CACHEABLE 0x01 133 #define BUS_SPACE_MAP_POSTED 0x02 134 #define BUS_SPACE_MAP_LINEAR 0x04 135 #define BUS_SPACE_MAP_PREFETCHABLE 0x08 136 137 #define bus_space_vaddr(t, h) (*(t)->_space_vaddr)((t), (h)) 138 #define bus_space_mmap(t, a, o, p, f) \ 139 (*(t)->_space_mmap)((t), (a), (o), (p), (f)) 140 141 /*----------------------------------------------------------------------------*/ 142 #define bus_space_read_multi(n,m) \ 143 static __inline void \ 144 CAT(bus_space_read_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \ 145 bus_size_t o, CAT3(u_int,m,_t) *x, size_t cnt) \ 146 { \ 147 while (cnt--) \ 148 *x++ = CAT(bus_space_read_,n)(bst, bsh, o); \ 149 } 150 151 bus_space_read_multi(1,8) 152 bus_space_read_multi(2,16) 153 bus_space_read_multi(4,32) 154 bus_space_read_multi(8,64) 155 156 /*----------------------------------------------------------------------------*/ 157 #define bus_space_read_region(n,m) \ 158 static __inline void \ 159 CAT(bus_space_read_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \ 160 bus_addr_t ba, CAT3(u_int,m,_t) *x, size_t cnt) \ 161 { \ 162 while (cnt--) { \ 163 *x++ = CAT(bus_space_read_,n)(bst, bsh, ba); \ 164 ba += (n); \ 165 } \ 166 } 167 168 bus_space_read_region(1,8) 169 bus_space_read_region(2,16) 170 bus_space_read_region(4,32) 171 bus_space_read_region(8,64) 172 173 /*----------------------------------------------------------------------------*/ 174 #define bus_space_read_raw_region(n,m) \ 175 static __inline void \ 176 CAT(bus_space_read_raw_region_,n)(bus_space_tag_t bst, \ 177 bus_space_handle_t bsh, \ 178 bus_addr_t ba, u_int8_t *x, size_t cnt) \ 179 { \ 180 cnt >>= ((n) >> 1); \ 181 while (cnt--) { \ 182 CAT(bus_space_read_raw_multi_,n)(bst, bsh, ba, x, (n)); \ 183 ba += (n); \ 184 x += (n); \ 185 } \ 186 } 187 188 bus_space_read_raw_region(2,16) 189 bus_space_read_raw_region(4,32) 190 bus_space_read_raw_region(8,64) 191 192 /*----------------------------------------------------------------------------*/ 193 #define bus_space_write_multi(n,m) \ 194 static __inline void \ 195 CAT(bus_space_write_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \ 196 bus_size_t o, const CAT3(u_int,m,_t) *x, size_t cnt) \ 197 { \ 198 while (cnt--) \ 199 CAT(bus_space_write_,n)(bst, bsh, o, *x++); \ 200 } 201 202 bus_space_write_multi(1,8) 203 bus_space_write_multi(2,16) 204 bus_space_write_multi(4,32) 205 bus_space_write_multi(8,64) 206 207 /*----------------------------------------------------------------------------*/ 208 #define bus_space_write_region(n,m) \ 209 static __inline void \ 210 CAT(bus_space_write_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \ 211 bus_addr_t ba, const CAT3(u_int,m,_t) *x, size_t cnt) \ 212 { \ 213 while (cnt--) { \ 214 CAT(bus_space_write_,n)(bst, bsh, ba, *x++); \ 215 ba += (n); \ 216 } \ 217 } 218 219 bus_space_write_region(1,8) 220 bus_space_write_region(2,16) 221 bus_space_write_region(4,32) 222 bus_space_write_region(8,64) 223 224 /*----------------------------------------------------------------------------*/ 225 #define bus_space_write_raw_region(n,m) \ 226 static __inline void \ 227 CAT(bus_space_write_raw_region_,n)(bus_space_tag_t bst, \ 228 bus_space_handle_t bsh, \ 229 bus_addr_t ba, const u_int8_t *x, size_t cnt) \ 230 { \ 231 cnt >>= ((n) >> 1); \ 232 while (cnt--) { \ 233 CAT(bus_space_write_raw_multi_,n)(bst, bsh, ba, x, (n)); \ 234 ba += (n); \ 235 x += (n); \ 236 } \ 237 } 238 239 bus_space_write_raw_region(2,16) 240 bus_space_write_raw_region(4,32) 241 bus_space_write_raw_region(8,64) 242 243 /*----------------------------------------------------------------------------*/ 244 #define bus_space_set_region(n,m) \ 245 static __inline void \ 246 CAT(bus_space_set_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \ 247 bus_addr_t ba, CAT3(u_int,m,_t) x, size_t cnt) \ 248 { \ 249 while (cnt--) { \ 250 CAT(bus_space_write_,n)(bst, bsh, ba, x); \ 251 ba += (n); \ 252 } \ 253 } 254 255 bus_space_set_region(1,8) 256 bus_space_set_region(2,16) 257 bus_space_set_region(4,32) 258 bus_space_set_region(8,64) 259 260 /*----------------------------------------------------------------------------*/ 261 static __inline void 262 bus_space_copy_1(void *v, bus_space_handle_t h1, bus_size_t o1, 263 bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 264 { 265 char *s = (char *)(h1 + o1); 266 char *d = (char *)(h2 + o2); 267 268 while (c--) 269 *d++ = *s++; 270 } 271 272 273 static __inline void 274 bus_space_copy_2(void *v, bus_space_handle_t h1, bus_size_t o1, 275 bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 276 { 277 short *s = (short *)(h1 + o1); 278 short *d = (short *)(h2 + o2); 279 280 while (c--) 281 *d++ = *s++; 282 } 283 284 static __inline void 285 bus_space_copy_4(void *v, bus_space_handle_t h1, bus_size_t o1, 286 bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 287 { 288 int *s = (int *)(h1 + o1); 289 int *d = (int *)(h2 + o2); 290 291 while (c--) 292 *d++ = *s++; 293 } 294 295 static __inline void 296 bus_space_copy_8(void *v, bus_space_handle_t h1, bus_size_t o1, 297 bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 298 { 299 int64_t *s = (int64_t *)(h1 + o1); 300 int64_t *d = (int64_t *)(h2 + o2); 301 302 while (c--) 303 *d++ = *s++; 304 } 305 306 /*----------------------------------------------------------------------------*/ 307 /* 308 * Bus read/write barrier methods. 309 * 310 * void bus_space_barrier(bus_space_tag_t tag, 311 * bus_space_handle_t bsh, bus_size_t offset, 312 * bus_size_t len, int flags); 313 * 314 */ 315 static inline void 316 bus_space_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offset, 317 bus_size_t length, int flags) 318 { 319 __asm__ volatile ("dsb sy" ::: "memory"); 320 } 321 #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ 322 #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ 323 324 #define BUS_DMA_WAITOK 0x0000 325 #define BUS_DMA_NOWAIT 0x0001 326 #define BUS_DMA_ALLOCNOW 0x0002 327 #define BUS_DMA_COHERENT 0x0008 328 #define BUS_DMA_BUS1 0x0010 /* placeholders for bus functions... */ 329 #define BUS_DMA_BUS2 0x0020 330 #define BUS_DMA_BUS3 0x0040 331 #define BUS_DMA_BUS4 0x0080 332 #define BUS_DMA_READ 0x0100 /* mapping is device -> memory only */ 333 #define BUS_DMA_WRITE 0x0200 /* mapping is memory -> device only */ 334 #define BUS_DMA_STREAMING 0x0400 /* hint: sequential, unidirectional */ 335 #define BUS_DMA_ZERO 0x0800 /* zero memory in dmamem_alloc */ 336 #define BUS_DMA_NOCACHE 0x1000 337 #define BUS_DMA_64BIT 0x2000 /* device handles 64bit dva */ 338 339 /* Forwards needed by prototypes below. */ 340 struct mbuf; 341 struct proc; 342 struct uio; 343 344 #define BUS_DMASYNC_POSTREAD 0x0001 345 #define BUS_DMASYNC_POSTWRITE 0x0002 346 #define BUS_DMASYNC_PREREAD 0x0004 347 #define BUS_DMASYNC_PREWRITE 0x0008 348 349 typedef struct machine_bus_dma_tag *bus_dma_tag_t; 350 typedef struct machine_bus_dmamap *bus_dmamap_t; 351 352 /* 353 * bus_dma_segment_t 354 * 355 * Describes a single contiguous DMA transaction. Values 356 * are suitable for programming into DMA registers. 357 */ 358 struct machine_bus_dma_segment { 359 bus_addr_t ds_addr; /* DMA address */ 360 bus_size_t ds_len; /* length of transfer */ 361 362 paddr_t _ds_paddr; /* CPU address */ 363 vaddr_t _ds_vaddr; /* CPU address */ 364 }; 365 typedef struct machine_bus_dma_segment bus_dma_segment_t; 366 367 /* 368 * bus_dma_tag_t 369 * 370 * A machine-dependent opaque type describing the implementation of 371 * DMA for a given bus. 372 */ 373 374 struct machine_bus_dma_tag { 375 void *_cookie; /* cookie used in the guts */ 376 int _flags; /* misc. flags */ 377 378 /* 379 * DMA mapping methods. 380 */ 381 int (*_dmamap_create)(bus_dma_tag_t , bus_size_t, int, 382 bus_size_t, bus_size_t, int, bus_dmamap_t *); 383 void (*_dmamap_destroy)(bus_dma_tag_t , bus_dmamap_t); 384 int (*_dmamap_load)(bus_dma_tag_t , bus_dmamap_t, void *, 385 bus_size_t, struct proc *, int); 386 int (*_dmamap_load_mbuf)(bus_dma_tag_t , bus_dmamap_t, 387 struct mbuf *, int); 388 int (*_dmamap_load_uio)(bus_dma_tag_t , bus_dmamap_t, 389 struct uio *, int); 390 int (*_dmamap_load_raw)(bus_dma_tag_t , bus_dmamap_t, 391 bus_dma_segment_t *, int, bus_size_t, int); 392 int (*_dmamap_load_buffer)(bus_dma_tag_t, bus_dmamap_t, void *, 393 bus_size_t, struct proc *, int, paddr_t *, int *, int); 394 void (*_dmamap_unload)(bus_dma_tag_t , bus_dmamap_t); 395 void (*_dmamap_sync)(bus_dma_tag_t , bus_dmamap_t, 396 bus_addr_t, bus_size_t, int); 397 398 /* 399 * DMA memory utility functions. 400 */ 401 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 402 bus_size_t, bus_dma_segment_t *, int, int *, int); 403 void (*_dmamem_free)(bus_dma_tag_t, bus_dma_segment_t *, int); 404 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 405 int, size_t, caddr_t *, int); 406 void (*_dmamem_unmap)(bus_dma_tag_t, caddr_t, size_t); 407 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 408 int, off_t, int, int); 409 410 /* 411 * internal memory address translation information. 412 */ 413 bus_addr_t _dma_mask; 414 }; 415 416 #define bus_dmamap_create(t, s, n, m, b, f, p) \ 417 (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p)) 418 #define bus_dmamap_destroy(t, p) \ 419 (*(t)->_dmamap_destroy)((t), (p)) 420 #define bus_dmamap_load(t, m, b, s, p, f) \ 421 (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f)) 422 #define bus_dmamap_load_mbuf(t, m, b, f) \ 423 (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f)) 424 #define bus_dmamap_load_uio(t, m, u, f) \ 425 (*(t)->_dmamap_load_uio)((t), (m), (u), (f)) 426 #define bus_dmamap_load_raw(t, m, sg, n, s, f) \ 427 (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) 428 #define bus_dmamap_unload(t, p) \ 429 (*(t)->_dmamap_unload)((t), (p)) 430 #define bus_dmamap_sync(t, p, a, l, o) \ 431 (void)((t)->_dmamap_sync ? \ 432 (*(t)->_dmamap_sync)((t), (p), (a), (l), (o)) : (void)0) 433 434 #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ 435 (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) 436 #define bus_dmamem_free(t, sg, n) \ 437 (*(t)->_dmamem_free)((t), (sg), (n)) 438 #define bus_dmamem_map(t, sg, n, s, k, f) \ 439 (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) 440 #define bus_dmamem_unmap(t, k, s) \ 441 (*(t)->_dmamem_unmap)((t), (k), (s)) 442 #define bus_dmamem_mmap(t, sg, n, o, p, f) \ 443 (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) 444 445 int _dmamap_create(bus_dma_tag_t, bus_size_t, int, 446 bus_size_t, bus_size_t, int, bus_dmamap_t *); 447 void _dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 448 int _dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, 449 bus_size_t, struct proc *, int); 450 int _dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, struct mbuf *, int); 451 int _dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, struct uio *, int); 452 int _dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, 453 bus_dma_segment_t *, int, bus_size_t, int); 454 int _dmamap_load_buffer(bus_dma_tag_t, bus_dmamap_t, void *, 455 bus_size_t, struct proc *, int, paddr_t *, int *, int); 456 void _dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 457 void _dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 458 bus_size_t, int); 459 460 int _dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t, 461 bus_size_t, bus_dma_segment_t *, int, int *, int); 462 void _dmamem_free(bus_dma_tag_t, bus_dma_segment_t *, int); 463 int _dmamem_map(bus_dma_tag_t, bus_dma_segment_t *, 464 int, size_t, caddr_t *, int); 465 void _dmamem_unmap(bus_dma_tag_t, caddr_t, size_t); 466 paddr_t _dmamem_mmap(bus_dma_tag_t, bus_dma_segment_t *, int, off_t, int, int); 467 int _dmamem_alloc_range(bus_dma_tag_t, bus_size_t, bus_size_t, bus_size_t, 468 bus_dma_segment_t *, int, int *, int, paddr_t, paddr_t); 469 470 /* 471 * bus_dmamap_t 472 * 473 * Describes a DMA mapping. 474 */ 475 struct machine_bus_dmamap { 476 /* 477 * PRIVATE MEMBERS: not for use by machine-independent code. 478 */ 479 bus_size_t _dm_size; /* largest DMA transfer mappable */ 480 int _dm_segcnt; /* number of segs this map can map */ 481 bus_size_t _dm_maxsegsz; /* largest possible segment */ 482 bus_size_t _dm_boundary; /* don't cross this */ 483 int _dm_flags; /* misc. flags */ 484 485 void *_dm_cookie; /* cookie for bus-specific functions */ 486 487 /* 488 * PUBLIC MEMBERS: these are used by machine-independent code. 489 */ 490 bus_size_t dm_mapsize; /* size of the mapping */ 491 int dm_nsegs; /* # valid segments in mapping */ 492 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 493 }; 494 495 int generic_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, 496 bus_space_handle_t *); 497 void generic_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t); 498 int generic_space_region(bus_space_tag_t, bus_space_handle_t, bus_size_t, 499 bus_size_t, bus_space_handle_t *); 500 void *generic_space_vaddr(bus_space_tag_t, bus_space_handle_t); 501 paddr_t generic_space_mmap(bus_space_tag_t, bus_addr_t, off_t, int, int); 502 uint8_t generic_space_read_1(bus_space_tag_t, bus_space_handle_t, bus_size_t); 503 uint16_t generic_space_read_2(bus_space_tag_t, bus_space_handle_t, bus_size_t); 504 uint32_t generic_space_read_4(bus_space_tag_t, bus_space_handle_t, bus_size_t); 505 uint64_t generic_space_read_8(bus_space_tag_t, bus_space_handle_t, bus_size_t); 506 void generic_space_read_raw_2(bus_space_tag_t, bus_space_handle_t, 507 bus_addr_t, uint8_t *, bus_size_t); 508 void generic_space_write_1(bus_space_tag_t, bus_space_handle_t, bus_size_t, 509 uint8_t); 510 void generic_space_write_2(bus_space_tag_t, bus_space_handle_t, bus_size_t, 511 uint16_t); 512 void generic_space_write_4(bus_space_tag_t, bus_space_handle_t, bus_size_t, 513 uint32_t); 514 void generic_space_write_8(bus_space_tag_t, bus_space_handle_t, bus_size_t, 515 uint64_t); 516 void generic_space_write_raw_2(bus_space_tag_t, bus_space_handle_t, 517 bus_addr_t, const uint8_t *, bus_size_t); 518 void generic_space_read_raw_4(bus_space_tag_t, bus_space_handle_t, 519 bus_addr_t, uint8_t *, bus_size_t); 520 void generic_space_write_raw_4(bus_space_tag_t, bus_space_handle_t, 521 bus_addr_t, const uint8_t *, bus_size_t); 522 void generic_space_read_raw_8(bus_space_tag_t, bus_space_handle_t, 523 bus_addr_t, uint8_t *, bus_size_t); 524 void generic_space_write_raw_8(bus_space_tag_t, bus_space_handle_t, 525 bus_addr_t, const uint8_t *, bus_size_t); 526 527 #endif /* _MACHINE_BUS_H_ */ 528