1 /* $OpenBSD: pte.h,v 1.5 2017/04/13 23:29:02 kettenis Exp $ */ 2 /* 3 * Copyright (c) 2014 Dale Rahn <drahn@dalerahn.com> 4 * 5 * Permission to use, copy, modify, and distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 #ifndef _ARM_PTE_H_ 18 #define _ARM_PTE_H_ 19 20 #include "arm64/vmparam.h" 21 22 /* level X descriptor */ 23 #define Lx_TYPE_MASK (0x00000003) /* mask of type bits */ 24 #define Lx_TYPE_S (0x00000001) 25 #define Lx_TYPE_PT (0x00000003) 26 // XXX need to investigate use of these 27 #define Lx_PT_NS (1ULL<<63) 28 #define Lx_PT_AP00 (0ULL<<61) 29 #define Lx_PT_AP01 (1ULL<<61) 30 #define Lx_PT_AP10 (2ULL<<61) 31 #define Lx_PT_AP11 (3ULL<<61) 32 #define Lx_PT_XN (1ULL<<60) 33 #define Lx_PT_PXN (1ULL<<59) 34 #define Lx_TABLE_ALIGN (4096) 35 36 /* Block and Page attributes */ 37 /* TODO: Add the upper attributes */ 38 #define ATTR_MASK_H (0xfff0000000000000ULL) 39 #define ATTR_MASK_L (0x0000000000000fffULL) 40 #define ATTR_MASK (ATTR_MASK_H | ATTR_MASK_L) 41 /* Bits 58:55 are reserved for software */ 42 #define ATTR_SW_MANAGED (1UL << 56) 43 #define ATTR_SW_WIRED (1UL << 55) 44 #define ATTR_UXN (1UL << 54) 45 #define ATTR_PXN (1UL << 53) 46 #define ATTR_nG (1 << 11) 47 #define ATTR_AF (1 << 10) 48 #define ATTR_SH(x) ((x) << 8) 49 #define ATTR_AP_RW_BIT (1 << 7) 50 #define ATTR_AP(x) ((x) << 6) 51 #define ATTR_AP_MASK ATTR_AP(3) 52 #define ATTR_NS (1 << 5) 53 #define ATTR_IDX(x) ((x) << 2) 54 #define ATTR_IDX_MASK (7 << 2) 55 56 #define PTE_ATTR_DEV 0 57 #define PTE_ATTR_CI 1 58 #define PTE_ATTR_WB 2 59 #define PTE_ATTR_WT 3 60 61 62 #define SH_INNER 3 63 #define SH_OUTER 2 64 #define SH_NONE 0 65 66 /* Level 0 table, 512GiB per entry */ 67 #define L0_SHIFT 39 68 #define L0_INVAL 0x0 /* An invalid address */ 69 #define L0_BLOCK 0x1 /* A block */ 70 /* 0x2 also marks an invalid address */ 71 #define L0_TABLE 0x3 /* A next-level table */ 72 73 /* Level 1 table, 1GiB per entry */ 74 #define L1_SHIFT 30 75 #define L1_SIZE (1 << L1_SHIFT) 76 #define L1_OFFSET (L1_SIZE - 1) 77 #define L1_INVAL L0_INVAL 78 #define L1_BLOCK L0_BLOCK 79 #define L1_TABLE L0_TABLE 80 81 /* Level 2 table, 2MiB per entry */ 82 #define L2_SHIFT 21 83 #define L2_SIZE (1 << L2_SHIFT) 84 #define L2_OFFSET (L2_SIZE - 1) 85 #define L2_INVAL L0_INVAL 86 #define L2_BLOCK L0_BLOCK 87 #define L2_TABLE L0_TABLE 88 89 /* page mapping */ 90 #define L3_P 0x3 91 92 #define Ln_ENTRIES (1 << 9) 93 #define Ln_ADDR_MASK (Ln_ENTRIES - 1) 94 #define Ln_TABLE_MASK ((1 << 12) - 1) 95 96 /* physical page mask */ 97 #define PTE_RPGN (((1ULL << 48) - 1) & ~PAGE_MASK) 98 99 /* XXX */ 100 #ifndef _LOCORE 101 struct pte { 102 uint64_t pte; 103 }; 104 105 typedef uint64_t pd_entry_t; /* L1 table entry */ 106 typedef uint64_t pt_entry_t; /* L2 table entry */ 107 108 struct pv_node { 109 }; 110 111 #endif /* _LOCORE */ 112 113 114 /// REWRITE 115 #define L2_L_SIZE 0x00010000 /* 64K */ 116 #define L2_L_OFFSET (L2_L_SIZE - 1) 117 #define L2_L_FRAME (~L2_L_OFFSET) 118 #define L2_L_SHIFT 16 119 120 #define L2_S_SIZE 0x00001000 /* 4K */ 121 #define L2_S_OFFSET (L2_S_SIZE - 1) 122 #define L2_S_FRAME (~L2_S_OFFSET) 123 #define L2_S_SHIFT 12 124 125 /// 126 127 #endif /* _ARM_PTE_H_ */ 128