1 /* $OpenBSD: omrng.c,v 1.2 2020/05/29 04:42:23 deraadt Exp $ */ 2 /* 3 * Copyright (c) 2018, 2020 Mark Kettenis <kettenis@openbsd.org> 4 * 5 * Permission to use, copy, modify, and distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <sys/param.h> 19 #include <sys/systm.h> 20 #include <sys/device.h> 21 #include <sys/timeout.h> 22 23 #include <machine/bus.h> 24 #include <machine/fdt.h> 25 26 #include <dev/ofw/openfirm.h> 27 #include <dev/ofw/fdt.h> 28 29 #include <armv7/omap/prcmvar.h> 30 31 /* Registers */ 32 #define RNG_OUTPUT0 0x0000 33 #define RNG_OUTPUT1 0x0004 34 #define RNG_STATUS 0x0008 35 #define RNG_STATUS_READY (1 << 0) 36 #define RNG_STATUS_SHUTDOWN (1 << 1) 37 #define RNG_INTACK 0x0010 38 #define RNG_INTACK_READY (1 << 0) 39 #define RNG_INTACK_SHUTDOWN (1 << 1) 40 #define RNG_CONTROL 0x0014 41 #define RNG_CONTROL_START_CYCLES_SHIFT 16 42 #define RNG_CONTROL_TRNG_EN (1 << 10) 43 #define RNG_CONFIG 0x0018 44 #define RNG_CONFIG_MIN_CYCLES_SHIFT 0 45 #define RNG_CONFIG_MAX_CYCLES_SHIFT 16 46 #define RNG_ALARMCNT 0x001c 47 #define RNG_ALARMCNT_ALARM_TH_SHIFT 0 48 #define RNG_ALARMCNT_SHUTDOWN_TH_SHIFT 16 49 #define RNG_FROENABLE 0x0020 50 #define RNG_FROENABLE_MASK 0xffffff 51 #define RNG_FRODETUNE 0x0024 52 #define RNG_ALARMMASK 0x0028 53 #define RNG_ALARMSTOP 0x002c 54 55 #define HREAD4(sc, reg) \ 56 (bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg))) 57 #define HWRITE4(sc, reg, val) \ 58 bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val)) 59 #define HSET4(sc, reg, bits) \ 60 HWRITE4((sc), (reg), HREAD4((sc), (reg)) | (bits)) 61 #define HCLR4(sc, reg, bits) \ 62 HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits)) 63 64 struct omrng_softc { 65 struct device sc_dev; 66 bus_space_tag_t sc_iot; 67 bus_space_handle_t sc_ioh; 68 69 struct timeout sc_to; 70 }; 71 72 int omrng_match(struct device *, void *, void *); 73 void omrng_attach(struct device *, struct device *, void *); 74 75 struct cfattach omrng_ca = { 76 sizeof (struct omrng_softc), omrng_match, omrng_attach 77 }; 78 79 struct cfdriver omrng_cd = { 80 NULL, "omrng", DV_DULL 81 }; 82 83 void omrng_rnd(void *); 84 85 int 86 omrng_match(struct device *parent, void *match, void *aux) 87 { 88 struct fdt_attach_args *faa = aux; 89 90 return OF_is_compatible(faa->fa_node, "ti,omap4-rng"); 91 } 92 93 void 94 omrng_attach(struct device *parent, struct device *self, void *aux) 95 { 96 struct omrng_softc *sc = (struct omrng_softc *)self; 97 struct fdt_attach_args *faa = aux; 98 99 if (faa->fa_nreg < 1) { 100 printf(": no registers\n"); 101 return; 102 } 103 104 sc->sc_iot = faa->fa_iot; 105 if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr, 106 faa->fa_reg[0].size, 0, &sc->sc_ioh)) { 107 printf(": can't map registers\n"); 108 return; 109 } 110 111 printf("\n"); 112 113 if (OF_getproplen(faa->fa_node, "ti,hwmods") > 0) 114 prcm_enablemodule(PRCM_RNG); 115 116 /* Configure and enable the RNG. */ 117 HWRITE4(sc, RNG_CONFIG, 0x21 << RNG_CONFIG_MIN_CYCLES_SHIFT | 118 0x22 << RNG_CONFIG_MAX_CYCLES_SHIFT); 119 HWRITE4(sc, RNG_FRODETUNE, 0); 120 HWRITE4(sc, RNG_FROENABLE, RNG_FROENABLE_MASK); 121 HWRITE4(sc, RNG_ALARMCNT, 0xff << RNG_ALARMCNT_ALARM_TH_SHIFT | 122 0x4 << RNG_ALARMCNT_SHUTDOWN_TH_SHIFT); 123 HWRITE4(sc, RNG_CONTROL, 0xff << RNG_CONTROL_START_CYCLES_SHIFT | 124 RNG_CONTROL_TRNG_EN); 125 126 timeout_set(&sc->sc_to, omrng_rnd, sc); 127 omrng_rnd(sc); 128 } 129 130 void 131 omrng_rnd(void *arg) 132 { 133 struct omrng_softc *sc = arg; 134 uint32_t status, detune; 135 136 status = HREAD4(sc, RNG_STATUS); 137 if (status & RNG_STATUS_SHUTDOWN) { 138 /* Clear alarms. */ 139 HWRITE4(sc, RNG_ALARMMASK, 0); 140 HWRITE4(sc, RNG_ALARMSTOP, 0); 141 142 /* Detune FROs that are shutdown. */ 143 detune = ~HREAD4(sc, RNG_FROENABLE) & RNG_FROENABLE_MASK; 144 HSET4(sc, RNG_FRODETUNE, detune); 145 146 /* Re-enable them. */ 147 HWRITE4(sc, RNG_FROENABLE, RNG_FROENABLE_MASK); 148 HWRITE4(sc, RNG_INTACK, RNG_INTACK_SHUTDOWN); 149 } 150 if (status & RNG_STATUS_READY) { 151 enqueue_randomness(HREAD4(sc, RNG_OUTPUT0)); 152 enqueue_randomness(HREAD4(sc, RNG_OUTPUT1)); 153 HWRITE4(sc, RNG_INTACK, RNG_INTACK_READY); 154 } 155 156 timeout_add_sec(&sc->sc_to, 1); 157 } 158