1 /* $OpenBSD: cpu.h,v 1.85 2013/03/23 16:12:22 deraadt Exp $ */ 2 3 /* 4 * Copyright (c) 2000-2004 Michael Shalayeff 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 25 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 26 * THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 /* 29 * Copyright (c) 1988-1994, The University of Utah and 30 * the Computer Systems Laboratory at the University of Utah (CSL). 31 * All rights reserved. 32 * 33 * Permission to use, copy, modify and distribute this software is hereby 34 * granted provided that (1) source code retains these copyright, permission, 35 * and disclaimer notices, and (2) redistributions including binaries 36 * reproduce the notices in supporting documentation, and (3) all advertising 37 * materials mentioning features or use of this software display the following 38 * acknowledgement: ``This product includes software developed by the 39 * Computer Systems Laboratory at the University of Utah.'' 40 * 41 * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS 42 * IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF 43 * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 44 * 45 * CSL requests users of this software to return to csl-dist@cs.utah.edu any 46 * improvements that they make and grant CSL redistribution rights. 47 * 48 * Utah $Hdr: cpu.h 1.19 94/12/16$ 49 */ 50 51 #ifndef _MACHINE_CPU_H_ 52 #define _MACHINE_CPU_H_ 53 54 #include <machine/trap.h> 55 #include <machine/frame.h> 56 57 /* 58 * CPU types and features 59 */ 60 #define HPPA_FTRS_TLBU 0x00000001 61 #define HPPA_FTRS_BTLBU 0x00000002 62 #define HPPA_FTRS_HVT 0x00000004 63 #define HPPA_FTRS_W32B 0x00000008 64 65 #ifndef _LOCORE 66 #ifdef _KERNEL 67 #include <sys/device.h> 68 #include <sys/queue.h> 69 #include <sys/sched.h> 70 71 #include <machine/mutex.h> 72 73 /* 74 * Note that the alignment of ci_trap_save is important since we want to keep 75 * it within a single cache line. As a result, it must be kept as the first 76 * entry within the cpu_info struct. 77 */ 78 struct cpu_info { 79 register_t ci_trap_save[16]; 80 81 struct device *ci_dev; 82 int ci_cpuid; 83 hppa_hpa_t ci_hpa; 84 volatile int ci_flags; 85 86 struct proc *ci_curproc; 87 paddr_t ci_fpu_state; /* Process FPU state. */ 88 paddr_t ci_stack; 89 90 register_t ci_psw; /* Processor Status Word. */ 91 volatile int ci_cpl; 92 volatile u_long ci_mask; /* Hardware interrupt mask. */ 93 volatile u_long ci_ipending; 94 volatile int ci_in_intr; 95 int ci_want_resched; 96 u_long ci_itmr; 97 98 volatile u_long ci_ipi; /* IPIs pending. */ 99 struct mutex ci_ipi_mtx; 100 101 struct schedstate_percpu ci_schedstate; 102 u_int32_t ci_randseed; 103 #ifdef DIAGNOSTIC 104 int ci_mutex_level; 105 #endif 106 #ifdef GPROF 107 struct gmonparam *ci_gmon; 108 #endif 109 } __attribute__((__aligned__(64))); 110 111 #define CPUF_RUNNING 0x0001 /* CPU is running. */ 112 113 #ifdef MULTIPROCESSOR 114 #define HPPA_MAXCPUS 4 115 #else 116 #define HPPA_MAXCPUS 1 117 #endif 118 119 extern struct cpu_info cpu_info[HPPA_MAXCPUS]; 120 121 #define MAXCPUS HPPA_MAXCPUS 122 123 static __inline struct cpu_info * 124 curcpu(void) 125 { 126 struct cpu_info *ci; 127 128 asm volatile ("mfctl %%cr29, %0" : "=r"(ci)); 129 130 return ci; 131 } 132 133 #define cpu_number() (curcpu()->ci_cpuid) 134 135 #define CPU_INFO_UNIT(ci) ((ci)->ci_dev ? (ci)->ci_dev->dv_unit : 0) 136 #define CPU_IS_PRIMARY(ci) ((ci)->ci_cpuid == 0) 137 #define CPU_INFO_ITERATOR int 138 #define CPU_INFO_FOREACH(cii, ci) \ 139 for (cii = 0, ci = &cpu_info[0]; cii < ncpus; cii++, ci++) 140 141 /* types */ 142 enum hppa_cpu_type { 143 hpcxs, hpcxt, hpcxta, hpcxl, hpcxl2, hpcxu, hpcxu2, hpcxw 144 }; 145 extern enum hppa_cpu_type cpu_type; 146 extern const char *cpu_typename; 147 extern int cpu_hvers; 148 #endif 149 #endif 150 151 /* 152 * COPR/SFUs 153 */ 154 #define HPPA_FPUS 0xc0 155 #define HPPA_FPUVER(w) (((w) & 0x003ff800) >> 11) 156 #define HPPA_FPU_OP(w) ((w) >> 26) 157 #define HPPA_FPU_UNMPL 0x01 /* exception reg, the rest is << 1 */ 158 #define HPPA_FPU_ILL 0x80 /* software-only */ 159 #define HPPA_FPU_I 0x01 160 #define HPPA_FPU_U 0x02 161 #define HPPA_FPU_O 0x04 162 #define HPPA_FPU_Z 0x08 163 #define HPPA_FPU_V 0x10 164 #define HPPA_FPU_D 0x20 165 #define HPPA_FPU_T 0x40 166 #define HPPA_FPU_XMASK 0x7f 167 #define HPPA_FPU_T_POS 25 168 #define HPPA_FPU_RM 0x00000600 169 #define HPPA_FPU_CQ 0x00fff800 170 #define HPPA_FPU_C 0x04000000 171 #define HPPA_FPU_FLSH 27 172 #define HPPA_FPU_INIT (0) 173 #define HPPA_FPU_FORK(s) ((s) & ~((u_int64_t)(HPPA_FPU_XMASK)<<32)) 174 #define HPPA_PMSFUS 0x20 /* ??? */ 175 176 /* 177 * Exported definitions unique to hp700/PA-RISC cpu support. 178 */ 179 180 #define HPPA_PGALIAS 0x00400000 181 #define HPPA_PGAMASK 0xffc00000 182 #define HPPA_PGAOFF 0x003fffff 183 184 #define HPPA_IOBEGIN 0xf0000000 185 #define HPPA_IOLEN 0x10000000 186 #define HPPA_PDC_LOW 0xef000000 187 #define HPPA_PDC_HIGH 0xf1000000 188 #define HPPA_IOBCAST 0xfffc0000 189 #define HPPA_LBCAST 0xfffc0000 190 #define HPPA_GBCAST 0xfffe0000 191 #define HPPA_FPA 0xfff80000 192 #define HPPA_FLEX_DATA 0xfff80001 193 #define HPPA_DMA_ENABLE 0x00000001 194 #define HPPA_FLEX_MASK 0xfffc0000 195 #define HPPA_FLEX_SIZE (1 + ~HPPA_FLEX_MASK) 196 #define HPPA_FLEX(a) (((a) & HPPA_FLEX_MASK) >> 18) 197 #define HPPA_SPA_ENABLE 0x00000020 198 #define HPPA_NMODSPBUS 64 199 200 #define clockframe trapframe 201 #define CLKF_PC(framep) ((framep)->tf_iioq_head) 202 #define CLKF_INTR(framep) ((framep)->tf_flags & TFF_INTR) 203 #define CLKF_USERMODE(framep) ((framep)->tf_flags & T_USER) 204 #define CLKF_SYSCALL(framep) ((framep)->tf_flags & TFF_SYS) 205 206 #define need_proftick(p) setsoftast(p) 207 #define PROC_PC(p) ((p)->p_md.md_regs->tf_iioq_head) 208 #define PROC_STACK(p) ((p)->p_md.md_regs->tf_sp) 209 210 #ifndef _LOCORE 211 #ifdef _KERNEL 212 213 #define DELAY(x) delay(x) 214 215 extern int (*cpu_desidhash)(void); 216 217 void signotify(struct proc *); 218 void delay(u_int us); 219 void hppa_init(paddr_t start); 220 void trap(int type, struct trapframe *frame); 221 int spcopy(pa_space_t ssp, const void *src, 222 pa_space_t dsp, void *dst, size_t size); 223 int spstrcpy(pa_space_t ssp, const void *src, 224 pa_space_t dsp, void *dst, size_t size, size_t *rsize); 225 int copy_on_fault(void); 226 void switch_trampoline(void); 227 int cpu_dumpsize(void); 228 int cpu_dump(void); 229 230 #ifdef MULTIPROCESSOR 231 void cpu_boot_secondary_processors(void); 232 void cpu_hw_init(void); 233 void cpu_hatch(void); 234 void cpu_unidle(struct cpu_info *); 235 #else 236 #define cpu_unidle(ci) 237 #endif 238 239 extern void need_resched(struct cpu_info *); 240 #define clear_resched(ci) (ci)->ci_want_resched = 0 241 242 #endif 243 244 /* 245 * Boot arguments stuff 246 */ 247 248 #define BOOTARG_LEN PAGE_SIZE 249 #define BOOTARG_OFF 0x10000 250 251 /* 252 * CTL_MACHDEP definitions. 253 */ 254 #define CPU_CONSDEV 1 /* dev_t: console terminal device */ 255 #define CPU_FPU 2 /* int: fpu present/enabled */ 256 #define CPU_LED_BLINK 3 /* int: twiddle heartbeat LED/LCD */ 257 #define CPU_MAXID 4 /* number of valid machdep ids */ 258 259 #define CTL_MACHDEP_NAMES { \ 260 { 0, 0 }, \ 261 { "console_device", CTLTYPE_STRUCT }, \ 262 { "fpu", CTLTYPE_INT }, \ 263 { "led_blink", CTLTYPE_INT }, \ 264 } 265 266 #ifdef _KERNEL 267 #include <sys/queue.h> 268 269 #ifdef MULTIPROCESSOR 270 #include <sys/mplock.h> 271 #endif 272 273 struct blink_led { 274 void (*bl_func)(void *, int); 275 void *bl_arg; 276 SLIST_ENTRY(blink_led) bl_next; 277 }; 278 279 extern void blink_led_register(struct blink_led *); 280 #endif 281 #endif 282 283 #endif /* _MACHINE_CPU_H_ */ 284