xref: /openbsd/sys/arch/hppa/include/cpu.h (revision db3296cf)
1 /*	$OpenBSD: cpu.h,v 1.37 2003/07/30 21:24:19 mickey Exp $	*/
2 
3 /*
4  * Copyright (c) 2000-2002 Michael Shalayeff
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *      This product includes software developed by Michael Shalayeff.
18  * 4. The name of the author may not be used to endorse or promote products
19  *    derived from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24  * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
25  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27  * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
29  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
30  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31  * THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 /*
34  * Copyright (c) 1988-1994, The University of Utah and
35  * the Computer Systems Laboratory at the University of Utah (CSL).
36  * All rights reserved.
37  *
38  * Permission to use, copy, modify and distribute this software is hereby
39  * granted provided that (1) source code retains these copyright, permission,
40  * and disclaimer notices, and (2) redistributions including binaries
41  * reproduce the notices in supporting documentation, and (3) all advertising
42  * materials mentioning features or use of this software display the following
43  * acknowledgement: ``This product includes software developed by the
44  * Computer Systems Laboratory at the University of Utah.''
45  *
46  * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
47  * IS" CONDITION.  THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
48  * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
49  *
50  * CSL requests users of this software to return to csl-dist@cs.utah.edu any
51  * improvements that they make and grant CSL redistribution rights.
52  *
53  * 	Utah $Hdr: cpu.h 1.19 94/12/16$
54  */
55 
56 #ifndef	_MACHINE_CPU_H_
57 #define	_MACHINE_CPU_H_
58 
59 #include <machine/trap.h>
60 #include <machine/frame.h>
61 
62 /*
63  * CPU types and features
64  */
65 #define	HPPA_FTRS_TLBU		0x00000001
66 #define	HPPA_FTRS_BTLBU		0x00000002
67 #define	HPPA_FTRS_HVT		0x00000004
68 #define	HPPA_FTRS_W32B		0x00000008
69 
70 #ifndef _LOCORE
71 /* types */
72 enum hppa_cpu_type {
73 	hpcx, hpcxs, hpcxt, hpcxta, hpcxl, hpcxl2, hpcxu, hpcxu2, hpcxw
74 };
75 extern enum hppa_cpu_type cpu_type;
76 extern const char *cpu_typename;
77 extern int cpu_hvers;
78 #endif
79 
80 /*
81  * COPR/SFUs
82  */
83 #define	HPPA_FPUS	0xc0
84 #define	HPPA_FPUVER(w)	(((w) & 0x003ff800) >> 11)
85 #define	HPPA_FPU_OP(w)	((w) >> 26)
86 #define	HPPA_FPU_UNMPL	0x9
87 #define	HPPA_FPU_I	0x01
88 #define	HPPA_FPU_U	0x02
89 #define	HPPA_FPU_O	0x04
90 #define	HPPA_FPU_Z	0x08
91 #define	HPPA_FPU_V	0x10
92 #define	HPPA_FPU_D	0x20
93 #define	HPPA_FPU_T	0x40
94 #define	HPPA_FPU_XMASK	0x7f
95 #define	HPPA_FPU_T_POS	25
96 #define	HPPA_FPU_RM	0x00000600
97 #define	HPPA_FPU_CQ	0x00fff800
98 #define	HPPA_FPU_C	0x04000000
99 #define	HPPA_FPU_FLSH	27
100 #define	HPPA_FPU_INIT	(0)
101 #define	HPPA_FPU_FORK(s) ((s) & ~((u_int64_t)(HPPA_FPU_XMASK)<<32))
102 #define	HPPA_PMSFUS	0x20	/* ??? */
103 
104 /*
105  * Exported definitions unique to hp700/PA-RISC cpu support.
106  */
107 
108 #define	HPPA_PGALIAS	0x00100000
109 #define	HPPA_PGAMASK	0xfff00000
110 #define	HPPA_PGAOFF	0x000fffff
111 
112 #define	HPPA_IOSPACE	0xf0000000
113 #define	HPPA_IOBCAST	0xfffc0000
114 #define	HPPA_PDC_LOW	0xef000000
115 #define	HPPA_PDC_HIGH	0xf1000000
116 #define	HPPA_FPA	0xfff80000
117 #define	HPPA_FLEX_DATA	0xfff80001
118 #define	HPPA_DMA_ENABLE	0x00000001
119 #define	HPPA_FLEX_MASK	0xfffc0000
120 #define	HPPA_FLEX(a)	(((a) & HPPA_FLEX_MASK) >> 18)
121 #define	HPPA_SPA_ENABLE	0x00000020
122 #define	HPPA_NMODSPBUS	64
123 
124 #define	CPU_CLOCKUPDATE() do {					\
125 	register_t __itmr;					\
126 	__asm __volatile("mfctl	%%cr16, %0" : "=r" (__itmr));	\
127 	cpu_itmr = __itmr;					\
128 	__itmr += cpu_hzticks;					\
129 	__asm __volatile("mtctl	%0, %%cr16" :: "r" (__itmr));	\
130 } while (0)
131 
132 #define	clockframe		trapframe
133 #define	CLKF_PC(framep)		((framep)->tf_iioq_head)
134 #define	CLKF_INTR(framep)	((framep)->tf_flags & TFF_INTR)
135 #define	CLKF_USERMODE(framep)	((framep)->tf_flags & T_USER)
136 #define	CLKF_SYSCALL(framep)	((framep)->tf_flags & TFF_SYS)
137 
138 #define	signotify(p)		(setsoftast())
139 #define	need_resched()		(want_resched = 1, setsoftast())
140 #define	need_proftick(p)	((p)->p_flag |= P_OWEUPC, setsoftast())
141 
142 #ifndef _LOCORE
143 #ifdef _KERNEL
144 #define MD_CACHE_FLUSH 0
145 #define MD_CACHE_PURGE 1
146 #define MD_CACHE_CTL(a,s,t)	\
147 	(((t)? pdcache : fdcache) (HPPA_SID_KERNEL,(vaddr_t)(a),(s)))
148 
149 extern int want_resched;
150 extern u_int cpu_itmr, cpu_hzticks;
151 
152 #define DELAY(x) delay(x)
153 
154 extern int (*cpu_desidhash)(void);
155 
156 void	delay(u_int us);
157 void	hppa_init(paddr_t start);
158 void	trap(int type, struct trapframe *frame);
159 int	spcopy(pa_space_t ssp, const void *src,
160 		    pa_space_t dsp, void *dst, size_t size);
161 int	spstrcpy(pa_space_t ssp, const void *src,
162 		      pa_space_t dsp, void *dst, size_t size, size_t *rsize);
163 int	copy_on_fault(void);
164 void	switch_trampoline(void);
165 int	cpu_dumpsize(void);
166 int	cpu_dump(void);
167 #endif
168 
169 /*
170  * Boot arguments stuff
171  */
172 
173 #define	BOOTARG_LEN	(NBPG)
174 #define	BOOTARG_OFF	(0x10000)
175 
176 /*
177  * CTL_MACHDEP definitions.
178  */
179 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
180 #define	CPU_MAXID		2	/* number of valid machdep ids */
181 
182 #define CTL_MACHDEP_NAMES { \
183 	{ 0, 0 }, \
184 	{ "console_device", CTLTYPE_STRUCT }, \
185 }
186 #endif
187 
188 #endif /* _MACHINE_CPU_H_ */
189