1 /* $OpenBSD: npx.h,v 1.20 2021/03/11 11:16:57 jsg Exp $ */ 2 /* $NetBSD: npx.h,v 1.11 1994/10/27 04:16:11 cgd Exp $ */ 3 4 /*- 5 * Copyright (c) 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * @(#)npx.h 5.3 (Berkeley) 1/18/91 36 */ 37 38 /* 39 * 287/387 NPX Coprocessor Data Structures and Constants 40 * W. Jolitz 1/90 41 */ 42 43 #ifndef _MACHINE_NPX_H_ 44 #define _MACHINE_NPX_H_ 45 46 /* Environment information of floating point unit */ 47 struct env87 { 48 long en_cw; /* control word (16bits) */ 49 long en_sw; /* status word (16bits) */ 50 long en_tw; /* tag word (16bits) */ 51 long en_fip; /* floating point instruction pointer */ 52 u_short en_fcs; /* floating code segment selector */ 53 u_short en_opcode; /* opcode last executed (11 bits ) */ 54 long en_foo; /* floating operand offset */ 55 long en_fos; /* floating operand segment selector */ 56 }; 57 58 #define EN_SW_IE 0x0001 /* invalid operation */ 59 #define EN_SW_DE 0x0002 /* denormal */ 60 #define EN_SW_ZE 0x0004 /* divide by zero */ 61 #define EN_SW_OE 0x0008 /* overflow */ 62 #define EN_SW_UE 0x0010 /* underflow */ 63 #define EN_SW_PE 0x0020 /* loss of precision */ 64 65 /* Contents of each floating point accumulator */ 66 struct fpacc87 { 67 #ifdef dontdef /* too unportable */ 68 u_long fp_mantlo; /* mantissa low (31:0) */ 69 u_long fp_manthi; /* mantissa high (63:32) */ 70 int fp_exp:15; /* exponent */ 71 int fp_sgn:1; /* mantissa sign */ 72 #else 73 u_char fp_bytes[10]; 74 #endif 75 }; 76 77 /* Floating point and emulator context */ 78 struct save87 { 79 struct env87 sv_env; /* floating point control/status */ 80 struct fpacc87 sv_ac[8]; /* accumulator contents, 0-7 */ 81 u_long sv_ex_sw; /* status word for last exception */ 82 u_long sv_ex_tw; /* tag word for last exception */ 83 }; 84 85 /* Environment of FPU/MMX/SSE/SSE2. */ 86 struct envxmm { 87 /*0*/ uint16_t en_cw; /* FPU Control Word */ 88 uint16_t en_sw; /* FPU Status Word */ 89 uint8_t en_tw; /* FPU Tag Word (abridged) */ 90 uint8_t en_rsvd0; 91 uint16_t en_opcode; /* FPU Opcode */ 92 uint32_t en_fip; /* FPU Instruction Pointer */ 93 uint16_t en_fcs; /* FPU IP selector */ 94 uint16_t en_rsvd1; 95 /*16*/ uint32_t en_foo; /* FPU Data pointer */ 96 uint16_t en_fos; /* FPU Data pointer selector */ 97 uint16_t en_rsvd2; 98 uint32_t en_mxcsr; /* MXCSR Register State */ 99 uint32_t en_mxcsr_mask; /* Mask for valid MXCSR bits (may be 0) */ 100 }; 101 102 /* FPU registers in the extended save format. */ 103 struct fpaccxmm { 104 uint8_t fp_bytes[10]; 105 uint8_t fp_rsvd[6]; 106 }; 107 108 /* SSE/SSE2 registers. */ 109 struct xmmreg { 110 uint8_t sse_bytes[16]; 111 }; 112 113 /* FPU/MMX/SSE/SSE2 context */ 114 struct savexmm { 115 struct envxmm sv_env; /* control/status context */ 116 struct fpaccxmm sv_ac[8]; /* ST/MM regs */ 117 struct xmmreg sv_xmmregs[8]; /* XMM regs */ 118 uint8_t sv_rsvd[16 * 14]; 119 /* 512-bytes --- end of hardware portion of save area */ 120 uint32_t sv_ex_sw; /* saved SW from last exception */ 121 uint32_t sv_ex_tw; /* saved TW from last exception */ 122 }; 123 124 union savefpu { 125 struct save87 sv_87; 126 struct savexmm sv_xmm; 127 }; 128 129 #define __INITIAL_NPXCW__ 0x037f 130 131 /* 132 * The default MXCSR value at reset is 0x1f80, IA-32 Instruction 133 * Set Reference, pg. 3-369. 134 */ 135 #define __INITIAL_MXCSR__ 0x1f80 136 #define __INITIAL_MXCSR_MASK__ 0xffbf 137 138 /* 139 * The standard control word from finit is 0x37F, giving: 140 * round to nearest 141 * 64-bit precision 142 * all exceptions masked. 143 */ 144 145 void process_xmm_to_s87(const struct savexmm *, struct save87 *); 146 void process_s87_to_xmm(const struct save87 *, struct savexmm *); 147 148 struct cpu_info; 149 struct trapframe; 150 151 extern uint32_t fpu_mxcsr_mask; 152 153 void npxinit(struct cpu_info *); 154 void npxtrap(struct trapframe *); 155 void fpu_kernel_enter(void); 156 void fpu_kernel_exit(void); 157 158 #endif /* !_MACHINE_NPX_H_ */ 159