1 /* $OpenBSD: pctr.h,v 1.17 2014/03/29 18:09:29 guenther Exp $ */ 2 3 /* 4 * Pentium performance counter driver for OpenBSD. 5 * Copyright 1996 David Mazieres <dm@lcs.mit.edu>. 6 * 7 * Modification and redistribution in source and binary forms is 8 * permitted provided that due credit is given to the author and the 9 * OpenBSD project by leaving this copyright notice intact. 10 */ 11 12 #ifndef _MACHINE_PCTR_H_ 13 #define _MACHINE_PCTR_H_ 14 15 #include <sys/ioccom.h> 16 17 typedef u_int64_t pctrval; 18 19 #define PCTR_NUM 4 20 21 struct pctrst { 22 u_int pctr_fn[PCTR_NUM]; /* Current settings of counters */ 23 pctrval pctr_tsc; /* Free-running 64-bit cycle counter */ 24 pctrval pctr_hwc[PCTR_NUM]; /* Values of the hardware counters */ 25 }; 26 27 /* Bit values in fn fields and PIOCS ioctl's */ 28 #define P5CTR_K 0x40 /* Monitor kernel-level events */ 29 #define P5CTR_U 0x80 /* Monitor user-level events */ 30 #define P5CTR_C 0x100 /* count cycles rather than events */ 31 32 #define PCTR_U 0x010000 /* Monitor user-level events */ 33 #define PCTR_K 0x020000 /* Monitor kernel-level events */ 34 #define PCTR_E 0x040000 /* Edge detect */ 35 #define PCTR_EN 0x400000 /* Enable counters (counter 0 only) */ 36 #define PCTR_I 0x800000 /* Invert counter mask */ 37 38 /* Unit Mask bits */ 39 #define PCTR_UM_M 0x0800 /* Modified cache lines */ 40 #define PCTR_UM_E 0x0400 /* Exclusive cache lines */ 41 #define PCTR_UM_S 0x0200 /* Shared cache lines */ 42 #define PCTR_UM_I 0x0100 /* Invalid cache lines */ 43 #define PCTR_UM_MESI (PCTR_UM_M|PCTR_UM_E|PCTR_UM_S|PCTR_UM_I) 44 #define PCTR_UM_A 0x2000 /* Any initiator */ 45 46 #define PCTR_UM_SHIFT 8 /* Left shift for unit mask */ 47 #define PCTR_CM_SHIFT 24 /* Left shift for counter mask */ 48 49 /* ioctl to set which counter a device tracks */ 50 #define PCIOCRD _IOR('c', 1, struct pctrst) /* Read counter value */ 51 #define PCIOCS0 _IOW('c', 8, unsigned int) /* Set counter 0 function */ 52 #define PCIOCS1 _IOW('c', 9, unsigned int) /* Set counter 1 function */ 53 #define PCIOCS2 _IOW('c', 10, unsigned int) /* Set counter 0 function */ 54 #define PCIOCS3 _IOW('c', 11, unsigned int) /* Set counter 1 function */ 55 56 #define _PATH_PCTR "/dev/pctr" 57 58 #define rdtsc() \ 59 ({ \ 60 pctrval v; \ 61 __asm volatile ("rdtsc" : "=A" (v)); \ 62 v; \ 63 }) 64 65 /* Read the performance counters (Pentium Pro only) */ 66 #define rdpmc(ctr) \ 67 ({ \ 68 pctrval v; \ 69 __asm volatile ("rdpmc\n" \ 70 "\tandl $0xff, %%edx" \ 71 : "=A" (v) : "c" (ctr)); \ 72 v; \ 73 }) 74 75 #ifdef _KERNEL 76 77 #define rdmsr(msr) \ 78 ({ \ 79 pctrval v; \ 80 __asm volatile ("rdmsr" : "=A" (v) : "c" (msr)); \ 81 v; \ 82 }) 83 84 #define wrmsr(msr, v) \ 85 __asm volatile ("wrmsr" :: "A" ((u_int64_t) (v)), "c" (msr)); 86 87 void pctrattach(int); 88 int pctropen(dev_t, int, int, struct proc *); 89 int pctrclose(dev_t, int, int, struct proc *); 90 int pctrioctl(dev_t, u_long, caddr_t, int, struct proc *); 91 92 #endif /* _KERNEL */ 93 #endif /* ! _MACHINE_PCTR_H_ */ 94