1 /* $OpenBSD: pcibiosvar.h,v 1.8 2001/10/25 19:03:49 mickey Exp $ */ 2 /* $NetBSD: pcibios.h,v 1.2 2000/04/28 17:15:16 uch Exp $ */ 3 4 /* 5 * Copyright (c) 1999, by UCHIYAMA Yasushi 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. The name of the developer may NOT be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* 30 * Data structure definitions for the PCI BIOS interface. 31 */ 32 33 #define PCIBIOS_ADDR_FIXUP 0x001 34 #define PCIBIOS_BUS_FIXUP 0x002 35 #define PCIBIOS_INTR_FIXUP 0x004 36 #define PCIBIOS_INTR_GUESS 0x008 37 #define PCIBIOS_VERBOSE 0x010 38 #define PCIBIOS_INTRDEBUG 0x020 39 40 /* 41 * PCI BIOS return codes. 42 */ 43 #define PCIBIOS_SUCCESS 0x00 44 #define PCIBIOS_SERVICE_NOT_PRESENT 0x80 45 #define PCIBIOS_FUNCTION_NOT_SUPPORTED 0x81 46 #define PCIBIOS_BAD_VENDOR_ID 0x83 47 #define PCIBIOS_DEVICE_NOT_FOUND 0x86 48 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87 49 #define PCIBIOS_SET_FAILED 0x88 50 #define PCIBIOS_BUFFER_TOO_SMALL 0x89 51 52 struct pcibios_softc { 53 struct device sc_dev; 54 55 int max_bus; 56 57 /* address fixup guts */ 58 struct extent *extent_mem; 59 struct extent *extent_port; 60 bus_addr_t mem_alloc_start; 61 bus_addr_t port_alloc_start; 62 int nbogus; 63 }; 64 65 /* 66 * PCI IRQ Routing Table definitions. 67 */ 68 69 /* 70 * Slot entry (per PCI 2.1) 71 */ 72 struct pcibios_linkmap { 73 u_int8_t link; 74 u_int16_t bitmap; 75 } __attribute__((__packed__)); 76 77 struct pcibios_intr_routing { 78 u_int8_t bus; 79 u_int8_t device; 80 struct pcibios_linkmap linkmap[4]; /* INT[A:D]# */ 81 u_int8_t slot; 82 u_int8_t reserved; 83 } __attribute__((__packed__)); 84 85 /* 86 * $PIR header. Reference: 87 * 88 * http://www.microsoft.com/HWDEV/busbios/PCIIRQ.htm 89 */ 90 struct pcibios_pir_header { 91 u_int32_t signature; /* $PIR */ 92 u_int16_t version; 93 u_int16_t tablesize; 94 u_int8_t router_bus; 95 u_int8_t router_devfunc; 96 u_int16_t exclusive_irq; 97 u_int32_t compat_router; /* PCI vendor/product */ 98 u_int32_t miniport; 99 u_int8_t reserved[11]; 100 u_int8_t checksum; 101 } __attribute__((__packed__)); 102 103 #define PIR_DEVFUNC_DEVICE(devfunc) (((devfunc) >> 3) & 0x1f) 104 #define PIR_DEVFUNC_FUNCTION(devfunc) ((devfunc) & 7) 105 #define PIR_DEVFUNC_COMPOSE(dev,func) ((((dev) &0x1f) << 3) | ((func) & 7)) 106 107 void pcibios_init __P((void)); 108 109 extern struct pcibios_pir_header pcibios_pir_header; 110 extern struct pcibios_intr_routing *pcibios_pir_table; 111 extern int pcibios_pir_table_nentries; 112 113 int pcibios_flags; 114 115 typedef void *pciintr_icu_handle_t; 116 117 struct pciintr_icu { 118 int (*pi_getclink) __P((pciintr_icu_handle_t, int, int *)); 119 int (*pi_get_intr) __P((pciintr_icu_handle_t, int, int *)); 120 int (*pi_set_intr) __P((pciintr_icu_handle_t, int, int)); 121 int (*pi_get_trigger) __P((pciintr_icu_handle_t, int, int *)); 122 int (*pi_set_trigger) __P((pciintr_icu_handle_t, int, int)); 123 }; 124 125 typedef const struct pciintr_icu *pciintr_icu_tag_t; 126 127 #define pciintr_icu_getclink(t, h, link, pirqp) \ 128 (*(t)->pi_getclink)((h), (link), (pirqp)) 129 #define pciintr_icu_get_intr(t, h, pirq, irqp) \ 130 (*(t)->pi_get_intr)((h), (pirq), (irqp)) 131 #define pciintr_icu_set_intr(t, h, pirq, irq) \ 132 (*(t)->pi_set_intr)((h), (pirq), (irq)) 133 #define pciintr_icu_get_trigger(t, h, irq, triggerp) \ 134 (*(t)->pi_get_trigger)((h), (irq), (triggerp)) 135 #define pciintr_icu_set_trigger(t, h, irq, trigger) \ 136 (*(t)->pi_set_trigger)((h), (irq), (trigger)) 137 138 #define PCIBIOS_PRINTV(arg) \ 139 do { \ 140 if (pcibios_flags & PCIBIOS_VERBOSE) \ 141 printf arg; \ 142 } while (0) 143 144 #define PCIADDR_SEARCH_IO 0 145 #define PCIADDR_SEARCH_MEM 1 146 struct extent *pciaddr_search __P((int, bus_addr_t *, bus_size_t)); 147 148 int pci_intr_fixup __P((struct pcibios_softc *, pci_chipset_tag_t, bus_space_tag_t)); 149 int pci_bus_fixup __P((pci_chipset_tag_t, int)); 150 void pci_addr_fixup __P((struct pcibios_softc *, pci_chipset_tag_t, int)); 151 void pci_device_foreach __P((struct pcibios_softc *, pci_chipset_tag_t, int, 152 void (*) __P((struct pcibios_softc *, pci_chipset_tag_t, pcitag_t)))); 153 int pci_intr_header_fixup __P((pci_chipset_tag_t, pcitag_t, pci_intr_handle_t *)); 154 int pci_intr_route_link __P((pci_chipset_tag_t, pci_intr_handle_t *)); 155 int pci_intr_post_fixup __P((void)); 156 157 /* 158 * Init functions for our known PCI ICUs. 159 */ 160 int piix_init __P((pci_chipset_tag_t, bus_space_tag_t, pcitag_t, 161 pciintr_icu_tag_t *, pciintr_icu_handle_t *)); 162 int opti82c558_init __P((pci_chipset_tag_t, bus_space_tag_t, pcitag_t, 163 pciintr_icu_tag_t *, pciintr_icu_handle_t *)); 164 int opti82c700_init __P((pci_chipset_tag_t, bus_space_tag_t, pcitag_t, 165 pciintr_icu_tag_t *, pciintr_icu_handle_t *)); 166 int via82c586_init __P((pci_chipset_tag_t, bus_space_tag_t, pcitag_t, 167 pciintr_icu_tag_t *, pciintr_icu_handle_t *)); 168 int sis85c503_init __P((pci_chipset_tag_t, bus_space_tag_t, pcitag_t, 169 pciintr_icu_tag_t *, pciintr_icu_handle_t *)); 170 int amd756_init __P((pci_chipset_tag_t, bus_space_tag_t, pcitag_t, 171 pciintr_icu_tag_t *, pciintr_icu_handle_t *)); 172 int ali1543_init __P((pci_chipset_tag_t, bus_space_tag_t, pcitag_t, 173 pciintr_icu_tag_t *, pciintr_icu_handle_t *)); 174 175