xref: /openbsd/sys/arch/landisk/stand/boot/srt0.S (revision 0ee2ce67)
1*0ee2ce67Sguenther/*	$OpenBSD: srt0.S,v 1.6 2022/12/08 02:11:27 guenther Exp $	*/
2c20e7824Smickey/*	$NetBSD: boot.S,v 1.1 2006/09/01 21:26:18 uwe Exp $	*/
3c20e7824Smickey
4c20e7824Smickey/*-
5c20e7824Smickey * Copyright (c) 2005 NONAKA Kimihiro
6c20e7824Smickey * All rights reserved.
7c20e7824Smickey *
8c20e7824Smickey * Redistribution and use in source and binary forms, with or without
9c20e7824Smickey * modification, are permitted provided that the following conditions
10c20e7824Smickey * are met:
11c20e7824Smickey * 1. Redistributions of source code must retain the above copyright
12c20e7824Smickey *    notice, this list of conditions and the following disclaimer.
13c20e7824Smickey * 2. Redistributions in binary form must reproduce the above copyright
14c20e7824Smickey *    notice, this list of conditions and the following disclaimer in the
15c20e7824Smickey *    documentation and/or other materials provided with the distribution.
16c20e7824Smickey *
17c20e7824Smickey * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
18c20e7824Smickey * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19c20e7824Smickey * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20c20e7824Smickey * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
21c20e7824Smickey * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22c20e7824Smickey * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23c20e7824Smickey * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24c20e7824Smickey * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25c20e7824Smickey * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26c20e7824Smickey * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27c20e7824Smickey * SUCH DAMAGE.
28c20e7824Smickey */
29c20e7824Smickey
30c20e7824Smickey#include <machine/asm.h>
31c20e7824Smickey
32c20e7824SmickeyENTRY(start)
33c20e7824Smickey	bra	boot_start1
34c20e7824Smickey	 nop
35c20e7824Smickey	.balign 4
36c20e7824SmickeyENTRY(boot_magic)
37c20e7824Smickey	.long	0x20041110
38c20e7824SmickeyENTRY(boot_params)
39c20e7824Smickey	.long	boot_start1 - boot_params
40c20e7824Smickey
41c20e7824Smickey	. = start + 0x80
42c20e7824Smickeyboot_start1:
43c20e7824Smickey	mov	r4, r0
44c20e7824Smickey	add	#-4, r0
45c20e7824Smickey	mov.l	@(0, r0), r0
46c20e7824Smickey	mov.l	.L.boot_magic1, r1
47c20e7824Smickey	cmp/eq	r0, r1
48c20e7824Smickey	bf	2f
49c20e7824Smickey	mov	r4, r0
50c20e7824Smickey	mov.l	.L.boot_params_size, r3
51c20e7824Smickey	mov.l	@r0, r2
52c20e7824Smickey	mov.l	.L.boot_params, r1
53c20e7824Smickey	cmp/hi	r3, r2
54c20e7824Smickey	bf	1f
55c20e7824Smickey	mov	r3, r2
56c20e7824Smickey1:	mov.b	@r0+, r3
57c20e7824Smickey	mov.b	r3, @r1
58c20e7824Smickey	dt	r2
59c20e7824Smickey	bf/s	1b
60c20e7824Smickey	 add	#1, r1
61c20e7824Smickey2:
62c20e7824Smickey	mov.l	.L._end, r0		/* zero bss */
63c20e7824Smickey	mov.l	.L.__bss_start, r1
64c20e7824Smickey	sub	r1, r0
65c20e7824Smickey	shlr2	r0			/* _end and __bss_start are aligned */
66c20e7824Smickey	mov	#0, r2
67c20e7824Smickey1:	mov.l	r2, @r1
68c20e7824Smickey	dt	r0
69c20e7824Smickey	bf/s	1b
70c20e7824Smickey	 add	#4, r1
71c20e7824Smickey
72c20e7824Smickey	mov.l	.L.boot, r0
73c20e7824Smickey	jsr	@r0
74c20e7824Smickey	 mov	r5, r4
75c20e7824Smickey
76c20e7824Smickeyboot_fail:
77c20e7824Smickey	mov	r0, r1
78c20e7824Smickey	mova	.L.errtxt, r0
79c20e7824Smickey	mov	r0, r4
80c20e7824Smickey	mov	#32, r0
81c20e7824Smickey	trapa	#0x3f
82c20e7824Smickey	mov	r1, r4
83c20e7824Smickey	mov	#32, r0
84c20e7824Smickey	trapa	#0x3f
85c20e7824Smickey	mova	.L.crlf, r0
86c20e7824Smickey	mov	r0, r4
87c20e7824Smickey	mov	#32, r0
88c20e7824Smickey	trapa	#0x3f
89c20e7824Smickey99:	bra	99b
90c20e7824Smickey	 nop
91c20e7824Smickey
92c20e7824Smickey
93c20e7824SmickeyENTRY(halt)
94c20e7824Smickey	mova	.L.pwrctl, r0
95c20e7824Smickey	mov	#1, r1
96c20e7824Smickey	mov.b	@r1, r0
97c20e7824Smickey	rts
98c20e7824Smickey	 nop
99c20e7824Smickey
100c20e7824SmickeyENTRY(reboot)
101c20e7824SmickeyENTRY(_rtt)
102c20e7824Smickey	mov	#1, r4			/* reboot */
103c20e7824Smickey	mov	#11, r0
104c20e7824Smickey	trapa	#0x3f
105c20e7824Smickey	mov.l	.L.start, r0
106c20e7824Smickey	jmp	@r0
107c20e7824Smickey	 nop
108c20e7824Smickey
109c20e7824Smickey/*
110c20e7824Smickey * int readsects(int dev, uint32_t lba, void *buf, size_t size);
111c20e7824Smickey */
112c20e7824SmickeyENTRY(readsects)
113c20e7824Smickey	mov	#2, r0
114c20e7824Smickey	trapa	#0x3f
115c20e7824Smickey	rts
116c20e7824Smickey	 nop
117c20e7824Smickey
11805b97becSdrahn/*
11905b97becSdrahn * void cache_flush(void);
12005b97becSdrahn */
12105b97becSdrahnENTRY(cache_flush)
12205b97becSdrahn	/* flush cache */
12305b97becSdrahn	mov	#0, r4
12405b97becSdrahn	mov	#6, r0
12505b97becSdrahn	trapa	#0x3f
12605b97becSdrahn	rts
12705b97becSdrahn	 nop
12805b97becSdrahn
129f33097d3Sdrahn/*
130f33097d3Sdrahn * void cache_disable(void);
131f33097d3Sdrahn */
132f33097d3SdrahnENTRY(cache_disable)
133f33097d3Sdrahn	mov     #1, r4
134f33097d3Sdrahn	mov     #6, r0
135f33097d3Sdrahn	trapa   #0x3f
136f33097d3Sdrahn	rts
137f33097d3Sdrahn	 nop
138f33097d3Sdrahn
139c20e7824Smickey        .align  2
140c20e7824Smickey.L.boot_magic1:
141c20e7824Smickey	.long	0x20031125
142c20e7824Smickey.L.boot_params:
143c20e7824Smickey	.long	boot_params
144c20e7824Smickey.L.boot_params_size:
145c20e7824Smickey	.long	boot_start1 - boot_params
146c20e7824Smickey.L._end:
147c20e7824Smickey	.long   _end
148c20e7824Smickey.L.__bss_start:
149c20e7824Smickey	.long   __bss_start
150c20e7824Smickey.L.boot:
151*0ee2ce67Sguenther	.long	boot
152c20e7824Smickey.L.start:
153c20e7824Smickey	.long	0xc0000000
154c20e7824Smickey.L.pwrctl:
155c20e7824Smickey	.long	0xb0000003
156c20e7824Smickey
157c20e7824Smickey	.align	2
158c20e7824Smickey.L.errtxt:	.asciz  ">>BOOT FAILED: "
159c20e7824Smickey	.align	2
160c20e7824Smickey.L.crlf:	.asciz  "\r\n"
161