xref: /openbsd/sys/arch/octeon/dev/octeon_iobus.c (revision d89ec533)
1 /*	$OpenBSD: octeon_iobus.c,v 1.25 2019/09/15 07:15:14 visa Exp $ */
2 
3 /*
4  * Copyright (c) 2000-2004 Opsycon AB  (www.opsycon.se)
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
16  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
19  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  */
28 
29 /*
30  * This is a iobus driver.
31  * It handles configuration of all devices on the processor bus except UART.
32  */
33 
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/conf.h>
38 #include <sys/malloc.h>
39 #include <sys/device.h>
40 #include <sys/proc.h>
41 #include <sys/atomic.h>
42 
43 #include <dev/ofw/fdt.h>
44 #include <dev/ofw/openfirm.h>
45 
46 #include <machine/autoconf.h>
47 #include <machine/fdt.h>
48 #include <machine/intr.h>
49 #include <machine/octeonvar.h>
50 #include <machine/octeonreg.h>
51 #include <machine/octeon_model.h>
52 
53 #include <octeon/dev/iobusvar.h>
54 #include <octeon/dev/octhcireg.h>	/* USBN_BASE */
55 
56 int	iobusmatch(struct device *, void *, void *);
57 void	iobusattach(struct device *, struct device *, void *);
58 int	iobusprint(void *, const char *);
59 int	iobussubmatch(struct device *, void *, void *);
60 int	iobussearch(struct device *, void *, void *);
61 
62 u_int8_t iobus_read_1(bus_space_tag_t, bus_space_handle_t, bus_size_t);
63 u_int16_t iobus_read_2(bus_space_tag_t, bus_space_handle_t, bus_size_t);
64 u_int32_t iobus_read_4(bus_space_tag_t, bus_space_handle_t, bus_size_t);
65 u_int64_t iobus_read_8(bus_space_tag_t, bus_space_handle_t, bus_size_t);
66 
67 void	 iobus_write_1(bus_space_tag_t, bus_space_handle_t, bus_size_t,
68 	    u_int8_t);
69 void	 iobus_write_2(bus_space_tag_t, bus_space_handle_t, bus_size_t,
70 	    u_int16_t);
71 void	 iobus_write_4(bus_space_tag_t, bus_space_handle_t, bus_size_t,
72 	    u_int32_t);
73 void	 iobus_write_8(bus_space_tag_t, bus_space_handle_t, bus_size_t,
74 	    u_int64_t);
75 
76 void	 iobus_read_raw_2(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
77 	    u_int8_t *, bus_size_t);
78 void	 iobus_write_raw_2(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
79 	    const u_int8_t *, bus_size_t);
80 void	 iobus_read_raw_4(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
81 	    u_int8_t *, bus_size_t);
82 void	 iobus_write_raw_4(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
83 	    const u_int8_t *, bus_size_t);
84 void	 iobus_read_raw_8(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
85 	    u_int8_t *, bus_size_t);
86 void	 iobus_write_raw_8(bus_space_tag_t, bus_space_handle_t, bus_addr_t,
87 	    const u_int8_t *, bus_size_t);
88 
89 bus_addr_t iobus_pa_to_device(paddr_t);
90 paddr_t	 iobus_device_to_pa(bus_addr_t);
91 
92 struct cfattach iobus_ca = {
93 	sizeof(struct device), iobusmatch, iobusattach
94 };
95 
96 struct cfdriver iobus_cd = {
97 	NULL, "iobus", DV_DULL
98 };
99 
100 bus_space_t iobus_tag = {
101 	.bus_base = PHYS_TO_XKPHYS(0, CCA_NC),
102 	.bus_private = NULL,
103 	._space_read_1 =	generic_space_read_1,
104 	._space_write_1 =	generic_space_write_1,
105 	._space_read_2 =	generic_space_read_2,
106 	._space_write_2 =	generic_space_write_2,
107 	._space_read_4 =	generic_space_read_4,
108 	._space_write_4 =	generic_space_write_4,
109 	._space_read_8 =	generic_space_read_8,
110 	._space_write_8 =	generic_space_write_8,
111 	._space_read_raw_2 =	generic_space_read_raw_2,
112 	._space_write_raw_2 =	generic_space_write_raw_2,
113 	._space_read_raw_4 =	generic_space_read_raw_4,
114 	._space_write_raw_4 =	generic_space_write_raw_4,
115 	._space_read_raw_8 =	generic_space_read_raw_8,
116 	._space_write_raw_8 =	generic_space_write_raw_8,
117 	._space_map =		iobus_space_map,
118 	._space_unmap =		iobus_space_unmap,
119 	._space_subregion =	generic_space_region,
120 	._space_vaddr =		generic_space_vaddr
121 };
122 
123 struct machine_bus_dma_tag iobus_bus_dma_tag = {
124 	NULL,			/* _cookie */
125 	_dmamap_create,
126 	_dmamap_destroy,
127 	_dmamap_load,
128 	_dmamap_load_mbuf,
129 	_dmamap_load_uio,
130 	_dmamap_load_raw,
131 	_dmamap_load_buffer,
132 	_dmamap_unload,
133 	_dmamap_sync,
134 	_dmamem_alloc,
135 	_dmamem_free,
136 	_dmamem_map,
137 	_dmamem_unmap,
138 	_dmamem_mmap,
139 	iobus_pa_to_device,
140 	iobus_device_to_pa,
141 	0
142 };
143 
144 /*
145  * List of iobus child devices whose base addresses are too large to be
146  * recorded in the kernel configuration file. So look them up from here instead.
147  */
148 
149 static const struct octeon_iobus_addrs iobus_addrs[] = {
150 	{ "octcf",	OCTEON_CF_BASE  },
151 	{ "octrng",	OCTEON_RNG_BASE },
152 	{ "dwctwo",	USBN_BASE       },
153 	{ "amdcf",	OCTEON_AMDCF_BASE},
154 };
155 
156 /* There can only be one. */
157 int	iobus_found;
158 
159 /*
160  * Match bus only to targets which have this bus.
161  */
162 int
163 iobusmatch(struct device *parent, void *match, void *aux)
164 {
165 	if (iobus_found)
166 		return (0);
167 
168 	return (1);
169 }
170 
171 int
172 iobusprint(void *aux, const char *iobus)
173 {
174 	struct iobus_attach_args *aa = aux;
175 
176 	if (iobus != NULL)
177 		printf("%s at %s", aa->aa_name, iobus);
178 
179 	if (aa->aa_addr != 0)
180 		printf(" base 0x%lx", aa->aa_addr);
181 	if (aa->aa_irq >= 0)
182 		printf(" irq %d", aa->aa_irq);
183 
184 	return (UNCONF);
185 }
186 
187 int
188 iobussubmatch(struct device *parent, void *vcf, void *args)
189 {
190 	struct cfdata *cf = vcf;
191 	struct iobus_attach_args *aa = args;
192 
193 	if (strcmp(cf->cf_driver->cd_name, aa->aa_name) != 0)
194 		return 0;
195 
196 	if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != (int)aa->aa_addr)
197 		return 0;
198 
199 	return (*cf->cf_attach->ca_match)(parent, cf, aa);
200 }
201 
202 void
203 iobusattach(struct device *parent, struct device *self, void *aux)
204 {
205 	struct iobus_attach_args aa;
206 	struct fdt_attach_args fa;
207 	struct octeon_config oc;
208 	struct device *sc = self;
209 	int soc;
210 
211 	iobus_found = 1;
212 
213 	printf("\n");
214 
215 	/* XXX */
216 	oc.mc_iobus_bust = &iobus_tag;
217 	oc.mc_iobus_dmat = &iobus_bus_dma_tag;
218 	void	cn30xxfpa_bootstrap(struct octeon_config *);
219 	cn30xxfpa_bootstrap(&oc);
220 	void	cn30xxpow_bootstrap(struct octeon_config *);
221 	cn30xxpow_bootstrap(&oc);
222 
223 	/*
224 	 * Attach all subdevices as described in the config file.
225 	 */
226 
227 	if ((soc = OF_finddevice("/soc")) != -1) {
228 		memset(&fa, 0, sizeof(fa));
229 		fa.fa_name = "";
230 		fa.fa_node = soc;
231 		fa.fa_iot = &iobus_tag;
232 		fa.fa_dmat = &iobus_bus_dma_tag;
233 		config_found(self, &fa, NULL);
234 	}
235 
236 	config_search(iobussearch, self, sc);
237 
238 	if (octeon_ver == OCTEON_2 || octeon_ver == OCTEON_3) {
239 		memset(&aa, 0, sizeof(aa));
240 		aa.aa_name = "octpcie";
241 		aa.aa_bust = &iobus_tag;
242 		aa.aa_dmat = &iobus_bus_dma_tag;
243 		aa.aa_irq = -1;
244 		config_found_sm(self, &aa, iobusprint, iobussubmatch);
245 	}
246 }
247 
248 int
249 iobussearch(struct device *parent, void *v, void *aux)
250 {
251 	struct iobus_attach_args aa;
252 	struct cfdata *cf = v;
253 	int i;
254 
255 	aa.aa_name = cf->cf_driver->cd_name;
256 	aa.aa_bust = &iobus_tag;
257 	aa.aa_dmat = &iobus_bus_dma_tag;
258 	aa.aa_addr = cf->cf_loc[0];
259 	aa.aa_irq  = cf->cf_loc[1];
260 	aa.aa_unitno = cf->cf_unit;
261 
262 	/* No address specified, try to look it up. */
263 	if (aa.aa_addr == -1) {
264 		for (i = 0; i < nitems(iobus_addrs); i++) {
265 			if (strcmp(iobus_addrs[i].name, cf->cf_driver->cd_name) == 0)
266 				aa.aa_addr = iobus_addrs[i].address;
267 		}
268 		if (aa.aa_addr == -1)
269 			return 0;
270 	}
271 
272 	if (cf->cf_attach->ca_match(parent, cf, &aa) == 0)
273 		return 0;
274 
275 	config_attach(parent, cf, &aa, iobusprint);
276 	return 1;
277 }
278 
279 int
280 iobus_space_map(bus_space_tag_t t, bus_addr_t offs, bus_size_t size,
281     int flags, bus_space_handle_t *bshp)
282 {
283 	if (ISSET(flags, BUS_SPACE_MAP_KSEG0)) {
284 		*bshp = PHYS_TO_CKSEG0(offs);
285 		return 0;
286 	}
287 	if (ISSET(flags, BUS_SPACE_MAP_CACHEABLE))
288 		offs +=
289 		    PHYS_TO_XKPHYS(0, CCA_CACHED) - PHYS_TO_XKPHYS(0, CCA_NC);
290 	*bshp = t->bus_base + offs;
291 	return 0;
292 }
293 
294 void
295 iobus_space_unmap(bus_space_tag_t t, bus_space_handle_t bsh, bus_size_t size)
296 {
297 }
298 
299 /*
300  * Iobus bus_dma helpers.
301  */
302 
303 bus_addr_t
304 iobus_pa_to_device(paddr_t pa)
305 {
306 	return (bus_addr_t)pa;
307 }
308 
309 paddr_t
310 iobus_device_to_pa(bus_addr_t addr)
311 {
312 	return (paddr_t)addr;
313 }
314