1 /* $OpenBSD: vpci.c,v 1.31 2020/06/25 21:43:41 jmatthew Exp $ */ 2 /* 3 * Copyright (c) 2008 Mark Kettenis <kettenis@openbsd.org> 4 * 5 * Permission to use, copy, modify, and distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <sys/param.h> 19 #include <sys/device.h> 20 #include <sys/errno.h> 21 #include <sys/malloc.h> 22 #include <sys/systm.h> 23 24 #include <uvm/uvm_extern.h> 25 26 #define _SPARC_BUS_DMA_PRIVATE 27 #include <machine/bus.h> 28 #include <machine/autoconf.h> 29 #include <machine/hypervisor.h> 30 #include <machine/openfirm.h> 31 32 #include <dev/pci/pcivar.h> 33 #include <dev/pci/pcireg.h> 34 35 #include <sparc64/dev/viommuvar.h> 36 #include <sparc64/dev/msivar.h> 37 38 #define VPCI_DEFAULT_MSI_EQS 36 39 40 extern struct sparc_pci_chipset _sparc_pci_chipset; 41 42 struct vpci_msi_msg { 43 uint32_t mm_version; 44 uint8_t mm_reserved[3]; 45 uint8_t mm_type; 46 uint64_t mm_sysino; 47 uint64_t mm_reserved1; 48 uint64_t mm_stick; 49 uint16_t mm_reserved2[3]; 50 uint16_t mm_reqid; 51 uint64_t mm_addr; 52 uint64_t mm_data; 53 uint64_t mm_reserved3; 54 }; 55 56 struct vpci_range { 57 u_int32_t cspace; 58 u_int32_t child_hi; 59 u_int32_t child_lo; 60 u_int32_t phys_hi; 61 u_int32_t phys_lo; 62 u_int32_t size_hi; 63 u_int32_t size_lo; 64 }; 65 66 struct vpci_eq { 67 char eq_name[16]; 68 int eq_id; 69 void *eq_ih; 70 struct msi_eq *eq_meq; 71 struct vpci_pbm *eq_pbm; 72 uint8_t *eq_ring; 73 uint64_t eq_mask; 74 }; 75 76 struct vpci_pbm { 77 struct vpci_softc *vp_sc; 78 uint64_t vp_devhandle; 79 80 struct vpci_range *vp_range; 81 pci_chipset_tag_t vp_pc; 82 int vp_nrange; 83 84 bus_space_tag_t vp_memt; 85 bus_space_tag_t vp_iot; 86 bus_dma_tag_t vp_dmat; 87 struct iommu_state vp_is; 88 89 bus_addr_t vp_msiaddr; 90 int vp_msibase; 91 int vp_msinum; 92 struct intrhand **vp_msi; 93 94 unsigned int vp_neq; 95 struct vpci_eq *vp_eq; 96 97 int vp_flags; 98 }; 99 100 struct vpci_softc { 101 struct device sc_dv; 102 bus_dma_tag_t sc_dmat; 103 bus_space_tag_t sc_bust; 104 int sc_node; 105 }; 106 107 uint64_t sun4v_group_sdio_major; 108 109 int vpci_match(struct device *, void *, void *); 110 void vpci_attach(struct device *, struct device *, void *); 111 void vpci_init_iommu(struct vpci_softc *, struct vpci_pbm *); 112 void vpci_init_msi(struct vpci_softc *, struct vpci_pbm *); 113 int vpci_print(void *, const char *); 114 115 pci_chipset_tag_t vpci_alloc_chipset(struct vpci_pbm *, int, 116 pci_chipset_tag_t); 117 bus_space_tag_t vpci_alloc_mem_tag(struct vpci_pbm *); 118 bus_space_tag_t vpci_alloc_io_tag(struct vpci_pbm *); 119 bus_space_tag_t vpci_alloc_bus_tag(struct vpci_pbm *, const char *, 120 int, int, int); 121 bus_dma_tag_t vpci_alloc_dma_tag(struct vpci_pbm *); 122 123 int vpci_conf_size(pci_chipset_tag_t, pcitag_t); 124 pcireg_t vpci_conf_read(pci_chipset_tag_t, pcitag_t, int); 125 void vpci_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t); 126 127 int vpci_intr_map(struct pci_attach_args *, pci_intr_handle_t *); 128 int vpci_intr_nomap(struct pci_attach_args *, pci_intr_handle_t *); 129 int vpci_bus_map(bus_space_tag_t, bus_space_tag_t, bus_addr_t, 130 bus_size_t, int, bus_space_handle_t *); 131 paddr_t vpci_bus_mmap(bus_space_tag_t, bus_space_tag_t, bus_addr_t, off_t, 132 int, int); 133 void *vpci_intr_establish(bus_space_tag_t, bus_space_tag_t, int, int, int, 134 int (*)(void *), void *, const char *); 135 void *vpci_intr_establish_cpu(bus_space_tag_t, bus_space_tag_t, int, int, 136 int, struct cpu_info *, int (*)(void *), void *, const char *); 137 void vpci_intr_ack(struct intrhand *); 138 void vpci_msi_ack(struct intrhand *); 139 140 int vpci_msi_eq_intr(void *); 141 142 int vpci_dmamap_create(bus_dma_tag_t, bus_dma_tag_t, bus_size_t, int, 143 bus_size_t, bus_size_t, int, bus_dmamap_t *); 144 void vpci_dmamap_destroy(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t); 145 int vpci_dmamap_load(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 146 void *, bus_size_t, struct proc *, int); 147 void vpci_dmamap_unload(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t); 148 int vpci_dmamem_alloc(bus_dma_tag_t, bus_dma_tag_t, bus_size_t, 149 bus_size_t, bus_size_t, bus_dma_segment_t *, int, int *, int); 150 int vpci_dmamem_map(bus_dma_tag_t, bus_dma_tag_t, bus_dma_segment_t *, 151 int, size_t, caddr_t *, int); 152 void vpci_dmamem_unmap(bus_dma_tag_t, bus_dma_tag_t, caddr_t, size_t); 153 154 int 155 vpci_match(struct device *parent, void *match, void *aux) 156 { 157 struct mainbus_attach_args *ma = aux; 158 159 if (strcmp(ma->ma_name, "pci") != 0) 160 return (0); 161 162 return (OF_is_compatible(ma->ma_node, "SUNW,sun4v-pci") || 163 OF_is_compatible(ma->ma_node, "SUNW,sun4v-vpci")); 164 } 165 166 void 167 vpci_attach(struct device *parent, struct device *self, void *aux) 168 { 169 struct vpci_softc *sc = (struct vpci_softc *)self; 170 struct mainbus_attach_args *ma = aux; 171 struct pcibus_attach_args pba; 172 struct vpci_pbm *pbm; 173 int *busranges = NULL, nranges; 174 int virtual, intx; 175 176 sc->sc_dmat = ma->ma_dmatag; 177 sc->sc_bust = ma->ma_bustag; 178 sc->sc_node = ma->ma_node; 179 180 pbm = malloc(sizeof(*pbm), M_DEVBUF, M_NOWAIT | M_ZERO); 181 if (pbm == NULL) 182 panic("vpci: can't alloc vpci pbm"); 183 184 pbm->vp_sc = sc; 185 pbm->vp_devhandle = (ma->ma_reg[0].ur_paddr >> 32) & 0x0fffffff; 186 187 if (getprop(ma->ma_node, "ranges", sizeof(struct vpci_range), 188 &pbm->vp_nrange, (void **)&pbm->vp_range)) 189 panic("vpci: can't get ranges"); 190 191 if (getprop(ma->ma_node, "bus-range", sizeof(int), &nranges, 192 (void **)&busranges)) 193 panic("vpci: can't get bus-range"); 194 195 printf(": bus %d to %d, ", busranges[0], busranges[1]); 196 197 virtual = (OF_getproplen(ma->ma_node, "virtual-root-complex") == 0); 198 intx = (OF_getproplen(ma->ma_node, "pci-intx-not-supported") != 0); 199 200 pbm->vp_memt = vpci_alloc_mem_tag(pbm); 201 pbm->vp_iot = vpci_alloc_io_tag(pbm); 202 pbm->vp_dmat = vpci_alloc_dma_tag(pbm); 203 204 pbm->vp_pc = vpci_alloc_chipset(pbm, ma->ma_node, &_sparc_pci_chipset); 205 pbm->vp_pc->bustag = pbm->vp_memt; 206 207 vpci_init_iommu(sc, pbm); 208 vpci_init_msi(sc, pbm); 209 210 bzero(&pba, sizeof(pba)); 211 pba.pba_busname = "pci"; 212 pba.pba_domain = pci_ndomains++; 213 pba.pba_bus = busranges[0]; 214 pba.pba_pc = pbm->vp_pc; 215 pba.pba_flags = pbm->vp_flags; 216 pba.pba_dmat = pbm->vp_dmat; 217 pba.pba_memt = pbm->vp_memt; 218 pba.pba_iot = pbm->vp_iot; 219 pba.pba_pc->conf_size = vpci_conf_size; 220 pba.pba_pc->conf_read = vpci_conf_read; 221 pba.pba_pc->conf_write = vpci_conf_write; 222 pba.pba_pc->intr_map = (intx ? vpci_intr_map : vpci_intr_nomap); 223 224 free(busranges, M_DEVBUF, 0); 225 226 config_found(&sc->sc_dv, &pba, vpci_print); 227 228 /* 229 * Signal that we're ready to share this root complex with our 230 * guests. 231 */ 232 if (sun4v_group_sdio_major > 0 && !virtual) { 233 int err; 234 235 err = hv_pci_iov_root_configured(pbm->vp_devhandle); 236 if (err != H_EOK) { 237 printf("%s: pci_iov_root_configured: err %x\n", 238 sc->sc_dv.dv_xname, err); 239 } 240 241 } 242 } 243 244 void 245 vpci_init_iommu(struct vpci_softc *sc, struct vpci_pbm *pbm) 246 { 247 struct iommu_state *is = &pbm->vp_is; 248 int tsbsize = 8; 249 u_int32_t iobase = 0x80000000; 250 char *name; 251 252 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 253 if (name == NULL) 254 panic("couldn't malloc iommu name"); 255 snprintf(name, 32, "%s dvma", sc->sc_dv.dv_xname); 256 257 viommu_init(name, is, tsbsize, iobase); 258 is->is_devhandle = pbm->vp_devhandle; 259 } 260 261 void 262 vpci_init_msi(struct vpci_softc *sc, struct vpci_pbm *pbm) 263 { 264 u_int32_t msi_addr_range[3]; 265 u_int32_t msi_eq_devino[3] = { 0, 36, 24 }; 266 u_int32_t msi_range[2]; 267 uint64_t sysino; 268 int msis, msi_eq_size, num_eq, unit; 269 struct vpci_eq *eq; 270 int err; 271 CPU_INFO_ITERATOR cii; 272 struct cpu_info *ci; 273 274 /* One eq per cpu, limited by the number of eqs. */ 275 num_eq = min(ncpus, getpropint(sc->sc_node, "#msi-eqs", 36)); 276 277 if (OF_getprop(sc->sc_node, "msi-address-ranges", 278 msi_addr_range, sizeof(msi_addr_range)) <= 0) 279 return; 280 pbm->vp_msiaddr = msi_addr_range[1]; 281 pbm->vp_msiaddr |= ((bus_addr_t)msi_addr_range[0]) << 32; 282 283 msis = getpropint(sc->sc_node, "#msi", 256); 284 pbm->vp_msi = mallocarray(msis, sizeof(*pbm->vp_msi), M_DEVBUF, 285 M_NOWAIT | M_ZERO); 286 if (pbm->vp_msi == NULL) 287 return; 288 289 msi_eq_size = getpropint(sc->sc_node, "msi-eq-size", 256); 290 291 if (OF_getprop(sc->sc_node, "msi-ranges", 292 msi_range, sizeof(msi_range)) <= 0) 293 goto free_table; 294 pbm->vp_msibase = msi_range[0]; 295 296 pbm->vp_neq = num_eq; 297 pbm->vp_eq = mallocarray(num_eq, sizeof(*eq), M_DEVBUF, 298 M_WAITOK | M_ZERO); 299 300 CPU_INFO_FOREACH(cii, ci) { 301 unit = CPU_INFO_UNIT(ci); 302 eq = &pbm->vp_eq[unit]; 303 304 if (unit >= num_eq) 305 continue; 306 307 eq->eq_id = unit; 308 eq->eq_pbm = pbm; 309 snprintf(eq->eq_name, sizeof(eq->eq_name), "%s:%d", 310 sc->sc_dv.dv_xname, unit); 311 312 eq->eq_meq = msi_eq_alloc(sc->sc_dmat, msi_eq_size, 1); 313 if (eq->eq_meq == NULL) 314 goto free_queues; 315 316 err = hv_pci_msiq_conf(pbm->vp_devhandle, unit, 317 eq->eq_meq->meq_map->dm_segs[0].ds_addr, 318 eq->eq_meq->meq_nentries); 319 if (err != H_EOK) 320 goto free_queues; 321 322 eq->eq_mask = (eq->eq_meq->meq_nentries * 323 sizeof(struct vpci_msi_msg)) - 1; 324 325 OF_getprop(sc->sc_node, "msi-eq-to-devino", 326 msi_eq_devino, sizeof(msi_eq_devino)); 327 err = sun4v_intr_devino_to_sysino(pbm->vp_devhandle, 328 msi_eq_devino[2] + unit, &sysino); 329 if (err != H_EOK) 330 goto free_queues; 331 332 eq->eq_ih = vpci_intr_establish_cpu(pbm->vp_memt, pbm->vp_memt, 333 sysino, IPL_HIGH, BUS_INTR_ESTABLISH_MPSAFE, ci, 334 vpci_msi_eq_intr, eq, eq->eq_name); 335 if (eq->eq_ih == NULL) 336 goto free_queues; 337 338 err = hv_pci_msiq_setvalid(pbm->vp_devhandle, unit, 339 PCI_MSIQ_VALID); 340 if (err != H_EOK) { 341 printf("%s: pci_msiq_setvalid(%d): err %d\n", __func__, 342 unit, err); 343 goto free_queues; 344 } 345 346 err = hv_pci_msiq_setstate(pbm->vp_devhandle, unit, 347 PCI_MSIQSTATE_IDLE); 348 if (err != H_EOK) { 349 printf("%s: pci_msiq_setstate(%d): err %d\n", __func__, 350 unit, err); 351 goto free_queues; 352 } 353 } 354 355 pbm->vp_flags |= PCI_FLAGS_MSI_ENABLED; 356 return; 357 358 free_queues: 359 CPU_INFO_FOREACH(cii, ci) { 360 unit = CPU_INFO_UNIT(ci); 361 eq = &pbm->vp_eq[unit]; 362 363 if (eq->eq_meq != NULL) 364 msi_eq_free(sc->sc_dmat, eq->eq_meq); 365 366 hv_pci_msiq_conf(pbm->vp_devhandle, unit, 0, 0); 367 } 368 free(pbm->vp_eq, M_DEVBUF, num_eq * sizeof(*eq)); 369 free_table: 370 free(pbm->vp_msi, M_DEVBUF, 0); 371 } 372 373 int 374 vpci_print(void *aux, const char *p) 375 { 376 if (p == NULL) 377 return (UNCONF); 378 return (QUIET); 379 } 380 381 int 382 vpci_conf_size(pci_chipset_tag_t pc, pcitag_t tag) 383 { 384 return PCIE_CONFIG_SPACE_SIZE; 385 } 386 387 pcireg_t 388 vpci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg) 389 { 390 struct vpci_pbm *pbm = pc->cookie; 391 uint64_t error_flag, data; 392 393 hv_pci_config_get(pbm->vp_devhandle, PCITAG_OFFSET(tag), reg, 4, 394 &error_flag, &data); 395 396 return (error_flag ? (pcireg_t)~0 : data); 397 } 398 399 void 400 vpci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data) 401 { 402 struct vpci_pbm *pbm = pc->cookie; 403 uint64_t error_flag; 404 405 hv_pci_config_put(pbm->vp_devhandle, PCITAG_OFFSET(tag), reg, 4, 406 data, &error_flag); 407 } 408 409 /* 410 * Bus-specific interrupt mapping 411 */ 412 int 413 vpci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 414 { 415 struct vpci_pbm *pbm = pa->pa_pc->cookie; 416 uint64_t devhandle = pbm->vp_devhandle; 417 uint64_t devino = INTVEC(*ihp); 418 uint64_t sysino; 419 int err; 420 421 if (*ihp != (pci_intr_handle_t)-1) { 422 err = sun4v_intr_devino_to_sysino(devhandle, devino, &sysino); 423 if (err != H_EOK) 424 return (-1); 425 426 *ihp = sysino; 427 return (0); 428 } 429 430 return (-1); 431 } 432 433 int 434 vpci_intr_nomap(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 435 { 436 return (-1); 437 } 438 439 bus_space_tag_t 440 vpci_alloc_mem_tag(struct vpci_pbm *pp) 441 { 442 return (vpci_alloc_bus_tag(pp, "mem", 443 0x02, /* 32-bit mem space (where's the #define???) */ 444 ASI_PRIMARY, ASI_PRIMARY_LITTLE)); 445 } 446 447 bus_space_tag_t 448 vpci_alloc_io_tag(struct vpci_pbm *pp) 449 { 450 return (vpci_alloc_bus_tag(pp, "io", 451 0x01, /* IO space (where's the #define???) */ 452 ASI_PRIMARY, ASI_PRIMARY_LITTLE)); 453 } 454 455 bus_space_tag_t 456 vpci_alloc_bus_tag(struct vpci_pbm *pbm, const char *name, int ss, 457 int asi, int sasi) 458 { 459 struct vpci_softc *sc = pbm->vp_sc; 460 struct sparc_bus_space_tag *bt; 461 462 bt = malloc(sizeof(*bt), M_DEVBUF, M_NOWAIT | M_ZERO); 463 if (bt == NULL) 464 panic("vpci: could not allocate bus tag"); 465 466 snprintf(bt->name, sizeof(bt->name), "%s-pbm_%s(%d/%2.2x)", 467 sc->sc_dv.dv_xname, name, ss, asi); 468 469 bt->cookie = pbm; 470 bt->parent = sc->sc_bust; 471 bt->default_type = ss; 472 bt->asi = asi; 473 bt->sasi = sasi; 474 bt->sparc_bus_map = vpci_bus_map; 475 bt->sparc_bus_mmap = vpci_bus_mmap; 476 bt->sparc_intr_establish = vpci_intr_establish; 477 bt->sparc_intr_establish_cpu = vpci_intr_establish_cpu; 478 return (bt); 479 } 480 481 bus_dma_tag_t 482 vpci_alloc_dma_tag(struct vpci_pbm *pbm) 483 { 484 struct vpci_softc *sc = pbm->vp_sc; 485 bus_dma_tag_t dt, pdt = sc->sc_dmat; 486 487 dt = malloc(sizeof(*dt), M_DEVBUF, M_NOWAIT | M_ZERO); 488 if (dt == NULL) 489 panic("vpci: could not alloc dma tag"); 490 491 dt->_cookie = pbm; 492 dt->_parent = pdt; 493 dt->_dmamap_create = vpci_dmamap_create; 494 dt->_dmamap_destroy = viommu_dvmamap_destroy; 495 dt->_dmamap_load = viommu_dvmamap_load; 496 dt->_dmamap_load_raw = viommu_dvmamap_load_raw; 497 dt->_dmamap_unload = viommu_dvmamap_unload; 498 dt->_dmamap_sync = viommu_dvmamap_sync; 499 dt->_dmamem_alloc = viommu_dvmamem_alloc; 500 dt->_dmamem_free = viommu_dvmamem_free; 501 return (dt); 502 } 503 504 pci_chipset_tag_t 505 vpci_alloc_chipset(struct vpci_pbm *pbm, int node, pci_chipset_tag_t pc) 506 { 507 pci_chipset_tag_t npc; 508 509 npc = malloc(sizeof *npc, M_DEVBUF, M_NOWAIT); 510 if (npc == NULL) 511 panic("vpci: could not allocate pci_chipset_tag_t"); 512 memcpy(npc, pc, sizeof *pc); 513 npc->cookie = pbm; 514 npc->rootnode = node; 515 return (npc); 516 } 517 518 #define BUS_DMA_FIND_PARENT(t, fn) \ 519 if (t->_parent == NULL) \ 520 panic("null bus_dma parent (" #fn ")"); \ 521 for (t = t->_parent; t->fn == NULL; t = t->_parent) \ 522 if (t->_parent == NULL) \ 523 panic("no bus_dma " #fn " located"); 524 525 int 526 vpci_dmamap_create(bus_dma_tag_t t, bus_dma_tag_t t0, bus_size_t size, 527 int nsegments, bus_size_t maxsegsz, bus_size_t boundary, int flags, 528 bus_dmamap_t *dmamap) 529 { 530 struct vpci_pbm *vp = t->_cookie; 531 532 return (viommu_dvmamap_create(t, t0, &vp->vp_is, size, nsegments, 533 maxsegsz, boundary, flags, dmamap)); 534 } 535 536 int 537 vpci_bus_map(bus_space_tag_t t, bus_space_tag_t t0, bus_addr_t offset, 538 bus_size_t size, int flags, bus_space_handle_t *hp) 539 { 540 struct vpci_pbm *pbm = t->cookie; 541 int i, ss = t->default_type; 542 543 if (t->parent == 0 || t->parent->sparc_bus_map == 0) 544 panic("vpci_bus_map: invalid parent"); 545 546 if (flags & BUS_SPACE_MAP_PROMADDRESS) { 547 return ((*t->parent->sparc_bus_map) 548 (t, t0, offset, size, flags, hp)); 549 } 550 551 /* Check mappings for 64-bit-address Memory Space if appropriate. */ 552 if (ss == 0x02 && offset > 0xffffffff) 553 ss = 0x03; 554 555 for (i = 0; i < pbm->vp_nrange; i++) { 556 bus_addr_t child, paddr; 557 bus_size_t rsize; 558 559 if (((pbm->vp_range[i].cspace >> 24) & 0x03) != ss) 560 continue; 561 child = pbm->vp_range[i].child_lo; 562 child |= ((bus_addr_t)pbm->vp_range[i].child_hi) << 32; 563 rsize = pbm->vp_range[i].size_lo; 564 rsize |= ((bus_size_t)pbm->vp_range[i].size_hi) << 32; 565 if (offset < child || offset >= child + rsize) 566 continue; 567 568 paddr = pbm->vp_range[i].phys_lo; 569 paddr |= ((bus_addr_t)pbm->vp_range[i].phys_hi) << 32; 570 return ((*t->parent->sparc_bus_map) 571 (t, t0, paddr + offset - child, size, flags, hp)); 572 } 573 574 return (EINVAL); 575 } 576 577 paddr_t 578 vpci_bus_mmap(bus_space_tag_t t, bus_space_tag_t t0, bus_addr_t paddr, 579 off_t off, int prot, int flags) 580 { 581 bus_addr_t offset = paddr; 582 struct vpci_pbm *pbm = t->cookie; 583 int i, ss = t->default_type; 584 585 if (t->parent == 0 || t->parent->sparc_bus_mmap == 0) 586 panic("vpci_bus_mmap: invalid parent"); 587 588 for (i = 0; i < pbm->vp_nrange; i++) { 589 bus_addr_t paddr; 590 591 if (((pbm->vp_range[i].cspace >> 24) & 0x03) != ss) 592 continue; 593 594 paddr = pbm->vp_range[i].phys_lo + offset; 595 paddr |= ((bus_addr_t)pbm->vp_range[i].phys_hi) << 32; 596 return ((*t->parent->sparc_bus_mmap) 597 (t, t0, paddr, off, prot, flags)); 598 } 599 600 return (-1); 601 } 602 603 void * 604 vpci_intr_establish(bus_space_tag_t t, bus_space_tag_t t0, int ihandle, 605 int level, int flags, int (*handler)(void *), void *arg, const char *what) 606 { 607 return (vpci_intr_establish_cpu(t, t0, ihandle, level, flags, NULL, 608 handler, arg, what)); 609 } 610 611 void * 612 vpci_intr_establish_cpu(bus_space_tag_t t, bus_space_tag_t t0, int ihandle, 613 int level, int flags, struct cpu_info *cpu, int (*handler)(void *), 614 void *arg, const char *what) 615 { 616 struct vpci_pbm *pbm = t->cookie; 617 uint64_t devhandle = pbm->vp_devhandle; 618 uint64_t sysino = INTVEC(ihandle); 619 struct intrhand *ih; 620 int err; 621 622 ih = bus_intr_allocate(t0, handler, arg, ihandle, level, 623 NULL, NULL, what); 624 if (ih == NULL) 625 return (NULL); 626 627 if (flags & BUS_INTR_ESTABLISH_MPSAFE) 628 ih->ih_mpsafe = 1; 629 630 if (PCI_INTR_TYPE(ihandle) != PCI_INTR_INTX) { 631 pci_chipset_tag_t pc = pbm->vp_pc; 632 pcitag_t tag = PCI_INTR_TAG(ihandle); 633 int msinum = pbm->vp_msinum++; 634 int msi = pbm->vp_msibase + msinum; 635 int eq = 0; 636 637 evcount_attach(&ih->ih_count, ih->ih_name, NULL); 638 639 ih->ih_ack = vpci_msi_ack; 640 641 pbm->vp_msi[msinum] = ih; 642 ih->ih_number = msinum; 643 644 switch (PCI_INTR_TYPE(ihandle)) { 645 case PCI_INTR_MSI: 646 pci_msi_enable(pc, tag, pbm->vp_msiaddr, msi); 647 break; 648 case PCI_INTR_MSIX: 649 pci_msix_enable(pc, tag, pbm->vp_memt, 650 PCI_INTR_VEC(ihandle), pbm->vp_msiaddr, msi); 651 break; 652 } 653 654 if (cpu != NULL) { 655 /* 656 * For now, if we have fewer eqs than cpus, map 657 * interrupts for the eq-less cpus onto other cpus. 658 */ 659 eq = CPU_INFO_UNIT(cpu) % pbm->vp_neq; 660 } 661 662 err = hv_pci_msi_setmsiq(devhandle, msi, eq, 0); 663 if (err != H_EOK) { 664 printf("%s: pci_msi_setmsiq: err %d\n", __func__, err); 665 return (NULL); 666 } 667 668 err = hv_pci_msi_setvalid(devhandle, msi, PCI_MSI_VALID); 669 if (err != H_EOK) { 670 printf("%s: pci_msi_setvalid: err %d\n", __func__, err); 671 return (NULL); 672 } 673 674 err = hv_pci_msi_setstate(devhandle, msi, PCI_MSISTATE_IDLE); 675 if (err != H_EOK) { 676 printf("%s: pci_msi_setstate: err %d\n", __func__, err); 677 return (NULL); 678 } 679 680 return (ih); 681 } 682 683 err = sun4v_intr_setcookie(devhandle, sysino, (vaddr_t)ih); 684 if (err != H_EOK) 685 return (NULL); 686 687 ih->ih_cpu = cpu; 688 intr_establish(ih->ih_pil, ih); 689 ih->ih_ack = vpci_intr_ack; 690 691 err = sun4v_intr_settarget(devhandle, sysino, ih->ih_cpu->ci_upaid); 692 if (err != H_EOK) 693 return (NULL); 694 695 /* Clear pending interrupts. */ 696 err = sun4v_intr_setstate(devhandle, sysino, INTR_IDLE); 697 if (err != H_EOK) 698 return (NULL); 699 700 err = sun4v_intr_setenabled(devhandle, sysino, INTR_ENABLED); 701 if (err != H_EOK) 702 return (NULL); 703 704 return (ih); 705 } 706 707 void 708 vpci_intr_ack(struct intrhand *ih) 709 { 710 bus_space_tag_t t = ih->ih_bus; 711 struct vpci_pbm *pbm = t->cookie; 712 uint64_t devhandle = pbm->vp_devhandle; 713 uint64_t sysino = INTVEC(ih->ih_number); 714 715 sun4v_intr_setstate(devhandle, sysino, INTR_IDLE); 716 } 717 718 void 719 vpci_msi_ack(struct intrhand *ih) 720 { 721 } 722 723 int 724 vpci_msi_eq_intr(void *arg) 725 { 726 struct vpci_eq *eq = arg; 727 struct vpci_pbm *pbm = eq->eq_pbm; 728 struct vpci_msi_msg *msg; 729 uint64_t devhandle = pbm->vp_devhandle; 730 uint64_t head, tail; 731 struct intrhand *ih; 732 int msinum, msi; 733 int err; 734 735 err = hv_pci_msiq_gethead(devhandle, eq->eq_id, &head); 736 if (err != H_EOK) 737 printf("%s: pci_msiq_gethead(%d): %d\n", __func__, eq->eq_id, 738 err); 739 740 err = hv_pci_msiq_gettail(devhandle, eq->eq_id, &tail); 741 if (err != H_EOK) 742 printf("%s: pci_msiq_gettail(%d): %d\n", __func__, eq->eq_id, 743 err); 744 745 if (head == tail) 746 return (0); 747 748 while (head != tail) { 749 msg = (struct vpci_msi_msg *)(eq->eq_meq->meq_va + head); 750 751 if (msg->mm_type == 0) 752 break; 753 msg->mm_type = 0; 754 755 msi = msg->mm_data; 756 msinum = msi - pbm->vp_msibase; 757 ih = pbm->vp_msi[msinum]; 758 err = hv_pci_msi_setstate(devhandle, msi, PCI_MSISTATE_IDLE); 759 if (err != H_EOK) 760 printf("%s: pci_msi_setstate: %d\n", __func__, err); 761 762 send_softint(-1, ih->ih_pil, ih); 763 764 head += sizeof(struct vpci_msi_msg); 765 head &= eq->eq_mask; 766 } 767 768 err = hv_pci_msiq_sethead(devhandle, eq->eq_id, head); 769 if (err != H_EOK) 770 printf("%s: pci_msiq_sethead(%d): %d\n", __func__, eq->eq_id, 771 err); 772 773 return (1); 774 } 775 776 const struct cfattach vpci_ca = { 777 sizeof(struct vpci_softc), vpci_match, vpci_attach 778 }; 779 780 struct cfdriver vpci_cd = { 781 NULL, "vpci", DV_DULL 782 }; 783