1 /* $OpenBSD: bus.h,v 1.17 2005/07/10 00:23:11 brad Exp $ */ 2 /* $NetBSD: bus.h,v 1.31 2001/09/21 15:30:41 wiz Exp $ */ 3 4 /*- 5 * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 10 * NASA Ames Research Center. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * Copyright (c) 1997-1999, 2001 Eduardo E. Horvath. All rights reserved. 43 * Copyright (c) 1996 Charles M. Hannum. All rights reserved. 44 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 45 * 46 * Redistribution and use in source and binary forms, with or without 47 * modification, are permitted provided that the following conditions 48 * are met: 49 * 1. Redistributions of source code must retain the above copyright 50 * notice, this list of conditions and the following disclaimer. 51 * 2. Redistributions in binary form must reproduce the above copyright 52 * notice, this list of conditions and the following disclaimer in the 53 * documentation and/or other materials provided with the distribution. 54 * 3. All advertising materials mentioning features or use of this software 55 * must display the following acknowledgement: 56 * This product includes software developed by Christopher G. Demetriou 57 * for the NetBSD Project. 58 * 4. The name of the author may not be used to endorse or promote products 59 * derived from this software without specific prior written permission 60 * 61 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 62 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 63 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 64 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 65 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 66 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 67 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 68 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 69 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 70 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 71 */ 72 73 #ifndef _SPARC_BUS_H_ 74 #define _SPARC_BUS_H_ 75 76 #include <machine/types.h> 77 #include <machine/ctlreg.h> 78 79 /* 80 * Debug hooks 81 */ 82 83 #define BSDB_ACCESS 0x01 84 #define BSDB_MAP 0x02 85 #define BSDB_ASSERT 0x04 86 #define BSDB_MAPDETAIL 0x08 87 #define BSDB_ALL_ACCESS 0x10 88 extern int bus_space_debug; 89 90 #define BSHDB_ACCESS 0x01 91 #define BSHDB_NO_ACCESS 0x02 92 93 #if defined(BUS_SPACE_DEBUG) 94 #ifndef __SYSTM_H__ 95 #include <sys/systm.h> 96 #endif 97 #define BUS_SPACE_PRINTF(l, s) do { \ 98 if(bus_space_debug & (l)) printf s; \ 99 } while(0) 100 #define BUS_SPACE_TRACE(t, h, s) do { \ 101 if ( (((bus_space_debug & BSDB_ALL_ACCESS) != 0) && \ 102 (((h).bh_flags & BSHDB_NO_ACCESS) == 0)) || \ 103 (((bus_space_debug & BSDB_ACCESS) != 0) && \ 104 (((h).bh_flags & BSHDB_ACCESS) != 0))) \ 105 printf s; \ 106 } while(0) 107 #define BUS_SPACE_SET_FLAGS(t, h, f) ((h).bh_flags |= (f)) 108 #define BUS_SPACE_CLEAR_FLAGS(t, h, f) ((h).bh_flags &= ~(f)) 109 #define BUS_SPACE_FLAG_DECL(s) int s 110 #define BUS_SPACE_SAVE_FLAGS(t, h, s) (s = (h).bh_flags) 111 #define BUS_SPACE_RESTORE_FLAGS(t, h, s) (s = (h).bh_flags) 112 #define BUS_SPACE_ASSERT(t, h, o, n) do { \ 113 if (bus_space_debug & BSDB_ASSERT) \ 114 bus_space_assert(t, &(h), o, n); \ 115 } while(0) 116 #else /* BUS_SPACE_DEBUG */ 117 #define BUS_SPACE_PRINTF(l, s) 118 #define BUS_SPACE_TRACE(t, h, s) 119 #define BUS_SPACE_SET_FLAGS(t, h, f) 120 #define BUS_SPACE_CLEAR_FLAGS(t, h, f) 121 #define BUS_SPACE_FLAG_DECL(s) 122 #define BUS_SPACE_SAVE_FLAGS(t, h, s) 123 #define BUS_SPACE_RESTORE_FLAGS(t, h, s) 124 #define BUS_SPACE_ASSERT(t, h, o, n) 125 #endif /* BUS_SPACE_DEBUG */ 126 127 128 /* 129 * UPA and SBUS spaces are non-cached and big endian 130 * (except for RAM and PROM) 131 * 132 * PCI spaces are non-cached and little endian 133 */ 134 135 enum bus_type { 136 UPA_BUS_SPACE, 137 SBUS_BUS_SPACE, 138 PCI_CONFIG_BUS_SPACE, 139 PCI_IO_BUS_SPACE, 140 PCI_MEMORY_BUS_SPACE, 141 LAST_BUS_SPACE 142 }; 143 /* For backwards compatibility */ 144 #define SPARC_BUS_SPACE UPA_BUS_SPACE 145 146 #define __BUS_SPACE_HAS_STREAM_METHODS 1 147 148 /* 149 * Bus address and size types 150 */ 151 typedef const struct sparc_bus_space_tag *bus_space_tag_t; 152 typedef u_int64_t bus_addr_t; 153 typedef u_int64_t bus_size_t; 154 155 156 typedef struct _bus_space_handle { 157 paddr_t bh_ptr; 158 #ifdef BUS_SPACE_DEBUG 159 bus_space_tag_t bh_tag; 160 bus_size_t bh_size; 161 int bh_flags; 162 #endif 163 } bus_space_handle_t; 164 165 /* For buses which have an iospace. */ 166 #define BUS_ADDR_IOSPACE(x) ((x)>>32) 167 #define BUS_ADDR_PADDR(x) ((x)&0xffffffff) 168 #define BUS_ADDR(io, pa) ((((bus_addr_t)io)<<32)|(pa)) 169 170 /* 171 * Access methods for bus resources and address space. 172 */ 173 174 struct sparc_bus_space_tag { 175 void *cookie; 176 bus_space_tag_t parent; 177 enum bus_type default_type; 178 u_int8_t asi; 179 u_int8_t sasi; 180 char name[32]; 181 182 int (*sparc_bus_alloc)(bus_space_tag_t, 183 bus_space_tag_t, 184 bus_addr_t, bus_addr_t, 185 bus_size_t, bus_size_t, bus_size_t, 186 int, bus_addr_t *, bus_space_handle_t *); 187 188 void (*sparc_bus_free)(bus_space_tag_t, 189 bus_space_tag_t, 190 bus_space_handle_t, bus_size_t); 191 192 int (*sparc_bus_map)(bus_space_tag_t, 193 bus_space_tag_t, 194 bus_addr_t, bus_size_t, 195 int, bus_space_handle_t *); 196 197 int (*sparc_bus_protect)(bus_space_tag_t, 198 bus_space_tag_t, 199 bus_space_handle_t, bus_size_t, int); 200 201 int (*sparc_bus_unmap)(bus_space_tag_t, 202 bus_space_tag_t, 203 bus_space_handle_t, bus_size_t); 204 205 int (*sparc_bus_subregion)(bus_space_tag_t, 206 bus_space_tag_t, 207 bus_space_handle_t, bus_size_t, 208 bus_size_t, bus_space_handle_t *); 209 210 void (*sparc_bus_barrier)(bus_space_tag_t, 211 bus_space_tag_t, 212 bus_space_handle_t, bus_size_t, 213 bus_size_t, int); 214 215 paddr_t (*sparc_bus_mmap)(bus_space_tag_t, 216 bus_space_tag_t, 217 bus_addr_t, off_t, int, int); 218 219 void *(*sparc_intr_establish)(bus_space_tag_t, 220 bus_space_tag_t, 221 int, int, int, 222 int (*)(void *), void *, 223 const char *); 224 225 }; 226 227 /* 228 * Bus space function prototypes. 229 */ 230 int bus_space_alloc( 231 bus_space_tag_t, 232 bus_addr_t, /* reg start */ 233 bus_addr_t, /* reg end */ 234 bus_size_t, /* size */ 235 bus_size_t, /* alignment */ 236 bus_size_t, /* boundary */ 237 int, /* flags */ 238 bus_addr_t *, 239 bus_space_handle_t *); 240 void bus_space_free( 241 bus_space_tag_t, 242 bus_space_handle_t, 243 bus_size_t); 244 int bus_space_map( 245 bus_space_tag_t, 246 bus_addr_t, 247 bus_size_t, 248 int, /*flags*/ 249 bus_space_handle_t *); 250 int bus_space_protect( 251 bus_space_tag_t, 252 bus_space_handle_t, 253 bus_size_t, 254 int); /*flags*/ 255 int bus_space_unmap( 256 bus_space_tag_t, 257 bus_space_handle_t, 258 bus_size_t); 259 int bus_space_subregion( 260 bus_space_tag_t, 261 bus_space_handle_t, 262 bus_size_t, 263 bus_size_t, 264 bus_space_handle_t *); 265 static void bus_space_barrier( 266 bus_space_tag_t, 267 bus_space_handle_t, 268 bus_size_t, 269 bus_size_t, 270 int); 271 paddr_t bus_space_mmap( 272 bus_space_tag_t, 273 bus_addr_t, /*addr*/ 274 off_t, /*offset*/ 275 int, /*prot*/ 276 int); /*flags*/ 277 void *bus_intr_establish( 278 bus_space_tag_t, 279 int, /*bus-specific intr*/ 280 int, /*device class level, 281 see machine/intr.h*/ 282 int, /*flags*/ 283 int (*)(void *), /*handler*/ 284 void *, /*handler arg*/ 285 const char *); /*what*/ 286 void *bus_intr_allocate( 287 bus_space_tag_t, 288 int (*)(void *), /*handler*/ 289 void *, /*handler arg*/ 290 int, /*number*/ 291 int, /*pil*/ 292 volatile u_int64_t *, /*map*/ 293 volatile u_int64_t *, /*clr*/ 294 const char *); /*what*/ 295 void bus_intr_free(void *); 296 void bus_space_render_tag( 297 bus_space_tag_t, 298 char *, 299 size_t); 300 void *bus_space_vaddr( 301 bus_space_tag_t, 302 bus_space_handle_t); 303 304 #ifdef BUS_SPACE_DEBUG 305 void bus_space_assert(bus_space_tag_t, 306 const bus_space_handle_t *, 307 bus_size_t, int); 308 void bus_space_render_tag(bus_space_tag_t, char*, size_t); 309 #endif /* BUS_SPACE_DEBUG */ 310 311 312 #define _BS_PRECALL(t,f) \ 313 while (t->f == NULL) \ 314 t = t->parent; 315 #define _BS_POSTCALL 316 317 #define _BS_CALL(t,f) \ 318 (*(t)->f) 319 320 static inline void 321 bus_space_barrier(t, h, o, s, f) 322 bus_space_tag_t t; 323 bus_space_handle_t h; 324 bus_size_t o; 325 bus_size_t s; 326 int f; 327 { 328 const bus_space_tag_t t0 = t; 329 _BS_PRECALL(t, sparc_bus_barrier); 330 _BS_CALL(t, sparc_bus_barrier)(t, t0, h, o, s, f); 331 _BS_POSTCALL; 332 } 333 334 #include <sparc64/sparc64/busop.h> 335 336 /* flags for bus space map functions */ 337 #define BUS_SPACE_MAP_CACHEABLE 0x0001 338 #define BUS_SPACE_MAP_LINEAR 0x0002 339 #define BUS_SPACE_MAP_READONLY 0x0004 340 #define BUS_SPACE_MAP_PREFETCHABLE 0x0008 341 #define BUS_SPACE_MAP_PROMADDRESS 0x0010 342 #define BUS_SPACE_MAP_BUS1 0x0100 /* placeholders for bus functions... */ 343 #define BUS_SPACE_MAP_BUS2 0x0200 344 #define BUS_SPACE_MAP_BUS3 0x0400 345 #define BUS_SPACE_MAP_BUS4 0x0800 346 347 348 /* flags for intr_establish() */ 349 #define BUS_INTR_ESTABLISH_FASTTRAP 1 350 #define BUS_INTR_ESTABLISH_SOFTINTR 2 351 352 /* flags for bus_space_barrier() */ 353 #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ 354 #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ 355 356 /* 357 * Device space probe assistant. 358 * The optional callback function's arguments are: 359 * the temporary virtual address 360 * the passed `arg' argument 361 */ 362 int bus_space_probe( 363 bus_space_tag_t, 364 bus_addr_t, 365 bus_size_t, /* probe size */ 366 size_t, /* offset */ 367 int, /* flags */ 368 int (*)(void *, void *), /* callback function */ 369 void *); /* callback arg */ 370 371 372 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 373 374 /* 375 * Flags used in various bus DMA methods. 376 */ 377 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 378 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 379 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 380 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 381 #define BUS_DMA_NOWRITE 0x008 /* I suppose the following two should default on */ 382 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 383 #define BUS_DMA_BUS2 0x020 384 #define BUS_DMA_BUS3 0x040 385 #define BUS_DMA_BUS4 0x080 386 #define BUS_DMA_STREAMING 0x100 /* hint: sequential, unidirectional */ 387 #define BUS_DMA_READ 0x200 /* mapping is device -> memory only */ 388 #define BUS_DMA_WRITE 0x400 /* mapping is memory -> device only */ 389 390 #define BUS_DMA_NOCACHE BUS_DMA_BUS1 391 #define BUS_DMA_DVMA BUS_DMA_BUS2 /* Don't bother with alignment */ 392 #define BUS_DMA_24BIT BUS_DMA_BUS3 /* 24bit device */ 393 394 #define BUS_DMA_RAW BUS_DMA_STREAMING 395 396 /* Forwards needed by prototypes below. */ 397 struct mbuf; 398 struct uio; 399 400 /* 401 * Operations performed by bus_dmamap_sync(). 402 */ 403 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 404 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 405 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 406 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 407 408 typedef struct sparc_bus_dma_tag *bus_dma_tag_t; 409 typedef struct sparc_bus_dmamap *bus_dmamap_t; 410 411 /* 412 * bus_dma_segment_t 413 * 414 * Describes a single contiguous DMA transaction. Values 415 * are suitable for programming into DMA registers. 416 */ 417 struct sparc_bus_dma_segment { 418 bus_addr_t ds_addr; /* DVMA address */ 419 bus_size_t ds_len; /* length of transfer */ 420 /* 421 * The following is to support bus_dmamem_alloc()'s 422 * odd interface. Only the values in the first 423 * segment are used. This means that 3/5ths of 424 * most segments are useless space (and mbufs use 1024 425 * segments). 426 */ 427 bus_size_t _ds_boundary; /* don't cross this */ 428 bus_size_t _ds_align; /* align to this */ 429 void *_ds_mlist; /* XXX - dmamap_alloc'ed pages */ 430 }; 431 typedef struct sparc_bus_dma_segment bus_dma_segment_t; 432 433 434 /* 435 * bus_dma_tag_t 436 * 437 * A machine-dependent opaque type describing the implementation of 438 * DMA for a given bus. 439 */ 440 struct sparc_bus_dma_tag { 441 void *_cookie; /* cookie used in the guts */ 442 struct sparc_bus_dma_tag* _parent; 443 444 /* 445 * DMA mapping methods. 446 */ 447 int (*_dmamap_create)(bus_dma_tag_t, bus_dma_tag_t, bus_size_t, 448 int, bus_size_t, bus_size_t, int, bus_dmamap_t *); 449 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t); 450 int (*_dmamap_load)(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 451 void *, bus_size_t, struct proc *, int); 452 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dma_tag_t, 453 bus_dmamap_t, struct mbuf *, int); 454 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 455 struct uio *, int); 456 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 457 bus_dma_segment_t *, int, bus_size_t, int); 458 void (*_dmamap_unload)(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t); 459 void (*_dmamap_sync)(bus_dma_tag_t, bus_dma_tag_t, bus_dmamap_t, 460 bus_addr_t, bus_size_t, int); 461 462 /* 463 * DMA memory utility functions. 464 */ 465 int (*_dmamem_alloc)(bus_dma_tag_t, bus_dma_tag_t, bus_size_t, 466 bus_size_t, bus_size_t, bus_dma_segment_t *, int, int *, 467 int); 468 void (*_dmamem_free)(bus_dma_tag_t, bus_dma_tag_t, 469 bus_dma_segment_t *, int); 470 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_tag_t, 471 bus_dma_segment_t *, int, size_t, caddr_t *, int); 472 void (*_dmamem_unmap)(bus_dma_tag_t, bus_dma_tag_t, caddr_t, 473 size_t); 474 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_tag_t, 475 bus_dma_segment_t *, int, off_t, int, int); 476 }; 477 478 #define _BD_PRECALL(t,f) \ 479 while (t->f == NULL) { \ 480 t = t->_parent; \ 481 } 482 #define _BD_CALL(t,f) \ 483 (*(t)->f) 484 #define _BD_POSTCALL 485 486 static inline int 487 bus_dmamap_create(bus_dma_tag_t t, bus_size_t s, int n, bus_size_t m, 488 bus_size_t b, int f, bus_dmamap_t *p) 489 { 490 int r; 491 const bus_dma_tag_t t0 = t; 492 _BD_PRECALL(t, _dmamap_create); 493 r = _BD_CALL(t, _dmamap_create)(t, t0, s, n, m, b, f, p); 494 _BD_POSTCALL; 495 return (r); 496 } 497 static inline void 498 bus_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t p) 499 { 500 const bus_dma_tag_t t0 = t; 501 _BD_PRECALL(t, _dmamap_destroy); 502 _BD_CALL(t, _dmamap_destroy)(t, t0, p); 503 _BD_POSTCALL; 504 } 505 static inline int 506 bus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t m, void *b, bus_size_t s, 507 struct proc *p, int f) 508 { 509 const bus_dma_tag_t t0 = t; 510 int r; 511 _BD_PRECALL(t, _dmamap_load); 512 r = _BD_CALL(t, _dmamap_load)(t, t0, m, b, s, p, f); 513 _BD_POSTCALL; 514 return (r); 515 } 516 static inline int 517 bus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t m, struct mbuf *b, 518 int f) 519 { 520 const bus_dma_tag_t t0 = t; 521 int r; 522 _BD_PRECALL(t, _dmamap_load_mbuf); 523 r = _BD_CALL(t, _dmamap_load_mbuf)(t, t0, m, b, f); 524 _BD_POSTCALL; 525 return (r); 526 } 527 static inline int 528 bus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t m, struct uio * u, int f) 529 { 530 const bus_dma_tag_t t0 = t; 531 int r; 532 _BD_PRECALL(t, _dmamap_load_uio); 533 r = _BD_CALL(t, _dmamap_load_uio)(t, t0, m, u, f); 534 _BD_POSTCALL; 535 return (r); 536 } 537 static inline int 538 bus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t m, bus_dma_segment_t *sg, 539 int n, bus_size_t s, int f) 540 { 541 const bus_dma_tag_t t0 = t; 542 int r; 543 _BD_PRECALL(t, _dmamap_load_raw); 544 r = _BD_CALL(t, _dmamap_load_raw)(t, t0, m, sg, n, s, f); 545 _BD_POSTCALL; 546 return (r); 547 } 548 static inline void 549 bus_dmamap_unload(bus_dma_tag_t t, bus_dmamap_t p) 550 { 551 const bus_dma_tag_t t0 = t; 552 _BD_PRECALL(t, _dmamap_unload); 553 _BD_CALL(t, _dmamap_unload)(t, t0, p); 554 _BD_POSTCALL; 555 } 556 static inline void 557 bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t p, bus_addr_t o, bus_size_t l, 558 int ops) 559 { 560 const bus_dma_tag_t t0 = t; 561 _BD_PRECALL(t, _dmamap_sync); 562 _BD_CALL(t, _dmamap_sync)(t, t0, p, o, l, ops); 563 _BD_POSTCALL; 564 } 565 static inline int 566 bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t s, bus_size_t a, bus_size_t b, 567 bus_dma_segment_t *sg, int n, int *r, int f) 568 { 569 const bus_dma_tag_t t0 = t; 570 int ret; 571 _BD_PRECALL(t, _dmamem_alloc); 572 ret = _BD_CALL(t, _dmamem_alloc)(t, t0, s, a, b, sg, n, r, f); 573 _BD_POSTCALL; 574 return (ret); 575 } 576 static inline void 577 bus_dmamem_free(bus_dma_tag_t t, bus_dma_segment_t *sg, int n) 578 { 579 const bus_dma_tag_t t0 = t; 580 _BD_PRECALL(t, _dmamem_free); 581 _BD_CALL(t, _dmamem_free)(t, t0, sg, n); 582 _BD_POSTCALL; 583 } 584 static inline int 585 bus_dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *sg, int n, size_t s, 586 caddr_t *k, int f) 587 { 588 const bus_dma_tag_t t0 = t; 589 int r; 590 _BD_PRECALL(t, _dmamem_map); 591 r = _BD_CALL(t, _dmamem_map)(t, t0, sg, n, s, k, f); 592 _BD_POSTCALL; 593 return (r); 594 } 595 static inline void 596 bus_dmamem_unmap(bus_dma_tag_t t, caddr_t k, size_t s) 597 { 598 const bus_dma_tag_t t0 = t; 599 _BD_PRECALL(t, _dmamem_unmap); 600 _BD_CALL(t, _dmamem_unmap)(t, t0, k, s); 601 _BD_POSTCALL; 602 } 603 static inline paddr_t 604 bus_dmamem_mmap(bus_dma_tag_t t, bus_dma_segment_t *sg, int n, off_t o, int p, 605 int f) 606 { 607 const bus_dma_tag_t t0 = t; 608 int r; 609 _BD_PRECALL(t, _dmamem_mmap); 610 r = _BD_CALL(t, _dmamem_mmap)(t, t0, sg, n, o, p, f); 611 _BD_POSTCALL; 612 return (r); 613 } 614 615 /* 616 * bus_dmamap_t 617 * 618 * Describes a DMA mapping. 619 */ 620 struct sparc_bus_dmamap { 621 /* 622 * PRIVATE MEMBERS: not for use by machine-independent code. 623 */ 624 bus_addr_t _dm_dvmastart; /* start and size of allocated */ 625 bus_size_t _dm_dvmasize; /* DVMA segment for this map */ 626 627 bus_size_t _dm_size; /* largest DMA transfer mappable */ 628 bus_size_t _dm_maxsegsz; /* largest possible segment */ 629 bus_size_t _dm_boundary; /* don't cross this */ 630 int _dm_segcnt; /* number of segs this map can map */ 631 int _dm_flags; /* misc. flags */ 632 #define _DM_TYPE_LOAD 0 633 #define _DM_TYPE_SEGS 1 634 #define _DM_TYPE_UIO 2 635 #define _DM_TYPE_MBUF 3 636 int _dm_type; /* mapping type: raw, uio, mbuf, etc */ 637 void *_dm_source; /* source mbuf/uio/etc. for unload */ 638 639 void *_dm_cookie; /* cookie for bus-specific functions */ 640 641 /* 642 * PUBLIC MEMBERS: these are used by machine-independent code. 643 */ 644 bus_size_t dm_mapsize; /* size of the mapping */ 645 int dm_nsegs; /* # valid segments in mapping */ 646 647 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 648 }; 649 650 #endif /* _SPARC_BUS_H_ */ 651 652