1 /* $OpenBSD: reg.h,v 1.5 2008/12/22 23:01:31 kettenis Exp $ */ 2 /* $NetBSD: reg.h,v 1.8 2001/06/19 12:59:16 wiz Exp $ */ 3 4 /* 5 * Copyright (c) 1992, 1993 6 * The Regents of the University of California. All rights reserved. 7 * 8 * This software was developed by the Computer Systems Engineering group 9 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 10 * contributed to Berkeley. 11 * 12 * All advertising materials mentioning features or use of this software 13 * must display the following acknowledgement: 14 * This product includes software developed by the University of 15 * California, Lawrence Berkeley Laboratory. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions 19 * are met: 20 * 1. Redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer. 22 * 2. Redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution. 25 * 3. Neither the name of the University nor the names of its contributors 26 * may be used to endorse or promote products derived from this software 27 * without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 30 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 32 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 39 * SUCH DAMAGE. 40 * 41 * @(#)reg.h 8.1 (Berkeley) 6/11/93 42 */ 43 44 #ifndef _MACHINE_REG_H_ 45 #define _MACHINE_REG_H_ 46 47 /* 48 * Registers passed to trap/syscall/etc. 49 * This structure is known to occupy exactly 80 bytes (see locore.s). 50 * Note, tf_global[0] is not actually written (since g0 is always 0). 51 * (The slot tf_global[0] is used to send a copy of %wim to kernel gdb. 52 * This is known as `cheating'.) 53 */ 54 struct trapframe32 { 55 int tf_psr; /* psr */ 56 int tf_pc; /* return pc */ 57 int tf_npc; /* return npc */ 58 int tf_y; /* %y register */ 59 int tf_global[8]; /* global registers in trap's caller */ 60 int tf_out[8]; /* output registers in trap's caller */ 61 }; 62 63 /* 64 * The v9 trapframe is a bit more complex. Since we don't get a free 65 * register window with each trap we need some way to keep track of 66 * pending traps. We use tf_fault to save the faulting address for 67 * memory faults and tf_kstack to thread trapframes on the kernel 68 * stack(s). If tf_kstack == 0 then this is the lowest level trap; 69 * we came from user mode. 70 */ 71 struct trapframe64 { 72 int64_t tf_tstate; /* tstate register */ 73 int64_t tf_pc; /* return pc */ 74 int64_t tf_npc; /* return npc */ 75 int64_t tf_fault; /* faulting addr -- need somewhere to save it */ 76 int64_t tf_kstack; /* kernel stack of prev tf */ 77 int tf_y; /* %y register -- 32-bits */ 78 short tf_tt; /* What type of trap this was */ 79 char tf_pil; /* What IRQ we're handling */ 80 char tf_oldpil; /* What our old SPL was */ 81 int64_t tf_global[8]; /* global registers in trap's caller */ 82 int64_t tf_out[8]; /* output registers in trap's caller */ 83 int64_t tf_local[8]; /* local registers in trap's caller */ 84 int64_t tf_in[8]; /* in registers in trap's caller (for debug) */ 85 }; 86 87 /* 88 * Register windows. Each stack pointer (%o6 aka %sp) in each window 89 * must ALWAYS point to some place at which it is safe to scribble on 90 * 64 bytes. (If not, your process gets mangled.) Furthermore, each 91 * stack pointer should be aligned on an 8-byte boundary for v8 stacks 92 * or a 16-byte boundary (plus the BIAS) for v9 stacks (the kernel 93 * as currently coded allows arbitrary alignment, but with a hefty 94 * performance penalty). 95 */ 96 struct rwindow32 { 97 int rw_local[8]; /* %l0..%l7 */ 98 int rw_in[8]; /* %i0..%i7 */ 99 }; 100 101 /* Don't forget the BIAS!! */ 102 struct rwindow64 { 103 int64_t rw_local[8]; /* %l0..%l7 */ 104 int64_t rw_in[8]; /* %i0..%i7 */ 105 }; 106 107 /* 108 * Clone trapframe for now; this seems to be the more useful 109 * than the old struct reg above. 110 */ 111 struct reg32 { 112 int r_psr; /* psr */ 113 int r_pc; /* return pc */ 114 int r_npc; /* return npc */ 115 int r_y; /* %y register */ 116 int r_global[8]; /* global registers in trap's caller */ 117 int r_out[8]; /* output registers in trap's caller */ 118 }; 119 120 struct reg64 { 121 int64_t r_tstate; /* tstate register */ 122 int64_t r_pc; /* return pc */ 123 int64_t r_npc; /* return npc */ 124 int r_y; /* %y register -- 32-bits */ 125 int64_t r_global[8]; /* %g* registers in trap's caller */ 126 int64_t r_out[8]; /* %o* registers in trap's caller */ 127 int64_t r_local[8]; /* %l* registers in trap's caller */ 128 int64_t r_in[8]; /* %i* registers in trap's caller */ 129 }; 130 131 #include <machine/fsr.h> 132 133 /* 134 * FP coprocessor registers. 135 * 136 * FP_QSIZE is the maximum coprocessor instruction queue depth 137 * of any implementation on which the kernel will run. David Hough: 138 * ``I'd suggest allowing 16 ... allowing an indeterminate variable 139 * size would be even better''. Of course, we cannot do that; we 140 * need to malloc these. 141 * 142 * XXXX UltraSPARC processors don't implement a floating point queue. 143 */ 144 #define FP_QSIZE 16 145 #define ALIGNFPSTATE(f) ((struct fpstate64 *)(((long)(f))&(~BLOCK_ALIGN))) 146 147 struct fp_qentry { 148 int *fq_addr; /* the instruction's address */ 149 int fq_instr; /* the instruction itself */ 150 }; 151 152 struct fpstate64 { 153 u_int fs_regs[64]; /* our view is 64 32-bit registers */ 154 int64_t fs_fsr; /* %fsr */ 155 int fs_gsr; /* graphics state reg */ 156 int fs_qsize; /* actual queue depth */ 157 struct fp_qentry fs_queue[FP_QSIZE]; /* queue contents */ 158 }; 159 160 /* 161 * For 32-bit emulations. 162 */ 163 struct fpstate32 { 164 u_int fs_regs[32]; /* our view is 32 32-bit registers */ 165 int fs_fsr; /* %fsr */ 166 int fs_qsize; /* actual queue depth */ 167 struct fp_qentry fs_queue[FP_QSIZE]; /* queue contents */ 168 }; 169 170 /* 171 * The actual FP registers are made accessible (c.f. ptrace(2)) through 172 * a `struct fpreg'; <arch/sparc64/sparc64/process_machdep.c> relies on the 173 * fact that `fpreg' is a prefix of `fpstate'. 174 */ 175 struct fpreg64 { 176 u_int fr_regs[64]; /* our view is 64 32-bit registers */ 177 int64_t fr_fsr; /* %fsr */ 178 int fr_gsr; /* graphics state reg */ 179 }; 180 181 /* 182 * 32-bit fpreg used by 32-bit sparc CPUs 183 */ 184 struct fpreg32 { 185 u_int fr_regs[32]; /* our view is 32 32-bit registers */ 186 int fr_fsr; /* %fsr */ 187 }; 188 189 /* Here we gotta do naughty things to let gdb work on 32-bit binaries */ 190 #define reg reg64 191 #define fpreg fpreg64 192 #define fpstate fpstate64 193 #define trapframe trapframe64 194 #define rwindow rwindow64 195 196 #endif /* _MACHINE_REG_H_ */ 197