1 /* $OpenBSD: if_dc_cardbus.c,v 1.41 2022/04/06 18:59:28 naddy Exp $ */ 2 3 /* 4 * Copyright (c) 1997, 1998, 1999 5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD: src/sys/pci/if_dc.c,v 1.5 2000/01/12 22:24:05 wpaul Exp $ 35 */ 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/mbuf.h> 40 #include <sys/socket.h> 41 #include <sys/ioctl.h> 42 #include <sys/errno.h> 43 #include <sys/malloc.h> 44 #include <sys/kernel.h> 45 #include <sys/device.h> 46 47 #include <net/if.h> 48 #include <net/if_media.h> 49 50 #include <netinet/in.h> 51 #include <netinet/if_ether.h> 52 53 #include <dev/mii/miivar.h> 54 55 #include <machine/bus.h> 56 57 #include <dev/pci/pcivar.h> 58 #include <dev/pci/pcireg.h> 59 #include <dev/pci/pcidevs.h> 60 61 #include <dev/cardbus/cardbusvar.h> 62 63 #include <dev/ic/dcreg.h> 64 65 /* PCI configuration regs */ 66 #define PCI_CBIO 0x10 67 #define PCI_CBMEM 0x14 68 #define PCI_CFDA 0x40 69 70 #define DC_CFDA_SUSPEND 0x80000000 71 #define DC_CFDA_STANDBY 0x40000000 72 73 struct dc_cardbus_softc { 74 struct dc_softc sc_dc; 75 int sc_intrline; 76 77 cardbus_devfunc_t sc_ct; 78 pci_chipset_tag_t sc_pc; 79 pcitag_t sc_tag; 80 bus_size_t sc_mapsize; 81 int sc_actype; 82 }; 83 84 int dc_cardbus_match(struct device *, void *, void *); 85 void dc_cardbus_attach(struct device *, struct device *,void *); 86 int dc_cardbus_detach(struct device *, int); 87 88 void dc_cardbus_setup(struct dc_cardbus_softc *csc); 89 90 const struct cfattach dc_cardbus_ca = { 91 sizeof(struct dc_cardbus_softc), dc_cardbus_match, dc_cardbus_attach, 92 dc_cardbus_detach, dc_activate 93 }; 94 95 const struct pci_matchid dc_cardbus_devices[] = { 96 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142 }, 97 { PCI_VENDOR_XIRCOM, PCI_PRODUCT_XIRCOM_X3201_3_21143 }, 98 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985 }, 99 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242 }, 100 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_FE2500 }, 101 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_FE2500MX }, 102 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_PCM200 }, 103 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DRP32TXD }, 104 { PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_PCMPC200 }, 105 { PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_PCM200 }, 106 { PCI_VENDOR_HAWKING, PCI_PRODUCT_HAWKING_PN672TX }, 107 { PCI_VENDOR_MICROSOFT, PCI_PRODUCT_MICROSOFT_MN120 }, 108 }; 109 110 int 111 dc_cardbus_match(struct device *parent, void *match, void *aux) 112 { 113 return (cardbus_matchbyid((struct cardbus_attach_args *)aux, 114 dc_cardbus_devices, nitems(dc_cardbus_devices))); 115 } 116 117 void 118 dc_cardbus_attach(struct device *parent, struct device *self, void *aux) 119 { 120 struct dc_cardbus_softc *csc = (struct dc_cardbus_softc *)self; 121 struct dc_softc *sc = &csc->sc_dc; 122 struct cardbus_attach_args *ca = aux; 123 struct cardbus_devfunc *ct = ca->ca_ct; 124 cardbus_chipset_tag_t cc = ct->ct_cc; 125 pci_chipset_tag_t pc = ca->ca_pc; 126 cardbus_function_tag_t cf = ct->ct_cf; 127 pcireg_t reg; 128 bus_addr_t addr; 129 130 sc->sc_dmat = ca->ca_dmat; 131 csc->sc_ct = ct; 132 csc->sc_tag = ca->ca_tag; 133 csc->sc_pc = ca->ca_pc; 134 135 Cardbus_function_enable(ct); 136 137 if (Cardbus_mapreg_map(ct, PCI_CBIO, 138 PCI_MAPREG_TYPE_IO, 0, &sc->dc_btag, &sc->dc_bhandle, &addr, 139 &csc->sc_mapsize) == 0) { 140 141 csc->sc_actype = CARDBUS_IO_ENABLE; 142 } else if (Cardbus_mapreg_map(ct, PCI_CBMEM, 143 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 144 &sc->dc_btag, &sc->dc_bhandle, &addr, &csc->sc_mapsize) == 0) { 145 csc->sc_actype = CARDBUS_MEM_ENABLE; 146 } else { 147 printf(": can't map device registers\n"); 148 return; 149 } 150 151 csc->sc_intrline = ca->ca_intrline; 152 153 sc->dc_cachesize = pci_conf_read(csc->sc_pc, ca->ca_tag, DC_PCI_CFLT) 154 & 0xFF; 155 156 dc_cardbus_setup(csc); 157 158 /* Get the eeprom width */ 159 if ((PCI_VENDOR(ca->ca_id) == PCI_VENDOR_XIRCOM && 160 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_XIRCOM_X3201_3_21143)) 161 ; /* XIRCOM has non-standard eeprom */ 162 else 163 dc_eeprom_width(sc); 164 165 switch (PCI_VENDOR(ca->ca_id)) { 166 case PCI_VENDOR_DEC: 167 if (PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_DEC_21142) { 168 sc->dc_type = DC_TYPE_21143; 169 sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR; 170 sc->dc_flags |= DC_REDUCED_MII_POLL; 171 dc_read_srom(sc, sc->dc_romwidth); 172 dc_parse_21143_srom(sc); 173 } 174 break; 175 case PCI_VENDOR_XIRCOM: 176 if (PCI_PRODUCT(ca->ca_id) == 177 PCI_PRODUCT_XIRCOM_X3201_3_21143) { 178 sc->dc_type = DC_TYPE_XIRCOM; 179 sc->dc_flags |= DC_TX_INTR_ALWAYS|DC_TX_COALESCE | 180 DC_TX_ALIGN; 181 sc->dc_pmode = DC_PMODE_MII; 182 } 183 break; 184 case PCI_VENDOR_ADMTEK: 185 case PCI_VENDOR_ACCTON: 186 case PCI_VENDOR_ABOCOM: 187 case PCI_VENDOR_DLINK: 188 case PCI_VENDOR_LINKSYS: 189 case PCI_VENDOR_HAWKING: 190 case PCI_VENDOR_MICROSOFT: 191 if (PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_ADMTEK_AN985 || 192 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_ACCTON_EN2242 || 193 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_ABOCOM_FE2500 || 194 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_ABOCOM_FE2500MX || 195 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_ABOCOM_PCM200 || 196 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_DLINK_DRP32TXD || 197 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_LINKSYS_PCMPC200 || 198 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_LINKSYS_PCM200 || 199 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_HAWKING_PN672TX || 200 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_MICROSOFT_MN120) { 201 sc->dc_type = DC_TYPE_AN983; 202 sc->dc_flags |= DC_TX_USE_TX_INTR|DC_TX_ADMTEK_WAR | 203 DC_64BIT_HASH; 204 sc->dc_pmode = DC_PMODE_MII; 205 /* Don't read SROM for - auto-loaded on reset */ 206 } 207 break; 208 default: 209 printf(": unknown device\n"); 210 return; 211 } 212 213 /* 214 * set latency timer, do we really need this? 215 */ 216 reg = pci_conf_read(pc, ca->ca_tag, PCI_BHLC_REG); 217 if (PCI_LATTIMER(reg) < 0x20) { 218 reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 219 reg |= (0x20 << PCI_LATTIMER_SHIFT); 220 pci_conf_write(pc, ca->ca_tag, PCI_BHLC_REG, reg); 221 } 222 223 sc->sc_ih = cardbus_intr_establish(cc, cf, ca->ca_intrline, IPL_NET, 224 dc_intr, csc, sc->sc_dev.dv_xname); 225 if (sc->sc_ih == NULL) { 226 printf(": can't establish interrupt at %d\n", 227 ca->ca_intrline); 228 return; 229 } 230 printf(": irq %d", ca->ca_intrline); 231 232 dc_reset(sc); 233 234 sc->dc_revision = PCI_REVISION(ca->ca_class); 235 dc_attach(sc); 236 } 237 238 int 239 dc_cardbus_detach(struct device *self, int flags) 240 { 241 struct dc_cardbus_softc *csc = (struct dc_cardbus_softc *)self; 242 struct dc_softc *sc = &csc->sc_dc; 243 struct cardbus_devfunc *ct = csc->sc_ct; 244 245 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, sc->sc_ih); 246 dc_detach(sc); 247 248 /* unmap cardbus resources */ 249 Cardbus_mapreg_unmap(ct, 250 csc->sc_actype == CARDBUS_IO_ENABLE ? PCI_CBIO : PCI_CBMEM, 251 sc->dc_btag, sc->dc_bhandle, csc->sc_mapsize); 252 253 return (0); 254 } 255 256 void 257 dc_cardbus_setup(struct dc_cardbus_softc *csc) 258 { 259 cardbus_devfunc_t ct = csc->sc_ct; 260 cardbus_chipset_tag_t cc = ct->ct_cc; 261 pci_chipset_tag_t pc = csc->sc_pc; 262 pcireg_t reg; 263 int r; 264 265 /* wakeup the card if needed */ 266 reg = pci_conf_read(pc, csc->sc_tag, PCI_CFDA); 267 if (reg & (DC_CFDA_SUSPEND|DC_CFDA_STANDBY)) { 268 pci_conf_write(pc, csc->sc_tag, PCI_CFDA, 269 reg & ~(DC_CFDA_SUSPEND|DC_CFDA_STANDBY)); 270 } 271 272 if (pci_get_capability(csc->sc_pc, csc->sc_tag, PCI_CAP_PWRMGMT, &r, 273 0)) { 274 r = pci_conf_read(csc->sc_pc, csc->sc_tag, r + 4) & 3; 275 if (r) { 276 printf("%s: awakening from state D%d\n", 277 csc->sc_dc.sc_dev.dv_xname, r); 278 pci_conf_write(csc->sc_pc, csc->sc_tag, r + 4, 0); 279 } 280 } 281 282 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_actype); 283 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 284 285 reg = pci_conf_read(csc->sc_pc, csc->sc_tag, PCI_COMMAND_STATUS_REG); 286 reg |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 287 PCI_COMMAND_MASTER_ENABLE; 288 pci_conf_write(csc->sc_pc, csc->sc_tag, PCI_COMMAND_STATUS_REG, reg); 289 reg = pci_conf_read(csc->sc_pc, csc->sc_tag, PCI_COMMAND_STATUS_REG); 290 } 291