1 /* $OpenBSD: mvrtc.c,v 1.3 2022/10/17 19:09:46 kettenis Exp $ */ 2 /* 3 * Copyright (c) 2018 Mark Kettenis <kettenis@openbsd.org> 4 * 5 * Permission to use, copy, modify, and distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <sys/param.h> 19 #include <sys/systm.h> 20 #include <sys/device.h> 21 22 #include <machine/intr.h> 23 #include <machine/bus.h> 24 #include <machine/fdt.h> 25 26 #include <dev/ofw/openfirm.h> 27 #include <dev/ofw/fdt.h> 28 29 #include <dev/clock_subr.h> 30 31 /* Registers. */ 32 #define RTC_STATUS 0x0000 33 #define RTC_TIME 0x000c 34 35 #define RTC_TIMING_CTL0 0x0000 36 #define RTC_TIMING_CTL0_WRCLK_PERIOD_MASK (0xffff << 0) 37 #define RTC_TIMING_CTL0_WRCLK_PERIOD_SHIFT 0 38 #define RTC_TIMING_CTL0_WRCLK_SETUP_MASK (0xffff << 16) 39 #define RTC_TIMING_CTL0_WRCLK_SETUP_SHIFT 16 40 #define RTC_TIMING_CTL1 0x0004 41 #define RTC_TIMING_CTL1_READ_DELAY_MASK (0xffff << 0) 42 #define RTC_TIMING_CTL1_READ_DELAY_SHIFT 0 43 44 #define HREAD4(sc, reg) \ 45 (bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg))) 46 #define HWRITE4(sc, reg, val) \ 47 bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val)) 48 49 struct mvrtc_softc { 50 struct device sc_dev; 51 bus_space_tag_t sc_iot; 52 bus_space_handle_t sc_ioh; 53 bus_space_handle_t sc_soc_ioh; 54 55 struct todr_chip_handle sc_todr; 56 }; 57 58 int mvrtc_match(struct device *, void *, void *); 59 void mvrtc_attach(struct device *, struct device *, void *); 60 61 const struct cfattach mvrtc_ca = { 62 sizeof (struct mvrtc_softc), mvrtc_match, mvrtc_attach 63 }; 64 65 struct cfdriver mvrtc_cd = { 66 NULL, "mvrtc", DV_DULL 67 }; 68 69 int mvrtc_gettime(struct todr_chip_handle *, struct timeval *); 70 int mvrtc_settime(struct todr_chip_handle *, struct timeval *); 71 72 int 73 mvrtc_match(struct device *parent, void *match, void *aux) 74 { 75 struct fdt_attach_args *faa = aux; 76 77 return OF_is_compatible(faa->fa_node, "marvell,armada-8k-rtc"); 78 } 79 80 void 81 mvrtc_attach(struct device *parent, struct device *self, void *aux) 82 { 83 struct mvrtc_softc *sc = (struct mvrtc_softc *)self; 84 struct fdt_attach_args *faa = aux; 85 uint32_t reg; 86 87 if (faa->fa_nreg < 2) { 88 printf(": no registers\n"); 89 return; 90 } 91 92 sc->sc_iot = faa->fa_iot; 93 94 if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr, 95 faa->fa_reg[0].size, 0, &sc->sc_ioh)) { 96 printf(": can't map registers\n"); 97 return; 98 } 99 100 if (bus_space_map(sc->sc_iot, faa->fa_reg[1].addr, 101 faa->fa_reg[1].size, 0, &sc->sc_soc_ioh)) { 102 bus_space_unmap(sc->sc_iot, sc->sc_ioh, faa->fa_reg[0].size); 103 printf(": can't map soc registers\n"); 104 return; 105 } 106 107 /* Magic to make bus access actually work. */ 108 reg = bus_space_read_4(sc->sc_iot, sc->sc_soc_ioh, RTC_TIMING_CTL0); 109 reg &= ~RTC_TIMING_CTL0_WRCLK_PERIOD_MASK; 110 reg |= (0x3ff << RTC_TIMING_CTL0_WRCLK_PERIOD_SHIFT); 111 reg &= ~RTC_TIMING_CTL0_WRCLK_SETUP_MASK; 112 reg |= (0x29 << RTC_TIMING_CTL0_WRCLK_SETUP_SHIFT); 113 bus_space_write_4(sc->sc_iot, sc->sc_soc_ioh, RTC_TIMING_CTL0, reg); 114 reg = bus_space_read_4(sc->sc_iot, sc->sc_soc_ioh, RTC_TIMING_CTL1); 115 reg &= ~RTC_TIMING_CTL1_READ_DELAY_MASK; 116 reg |= (0x3f << RTC_TIMING_CTL1_READ_DELAY_SHIFT); 117 bus_space_write_4(sc->sc_iot, sc->sc_soc_ioh, RTC_TIMING_CTL1, reg); 118 119 printf("\n"); 120 121 sc->sc_todr.cookie = sc; 122 sc->sc_todr.todr_gettime = mvrtc_gettime; 123 sc->sc_todr.todr_settime = mvrtc_settime; 124 sc->sc_todr.todr_quality = 0; 125 todr_attach(&sc->sc_todr); 126 } 127 128 int 129 mvrtc_gettime(struct todr_chip_handle *handle, struct timeval *tv) 130 { 131 struct mvrtc_softc *sc = handle->cookie; 132 133 tv->tv_sec = HREAD4(sc, RTC_TIME); 134 tv->tv_usec = 0; 135 return 0; 136 } 137 138 int 139 mvrtc_settime(struct todr_chip_handle *handle, struct timeval *tv) 140 { 141 struct mvrtc_softc *sc = handle->cookie; 142 143 HWRITE4(sc, RTC_STATUS, 0); 144 HWRITE4(sc, RTC_STATUS, 0); 145 HWRITE4(sc, RTC_TIME, tv->tv_sec); 146 delay(10); 147 return 0; 148 } 149