1 /* $OpenBSD: pcf85063.c,v 1.3 2022/10/12 13:39:50 kettenis Exp $ */ 2 3 /* 4 * Copyright (c) 2005 Kimihiro Nonaka 5 * Copyright (c) 2016, 2021 Mark Kettenis 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/device.h> 33 34 #include <dev/clock_subr.h> 35 36 #include <dev/i2c/i2cvar.h> 37 38 /* 39 * PCF85063A/TP Real-Time Clock 40 */ 41 42 #define PCF85063_CONTROL1 0x00 43 #define PCF85063_SECONDS 0x04 44 #define PCF85063_MINUTES 0x05 45 #define PCF85063_HOURS 0x06 46 #define PCF85063_DAY 0x07 47 #define PCF85063_WDAY 0x08 48 #define PCF85063_MONTH 0x09 49 #define PCF85063_YEAR 0x0a 50 51 #define PCF85063_NRTC_REGS 7 52 53 /* 54 * Bit definitions. 55 */ 56 #define PCF85063_CONTROL1_12_24 (1 << 1) 57 #define PCF85063_CONTROL1_STOP (1 << 5) 58 #define PCF85063_SECONDS_MASK 0x7f 59 #define PCF85063_SECONDS_OS (1 << 7) 60 #define PCF85063_MINUTES_MASK 0x7f 61 #define PCF85063_HOURS_12HRS_PM (1 << 5) /* If 12 hr mode, set = PM */ 62 #define PCF85063_HOURS_12MASK 0x1f 63 #define PCF85063_HOURS_24MASK 0x3f 64 #define PCF85063_DAY_MASK 0x3f 65 #define PCF85063_WDAY_MASK 0x07 66 #define PCF85063_MONTH_MASK 0x1f 67 68 struct pcyrtc_softc { 69 struct device sc_dev; 70 i2c_tag_t sc_tag; 71 int sc_address; 72 struct todr_chip_handle sc_todr; 73 }; 74 75 int pcyrtc_match(struct device *, void *, void *); 76 void pcyrtc_attach(struct device *, struct device *, void *); 77 78 const struct cfattach pcyrtc_ca = { 79 sizeof(struct pcyrtc_softc), pcyrtc_match, pcyrtc_attach 80 }; 81 82 struct cfdriver pcyrtc_cd = { 83 NULL, "pcyrtc", DV_DULL 84 }; 85 86 uint8_t pcyrtc_reg_read(struct pcyrtc_softc *, int); 87 void pcyrtc_reg_write(struct pcyrtc_softc *, int, uint8_t); 88 int pcyrtc_clock_read(struct pcyrtc_softc *, struct clock_ymdhms *); 89 int pcyrtc_clock_write(struct pcyrtc_softc *, struct clock_ymdhms *); 90 int pcyrtc_gettime(struct todr_chip_handle *, struct timeval *); 91 int pcyrtc_settime(struct todr_chip_handle *, struct timeval *); 92 93 int 94 pcyrtc_match(struct device *parent, void *v, void *arg) 95 { 96 struct i2c_attach_args *ia = arg; 97 98 if (strcmp(ia->ia_name, "nxp,pcf85063a") == 0) 99 return (1); 100 101 return (0); 102 } 103 104 void 105 pcyrtc_attach(struct device *parent, struct device *self, void *arg) 106 { 107 struct pcyrtc_softc *sc = (struct pcyrtc_softc *)self; 108 struct i2c_attach_args *ia = arg; 109 uint8_t reg; 110 111 sc->sc_tag = ia->ia_tag; 112 sc->sc_address = ia->ia_addr; 113 114 sc->sc_todr.cookie = sc; 115 sc->sc_todr.todr_gettime = pcyrtc_gettime; 116 sc->sc_todr.todr_settime = pcyrtc_settime; 117 sc->sc_todr.todr_quality = 1000; 118 todr_attach(&sc->sc_todr); 119 120 /* 121 * Switch to 24 hour mode. 122 */ 123 reg = pcyrtc_reg_read(sc, PCF85063_CONTROL1); 124 reg &= ~PCF85063_CONTROL1_12_24; 125 reg &= ~PCF85063_CONTROL1_STOP; 126 pcyrtc_reg_write(sc, PCF85063_CONTROL1, reg); 127 128 printf("\n"); 129 } 130 131 int 132 pcyrtc_gettime(struct todr_chip_handle *ch, struct timeval *tv) 133 { 134 struct pcyrtc_softc *sc = ch->cookie; 135 struct clock_ymdhms dt; 136 137 memset(&dt, 0, sizeof(dt)); 138 if (pcyrtc_clock_read(sc, &dt) == 0) 139 return (-1); 140 141 tv->tv_sec = clock_ymdhms_to_secs(&dt); 142 tv->tv_usec = 0; 143 return (0); 144 } 145 146 int 147 pcyrtc_settime(struct todr_chip_handle *ch, struct timeval *tv) 148 { 149 struct pcyrtc_softc *sc = ch->cookie; 150 struct clock_ymdhms dt; 151 uint8_t reg; 152 153 clock_secs_to_ymdhms(tv->tv_sec, &dt); 154 if (pcyrtc_clock_write(sc, &dt) == 0) 155 return (-1); 156 157 /* Clear OS flag. */ 158 reg = pcyrtc_reg_read(sc, PCF85063_SECONDS); 159 if (reg & PCF85063_SECONDS_OS) { 160 reg &= ~PCF85063_SECONDS_OS; 161 pcyrtc_reg_write(sc, PCF85063_SECONDS, reg); 162 } 163 164 return (0); 165 } 166 167 uint8_t 168 pcyrtc_reg_read(struct pcyrtc_softc *sc, int reg) 169 { 170 uint8_t cmd = reg; 171 uint8_t val; 172 173 iic_acquire_bus(sc->sc_tag, I2C_F_POLL); 174 if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address, 175 NULL, 0, &cmd, sizeof cmd, I2C_F_POLL) || 176 iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address, 177 NULL, 0, &val, sizeof val, I2C_F_POLL)) { 178 iic_release_bus(sc->sc_tag, I2C_F_POLL); 179 printf("%s: pcyrtc_reg_read: failed to read reg%d\n", 180 sc->sc_dev.dv_xname, reg); 181 return 0; 182 } 183 iic_release_bus(sc->sc_tag, I2C_F_POLL); 184 return val; 185 } 186 187 void 188 pcyrtc_reg_write(struct pcyrtc_softc *sc, int reg, uint8_t val) 189 { 190 uint8_t cmd = reg; 191 192 iic_acquire_bus(sc->sc_tag, I2C_F_POLL); 193 if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address, 194 &cmd, sizeof cmd, &val, sizeof val, I2C_F_POLL)) { 195 iic_release_bus(sc->sc_tag, I2C_F_POLL); 196 printf("%s: pcyrtc_reg_write: failed to write reg%d\n", 197 sc->sc_dev.dv_xname, reg); 198 return; 199 } 200 iic_release_bus(sc->sc_tag, I2C_F_POLL); 201 } 202 203 int 204 pcyrtc_clock_read(struct pcyrtc_softc *sc, struct clock_ymdhms *dt) 205 { 206 uint8_t regs[PCF85063_NRTC_REGS]; 207 uint8_t cmd = PCF85063_SECONDS; 208 209 iic_acquire_bus(sc->sc_tag, I2C_F_POLL); 210 if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address, 211 &cmd, sizeof cmd, regs, PCF85063_NRTC_REGS, I2C_F_POLL)) { 212 iic_release_bus(sc->sc_tag, I2C_F_POLL); 213 printf("%s: pcyrtc_clock_read: failed to read rtc\n", 214 sc->sc_dev.dv_xname); 215 return (0); 216 } 217 iic_release_bus(sc->sc_tag, I2C_F_POLL); 218 219 /* 220 * Convert the PCF85063's register values into something useable 221 */ 222 dt->dt_sec = FROMBCD(regs[0] & PCF85063_SECONDS_MASK); 223 dt->dt_min = FROMBCD(regs[1] & PCF85063_MINUTES_MASK); 224 dt->dt_hour = FROMBCD(regs[2] & PCF85063_HOURS_24MASK); 225 dt->dt_day = FROMBCD(regs[3] & PCF85063_DAY_MASK); 226 dt->dt_mon = FROMBCD(regs[5] & PCF85063_MONTH_MASK); 227 dt->dt_year = FROMBCD(regs[6]) + 2000; 228 229 if (regs[0] & PCF85063_SECONDS_OS) 230 return (0); 231 232 return (1); 233 } 234 235 int 236 pcyrtc_clock_write(struct pcyrtc_softc *sc, struct clock_ymdhms *dt) 237 { 238 uint8_t regs[PCF85063_NRTC_REGS]; 239 uint8_t cmd = PCF85063_SECONDS; 240 241 /* 242 * Convert our time representation into something the PCF85063 243 * can understand. 244 */ 245 regs[0] = TOBCD(dt->dt_sec); 246 regs[1] = TOBCD(dt->dt_min); 247 regs[2] = TOBCD(dt->dt_hour); 248 regs[3] = TOBCD(dt->dt_day); 249 regs[4] = TOBCD(dt->dt_wday); 250 regs[5] = TOBCD(dt->dt_mon); 251 regs[6] = TOBCD(dt->dt_year - 2000); 252 253 iic_acquire_bus(sc->sc_tag, I2C_F_POLL); 254 if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address, 255 &cmd, sizeof cmd, regs, PCF85063_NRTC_REGS, I2C_F_POLL)) { 256 iic_release_bus(sc->sc_tag, I2C_F_POLL); 257 printf("%s: pcyrtc_clock_write: failed to write rtc\n", 258 sc->sc_dev.dv_xname); 259 return (0); 260 } 261 iic_release_bus(sc->sc_tag, I2C_F_POLL); 262 return (1); 263 } 264