1 /* $OpenBSD: pcf8563.c,v 1.4 2021/04/24 10:15:15 mpi Exp $ */ 2 3 /* 4 * Copyright (c) 2005 Kimihiro Nonaka 5 * Copyright (c) 2016, 2017 Mark Kettenis 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/device.h> 33 #include <sys/kernel.h> 34 #include <sys/fcntl.h> 35 #include <sys/uio.h> 36 #include <sys/conf.h> 37 #include <sys/event.h> 38 39 #include <dev/clock_subr.h> 40 41 #include <dev/i2c/i2cvar.h> 42 43 /* 44 * PCF8563 Real-Time Clock 45 */ 46 47 #define PCF8563_CONTROL1 0x00 48 #define PCF8563_CONTROL2 0x01 49 #define PCF8563_SECONDS 0x02 50 #define PCF8563_MINUTES 0x03 51 #define PCF8563_HOURS 0x04 52 #define PCF8563_DAY 0x05 53 #define PCF8563_WDAY 0x06 54 #define PCF8563_MONTH 0x07 55 #define PCF8563_YEAR 0x08 56 57 #define PCF8563_NREGS 12 58 #define PCF8563_NRTC_REGS 7 59 60 /* 61 * Bit definitions. 62 */ 63 #define PCF8563_CONTROL1_TESTC (1 << 3) 64 #define PCF8563_CONTROL1_STOP (1 << 5) 65 #define PCF8563_CONTROL1_TEST1 (1 << 1) 66 #define PCF8563_SECONDS_MASK 0x7f 67 #define PCF8563_SECONDS_VL (1 << 7) 68 #define PCF8563_MINUTES_MASK 0x7f 69 #define PCF8563_HOURS_MASK 0x3f 70 #define PCF8563_DAY_MASK 0x3f 71 #define PCF8563_WDAY_MASK 0x07 72 #define PCF8563_MONTH_MASK 0x1f 73 #define PCF8563_MONTH_C (1 << 7) 74 75 struct pcxrtc_softc { 76 struct device sc_dev; 77 i2c_tag_t sc_tag; 78 int sc_address; 79 struct todr_chip_handle sc_todr; 80 }; 81 82 int pcxrtc_match(struct device *, void *, void *); 83 void pcxrtc_attach(struct device *, struct device *, void *); 84 85 struct cfattach pcxrtc_ca = { 86 sizeof(struct pcxrtc_softc), pcxrtc_match, pcxrtc_attach 87 }; 88 89 struct cfdriver pcxrtc_cd = { 90 NULL, "pcxrtc", DV_DULL 91 }; 92 93 uint8_t pcxrtc_reg_read(struct pcxrtc_softc *, int); 94 void pcxrtc_reg_write(struct pcxrtc_softc *, int, uint8_t); 95 int pcxrtc_clock_read(struct pcxrtc_softc *, struct clock_ymdhms *); 96 int pcxrtc_clock_write(struct pcxrtc_softc *, struct clock_ymdhms *); 97 int pcxrtc_gettime(struct todr_chip_handle *, struct timeval *); 98 int pcxrtc_settime(struct todr_chip_handle *, struct timeval *); 99 100 int 101 pcxrtc_match(struct device *parent, void *v, void *arg) 102 { 103 struct i2c_attach_args *ia = arg; 104 105 if (strcmp(ia->ia_name, "nxp,pcf8563") == 0 || 106 strcmp(ia->ia_name, "haoyu,hym8563") == 0) 107 return (1); 108 109 return (0); 110 } 111 112 void 113 pcxrtc_attach(struct device *parent, struct device *self, void *arg) 114 { 115 struct pcxrtc_softc *sc = (struct pcxrtc_softc *)self; 116 struct i2c_attach_args *ia = arg; 117 uint8_t reg; 118 119 sc->sc_tag = ia->ia_tag; 120 sc->sc_address = ia->ia_addr; 121 sc->sc_todr.cookie = sc; 122 sc->sc_todr.todr_gettime = pcxrtc_gettime; 123 sc->sc_todr.todr_settime = pcxrtc_settime; 124 sc->sc_todr.todr_setwen = NULL; 125 126 #if 0 127 todr_attach(&sc->sc_todr); 128 #else 129 /* XXX */ 130 { 131 extern todr_chip_handle_t todr_handle; 132 todr_handle = &sc->sc_todr; 133 } 134 #endif 135 136 /* Enable. */ 137 reg = pcxrtc_reg_read(sc, PCF8563_CONTROL1); 138 reg &= ~PCF8563_CONTROL1_STOP; 139 pcxrtc_reg_write(sc, PCF8563_CONTROL1, reg); 140 141 /* Report battery status. */ 142 reg = pcxrtc_reg_read(sc, PCF8563_SECONDS); 143 printf(": battery %s\n", (reg & PCF8563_SECONDS_VL) ? "low" : "ok"); 144 } 145 146 int 147 pcxrtc_gettime(struct todr_chip_handle *ch, struct timeval *tv) 148 { 149 struct pcxrtc_softc *sc = ch->cookie; 150 struct clock_ymdhms dt; 151 152 memset(&dt, 0, sizeof(dt)); 153 if (pcxrtc_clock_read(sc, &dt) == 0) 154 return (-1); 155 156 tv->tv_sec = clock_ymdhms_to_secs(&dt); 157 tv->tv_usec = 0; 158 return (0); 159 } 160 161 int 162 pcxrtc_settime(struct todr_chip_handle *ch, struct timeval *tv) 163 { 164 struct pcxrtc_softc *sc = ch->cookie; 165 struct clock_ymdhms dt; 166 167 clock_secs_to_ymdhms(tv->tv_sec, &dt); 168 169 if (pcxrtc_clock_write(sc, &dt) == 0) 170 return (-1); 171 return (0); 172 } 173 174 uint8_t 175 pcxrtc_reg_read(struct pcxrtc_softc *sc, int reg) 176 { 177 uint8_t cmd = reg; 178 uint8_t val; 179 180 iic_acquire_bus(sc->sc_tag, I2C_F_POLL); 181 if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address, 182 &cmd, sizeof cmd, &val, sizeof val, I2C_F_POLL)) { 183 iic_release_bus(sc->sc_tag, I2C_F_POLL); 184 printf("%s: pcxrtc_reg_read: failed to read reg%d\n", 185 sc->sc_dev.dv_xname, reg); 186 return 0; 187 } 188 iic_release_bus(sc->sc_tag, I2C_F_POLL); 189 return val; 190 } 191 192 void 193 pcxrtc_reg_write(struct pcxrtc_softc *sc, int reg, uint8_t val) 194 { 195 uint8_t cmd = reg; 196 197 iic_acquire_bus(sc->sc_tag, I2C_F_POLL); 198 if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address, 199 &cmd, sizeof cmd, &val, sizeof val, I2C_F_POLL)) { 200 iic_release_bus(sc->sc_tag, I2C_F_POLL); 201 printf("%s: pcxrtc_reg_write: failed to write reg%d\n", 202 sc->sc_dev.dv_xname, reg); 203 return; 204 } 205 iic_release_bus(sc->sc_tag, I2C_F_POLL); 206 } 207 208 int 209 pcxrtc_clock_read(struct pcxrtc_softc *sc, struct clock_ymdhms *dt) 210 { 211 uint8_t regs[PCF8563_NRTC_REGS]; 212 uint8_t cmd = PCF8563_SECONDS; 213 214 iic_acquire_bus(sc->sc_tag, I2C_F_POLL); 215 if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address, 216 &cmd, sizeof(cmd), regs, PCF8563_NRTC_REGS, I2C_F_POLL)) { 217 iic_release_bus(sc->sc_tag, I2C_F_POLL); 218 printf("%s: pcxrtc_clock_read: failed to read rtc\n", 219 sc->sc_dev.dv_xname); 220 return (0); 221 } 222 iic_release_bus(sc->sc_tag, I2C_F_POLL); 223 224 /* 225 * Convert the PCF8563's register values into something useable 226 */ 227 dt->dt_sec = FROMBCD(regs[0] & PCF8563_SECONDS_MASK); 228 dt->dt_min = FROMBCD(regs[1] & PCF8563_MINUTES_MASK); 229 dt->dt_hour = FROMBCD(regs[2] & PCF8563_HOURS_MASK); 230 dt->dt_day = FROMBCD(regs[3] & PCF8563_DAY_MASK); 231 dt->dt_mon = FROMBCD(regs[5] & PCF8563_MONTH_MASK); 232 dt->dt_year = FROMBCD(regs[6]) + 2000; 233 234 if ((regs[0] & PCF8563_SECONDS_VL)) 235 return (0); 236 237 return (1); 238 } 239 240 int 241 pcxrtc_clock_write(struct pcxrtc_softc *sc, struct clock_ymdhms *dt) 242 { 243 uint8_t regs[PCF8563_NRTC_REGS]; 244 uint8_t cmd = PCF8563_SECONDS; 245 246 /* 247 * Convert our time representation into something the PCF8563 248 * can understand. 249 */ 250 regs[0] = TOBCD(dt->dt_sec); 251 regs[1] = TOBCD(dt->dt_min); 252 regs[2] = TOBCD(dt->dt_hour); 253 regs[3] = TOBCD(dt->dt_day); 254 regs[4] = TOBCD(dt->dt_wday); 255 regs[5] = TOBCD(dt->dt_mon); 256 regs[6] = TOBCD(dt->dt_year - 2000); 257 258 iic_acquire_bus(sc->sc_tag, I2C_F_POLL); 259 if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address, 260 &cmd, sizeof(cmd), regs, PCF8563_NRTC_REGS, I2C_F_POLL)) { 261 iic_release_bus(sc->sc_tag, I2C_F_POLL); 262 printf("%s: pcxrtc_clock_write: failed to write rtc\n", 263 sc->sc_dev.dv_xname); 264 return (0); 265 } 266 iic_release_bus(sc->sc_tag, I2C_F_POLL); 267 return (1); 268 } 269