1*4b1a56afSjsg /* $OpenBSD: acxreg.h,v 1.13 2022/01/09 05:42:38 jsg Exp $ */ 295339239Smglocker 395339239Smglocker /* 495339239Smglocker * Copyright (c) 2006 Jonathan Gray <jsg@openbsd.org> 595339239Smglocker * 695339239Smglocker * Permission to use, copy, modify, and distribute this software for any 795339239Smglocker * purpose with or without fee is hereby granted, provided that the above 895339239Smglocker * copyright notice and this permission notice appear in all copies. 995339239Smglocker * 1095339239Smglocker * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 1195339239Smglocker * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 1295339239Smglocker * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 1395339239Smglocker * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 1495339239Smglocker * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 1595339239Smglocker * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 1695339239Smglocker * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 1795339239Smglocker */ 180f91cf57Smglocker 190f91cf57Smglocker /* 200f91cf57Smglocker * Copyright (c) 2006 The DragonFly Project. All rights reserved. 210f91cf57Smglocker * 220f91cf57Smglocker * This code is derived from software contributed to The DragonFly Project 230f91cf57Smglocker * by Sepherosa Ziehau <sepherosa@gmail.com> 240f91cf57Smglocker * 250f91cf57Smglocker * Redistribution and use in source and binary forms, with or without 260f91cf57Smglocker * modification, are permitted provided that the following conditions 270f91cf57Smglocker * are met: 280f91cf57Smglocker * 290f91cf57Smglocker * 1. Redistributions of source code must retain the above copyright 300f91cf57Smglocker * notice, this list of conditions and the following disclaimer. 310f91cf57Smglocker * 2. Redistributions in binary form must reproduce the above copyright 320f91cf57Smglocker * notice, this list of conditions and the following disclaimer in 330f91cf57Smglocker * the documentation and/or other materials provided with the 340f91cf57Smglocker * distribution. 350f91cf57Smglocker * 3. Neither the name of The DragonFly Project nor the names of its 360f91cf57Smglocker * contributors may be used to endorse or promote products derived 370f91cf57Smglocker * from this software without specific, prior written permission. 380f91cf57Smglocker * 390f91cf57Smglocker * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 400f91cf57Smglocker * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 410f91cf57Smglocker * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 420f91cf57Smglocker * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 430f91cf57Smglocker * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 440f91cf57Smglocker * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 450f91cf57Smglocker * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 460f91cf57Smglocker * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 470f91cf57Smglocker * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 480f91cf57Smglocker * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 490f91cf57Smglocker * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 500f91cf57Smglocker * SUCH DAMAGE. 510f91cf57Smglocker */ 520f91cf57Smglocker 530f91cf57Smglocker #ifndef _ACXREG_H 540f91cf57Smglocker #define _ACXREG_H 550f91cf57Smglocker 560f91cf57Smglocker /* 570f91cf57Smglocker * IO register index 580f91cf57Smglocker */ 590f91cf57Smglocker #define ACXREG_SOFT_RESET 0 600f91cf57Smglocker #define ACXREG_FWMEM_ADDR 1 610f91cf57Smglocker #define ACXREG_FWMEM_DATA 2 620f91cf57Smglocker #define ACXREG_FWMEM_CTRL 3 630f91cf57Smglocker #define ACXREG_FWMEM_START 4 640f91cf57Smglocker #define ACXREG_EVENT_MASK 5 650f91cf57Smglocker #define ACXREG_INTR_TRIG 6 660f91cf57Smglocker #define ACXREG_INTR_MASK 7 670f91cf57Smglocker #define ACXREG_INTR_STATUS 8 680f91cf57Smglocker #define ACXREG_INTR_STATUS_CLR 9 /* cleared after being read */ 690f91cf57Smglocker #define ACXREG_INTR_ACK 10 700f91cf57Smglocker #define ACXREG_HINTR_TRIG 11 /* XXX what's this? */ 710f91cf57Smglocker #define ACXREG_RADIO_ENABLE 12 720f91cf57Smglocker #define ACXREG_EEPROM_INIT 13 730f91cf57Smglocker #define ACXREG_EEPROM_CTRL 14 740f91cf57Smglocker #define ACXREG_EEPROM_ADDR 15 750f91cf57Smglocker #define ACXREG_EEPROM_DATA 16 760f91cf57Smglocker #define ACXREG_EEPROM_CONF 17 770f91cf57Smglocker #define ACXREG_EEPROM_INFO 18 780f91cf57Smglocker #define ACXREG_PHY_ADDR 19 790f91cf57Smglocker #define ACXREG_PHY_DATA 20 800f91cf57Smglocker #define ACXREG_PHY_CTRL 21 810f91cf57Smglocker #define ACXREG_GPIO_OUT_ENABLE 22 820f91cf57Smglocker #define ACXREG_GPIO_OUT 23 830f91cf57Smglocker #define ACXREG_CMD_REG_OFFSET 24 840f91cf57Smglocker #define ACXREG_INFO_REG_OFFSET 25 850f91cf57Smglocker #define ACXREG_RESET_SENSE 26 860f91cf57Smglocker #define ACXREG_ECPU_CTRL 27 870f91cf57Smglocker #define ACXREG_MAX 28 880f91cf57Smglocker #define ACXREG(reg, val) [ACXREG_##reg] = val 890f91cf57Smglocker 900f91cf57Smglocker /* 910f91cf57Smglocker * Value read from ACXREG_EEPROM_INFO 920f91cf57Smglocker * upper 8bits are radio type 930f91cf57Smglocker * lower 8bits are form factor 940f91cf57Smglocker */ 950f91cf57Smglocker #define ACX_EEINFO_RADIO_TYPE_SHIFT 8 960f91cf57Smglocker #define ACX_EEINFO_RADIO_TYPE_MASK (0xff << ACX_EEINFO_RADIO_TYPE_SHIFT) 970f91cf57Smglocker #define ACX_EEINFO_FORM_FACTOR_MASK 0xff 980f91cf57Smglocker 990f91cf57Smglocker #define ACX_EEINFO_HAS_RADIO_TYPE(info) ((info) & ACX_EEINFO_RADIO_TYPE_MASK) 1000f91cf57Smglocker #define ACX_EEINFO_RADIO_TYPE(info) ((info) >> ACX_EEINFO_RADIO_TYPE_SHIFT) 1010f91cf57Smglocker #define ACX_EEINFO_FORM_FACTOR(info) ((info) & ACX_EEINFO_FORM_FACTOR_MASK) 1020f91cf57Smglocker 1030f91cf57Smglocker /* 1040f91cf57Smglocker * Size of command register whose location is obtained 1050f91cf57Smglocker * from ACXREG_CMD_REG_OFFSET IO register 1060f91cf57Smglocker */ 1070f91cf57Smglocker #define ACX_CMD_REG_SIZE 4 /* 4 bytes */ 1080f91cf57Smglocker 1090f91cf57Smglocker /* 110*4b1a56afSjsg * Size of information register whose location is obtained 1110f91cf57Smglocker * from ACXREG_INFO_REG_OFFSET IO register 1120f91cf57Smglocker */ 1130f91cf57Smglocker #define ACX_INFO_REG_SIZE 4 /* 4 bytes */ 1140f91cf57Smglocker 1150f91cf57Smglocker /* 1160f91cf57Smglocker * Offset of EEPROM variables 1170f91cf57Smglocker */ 1180f91cf57Smglocker #define ACX_EE_VERSION_OFS 0x05 1190f91cf57Smglocker 1200f91cf57Smglocker /* 1210f91cf57Smglocker * Possible values for various IO registers 1220f91cf57Smglocker */ 1230f91cf57Smglocker 1240f91cf57Smglocker /* ACXREG_SOFT_RESET */ 1250f91cf57Smglocker #define ACXRV_SOFT_RESET 0x1 1260f91cf57Smglocker 1270f91cf57Smglocker /* ACXREG_FWMEM_START */ 1280f91cf57Smglocker #define ACXRV_FWMEM_START_OP 0x0 1290f91cf57Smglocker 1300f91cf57Smglocker /* ACXREG_FWMEM_CTRL */ 1310f91cf57Smglocker #define ACXRV_FWMEM_ADDR_AUTOINC 0x10000 1320f91cf57Smglocker 1330f91cf57Smglocker /* ACXREG_EVENT_MASK */ 1340f91cf57Smglocker #define ACXRV_EVENT_DISABLE 0x8000 /* XXX What's this?? */ 1350f91cf57Smglocker 1360f91cf57Smglocker /* ACXREG_INTR_TRIG */ 1370f91cf57Smglocker #define ACXRV_TRIG_CMD_FINI 0x0001 1380f91cf57Smglocker #define ACXRV_TRIG_TX_FINI 0x0004 1390f91cf57Smglocker 1400f91cf57Smglocker /* ACXREG_INTR_MASK */ 1410f91cf57Smglocker #define ACXRV_INTR_RX_DATA 0x0001 1420f91cf57Smglocker #define ACXRV_INTR_TX_FINI 0x0002 1430f91cf57Smglocker #define ACXRV_INTR_TX_XFER 0x0004 1440f91cf57Smglocker #define ACXRV_INTR_RX_FINI 0x0008 1450f91cf57Smglocker #define ACXRV_INTR_DTIM 0x0010 1460f91cf57Smglocker #define ACXRV_INTR_BEACON 0x0020 1470f91cf57Smglocker #define ACXRV_INTR_TIMER 0x0040 1480f91cf57Smglocker #define ACXRV_INTR_KEY_MISS 0x0080 1490f91cf57Smglocker #define ACXRV_INTR_WEP_FAIL 0x0100 1500f91cf57Smglocker #define ACXRV_INTR_CMD_FINI 0x0200 1510f91cf57Smglocker #define ACXRV_INTR_INFO 0x0400 1520f91cf57Smglocker #define ACXRV_INTR_OVERFLOW 0x0800 /* XXX */ 1530f91cf57Smglocker #define ACXRV_INTR_PROC_ERR 0x1000 /* XXX */ 1540f91cf57Smglocker #define ACXRV_INTR_SCAN_FINI 0x2000 1550f91cf57Smglocker #define ACXRV_INTR_FCS_THRESH 0x4000 /* XXX */ 1560f91cf57Smglocker #define ACXRV_INTR_UNKN 0x8000 1570f91cf57Smglocker #define ACXRV_INTR_ALL 0xffff 1580f91cf57Smglocker 1590f91cf57Smglocker /* ACXREG_EEPROM_INIT */ 1600f91cf57Smglocker #define ACXRV_EEPROM_INIT 0x1 1610f91cf57Smglocker 1620f91cf57Smglocker /* ACXREG_EEPROM_CTRL */ 1630f91cf57Smglocker #define ACXRV_EEPROM_READ 0x2 1640f91cf57Smglocker 1650f91cf57Smglocker /* ACXREG_PHY_CTRL */ 1660f91cf57Smglocker #define ACXRV_PHY_WRITE 0x1 1670f91cf57Smglocker #define ACXRV_PHY_READ 0x2 1680f91cf57Smglocker 1690f91cf57Smglocker /* ACXREG_PHY_ADDR */ 1700f91cf57Smglocker #define ACXRV_PHYREG_TXPOWER 0x11 /* axc100 */ 1710f91cf57Smglocker #define ACXRV_PHYREG_SENSITIVITY 0x30 1720f91cf57Smglocker 1730f91cf57Smglocker /* ACXREG_ECPU_CTRL */ 1740f91cf57Smglocker #define ACXRV_ECPU_HALT 0x1 1750f91cf57Smglocker #define ACXRV_ECPU_START 0x0 1760f91cf57Smglocker 1770f91cf57Smglocker /* Commands */ 1780f91cf57Smglocker #define ACXCMD_GET_CONF 0x01 1790f91cf57Smglocker #define ACXCMD_SET_CONF 0x02 1800f91cf57Smglocker #define ACXCMD_ENABLE_RXCHAN 0x03 1810f91cf57Smglocker #define ACXCMD_ENABLE_TXCHAN 0x04 1820f91cf57Smglocker #define ACXCMD_TMPLT_TIM 0x0a 1830f91cf57Smglocker #define ACXCMD_JOIN_BSS 0x0b 1840f91cf57Smglocker #define ACXCMD_WEP_MGMT 0x0c /* acx111 */ 1850f91cf57Smglocker #define ACXCMD_SLEEP 0x0f 1860f91cf57Smglocker #define ACXCMD_WAKEUP 0x10 1870f91cf57Smglocker #define ACXCMD_INIT_MEM 0x12 /* acx100 */ 1880f91cf57Smglocker #define ACXCMD_TMPLT_BEACON 0x13 1890f91cf57Smglocker #define ACXCMD_TMPLT_PROBE_RESP 0x14 1900f91cf57Smglocker #define ACXCMD_TMPLT_NULL_DATA 0x15 1910f91cf57Smglocker #define ACXCMD_TMPLT_PROBE_REQ 0x16 1920f91cf57Smglocker #define ACXCMD_INIT_RADIO 0x18 1930f91cf57Smglocker 1940f91cf57Smglocker #if 0 1950f91cf57Smglocker /* 1960f91cf57Smglocker * acx111 does not agree with acx100 about 1970f91cf57Smglocker * the meaning of following values. So they 1980f91cf57Smglocker * are put into chip specific files. 1990f91cf57Smglocker */ 2000f91cf57Smglocker #define ACX_CONF_FW_RING 0x0003 2010f91cf57Smglocker #define ACX_CONF_MEMOPT 0x0005 2020f91cf57Smglocker #endif 2030f91cf57Smglocker #define ACX_CONF_MEMBLK_SIZE 0x0004 /* acx100 */ 2040f91cf57Smglocker #define ACX_CONF_RATE_FALLBACK 0x0006 2050f91cf57Smglocker #define ACX_CONF_WEPOPT 0x0007 /* acx100 */ 2060f91cf57Smglocker #define ACX_CONF_MMAP 0x0008 2070f91cf57Smglocker #define ACX_CONF_FWREV 0x000d 2080f91cf57Smglocker #define ACX_CONF_RXOPT 0x0010 2090f91cf57Smglocker #define ACX_CONF_OPTION 0x0015 /* acx111 */ 2100f91cf57Smglocker #define ACX_CONF_EADDR 0x1001 2110f91cf57Smglocker #define ACX_CONF_NRETRY_SHORT 0x1005 2120f91cf57Smglocker #define ACX_CONF_NRETRY_LONG 0x1006 2130f91cf57Smglocker #define ACX_CONF_WEPKEY 0x1007 /* acx100 */ 2140f91cf57Smglocker #define ACX_CONF_MSDU_LIFETIME 0x1008 2150f91cf57Smglocker #define ACX_CONF_REGDOM 0x100a 2160f91cf57Smglocker #define ACX_CONF_ANTENNA 0x100b 2170f91cf57Smglocker #define ACX_CONF_TXPOWER 0x100d /* acx111 */ 2180f91cf57Smglocker #define ACX_CONF_CCA_MODE 0x100e 2190f91cf57Smglocker #define ACX_CONF_ED_THRESH 0x100f 2200f91cf57Smglocker #define ACX_CONF_WEP_TXKEY 0x1010 2210f91cf57Smglocker 2220f91cf57Smglocker /* 2230f91cf57Smglocker * NOTE: 2240f91cf57Smglocker * Following structs' fields are little endian 2250f91cf57Smglocker */ 2260f91cf57Smglocker 2270f91cf57Smglocker struct acx_conf { 2280f91cf57Smglocker uint16_t conf_id; /* see ACXCONF_ (_acxcmd.h) */ 2290f91cf57Smglocker uint16_t conf_data_len; 2300f91cf57Smglocker } __packed; 2310f91cf57Smglocker 2320f91cf57Smglocker struct acx_conf_mmap { 2330f91cf57Smglocker struct acx_conf confcom; 2340f91cf57Smglocker uint32_t code_start; 2350f91cf57Smglocker uint32_t code_end; 2360f91cf57Smglocker uint32_t wep_cache_start; 2370f91cf57Smglocker uint32_t wep_cache_end; 2380f91cf57Smglocker uint32_t pkt_tmplt_start; 2390f91cf57Smglocker uint32_t pkt_tmplt_end; 2400f91cf57Smglocker uint32_t fw_desc_start; 2410f91cf57Smglocker uint32_t fw_desc_end; 2420f91cf57Smglocker uint32_t memblk_start; 2430f91cf57Smglocker uint32_t memblk_end; 2440f91cf57Smglocker } __packed; 2450f91cf57Smglocker 2460f91cf57Smglocker struct acx_conf_wepopt { 2470f91cf57Smglocker struct acx_conf confcom; 2480f91cf57Smglocker uint16_t nkey; 2490f91cf57Smglocker uint8_t opt; /* see WEPOPT_ */ 2500f91cf57Smglocker } __packed; 2510f91cf57Smglocker 2520f91cf57Smglocker #define WEPOPT_HDWEP 0 /* hardware WEP */ 2530f91cf57Smglocker 2540f91cf57Smglocker struct acx_conf_eaddr { 2550f91cf57Smglocker struct acx_conf confcom; 2560f91cf57Smglocker uint8_t eaddr[IEEE80211_ADDR_LEN]; 2570f91cf57Smglocker } __packed; 2580f91cf57Smglocker 2590f91cf57Smglocker struct acx_conf_regdom { 2600f91cf57Smglocker struct acx_conf confcom; 2610f91cf57Smglocker uint8_t regdom; 2620f91cf57Smglocker uint8_t unknown; 2630f91cf57Smglocker } __packed; 2640f91cf57Smglocker 2650f91cf57Smglocker struct acx_conf_antenna { 2660f91cf57Smglocker struct acx_conf confcom; 2670f91cf57Smglocker uint8_t antenna; 2680f91cf57Smglocker } __packed; 2690f91cf57Smglocker 2700f91cf57Smglocker struct acx_conf_fwrev { 2710f91cf57Smglocker struct acx_conf confcom; 2720f91cf57Smglocker #define ACX_FWREV_LEN 20 2730f91cf57Smglocker /* 2740f91cf57Smglocker * "Rev xx.xx.xx.xx" 2750f91cf57Smglocker * '\0' terminated 2760f91cf57Smglocker */ 2770f91cf57Smglocker char fw_rev[ACX_FWREV_LEN]; 2780f91cf57Smglocker uint32_t hw_id; 2790f91cf57Smglocker } __packed; 2800f91cf57Smglocker 2810f91cf57Smglocker struct acx_conf_nretry_long { 2820f91cf57Smglocker struct acx_conf confcom; 2830f91cf57Smglocker uint8_t nretry; 2840f91cf57Smglocker } __packed; 2850f91cf57Smglocker 2860f91cf57Smglocker struct acx_conf_nretry_short { 2870f91cf57Smglocker struct acx_conf confcom; 2880f91cf57Smglocker uint8_t nretry; 2890f91cf57Smglocker } __packed; 2900f91cf57Smglocker 2910f91cf57Smglocker struct acx_conf_msdu_lifetime { 2920f91cf57Smglocker struct acx_conf confcom; 2930f91cf57Smglocker uint32_t lifetime; 2940f91cf57Smglocker } __packed; 2950f91cf57Smglocker 2960f91cf57Smglocker struct acx_conf_rate_fallback { 2970f91cf57Smglocker struct acx_conf confcom; 2980f91cf57Smglocker uint8_t ratefb_enable; /* 0/1 */ 2990f91cf57Smglocker } __packed; 3000f91cf57Smglocker 3010f91cf57Smglocker struct acx_conf_rxopt { 3020f91cf57Smglocker struct acx_conf confcom; 3030f91cf57Smglocker uint16_t opt1; /* see RXOPT1_ */ 3040f91cf57Smglocker uint16_t opt2; /* see RXOPT2_ */ 3050f91cf57Smglocker } __packed; 3060f91cf57Smglocker 3070f91cf57Smglocker #define RXOPT1_INCL_RXBUF_HDR 0x2000 /* rxbuf with acx_rxbuf_hdr */ 3080f91cf57Smglocker #define RXOPT1_RECV_SSID 0x0400 /* recv frame for joined SSID */ 3090f91cf57Smglocker #define RXOPT1_FILT_BCAST 0x0200 /* filt broadcast pkt */ 3100f91cf57Smglocker #define RXOPT1_RECV_MCAST1 0x0100 /* recv pkt for multicast addr1 */ 3110f91cf57Smglocker #define RXOPT1_RECV_MCAST0 0x0080 /* recv pkt for multicast addr0 */ 3120f91cf57Smglocker #define RXOPT1_FILT_ALLMULTI 0x0040 /* filt allmulti pkt */ 3130f91cf57Smglocker #define RXOPT1_FILT_FSSID 0x0020 /* filt frame for foreign SSID */ 3140f91cf57Smglocker #define RXOPT1_FILT_FDEST 0x0010 /* filt frame for foreign dest addr */ 3150f91cf57Smglocker #define RXOPT1_PROMISC 0x0008 /* promisc mode */ 3160f91cf57Smglocker #define RXOPT1_INCL_FCS 0x0004 3170f91cf57Smglocker #define RXOPT1_INCL_PHYHDR 0x0000 /* XXX 0x0002 */ 3180f91cf57Smglocker 3190f91cf57Smglocker #define RXOPT2_RECV_ASSOC_REQ 0x0800 3200f91cf57Smglocker #define RXOPT2_RECV_AUTH 0x0400 3210f91cf57Smglocker #define RXOPT2_RECV_BEACON 0x0200 3220f91cf57Smglocker #define RXOPT2_RECV_CF 0x0100 3230f91cf57Smglocker #define RXOPT2_RECV_CTRL 0x0080 3240f91cf57Smglocker #define RXOPT2_RECV_DATA 0x0040 3250f91cf57Smglocker #define RXOPT2_RECV_BROKEN 0x0020 /* broken frame */ 3260f91cf57Smglocker #define RXOPT2_RECV_MGMT 0x0010 3270f91cf57Smglocker #define RXOPT2_RECV_PROBE_REQ 0x0008 3280f91cf57Smglocker #define RXOPT2_RECV_PROBE_RESP 0x0004 3290f91cf57Smglocker #define RXOPT2_RECV_ACK 0x0002 /* RTS/CTS/ACK */ 3300f91cf57Smglocker #define RXOPT2_RECV_OTHER 0x0001 3310f91cf57Smglocker 3320f91cf57Smglocker struct acx_conf_wep_txkey { 3330f91cf57Smglocker struct acx_conf confcom; 3340f91cf57Smglocker uint8_t wep_txkey; 3350f91cf57Smglocker } __packed; 3360f91cf57Smglocker 3370f91cf57Smglocker 3380f91cf57Smglocker struct acx_tmplt_null_data { 3390f91cf57Smglocker uint16_t size; 3400f91cf57Smglocker struct ieee80211_frame data; 3410f91cf57Smglocker } __packed; 3420f91cf57Smglocker 3430f91cf57Smglocker struct acx_tmplt_probe_req { 3440f91cf57Smglocker uint16_t size; 3450f91cf57Smglocker union { 3460f91cf57Smglocker struct { 3470f91cf57Smglocker struct ieee80211_frame f; 3480f91cf57Smglocker uint8_t var[1]; 3490f91cf57Smglocker } __packed u_data; 3500f91cf57Smglocker uint8_t u_mem[0x44]; 3510f91cf57Smglocker } data; 3520f91cf57Smglocker } __packed; 3530f91cf57Smglocker 3540f91cf57Smglocker #define ACX_TMPLT_PROBE_REQ_SIZ(var_len) \ 3550f91cf57Smglocker (sizeof(uint16_t) + sizeof(struct ieee80211_frame) + (var_len)) 3560f91cf57Smglocker 3570f91cf57Smglocker struct acx_tmplt_probe_resp { 3580f91cf57Smglocker uint16_t size; 3590f91cf57Smglocker union { 3600f91cf57Smglocker struct { 3610f91cf57Smglocker struct ieee80211_frame f; 3620f91cf57Smglocker uint8_t time_stamp[8]; 3630f91cf57Smglocker uint16_t beacon_intvl; 3640f91cf57Smglocker uint16_t cap; 3650f91cf57Smglocker uint8_t var[1]; 3660f91cf57Smglocker } __packed u_data; 3670f91cf57Smglocker uint8_t u_mem[0x54]; 3680f91cf57Smglocker } data; 3690f91cf57Smglocker } __packed; 3700f91cf57Smglocker 3710f91cf57Smglocker #define ACX_TMPLT_PROBE_RESP_SIZ(var_len) \ 3720f91cf57Smglocker (sizeof(uint16_t) + sizeof(struct ieee80211_frame) + \ 3730f91cf57Smglocker 8 * sizeof(uint8_t) + sizeof(uint16_t) + sizeof(uint16_t) + (var_len)) 3740f91cf57Smglocker 3750f91cf57Smglocker /* XXX same as acx_tmplt_probe_resp */ 3760f91cf57Smglocker struct acx_tmplt_beacon { 3770f91cf57Smglocker uint16_t size; 3780f91cf57Smglocker union { 3790f91cf57Smglocker struct { 3800f91cf57Smglocker struct ieee80211_frame f; 3810f91cf57Smglocker uint8_t time_stamp[8]; 3820f91cf57Smglocker uint16_t beacon_intvl; 3830f91cf57Smglocker uint16_t cap; 3840f91cf57Smglocker uint8_t var[1]; 3850f91cf57Smglocker } __packed u_data; 3860f91cf57Smglocker uint8_t u_mem[0x54]; 3870f91cf57Smglocker } data; 3880f91cf57Smglocker } __packed; 3890f91cf57Smglocker 3900f91cf57Smglocker /* XXX C&P of ACX_TMPLT_PROVE_RESP_SIZ() */ 3910f91cf57Smglocker #define ACX_TMPLT_BEACON_SIZ(var_len) \ 3920f91cf57Smglocker (sizeof(uint16_t) + sizeof(struct ieee80211_frame) + \ 3930f91cf57Smglocker 8 * sizeof(uint8_t) + sizeof(uint16_t) + sizeof(uint16_t) + (var_len)) 3940f91cf57Smglocker 3950f91cf57Smglocker /* XXX do NOT belong here */ 3960f91cf57Smglocker struct tim_head { 3970f91cf57Smglocker uint8_t eid; 3980f91cf57Smglocker uint8_t len; 3990f91cf57Smglocker uint8_t dtim_count; 4000f91cf57Smglocker uint8_t dtim_period; 4010f91cf57Smglocker uint8_t bitmap_ctrl; 4020f91cf57Smglocker } __packed; 4030f91cf57Smglocker 4040f91cf57Smglocker /* For tim_head.len (tim_head - eid - len + bitmap) */ 4050f91cf57Smglocker #define ACX_TIM_LEN(bitmap_len) \ 4060f91cf57Smglocker (sizeof(struct tim_head) - (2 * sizeof(uint8_t)) + (bitmap_len)) 407ae689328Smglocker #define ACX_TIM_BITMAP_LEN 1 4080f91cf57Smglocker 4090f91cf57Smglocker struct acx_tmplt_tim { 4100f91cf57Smglocker uint16_t size; 4110f91cf57Smglocker union { 4120f91cf57Smglocker struct { 4130f91cf57Smglocker struct tim_head th; 4140f91cf57Smglocker uint8_t bitmap[1]; 4150f91cf57Smglocker } __packed u_data; 4160f91cf57Smglocker uint8_t u_mem[0x100]; 4170f91cf57Smglocker } data; 4180f91cf57Smglocker #define tim_eid data.u_data.th.eid 4190f91cf57Smglocker #define tim_len data.u_data.th.len 4200f91cf57Smglocker #define tim_dtim_count data.u_data.th.dtim_count 4210f91cf57Smglocker #define tim_dtim_period data.u_data.th.dtim_period 4220f91cf57Smglocker #define tim_bitmap_ctrl data.u_data.th.bitmap_ctrl 4230f91cf57Smglocker #define tim_bitmap data.u_data.bitmap 4240f91cf57Smglocker } __packed; 4250f91cf57Smglocker 4260f91cf57Smglocker #define ACX_TMPLT_TIM_SIZ(bitmap_len) \ 4270f91cf57Smglocker (sizeof(uint16_t) + sizeof(struct tim_head) + (bitmap_len)) 4280f91cf57Smglocker 4290f91cf57Smglocker #define CMDPRM_WRITE_REGION_1(sc, r, rlen) \ 4300f91cf57Smglocker bus_space_write_region_1((sc)->sc_mem2_bt, \ 4310f91cf57Smglocker (sc)->sc_mem2_bh, \ 4320f91cf57Smglocker (sc)->sc_cmd_param, \ 4330f91cf57Smglocker (const uint8_t *)(r), (rlen)) 4340f91cf57Smglocker 4350f91cf57Smglocker #define CMDPRM_READ_REGION_1(sc, r, rlen) \ 4360f91cf57Smglocker bus_space_read_region_1((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, \ 4370f91cf57Smglocker (sc)->sc_cmd_param, (uint8_t *)(r), (rlen)) 4380f91cf57Smglocker 4390f91cf57Smglocker /* 4400f91cf57Smglocker * This will clear previous command's 4410f91cf57Smglocker * execution status too 4420f91cf57Smglocker */ 4430f91cf57Smglocker #define CMD_WRITE_4(sc, val) \ 4440f91cf57Smglocker bus_space_write_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, \ 4450f91cf57Smglocker (sc)->sc_cmd, (val)) 4460f91cf57Smglocker #define CMD_READ_4(sc) \ 4470f91cf57Smglocker bus_space_read_4((sc)->sc_mem2_bt, (sc)->sc_mem2_bh, (sc)->sc_cmd) 4480f91cf57Smglocker 4490f91cf57Smglocker /* 4500f91cf57Smglocker * acx command register layerout: 4510f91cf57Smglocker * upper 16bits are command execution status 4520f91cf57Smglocker * lower 16bits are command to be executed 4530f91cf57Smglocker */ 4540f91cf57Smglocker #define ACX_CMD_STATUS_SHIFT 16 4550f91cf57Smglocker #define ACX_CMD_STATUS_OK 1 4560f91cf57Smglocker 4570f91cf57Smglocker struct radio_init { 4580f91cf57Smglocker uint32_t radio_ofs; /* radio firmware offset */ 4590f91cf57Smglocker uint32_t radio_len; /* radio firmware length */ 4600f91cf57Smglocker } __packed; 4610f91cf57Smglocker 4620f91cf57Smglocker struct bss_join_hdr { 4630f91cf57Smglocker uint8_t bssid[IEEE80211_ADDR_LEN]; 4640f91cf57Smglocker uint16_t beacon_intvl; 4650f91cf57Smglocker uint8_t chip_spec[3]; 4660f91cf57Smglocker uint8_t ndata_txrate; /* see ACX_NDATA_TXRATE_ */ 4670f91cf57Smglocker uint8_t ndata_txopt; /* see ACX_NDATA_TXOPT_ */ 4680f91cf57Smglocker uint8_t mode; /* see ACX_MODE_ */ 4690f91cf57Smglocker uint8_t channel; 4700f91cf57Smglocker uint8_t esslen; 4710f91cf57Smglocker char essid[1]; 4720f91cf57Smglocker } __packed; 4730f91cf57Smglocker 4740f91cf57Smglocker /* 4750f91cf57Smglocker * non-data frame tx rate 4760f91cf57Smglocker */ 47769d24b9aSbrad #define ACX_NDATA_TXRATE_1 10 /* 1Mbits/s */ 4780f91cf57Smglocker #define ACX_NDATA_TXRATE_2 20 /* 2Mbits/s */ 4790f91cf57Smglocker 4800f91cf57Smglocker /* 4810f91cf57Smglocker * non-data frame tx options 4820f91cf57Smglocker */ 4830f91cf57Smglocker #define ACX_NDATA_TXOPT_PBCC 0x40 4840f91cf57Smglocker #define ACX_NDATA_TXOPT_OFDM 0x20 4850f91cf57Smglocker #define ACX_NDATA_TXOPT_SHORT_PREAMBLE 0x10 4860f91cf57Smglocker 4870f91cf57Smglocker #define BSS_JOIN_BUFLEN \ 4880f91cf57Smglocker (sizeof(struct bss_join_hdr) + IEEE80211_NWID_LEN - 1) 4890f91cf57Smglocker #define BSS_JOIN_PARAM_SIZE(bj) \ 4905209947cSclaudio (sizeof(struct bss_join_hdr) + (bj)->esslen - 1) 4910f91cf57Smglocker 4920f91cf57Smglocker 4930f91cf57Smglocker #define PCIR_BAR(x) (PCI_MAPS + (x) * 4) 4940f91cf57Smglocker 4950f91cf57Smglocker #endif /* !_ACXREG_H */ 496