1 /* $OpenBSD: cy.c,v 1.10 2000/12/10 11:12:00 deraadt Exp $ */ 2 3 /* 4 * cy.c 5 * 6 * Driver for Cyclades Cyclom-8/16/32 multiport serial cards 7 * (currently not tested with Cyclom-32 cards) 8 * 9 * Timo Rossi, 1996 10 * 11 * Supports both ISA and PCI Cyclom cards 12 * 13 * Uses CD1400 automatic CTS flow control, and 14 * if CY_HW_RTS is defined, uses CD1400 automatic input flow control. 15 * This requires a special cable that exchanges the RTS and DTR lines. 16 * 17 * Lots of debug output can be enabled by defining CY_DEBUG 18 * Some debugging counters (number of receive/transmit interrupts etc.) 19 * can be enabled by defining CY_DEBUG1 20 * 21 * This version uses the bus_space/io_??() stuff 22 * 23 */ 24 25 #undef CY_DEBUG 26 #undef CY_DEBUG1 27 28 /* NCY is the number of Cyclom cards in the machine */ 29 #include "cy.h" 30 #if NCY > 0 31 32 #include <sys/types.h> 33 #include <sys/param.h> 34 #include <sys/ioctl.h> 35 #include <sys/syslog.h> 36 #include <sys/fcntl.h> 37 #include <sys/tty.h> 38 #include <sys/proc.h> 39 #include <sys/conf.h> 40 #include <sys/user.h> 41 #include <sys/select.h> 42 #include <sys/device.h> 43 #include <sys/malloc.h> 44 #include <sys/systm.h> 45 46 #include <machine/bus.h> 47 #include <machine/intr.h> 48 49 #if NCY_ISA > 0 50 #include <dev/isa/isavar.h> 51 #include <dev/isa/isareg.h> 52 #endif /* NCY_ISA > 0 */ 53 #if NCY_PCI > 0 54 #include <dev/pci/pcivar.h> 55 #include <dev/pci/pcireg.h> 56 #include <dev/pci/pcidevs.h> 57 #endif /* NCY_PCI > 0 */ 58 59 #include <dev/ic/cd1400reg.h> 60 #include <dev/ic/cyreg.h> 61 62 63 /* Macros to clear/set/test flags. */ 64 #define SET(t, f) (t) |= (f) 65 #define CLR(t, f) (t) &= ~(f) 66 #define ISSET(t, f) ((t) & (f)) 67 68 69 void cyattach __P((struct device *, struct device *, void *)); 70 int cy_probe_common __P((int, bus_space_tag_t, bus_space_handle_t, int)); 71 int cyintr __P((void *)); 72 int cyparam __P((struct tty *, struct termios *)); 73 void cystart __P((struct tty *)); 74 void cy_poll __P((void *)); 75 int cy_modem_control __P((struct cy_port *, int, int)); 76 void cy_enable_transmitter __P((struct cy_port *)); 77 void cd1400_channel_cmd __P((struct cy_port *, int)); 78 int cy_speed __P((speed_t, int *, int *, int)); 79 80 struct cfdriver cy_cd = { 81 NULL, "cy", DV_TTY 82 }; 83 84 static int cy_nr_cd1400s[NCY]; 85 static int cy_bus_types[NCY]; 86 static bus_space_handle_t cy_card_memh[NCY]; 87 static int cy_open = 0; 88 static int cy_events = 0; 89 90 91 /* 92 * Common probe routine 93 */ 94 int 95 cy_probe_common(card, memt, memh, bustype) 96 int card, bustype; 97 bus_space_tag_t memt; 98 bus_space_handle_t memh; 99 { 100 int cy_chip, chip_offs; 101 u_char firmware_ver; 102 103 /* Cyclom card hardware reset */ 104 bus_space_write_1(memt, memh, CY16_RESET<<bustype, 0); 105 DELAY(500); /* wait for reset to complete */ 106 bus_space_write_1(memt, memh, CY_CLEAR_INTR<<bustype, 0); 107 108 #ifdef CY_DEBUG 109 printf("cy: card reset done\n"); 110 #endif 111 112 cy_nr_cd1400s[card] = 0; 113 114 for(cy_chip = 0, chip_offs = 0; 115 cy_chip < CY_MAX_CD1400s; 116 cy_chip++, chip_offs += (CY_CD1400_MEMSPACING<<bustype)) { 117 int i; 118 119 /* the last 4 cd1400s are 'interleaved' 120 with the first 4 on 32-port boards */ 121 if(cy_chip == 4) 122 chip_offs -= (CY32_ADDR_FIX<<bustype); 123 124 #ifdef CY_DEBUG 125 printf("cy%d probe chip %d offset 0x%lx ... ", 126 card, cy_chip, chip_offs); 127 #endif 128 129 /* wait until the chip is ready for command */ 130 DELAY(1000); 131 if(bus_space_read_1(memt, memh, chip_offs + 132 ((CD1400_CCR<<1) << bustype)) != 0) { 133 #ifdef CY_DEBUG 134 printf("not ready for command\n"); 135 #endif 136 break; 137 } 138 139 /* clear the firmware version reg. */ 140 bus_space_write_1(memt, memh, chip_offs + 141 ((CD1400_GFRCR<<1) << bustype), 0); 142 143 /* 144 * On Cyclom-16 references to non-existent chip 4 145 * actually access chip 0 (address line 9 not decoded). 146 * Here we check if the clearing of chip 4 GFRCR actually 147 * cleared chip 0 GFRCR. In that case we have a 16 port card. 148 */ 149 if(cy_chip == 4 && 150 bus_space_read_1(memt, memh, chip_offs + 151 ((CD1400_GFRCR<<1) << bustype)) ==0) 152 break; 153 154 /* reset the chip */ 155 bus_space_write_1(memt, memh, chip_offs + 156 ((CD1400_CCR<<1) << bustype), 157 CD1400_CCR_CMDRESET | CD1400_CCR_FULLRESET); 158 159 /* wait for the chip to initialize itself */ 160 for(i = 0; i < 200; i++) { 161 DELAY(50); 162 firmware_ver = 163 bus_space_read_1(memt, memh, chip_offs + 164 ((CD1400_GFRCR<<1) << bustype)); 165 if((firmware_ver & 0xf0) == 0x40) /* found a CD1400 */ 166 break; 167 } 168 #ifdef CY_DEBUG 169 printf("firmware version 0x%x\n", firmware_ver); 170 #endif 171 172 if((firmware_ver & 0xf0) != 0x40) 173 break; 174 175 /* firmware version OK, CD1400 found */ 176 cy_nr_cd1400s[card]++; 177 } 178 179 if(cy_nr_cd1400s[card] == 0) { 180 #ifdef CY_DEBUG 181 printf("no CD1400s found\n"); 182 #endif 183 return 0; 184 } 185 186 #ifdef CY_DEBUG 187 printf("found %d CD1400s\n", cy_nr_cd1400s[card]); 188 #endif 189 190 cy_card_memh[card] = memh; 191 cy_bus_types[card] = bustype; 192 193 return 1; 194 } 195 196 /* 197 * Attach (ISA/PCI) 198 */ 199 void 200 cyattach(parent, self, aux) 201 struct device *parent, *self; 202 void *aux; 203 { 204 struct cy_softc *sc = (void *)self; 205 int card, port, cy_chip, num_chips, cdu, chip_offs, cy_clock; 206 207 card = sc->sc_dev.dv_unit; 208 num_chips = cy_nr_cd1400s[card]; 209 if(num_chips == 0) 210 return; 211 212 sc->sc_bustype = cy_bus_types[card]; 213 sc->sc_memh = cy_card_memh[card]; 214 switch(sc->sc_bustype) { 215 #if NCY_ISA > 0 216 case CY_BUSTYPE_ISA: 217 sc->sc_memt = ((struct isa_attach_args *)(aux))->ia_memt; 218 break; 219 #endif 220 #if NCY_PCI > 0 221 case CY_BUSTYPE_PCI: 222 sc->sc_memt = ((struct pci_attach_args *)aux)->pa_memt; 223 break; 224 #endif 225 } 226 227 bzero(sc->sc_ports, sizeof(sc->sc_ports)); 228 sc->sc_nports = num_chips * CD1400_NO_OF_CHANNELS; 229 230 port = 0; 231 for(cy_chip = 0, chip_offs = 0; 232 cy_chip < num_chips; cy_chip++, 233 chip_offs += (CY_CD1400_MEMSPACING<<sc->sc_bustype)) { 234 235 if(cy_chip == 4) 236 chip_offs -= (CY32_ADDR_FIX<<sc->sc_bustype); 237 238 #ifdef CY_DEBUG 239 printf("attach CD1400 #%d offset 0x%x\n", cy_chip, chip_offs); 240 #endif 241 sc->sc_cd1400_offs[cy_chip] = chip_offs; 242 243 /* configure port 0 as serial port (should already be after reset) */ 244 cd_write_reg_sc(sc, cy_chip, CD1400_GCR, 0); 245 246 /* Set cy_clock depending on firmware version */ 247 if (cd_read_reg_sc(sc, cy_chip, CD1400_GFRCR) <= 0x46) 248 cy_clock = CY_CLOCK; 249 else 250 cy_clock = CY_CLOCK_60; 251 252 /* set up a receive timeout period (1ms) */ 253 cd_write_reg_sc(sc, cy_chip, CD1400_PPR, 254 (cy_clock / CD1400_PPR_PRESCALER / 1000) + 1); 255 256 for(cdu = 0; cdu < CD1400_NO_OF_CHANNELS; cdu++) { 257 sc->sc_ports[port].cy_port_num = port; 258 sc->sc_ports[port].cy_memt = sc->sc_memt; 259 sc->sc_ports[port].cy_memh = sc->sc_memh; 260 sc->sc_ports[port].cy_chip_offs = chip_offs; 261 sc->sc_ports[port].cy_bustype = sc->sc_bustype; 262 sc->sc_ports[port].cy_clock = cy_clock; 263 264 /* should we initialize anything else here? */ 265 port++; 266 } /* for(each port on one CD1400...) */ 267 268 } /* for(each CD1400 on a card... ) */ 269 270 printf(" (%d ports)\n", port); 271 272 /* ensure an edge for the next interrupt */ 273 bus_space_write_1(sc->sc_memt, sc->sc_memh, 274 CY_CLEAR_INTR<<sc->sc_bustype, 0); 275 276 switch(sc->sc_bustype) { 277 #if NCY_ISA > 0 278 case CY_BUSTYPE_ISA: 279 { 280 struct isa_attach_args *ia = aux; 281 282 sc->sc_ih = 283 isa_intr_establish(ia->ia_ic, ia->ia_irq, 284 IST_EDGE, IPL_TTY, cyintr, sc, sc->sc_dev.dv_xname); 285 } 286 break; 287 #endif /* NCY_ISA > 0 */ 288 #if NCY_PCI > 0 289 case CY_BUSTYPE_PCI: 290 { 291 pci_intr_handle_t intrhandle; 292 struct pci_attach_args *pa = aux; 293 294 if(pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin, 295 pa->pa_intrline, &intrhandle) != 0) 296 panic("cy: couldn't map PCI interrupt"); 297 298 sc->sc_ih = pci_intr_establish(pa->pa_pc, intrhandle, 299 IPL_TTY, cyintr, sc, sc->sc_dev.dv_xname); 300 } 301 break; 302 #endif /* NCY_PCI > 0 */ 303 } 304 305 if(sc->sc_ih == NULL) 306 panic("cy: couldn't establish interrupt"); 307 } 308 309 #undef CY_DEBUG /*!!*/ 310 311 /* 312 * open routine. returns zero if successfull, else error code 313 */ 314 int cyopen __P((dev_t, int, int, struct proc *)); 315 int cyclose __P((dev_t, int, int, struct proc *)); 316 int cyread __P((dev_t, struct uio *, int)); 317 int cywrite __P((dev_t, struct uio *, int)); 318 struct tty *cytty __P((dev_t)); 319 int cyioctl __P((dev_t, u_long, caddr_t, int, struct proc *)); 320 int cystop __P((struct tty *, int flag)); 321 322 int 323 cyopen(dev, flag, mode, p) 324 dev_t dev; 325 int flag, mode; 326 struct proc *p; 327 { 328 int card = CY_CARD(dev); 329 int port = CY_PORT(dev); 330 struct cy_softc *sc; 331 struct cy_port *cy; 332 struct tty *tp; 333 int s, error; 334 335 #ifdef CY_DEBUG 336 printf("cy%d open port %d flag 0x%x mode 0x%x\n", 337 card, port, flag, mode); 338 #endif 339 340 if(card >= cy_cd.cd_ndevs || 341 (sc = cy_cd.cd_devs[card]) == NULL) 342 return ENXIO; 343 344 cy = &sc->sc_ports[port]; 345 346 s = spltty(); 347 if(cy->cy_tty == NULL) { 348 if((cy->cy_tty = ttymalloc()) == NULL) { 349 splx(s); 350 printf("cy%d port %d open: can't allocate tty\n", card, port); 351 return ENOMEM; 352 } 353 } 354 splx(s); 355 356 tp = cy->cy_tty; 357 tty_attach(tp); 358 tp = cy->cy_tty; 359 tp->t_oproc = cystart; 360 tp->t_param = cyparam; 361 tp->t_dev = dev; 362 363 if(!ISSET(tp->t_state, TS_ISOPEN)) { 364 SET(tp->t_state, TS_WOPEN); 365 ttychars(tp); 366 tp->t_iflag = TTYDEF_IFLAG; 367 tp->t_oflag = TTYDEF_OFLAG; 368 tp->t_cflag = TTYDEF_CFLAG; 369 if(ISSET(cy->cy_openflags, TIOCFLAG_CLOCAL)) 370 SET(tp->t_cflag, CLOCAL); 371 if(ISSET(cy->cy_openflags, TIOCFLAG_CRTSCTS)) 372 SET(tp->t_cflag, CRTSCTS); 373 if(ISSET(cy->cy_openflags, TIOCFLAG_MDMBUF)) 374 SET(tp->t_cflag, MDMBUF); 375 tp->t_lflag = TTYDEF_LFLAG; 376 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED; 377 378 s = spltty(); 379 380 /* 381 * Allocate input ring buffer if we don't already have one 382 */ 383 if(cy->cy_ibuf == NULL) { 384 cy->cy_ibuf = malloc(IBUF_SIZE, M_DEVBUF, M_NOWAIT); 385 if(cy->cy_ibuf == NULL) { 386 printf("cy%d: (port %d) can't allocate input buffer\n", 387 card, port); 388 splx(s); 389 return ENOMEM; 390 } 391 cy->cy_ibuf_end = cy->cy_ibuf + IBUF_SIZE; 392 } 393 394 /* mark the ring buffer as empty */ 395 cy->cy_ibuf_rd_ptr = cy->cy_ibuf_wr_ptr = cy->cy_ibuf; 396 397 /* select CD1400 channel */ 398 cd_write_reg(cy, CD1400_CAR, port & CD1400_CAR_CHAN); 399 /* reset the channel */ 400 cd1400_channel_cmd(cy, CD1400_CCR_CMDRESET); 401 /* encode unit (port) number in LIVR */ 402 /* there is just enough space for 5 bits (32 ports) */ 403 cd_write_reg(cy, CD1400_LIVR, port << 3); 404 405 cy->cy_channel_control = 0; 406 407 /* hmm... need spltty() here? */ 408 if(cy_open == 0) 409 { 410 cy_open = 1; 411 timeout(cy_poll, NULL, 1); 412 } 413 414 /* this sets parameters and raises DTR */ 415 cyparam(tp, &tp->t_termios); 416 417 ttsetwater(tp); 418 419 /* raise RTS too */ 420 cy_modem_control(cy, TIOCM_RTS, DMBIS); 421 422 cy->cy_carrier_stat = 423 cd_read_reg(cy, CD1400_MSVR2); 424 425 /* enable receiver and modem change interrupts */ 426 cd_write_reg(cy, CD1400_SRER, CD1400_SRER_MDMCH | CD1400_SRER_RXDATA); 427 428 if(CY_DIALOUT(dev) || 429 ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR) || 430 ISSET(tp->t_cflag, MDMBUF) || 431 ISSET(cy->cy_carrier_stat, CD1400_MSVR2_CD)) 432 SET(tp->t_state, TS_CARR_ON); 433 else 434 CLR(tp->t_state, TS_CARR_ON); 435 } else if(ISSET(tp->t_state, TS_XCLUDE) && p->p_ucred->cr_uid != 0) { 436 return EBUSY; 437 } else { 438 s = spltty(); 439 } 440 441 /* wait for carrier if necessary */ 442 if(!ISSET(flag, O_NONBLOCK)) { 443 while(!ISSET(tp->t_cflag, CLOCAL) && 444 !ISSET(tp->t_state, TS_CARR_ON)) { 445 SET(tp->t_state, TS_WOPEN); 446 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, "cydcd", 0); 447 if(error != 0) { 448 splx(s); 449 CLR(tp->t_state, TS_WOPEN); 450 return error; 451 } 452 } 453 } 454 455 splx(s); 456 457 return (*linesw[tp->t_line].l_open)(dev, tp); 458 } 459 460 /* 461 * close routine. returns zero if successfull, else error code 462 */ 463 int 464 cyclose(dev, flag, mode, p) 465 dev_t dev; 466 int flag, mode; 467 struct proc *p; 468 { 469 int card = CY_CARD(dev); 470 int port = CY_PORT(dev); 471 struct cy_softc *sc = cy_cd.cd_devs[card]; 472 struct cy_port *cy = &sc->sc_ports[port]; 473 struct tty *tp = cy->cy_tty; 474 int s; 475 476 #ifdef CY_DEBUG 477 printf("cy%d close port %d, flag 0x%x, mode 0x%x\n", 478 card, port, flag, mode); 479 #endif 480 481 (*linesw[tp->t_line].l_close)(tp, flag); 482 s = spltty(); 483 484 if(ISSET(tp->t_cflag, HUPCL) && 485 !ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR)) { 486 /* drop DTR and RTS 487 (should we wait for output buffer to become empty first?) */ 488 cy_modem_control(cy, 0, DMSET); 489 } 490 491 /* 492 * XXX should we disable modem change and 493 * receive interrupts here or somewhere ? 494 */ 495 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 496 497 splx(s); 498 ttyclose(tp); 499 500 return 0; 501 } 502 503 /* 504 * Read routine 505 */ 506 int 507 cyread(dev, uio, flag) 508 dev_t dev; 509 struct uio *uio; 510 int flag; 511 { 512 int card = CY_CARD(dev); 513 int port = CY_PORT(dev); 514 struct cy_softc *sc = cy_cd.cd_devs[card]; 515 struct cy_port *cy = &sc->sc_ports[port]; 516 struct tty *tp = cy->cy_tty; 517 518 #ifdef CY_DEBUG 519 printf("cy%d read port %d uio 0x%x flag 0x%x\n", 520 card, port, uio, flag); 521 #endif 522 523 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 524 } 525 526 /* 527 * Write routine 528 */ 529 int 530 cywrite(dev, uio, flag) 531 dev_t dev; 532 struct uio *uio; 533 int flag; 534 { 535 int card = CY_CARD(dev); 536 int port = CY_PORT(dev); 537 struct cy_softc *sc = cy_cd.cd_devs[card]; 538 struct cy_port *cy = &sc->sc_ports[port]; 539 struct tty *tp = cy->cy_tty; 540 541 #ifdef CY_DEBUG 542 printf("cy%d write port %d uio 0x%x flag 0x%x\n", 543 card, port, uio, flag); 544 #endif 545 546 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 547 } 548 549 /* 550 * return tty pointer 551 */ 552 struct tty * 553 cytty(dev) 554 dev_t dev; 555 { 556 int card = CY_CARD(dev); 557 int port = CY_PORT(dev); 558 struct cy_softc *sc = cy_cd.cd_devs[card]; 559 struct cy_port *cy = &sc->sc_ports[port]; 560 struct tty *tp = cy->cy_tty; 561 562 #ifdef CY_DEBUG 563 printf("cy%d tty port %d tp 0x%x\n", 564 card, port, tp); 565 #endif 566 567 return tp; 568 } 569 570 /* 571 * ioctl routine 572 */ 573 int 574 cyioctl(dev, cmd, data, flag, p) 575 dev_t dev; 576 u_long cmd; 577 caddr_t data; 578 int flag; 579 struct proc *p; 580 { 581 int card = CY_CARD(dev); 582 int port = CY_PORT(dev); 583 struct cy_softc *sc = cy_cd.cd_devs[card]; 584 struct cy_port *cy = &sc->sc_ports[port]; 585 struct tty *tp = cy->cy_tty; 586 int error; 587 588 #ifdef CY_DEBUG 589 printf("cy%d port %d ioctl cmd 0x%x data 0x%x flag 0x%x\n", 590 card, port, cmd, data, flag); 591 #endif 592 593 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 594 if(error >= 0) 595 return error; 596 597 error = ttioctl(tp, cmd, data, flag, p); 598 if(error >= 0) 599 return error; 600 601 /* XXX should not allow dropping DTR when dialin? */ 602 603 switch(cmd) { 604 case TIOCSBRK: /* start break */ 605 SET(cy->cy_flags, CYF_START_BREAK); 606 cy_enable_transmitter(cy); 607 break; 608 609 case TIOCCBRK: /* stop break */ 610 SET(cy->cy_flags, CYF_END_BREAK); 611 cy_enable_transmitter(cy); 612 break; 613 614 case TIOCSDTR: /* DTR on */ 615 cy_modem_control(cy, TIOCM_DTR, DMBIS); 616 break; 617 618 case TIOCCDTR: /* DTR off */ 619 cy_modem_control(cy, TIOCM_DTR, DMBIC); 620 break; 621 622 case TIOCMSET: /* set new modem control line values */ 623 cy_modem_control(cy, *((int *)data), DMSET); 624 break; 625 626 case TIOCMBIS: /* turn modem control bits on */ 627 cy_modem_control(cy, *((int *)data), DMBIS); 628 break; 629 630 case TIOCMBIC: /* turn modem control bits off */ 631 cy_modem_control(cy, *((int *)data), DMBIC); 632 break; 633 634 case TIOCMGET: /* get modem control/status line state */ 635 *((int *)data) = cy_modem_control(cy, 0, DMGET); 636 break; 637 638 case TIOCGFLAGS: 639 *((int *)data) = cy->cy_openflags | 640 (CY_DIALOUT(dev) ? TIOCFLAG_SOFTCAR : 0); 641 break; 642 643 case TIOCSFLAGS: 644 error = suser(p->p_ucred, &p->p_acflag); 645 if(error != 0) 646 return EPERM; 647 648 cy->cy_openflags = *((int *)data) & 649 (TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL | 650 TIOCFLAG_CRTSCTS | TIOCFLAG_MDMBUF); 651 break; 652 653 default: 654 return ENOTTY; 655 } 656 657 return 0; 658 } 659 660 /* 661 * start output 662 */ 663 void 664 cystart(tp) 665 struct tty *tp; 666 { 667 int card = CY_CARD(tp->t_dev); 668 int port = CY_PORT(tp->t_dev); 669 struct cy_softc *sc = cy_cd.cd_devs[card]; 670 struct cy_port *cy = &sc->sc_ports[port]; 671 int s; 672 673 #ifdef CY_DEBUG 674 printf("cy%d port %d start, tty 0x%x\n", card, port, tp); 675 #endif 676 677 678 s = spltty(); 679 680 #ifdef CY_DEBUG1 681 cy->cy_start_count++; 682 #endif 683 684 if(!ISSET(tp->t_state, TS_TTSTOP | TS_TIMEOUT | TS_BUSY)) { 685 if(tp->t_outq.c_cc <= tp->t_lowat) { 686 if(ISSET(tp->t_state, TS_ASLEEP)) { 687 CLR(tp->t_state, TS_ASLEEP); 688 wakeup(&tp->t_outq); 689 } 690 691 selwakeup(&tp->t_wsel); 692 693 if(tp->t_outq.c_cc == 0) 694 goto out; 695 } 696 697 SET(tp->t_state, TS_BUSY); 698 cy_enable_transmitter(cy); 699 } 700 out: 701 702 splx(s); 703 } 704 705 /* 706 * stop output 707 */ 708 int 709 cystop(tp, flag) 710 struct tty *tp; 711 int flag; 712 { 713 int card = CY_CARD(tp->t_dev); 714 int port = CY_PORT(tp->t_dev); 715 struct cy_softc *sc = cy_cd.cd_devs[card]; 716 struct cy_port *cy = &sc->sc_ports[port]; 717 int s; 718 719 #ifdef CY_DEBUG 720 printf("cy%d port %d stop tty 0x%x flag 0x%x\n", 721 card, port, tp, flag); 722 #endif 723 724 s = spltty(); 725 726 if(ISSET(tp->t_state, TS_BUSY)) { 727 if(!ISSET(tp->t_state, TS_TTSTOP)) 728 SET(tp->t_state, TS_FLUSH); 729 730 /* 731 * the transmit interrupt routine will disable transmit when it 732 * notices that CYF_STOP has been set. 733 */ 734 SET(cy->cy_flags, CYF_STOP); 735 } 736 splx(s); 737 return(0); 738 } 739 740 /* 741 * parameter setting routine. 742 * returns 0 if successfull, else returns error code 743 */ 744 int 745 cyparam(tp, t) 746 struct tty *tp; 747 struct termios *t; 748 { 749 int card = CY_CARD(tp->t_dev); 750 int port = CY_PORT(tp->t_dev); 751 struct cy_softc *sc = cy_cd.cd_devs[card]; 752 struct cy_port *cy = &sc->sc_ports[port]; 753 int ibpr, obpr, i_clk_opt, o_clk_opt; 754 int s, opt; 755 756 #ifdef CY_DEBUG 757 printf("cy%d port %d param tty 0x%x termios 0x%x\n", 758 card, port, tp, t); 759 printf("ispeed %d ospeed %d\n", t->c_ispeed, t->c_ospeed); 760 #endif 761 762 if(t->c_ospeed != 0 && cy_speed(t->c_ospeed, &o_clk_opt, &obpr, cy->cy_clock) < 0) 763 return EINVAL; 764 765 if(t->c_ispeed != 0 && cy_speed(t->c_ispeed, &i_clk_opt, &ibpr, cy->cy_clock) < 0) 766 return EINVAL; 767 768 s = spltty(); 769 770 /* hang up the line is ospeed is zero, else turn DTR on */ 771 cy_modem_control(cy, TIOCM_DTR, (t->c_ospeed == 0 ? DMBIC : DMBIS)); 772 773 /* channel was selected by the above call to cy_modem_control() */ 774 /* cd_write_reg(cy, CD1400_CAR, port & CD1400_CAR_CHAN); */ 775 776 /* set transmit speed */ 777 if(t->c_ospeed != 0) { 778 cd_write_reg(cy, CD1400_TCOR, o_clk_opt); 779 cd_write_reg(cy, CD1400_TBPR, obpr); 780 } 781 /* set receive speed */ 782 if(t->c_ispeed != 0) { 783 cd_write_reg(cy, CD1400_RCOR, i_clk_opt); 784 cd_write_reg(cy, CD1400_RBPR, ibpr); 785 } 786 787 opt = CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN 788 | (ISSET(t->c_cflag, CREAD) ? CD1400_CCR_RCVEN : CD1400_CCR_RCVDIS); 789 790 if(opt != cy->cy_channel_control) { 791 cy->cy_channel_control = opt; 792 cd1400_channel_cmd(cy, opt); 793 } 794 795 /* compute COR1 contents */ 796 opt = 0; 797 if(ISSET(t->c_cflag, PARENB)) { 798 if(ISSET(t->c_cflag, PARODD)) 799 opt |= CD1400_COR1_PARODD; 800 opt |= CD1400_COR1_PARNORMAL; 801 } 802 803 if(!ISSET(t->c_iflag, INPCK)) 804 opt |= CD1400_COR1_NOINPCK; /* no parity checking */ 805 806 if(ISSET(t->c_cflag, CSTOPB)) 807 opt |= CD1400_COR1_STOP2; 808 809 switch(t->c_cflag & CSIZE) { 810 case CS5: 811 opt |= CD1400_COR1_CS5; 812 break; 813 814 case CS6: 815 opt |= CD1400_COR1_CS6; 816 break; 817 818 case CS7: 819 opt |= CD1400_COR1_CS7; 820 break; 821 822 default: 823 opt |= CD1400_COR1_CS8; 824 break; 825 } 826 827 cd_write_reg(cy, CD1400_COR1, opt); 828 829 #ifdef CY_DEBUG 830 printf("cor1 = 0x%x...", opt); 831 #endif 832 833 /* 834 * use the CD1400 automatic CTS flow control if CRTSCTS is set 835 * 836 * CD1400_COR2_ETC is used because breaks are generated with 837 * embedded transmit commands 838 */ 839 cd_write_reg(cy, CD1400_COR2, 840 CD1400_COR2_ETC | 841 (ISSET(t->c_cflag, CRTSCTS) ? CD1400_COR2_CCTS_OFLOW : 0)); 842 843 cd_write_reg(cy, CD1400_COR3, RX_FIFO_THRESHOLD); 844 845 cd1400_channel_cmd(cy, 846 CD1400_CCR_CMDCORCHG | 847 CD1400_CCR_COR1 | CD1400_CCR_COR2 | CD1400_CCR_COR3); 848 849 cd_write_reg(cy, CD1400_COR4, CD1400_COR4_PFO_EXCEPTION); 850 cd_write_reg(cy, CD1400_COR5, 0); 851 852 /* 853 * set modem change option registers to generate interrupts 854 * on carrier detect changes. 855 * 856 * if hardware RTS handshaking is used (CY_HW_RTS, DTR and RTS lines 857 * exchanged), also set the handshaking threshold. 858 */ 859 #ifdef CY_HW_RTS 860 cd_write_reg(cy, CD1400_MCOR1, CD1400_MCOR1_CDzd | 861 (ISSET(t->c_cflag, CRTSCTS) ? RX_DTR_THRESHOLD : 0)); 862 #else 863 cd_write_reg(cy, CD1400_MCOR1, CD1400_MCOR1_CDzd); 864 #endif /* CY_HW_RTS */ 865 866 cd_write_reg(cy, CD1400_MCOR2, CD1400_MCOR2_CDod); 867 868 /* 869 * set receive timeout to approx. 2ms 870 * could use more complex logic here... 871 * (but is it actually needed or even useful?) 872 */ 873 cd_write_reg(cy, CD1400_RTPR, 2); 874 875 /* 876 * should do anything else here? 877 * XXX check MDMBUF handshaking like in com.c? 878 */ 879 880 splx(s); 881 return 0; 882 } 883 884 /* 885 * set/get modem line status 886 * 887 * bits can be: TIOCM_DTR, TIOCM_RTS, TIOCM_CTS, TIOCM_CD, TIOCM_RI, TIOCM_DSR 888 * 889 * RTS and DTR are exchanged if CY_HW_RTS is set 890 * 891 */ 892 int 893 cy_modem_control(cy, bits, howto) 894 struct cy_port *cy; 895 int bits; 896 int howto; 897 { 898 int s, msvr; 899 900 s = spltty(); 901 902 /* select channel */ 903 cd_write_reg(cy, CD1400_CAR, cy->cy_port_num & CD1400_CAR_CHAN); 904 905 /* does not manipulate RTS if it is used for flow control */ 906 switch(howto) { 907 case DMGET: 908 splx(s); 909 bits = 0; 910 if(cy->cy_channel_control & CD1400_CCR_RCVEN) 911 bits |= TIOCM_LE; 912 msvr = cd_read_reg(cy, CD1400_MSVR2); 913 #ifdef CY_HW_RTS 914 if(cd_read_reg(cy, CD1400_MSVR1) & CD1400_MSVR1_RTS) 915 bits |= TIOCM_DTR; 916 if(msvr & CD1400_MSVR2_DTR) 917 bits |= TIOCM_RTS; 918 #else 919 if(cd_read_reg(cy, CD1400_MSVR1) & CD1400_MSVR1_RTS) 920 bits |= TIOCM_RTS; 921 if(msvr & CD1400_MSVR2_DTR) 922 bits |= TIOCM_DTR; 923 #endif /* CY_HW_RTS */ 924 if(msvr & CD1400_MSVR2_CTS) 925 bits |= TIOCM_CTS; 926 if(msvr & CD1400_MSVR2_CD) 927 bits |= TIOCM_CD; 928 if(msvr & CD1400_MSVR2_DSR) /* not connected on some Cyclom cards? */ 929 bits |= TIOCM_DSR; 930 if(msvr & CD1400_MSVR2_RI) /* not connected on Cyclom-8Y cards? */ 931 bits |= TIOCM_RI; 932 splx(s); 933 return bits; 934 935 case DMSET: /* replace old values with new ones */ 936 #ifdef CY_HW_RTS 937 if(!ISSET(cy->cy_tty->t_cflag, CRTSCTS)) 938 cd_write_reg(cy, CD1400_MSVR2, 939 ((bits & TIOCM_RTS) ? CD1400_MSVR2_DTR : 0)); 940 cd_write_reg(cy, CD1400_MSVR1, 941 ((bits & TIOCM_DTR) ? CD1400_MSVR1_RTS : 0)); 942 #else 943 if(!ISSET(cy->cy_tty->t_cflag, CRTSCTS)) 944 cd_write_reg(cy, CD1400_MSVR1, 945 ((bits & TIOCM_RTS) ? CD1400_MSVR1_RTS : 0)); 946 cd_write_reg(cy, CD1400_MSVR2, 947 ((bits & TIOCM_DTR) ? CD1400_MSVR2_DTR : 0)); 948 #endif /* CY_HW_RTS */ 949 break; 950 951 case DMBIS: /* set bits */ 952 #ifdef CY_HW_RTS 953 if(!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 954 (bits & TIOCM_RTS) != 0) 955 cd_write_reg(cy, CD1400_MSVR2, CD1400_MSVR2_DTR); 956 if(bits & TIOCM_DTR) 957 cd_write_reg(cy, CD1400_MSVR1, CD1400_MSVR1_RTS); 958 #else 959 if(!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 960 (bits & TIOCM_RTS) != 0) 961 cd_write_reg(cy, CD1400_MSVR1, CD1400_MSVR1_RTS); 962 if(bits & TIOCM_DTR) 963 cd_write_reg(cy, CD1400_MSVR2, CD1400_MSVR2_DTR); 964 #endif /* CY_HW_RTS */ 965 break; 966 967 case DMBIC: /* clear bits */ 968 #ifdef CY_HW_RTS 969 if(!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 970 (bits & TIOCM_RTS)) 971 cd_write_reg(cy, CD1400_MSVR2, 0); 972 if(bits & TIOCM_DTR) 973 cd_write_reg(cy, CD1400_MSVR1, 0); 974 #else 975 if(!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 976 (bits & TIOCM_RTS)) 977 cd_write_reg(cy, CD1400_MSVR1, 0); 978 if(bits & TIOCM_DTR) 979 cd_write_reg(cy, CD1400_MSVR2, 0); 980 #endif /* CY_HW_RTS */ 981 break; 982 } 983 splx(s); 984 return 0; 985 } 986 987 /* 988 * Upper-level handler loop (called from timer interrupt?) 989 * This routine is common for multiple cards 990 */ 991 void 992 cy_poll(arg) 993 void *arg; 994 { 995 int card, port; 996 struct cy_softc *sc; 997 struct cy_port *cy; 998 struct tty *tp; 999 static int counter = 0; 1000 #ifdef CY_DEBUG1 1001 int did_something; 1002 #endif 1003 1004 int s; 1005 1006 s = splhigh(); 1007 1008 if(cy_events == 0 && ++counter < 200) { 1009 splx(s); 1010 goto out; 1011 } 1012 1013 cy_events = 0; 1014 splx(s); 1015 1016 for(card = 0; card < cy_cd.cd_ndevs; card++) { 1017 sc = cy_cd.cd_devs[card]; 1018 if(sc == NULL) 1019 continue; 1020 1021 #ifdef CY_DEBUG1 1022 sc->sc_poll_count1++; 1023 did_something = 0; 1024 #endif 1025 1026 for(port = 0; port < sc->sc_nports; port++) { 1027 cy = &sc->sc_ports[port]; 1028 if((tp = cy->cy_tty) == NULL || cy->cy_ibuf == NULL || 1029 !ISSET(tp->t_state, TS_ISOPEN | TS_WOPEN)) 1030 continue; 1031 1032 /* 1033 * handle received data 1034 */ 1035 while(cy->cy_ibuf_rd_ptr != cy->cy_ibuf_wr_ptr) { 1036 u_char line_stat; 1037 int chr; 1038 1039 line_stat = cy->cy_ibuf_rd_ptr[0]; 1040 chr = cy->cy_ibuf_rd_ptr[1]; 1041 1042 if(line_stat & (CD1400_RDSR_BREAK|CD1400_RDSR_FE)) 1043 chr |= TTY_FE; 1044 if(line_stat & CD1400_RDSR_PE) 1045 chr |= TTY_PE; 1046 1047 /* 1048 * on an overrun error the data is treated as good 1049 * just as it should be. 1050 */ 1051 1052 #ifdef CY_DEBUG 1053 printf("cy%d port %d ttyinput 0x%x\n", 1054 card, port, chr); 1055 #endif 1056 1057 (*linesw[tp->t_line].l_rint)(chr, tp); 1058 1059 s = splhigh(); /* really necessary? */ 1060 if((cy->cy_ibuf_rd_ptr += 2) == cy->cy_ibuf_end) 1061 cy->cy_ibuf_rd_ptr = cy->cy_ibuf; 1062 splx(s); 1063 1064 #ifdef CY_DEBUG1 1065 did_something = 1; 1066 #endif 1067 } 1068 1069 #ifndef CY_HW_RTS 1070 /* If we don't have any received data in ibuf and 1071 * CRTSCTS is on and RTS is turned off, it is time 1072 * to turn RTS back on 1073 */ 1074 if(ISSET(tp->t_cflag, CRTSCTS)) { 1075 /* we can't use cy_modem_control() here as it doesn't 1076 change RTS if RTSCTS is on */ 1077 cd_write_reg(cy, CD1400_CAR, port & CD1400_CAR_CHAN); 1078 1079 if((cd_read_reg(cy, CD1400_MSVR1) & CD1400_MSVR1_RTS) == 0) { 1080 cd_write_reg(cy, CD1400_MSVR1, CD1400_MSVR1_RTS); 1081 #ifdef CY_DEBUG1 1082 did_something = 1; 1083 #endif 1084 } 1085 } 1086 #endif /* CY_HW_RTS */ 1087 1088 /* 1089 * handle carrier changes 1090 */ 1091 s = splhigh(); 1092 if(ISSET(cy->cy_flags, CYF_CARRIER_CHANGED)) { 1093 int carrier; 1094 1095 CLR(cy->cy_flags, CYF_CARRIER_CHANGED); 1096 splx(s); 1097 1098 carrier = ((cy->cy_carrier_stat & CD1400_MSVR2_CD) != 0); 1099 1100 #ifdef CY_DEBUG 1101 printf("cy_poll: carrier change " 1102 "(card %d, port %d, carrier %d)\n", 1103 card, port, carrier); 1104 #endif 1105 if(CY_DIALIN(tp->t_dev) && 1106 !(*linesw[tp->t_line].l_modem)(tp, carrier)) 1107 cy_modem_control(cy, TIOCM_DTR, DMBIC); 1108 1109 #ifdef CY_DEBUG1 1110 did_something = 1; 1111 #endif 1112 } else { 1113 splx(s); 1114 } 1115 1116 s = splhigh(); 1117 if(ISSET(cy->cy_flags, CYF_START)) { 1118 CLR(cy->cy_flags, CYF_START); 1119 splx(s); 1120 1121 (*linesw[tp->t_line].l_start)(tp); 1122 1123 #ifdef CY_DEBUG1 1124 did_something = 1; 1125 #endif 1126 } else { 1127 splx(s); 1128 } 1129 1130 /* could move this to even upper level... */ 1131 if(cy->cy_fifo_overruns) { 1132 cy->cy_fifo_overruns = 0; 1133 /* doesn't report overrun count, 1134 but shouldn't really matter */ 1135 log(LOG_WARNING, "cy%d port %d fifo overrun\n", 1136 card, port); 1137 } 1138 if(cy->cy_ibuf_overruns) { 1139 cy->cy_ibuf_overruns = 0; 1140 log(LOG_WARNING, "cy%d port %d ibuf overrun\n", 1141 card, port); 1142 } 1143 } /* for(port...) */ 1144 #ifdef CY_DEBUG1 1145 if(did_something && counter >= 200) 1146 sc->sc_poll_count2++; 1147 #endif 1148 } /* for(card...) */ 1149 1150 counter = 0; 1151 1152 out: 1153 timeout(cy_poll, NULL, 1); 1154 } 1155 1156 /* 1157 * hardware interrupt routine 1158 */ 1159 int 1160 cyintr(arg) 1161 void *arg; 1162 { 1163 struct cy_softc *sc = arg; 1164 struct cy_port *cy; 1165 int card = sc->sc_dev.dv_unit; 1166 int cy_chip, stat; 1167 int int_serviced = 0; 1168 1169 /* 1170 * Check interrupt status of each CD1400 chip on this card 1171 * (multiple cards cannot share the same interrupt) 1172 */ 1173 for(cy_chip = 0; cy_chip < cy_nr_cd1400s[card]; cy_chip++) { 1174 1175 stat = cd_read_reg_sc(sc, cy_chip, CD1400_SVRR); 1176 if(stat == 0) 1177 continue; 1178 1179 if(ISSET(stat, CD1400_SVRR_RXRDY)) { 1180 u_char save_car, save_rir, serv_type; 1181 u_char line_stat, recv_data, n_chars; 1182 u_char *buf_p; 1183 1184 save_rir = cd_read_reg_sc(sc, cy_chip, CD1400_RIR); 1185 save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR); 1186 /* enter rx service */ 1187 cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_rir); 1188 1189 serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_RIVR); 1190 cy = &sc->sc_ports[serv_type >> 3]; 1191 1192 #ifdef CY_DEBUG1 1193 cy->cy_rx_int_count++; 1194 #endif 1195 1196 if(cy->cy_tty == NULL || 1197 !ISSET(cy->cy_tty->t_state, TS_ISOPEN)) 1198 goto end_rx_serv; 1199 1200 buf_p = cy->cy_ibuf_wr_ptr; 1201 1202 if(ISSET(serv_type, CD1400_RIVR_EXCEPTION)) { 1203 line_stat = cd_read_reg(cy, CD1400_RDSR); 1204 recv_data = cd_read_reg(cy, CD1400_RDSR); 1205 1206 #ifdef CY_DEBUG 1207 printf("cy%d port %d recv exception, " 1208 "line_stat 0x%x, char 0x%x\n", 1209 card, cy->cy_port_num, line_stat, recv_data); 1210 #endif 1211 if(ISSET(line_stat, CD1400_RDSR_OE)) 1212 cy->cy_fifo_overruns++; 1213 1214 *buf_p++ = line_stat; 1215 *buf_p++ = recv_data; 1216 if(buf_p == cy->cy_ibuf_end) 1217 buf_p = cy->cy_ibuf; 1218 1219 if(buf_p == cy->cy_ibuf_rd_ptr) { 1220 if(buf_p == cy->cy_ibuf) 1221 buf_p = cy->cy_ibuf_end; 1222 buf_p -= 2; 1223 cy->cy_ibuf_overruns++; 1224 } 1225 cy_events = 1; 1226 } else { /* no exception, received data OK */ 1227 n_chars = cd_read_reg(cy, CD1400_RDCR); 1228 #ifdef CY_DEBUG 1229 printf("cy%d port %d receive ok %d chars\n", 1230 card, cy->cy_port_num, n_chars); 1231 #endif 1232 while(n_chars--) { 1233 *buf_p++ = 0; /* status: OK */ 1234 *buf_p++ = 1235 cd_read_reg(cy, CD1400_RDSR); /* data byte */ 1236 if(buf_p == cy->cy_ibuf_end) 1237 buf_p = cy->cy_ibuf; 1238 if(buf_p == cy->cy_ibuf_rd_ptr) { 1239 if(buf_p == cy->cy_ibuf) 1240 buf_p = cy->cy_ibuf_end; 1241 buf_p -= 2; 1242 cy->cy_ibuf_overruns++; 1243 break; 1244 } 1245 } 1246 cy_events = 1; 1247 } 1248 1249 cy->cy_ibuf_wr_ptr = buf_p; 1250 1251 #ifndef CY_HW_RTS 1252 /* RTS handshaking for incoming data */ 1253 if(ISSET(cy->cy_tty->t_cflag, CRTSCTS)) { 1254 int bf; 1255 1256 bf = buf_p - cy->cy_ibuf_rd_ptr; 1257 if(bf < 0) 1258 bf += IBUF_SIZE; 1259 1260 if(bf > (IBUF_SIZE/2)) /* turn RTS off */ 1261 cd_write_reg(cy, CD1400_MSVR1, 0); 1262 } 1263 #endif /* CY_HW_RTS */ 1264 1265 end_rx_serv: 1266 /* terminate service context */ 1267 cd_write_reg(cy, CD1400_RIR, save_rir & 0x3f); 1268 cd_write_reg(cy, CD1400_CAR, save_car); 1269 int_serviced = 1; 1270 } /* if(rx_service...) */ 1271 1272 if(ISSET(stat, CD1400_SVRR_MDMCH)) { 1273 u_char save_car, save_mir, serv_type, modem_stat; 1274 1275 save_mir = cd_read_reg_sc(sc, cy_chip, CD1400_MIR); 1276 save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR); 1277 /* enter modem service */ 1278 cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_mir); 1279 1280 serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_MIVR); 1281 cy = &sc->sc_ports[serv_type >> 3]; 1282 1283 #ifdef CY_DEBUG1 1284 cy->cy_modem_int_count++; 1285 #endif 1286 1287 modem_stat = cd_read_reg(cy, CD1400_MSVR2); 1288 1289 #ifdef CY_DEBUG 1290 printf("cy%d port %d modem line change, new stat 0x%x\n", 1291 card, cy->cy_port_num, modem_stat); 1292 #endif 1293 if(ISSET((cy->cy_carrier_stat ^ modem_stat), CD1400_MSVR2_CD)) { 1294 SET(cy->cy_flags, CYF_CARRIER_CHANGED); 1295 cy_events = 1; 1296 } 1297 1298 cy->cy_carrier_stat = modem_stat; 1299 1300 /* terminate service context */ 1301 cd_write_reg(cy, CD1400_MIR, save_mir & 0x3f); 1302 cd_write_reg(cy, CD1400_CAR, save_car); 1303 int_serviced = 1; 1304 } /* if(modem_service...) */ 1305 1306 if(ISSET(stat, CD1400_SVRR_TXRDY)) { 1307 u_char save_car, save_tir, serv_type, count, ch; 1308 struct tty *tp; 1309 1310 save_tir = cd_read_reg_sc(sc, cy_chip, CD1400_TIR); 1311 save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR); 1312 /* enter tx service */ 1313 cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_tir); 1314 1315 serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_TIVR); 1316 cy = &sc->sc_ports[serv_type >> 3]; 1317 1318 #ifdef CY_DEBUG1 1319 cy->cy_tx_int_count++; 1320 #endif 1321 #ifdef CY_DEBUG 1322 printf("cy%d port %d tx service\n", card, cy->cy_port_num); 1323 #endif 1324 1325 /* stop transmitting if no tty or CYF_STOP set */ 1326 tp = cy->cy_tty; 1327 if(tp == NULL || ISSET(cy->cy_flags, CYF_STOP)) 1328 goto txdone; 1329 1330 count = 0; 1331 if(ISSET(cy->cy_flags, CYF_SEND_NUL)) { 1332 cd_write_reg(cy, CD1400_TDR, 0); 1333 cd_write_reg(cy, CD1400_TDR, 0); 1334 count += 2; 1335 CLR(cy->cy_flags, CYF_SEND_NUL); 1336 } 1337 1338 if(tp->t_outq.c_cc > 0) { 1339 SET(tp->t_state, TS_BUSY); 1340 while(tp->t_outq.c_cc > 0 && count < CD1400_TX_FIFO_SIZE) { 1341 ch = getc(&tp->t_outq); 1342 /* remember to double NUL characters because 1343 embedded transmit commands are enabled */ 1344 if(ch == 0) { 1345 if(count >= CD1400_TX_FIFO_SIZE-2) { 1346 SET(cy->cy_flags, CYF_SEND_NUL); 1347 break; 1348 } 1349 1350 cd_write_reg(cy, CD1400_TDR, ch); 1351 count++; 1352 } 1353 1354 cd_write_reg(cy, CD1400_TDR, ch); 1355 count++; 1356 } 1357 } else { 1358 /* no data to send -- check if we should start/stop a break */ 1359 /* XXX does this cause too much delay before breaks? */ 1360 if(ISSET(cy->cy_flags, CYF_START_BREAK)) { 1361 cd_write_reg(cy, CD1400_TDR, 0); 1362 cd_write_reg(cy, CD1400_TDR, 0x81); 1363 CLR(cy->cy_flags, CYF_START_BREAK); 1364 } 1365 if(ISSET(cy->cy_flags, CYF_END_BREAK)) { 1366 cd_write_reg(cy, CD1400_TDR, 0); 1367 cd_write_reg(cy, CD1400_TDR, 0x83); 1368 CLR(cy->cy_flags, CYF_END_BREAK); 1369 } 1370 } 1371 1372 if(tp->t_outq.c_cc == 0) { 1373 txdone: 1374 /* 1375 * No data to send or requested to stop. 1376 * Disable transmit interrupt 1377 */ 1378 cd_write_reg(cy, CD1400_SRER, 1379 cd_read_reg(cy, CD1400_SRER) 1380 & ~CD1400_SRER_TXRDY); 1381 CLR(cy->cy_flags, CYF_STOP); 1382 CLR(tp->t_state, TS_BUSY); 1383 } 1384 1385 if(tp->t_outq.c_cc <= tp->t_lowat) { 1386 SET(cy->cy_flags, CYF_START); 1387 cy_events = 1; 1388 } 1389 1390 /* terminate service context */ 1391 cd_write_reg(cy, CD1400_TIR, save_tir & 0x3f); 1392 cd_write_reg(cy, CD1400_CAR, save_car); 1393 int_serviced = 1; 1394 } /* if(tx_service...) */ 1395 } /* for(...all CD1400s on a card) */ 1396 1397 /* ensure an edge for next interrupt */ 1398 bus_space_write_1(sc->sc_memt, sc->sc_memh, 1399 CY_CLEAR_INTR<<sc->sc_bustype, 0); 1400 return int_serviced; 1401 } 1402 1403 /* 1404 * subroutine to enable CD1400 transmitter 1405 */ 1406 void 1407 cy_enable_transmitter(cy) 1408 struct cy_port *cy; 1409 { 1410 int s; 1411 s = splhigh(); 1412 cd_write_reg(cy, CD1400_CAR, cy->cy_port_num & CD1400_CAR_CHAN); 1413 cd_write_reg(cy, CD1400_SRER, cd_read_reg(cy, CD1400_SRER) 1414 | CD1400_SRER_TXRDY); 1415 splx(s); 1416 } 1417 1418 /* 1419 * Execute a CD1400 channel command 1420 */ 1421 void 1422 cd1400_channel_cmd(cy, cmd) 1423 struct cy_port *cy; 1424 int cmd; 1425 { 1426 u_int waitcnt = 5 * 8 * 1024; /* approx 5 ms */ 1427 1428 #ifdef CY_DEBUG 1429 printf("c1400_channel_cmd cy 0x%x command 0x%x\n", cy, cmd); 1430 #endif 1431 1432 /* wait until cd1400 is ready to process a new command */ 1433 while(cd_read_reg(cy, CD1400_CCR) != 0 && waitcnt-- > 0) 1434 ; 1435 1436 if(waitcnt == 0) 1437 log(LOG_ERR, "cy: channel command timeout\n"); 1438 1439 cd_write_reg(cy, CD1400_CCR, cmd); 1440 } 1441 1442 /* 1443 * Compute clock option register and baud rate register values 1444 * for a given speed. Return 0 on success, -1 on failure. 1445 * 1446 * The error between requested and actual speed seems 1447 * to be well within allowed limits (less than 3%) 1448 * with every speed value between 50 and 150000 bps. 1449 */ 1450 int 1451 cy_speed(speed_t speed, int *cor, int *bpr, int cy_clock) 1452 { 1453 int c, co, br; 1454 1455 if(speed < 50 || speed > 150000) 1456 return -1; 1457 1458 for(c = 0, co = 8; co <= 2048; co <<= 2, c++) { 1459 br = (cy_clock + (co * speed) / 2) / (co * speed); 1460 if(br < 0x100) { 1461 *bpr = br; 1462 *cor = c; 1463 return 0; 1464 } 1465 } 1466 1467 return -1; 1468 } 1469 1470 #endif /* NCY > 0 */ 1471