1 /* $OpenBSD: cy.c,v 1.39 2019/07/19 00:17:15 cheloha Exp $ */ 2 /* 3 * Copyright (c) 1996 Timo Rossi. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. Neither the name of the author nor the names of contributors 15 * may be used to endorse or promote products derived from this software 16 * without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /* 32 * cy.c 33 * 34 * Driver for Cyclades Cyclom-8/16/32 multiport serial cards 35 * (currently not tested with Cyclom-32 cards) 36 * 37 * Timo Rossi, 1996 38 * 39 * Supports both ISA and PCI Cyclom cards 40 * 41 * Uses CD1400 automatic CTS flow control, and 42 * if CY_HW_RTS is defined, uses CD1400 automatic input flow control. 43 * This requires a special cable that exchanges the RTS and DTR lines. 44 * 45 * Lots of debug output can be enabled by defining CY_DEBUG 46 * Some debugging counters (number of receive/transmit interrupts etc.) 47 * can be enabled by defining CY_DEBUG1 48 * 49 * This version uses the bus_space/io_??() stuff 50 * 51 */ 52 53 #include <sys/param.h> 54 #include <sys/ioctl.h> 55 #include <sys/syslog.h> 56 #include <sys/fcntl.h> 57 #include <sys/tty.h> 58 #include <sys/conf.h> 59 #include <sys/selinfo.h> 60 #include <sys/device.h> 61 #include <sys/malloc.h> 62 #include <sys/systm.h> 63 64 #include <machine/bus.h> 65 #include <machine/intr.h> 66 67 #include <dev/ic/cd1400reg.h> 68 #include <dev/ic/cyreg.h> 69 70 71 int cy_intr(void *); 72 int cyparam(struct tty *, struct termios *); 73 void cystart(struct tty *); 74 void cy_poll(void *); 75 int cy_modem_control(struct cy_port *, int, int); 76 void cy_enable_transmitter(struct cy_port *); 77 void cd1400_channel_cmd(struct cy_port *, int); 78 int cy_speed(speed_t, int *, int *, int); 79 80 struct cfdriver cy_cd = { 81 NULL, "cy", DV_TTY 82 }; 83 84 /* 85 * Common probe routine 86 * 87 * returns the number of chips found. 88 */ 89 int 90 cy_probe_common(bus_space_tag_t memt, bus_space_handle_t memh, int bustype) 91 { 92 int cy_chip, chip_offs; 93 u_char firmware_ver; 94 int nchips; 95 96 /* Cyclom card hardware reset */ 97 bus_space_write_1(memt, memh, CY16_RESET<<bustype, 0); 98 DELAY(500); /* wait for reset to complete */ 99 bus_space_write_1(memt, memh, CY_CLEAR_INTR<<bustype, 0); 100 101 #ifdef CY_DEBUG 102 printf("cy: card reset done\n"); 103 #endif 104 105 nchips = 0; 106 107 for (cy_chip = 0, chip_offs = 0; 108 cy_chip < CY_MAX_CD1400s; 109 cy_chip++, chip_offs += (CY_CD1400_MEMSPACING << bustype)) { 110 int i; 111 112 /* the last 4 cd1400s are 'interleaved' 113 with the first 4 on 32-port boards */ 114 if (cy_chip == 4) 115 chip_offs -= (CY32_ADDR_FIX << bustype); 116 117 #ifdef CY_DEBUG 118 printf("cy: probe chip %d offset 0x%x ... ", 119 cy_chip, chip_offs); 120 #endif 121 122 /* wait until the chip is ready for command */ 123 DELAY(1000); 124 if (bus_space_read_1(memt, memh, chip_offs + 125 ((CD1400_CCR << 1) << bustype)) != 0) { 126 #ifdef CY_DEBUG 127 printf("not ready for command\n"); 128 #endif 129 break; 130 } 131 132 /* clear the firmware version reg. */ 133 bus_space_write_1(memt, memh, chip_offs + 134 ((CD1400_GFRCR << 1) << bustype), 0); 135 136 /* 137 * On Cyclom-16 references to non-existent chip 4 138 * actually access chip 0 (address line 9 not decoded). 139 * Here we check if the clearing of chip 4 GFRCR actually 140 * cleared chip 0 GFRCR. In that case we have a 16 port card. 141 */ 142 if (cy_chip == 4 && 143 bus_space_read_1(memt, memh, chip_offs + 144 ((CD1400_GFRCR << 1) << bustype)) == 0) 145 break; 146 147 /* reset the chip */ 148 bus_space_write_1(memt, memh, chip_offs + 149 ((CD1400_CCR << 1) << bustype), 150 CD1400_CCR_CMDRESET | CD1400_CCR_FULLRESET); 151 152 /* wait for the chip to initialize itself */ 153 for (i = 0; i < 200; i++) { 154 DELAY(50); 155 firmware_ver = bus_space_read_1(memt, memh, chip_offs + 156 ((CD1400_GFRCR << 1) << bustype)); 157 if ((firmware_ver & 0xf0) == 0x40) /* found a CD1400 */ 158 break; 159 } 160 #ifdef CY_DEBUG 161 printf("firmware version 0x%x\n", firmware_ver); 162 #endif 163 164 if ((firmware_ver & 0xf0) != 0x40) 165 break; 166 167 /* firmware version OK, CD1400 found */ 168 nchips++; 169 } 170 171 if (nchips == 0) { 172 #ifdef CY_DEBUG 173 printf("no CD1400s found\n"); 174 #endif 175 return (0); 176 } 177 178 #ifdef CY_DEBUG 179 printf("found %d CD1400s\n", nchips); 180 #endif 181 182 return (nchips); 183 } 184 185 void 186 cy_attach(parent, self) 187 struct device *parent, *self; 188 { 189 int card, port, cy_chip, num_chips, cdu, chip_offs, cy_clock; 190 struct cy_softc *sc = (void *)self; 191 192 card = sc->sc_dev.dv_unit; 193 num_chips = sc->sc_nr_cd1400s; 194 if (num_chips == 0) 195 return; 196 197 timeout_set(&sc->sc_poll_to, cy_poll, sc); 198 bzero(sc->sc_ports, sizeof(sc->sc_ports)); 199 sc->sc_nports = num_chips * CD1400_NO_OF_CHANNELS; 200 201 port = 0; 202 for (cy_chip = 0, chip_offs = 0; 203 cy_chip < num_chips; 204 cy_chip++, chip_offs += (CY_CD1400_MEMSPACING<<sc->sc_bustype)) { 205 if (cy_chip == 4) 206 chip_offs -= (CY32_ADDR_FIX<<sc->sc_bustype); 207 208 #ifdef CY_DEBUG 209 printf("attach CD1400 #%d offset 0x%x\n", cy_chip, chip_offs); 210 #endif 211 sc->sc_cd1400_offs[cy_chip] = chip_offs; 212 213 /* configure port 0 as serial port 214 (should already be after reset) */ 215 cd_write_reg_sc(sc, cy_chip, CD1400_GCR, 0); 216 217 /* Set cy_clock depending on firmware version */ 218 if (cd_read_reg_sc(sc, cy_chip, CD1400_GFRCR) <= 0x46) 219 cy_clock = CY_CLOCK; 220 else 221 cy_clock = CY_CLOCK_60; 222 223 /* set up a receive timeout period (1ms) */ 224 cd_write_reg_sc(sc, cy_chip, CD1400_PPR, 225 (cy_clock / CD1400_PPR_PRESCALER / 1000) + 1); 226 227 for (cdu = 0; cdu < CD1400_NO_OF_CHANNELS; cdu++) { 228 sc->sc_ports[port].cy_port_num = port; 229 sc->sc_ports[port].cy_memt = sc->sc_memt; 230 sc->sc_ports[port].cy_memh = sc->sc_memh; 231 sc->sc_ports[port].cy_chip_offs = chip_offs; 232 sc->sc_ports[port].cy_bustype = sc->sc_bustype; 233 sc->sc_ports[port].cy_clock = cy_clock; 234 235 /* should we initialize anything else here? */ 236 port++; 237 } /* for(each port on one CD1400...) */ 238 239 } /* for(each CD1400 on a card... ) */ 240 241 printf(": %d ports\n", port); 242 243 /* ensure an edge for the next interrupt */ 244 bus_space_write_1(sc->sc_memt, sc->sc_memh, 245 CY_CLEAR_INTR<<sc->sc_bustype, 0); 246 } 247 248 /* 249 * open routine. returns zero if successful, else error code 250 */ 251 int cyopen(dev_t, int, int, struct proc *); 252 int cyclose(dev_t, int, int, struct proc *); 253 int cyread(dev_t, struct uio *, int); 254 int cywrite(dev_t, struct uio *, int); 255 struct tty *cytty(dev_t); 256 int cyioctl(dev_t, u_long, caddr_t, int, struct proc *); 257 int cystop(struct tty *, int flag); 258 259 int 260 cyopen(dev, flag, mode, p) 261 dev_t dev; 262 int flag, mode; 263 struct proc *p; 264 { 265 int card = CY_CARD(dev); 266 int port = CY_PORT(dev); 267 struct cy_softc *sc; 268 struct cy_port *cy; 269 struct tty *tp; 270 int s, error; 271 272 if (card >= cy_cd.cd_ndevs || 273 (sc = cy_cd.cd_devs[card]) == NULL) { 274 return (ENXIO); 275 } 276 277 #ifdef CY_DEBUG 278 printf("%s open port %d flag 0x%x mode 0x%x\n", sc->sc_dev.dv_xname, 279 port, flag, mode); 280 #endif 281 282 cy = &sc->sc_ports[port]; 283 284 s = spltty(); 285 if (cy->cy_tty == NULL) { 286 cy->cy_tty = ttymalloc(0); 287 } 288 splx(s); 289 290 tp = cy->cy_tty; 291 tp->t_oproc = cystart; 292 tp->t_param = cyparam; 293 tp->t_dev = dev; 294 295 if (!ISSET(tp->t_state, TS_ISOPEN)) { 296 SET(tp->t_state, TS_WOPEN); 297 ttychars(tp); 298 tp->t_iflag = TTYDEF_IFLAG; 299 tp->t_oflag = TTYDEF_OFLAG; 300 tp->t_cflag = TTYDEF_CFLAG; 301 if (ISSET(cy->cy_openflags, TIOCFLAG_CLOCAL)) 302 SET(tp->t_cflag, CLOCAL); 303 if (ISSET(cy->cy_openflags, TIOCFLAG_CRTSCTS)) 304 SET(tp->t_cflag, CRTSCTS); 305 if (ISSET(cy->cy_openflags, TIOCFLAG_MDMBUF)) 306 SET(tp->t_cflag, MDMBUF); 307 tp->t_lflag = TTYDEF_LFLAG; 308 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED; 309 310 s = spltty(); 311 312 /* 313 * Allocate input ring buffer if we don't already have one 314 */ 315 if (cy->cy_ibuf == NULL) { 316 cy->cy_ibuf = malloc(IBUF_SIZE, M_DEVBUF, M_NOWAIT); 317 if (cy->cy_ibuf == NULL) { 318 printf("%s: (port %d) can't allocate input buffer\n", 319 sc->sc_dev.dv_xname, port); 320 splx(s); 321 return (ENOMEM); 322 } 323 cy->cy_ibuf_end = cy->cy_ibuf + IBUF_SIZE; 324 } 325 326 /* mark the ring buffer as empty */ 327 cy->cy_ibuf_rd_ptr = cy->cy_ibuf_wr_ptr = cy->cy_ibuf; 328 329 /* select CD1400 channel */ 330 cd_write_reg(cy, CD1400_CAR, port & CD1400_CAR_CHAN); 331 /* reset the channel */ 332 cd1400_channel_cmd(cy, CD1400_CCR_CMDRESET); 333 /* encode unit (port) number in LIVR */ 334 /* there is just enough space for 5 bits (32 ports) */ 335 cd_write_reg(cy, CD1400_LIVR, port << 3); 336 337 cy->cy_channel_control = 0; 338 339 if (!timeout_pending(&sc->sc_poll_to)) 340 timeout_add(&sc->sc_poll_to, 1); 341 342 /* this sets parameters and raises DTR */ 343 cyparam(tp, &tp->t_termios); 344 345 ttsetwater(tp); 346 347 /* raise RTS too */ 348 cy_modem_control(cy, TIOCM_RTS, DMBIS); 349 350 cy->cy_carrier_stat = cd_read_reg(cy, CD1400_MSVR2); 351 352 /* enable receiver and modem change interrupts */ 353 cd_write_reg(cy, CD1400_SRER, 354 CD1400_SRER_MDMCH | CD1400_SRER_RXDATA); 355 356 if (CY_DIALOUT(dev) || 357 ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR) || 358 ISSET(tp->t_cflag, MDMBUF) || 359 ISSET(cy->cy_carrier_stat, CD1400_MSVR2_CD)) 360 SET(tp->t_state, TS_CARR_ON); 361 else 362 CLR(tp->t_state, TS_CARR_ON); 363 } else if (ISSET(tp->t_state, TS_XCLUDE) && suser(p) != 0) { 364 return (EBUSY); 365 } else { 366 s = spltty(); 367 } 368 369 /* wait for carrier if necessary */ 370 if (!ISSET(flag, O_NONBLOCK)) { 371 while (!ISSET(tp->t_cflag, CLOCAL) && 372 !ISSET(tp->t_state, TS_CARR_ON)) { 373 SET(tp->t_state, TS_WOPEN); 374 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 375 "cydcd"); 376 if (error != 0) { 377 splx(s); 378 CLR(tp->t_state, TS_WOPEN); 379 return (error); 380 } 381 } 382 } 383 384 splx(s); 385 386 return (*linesw[tp->t_line].l_open)(dev, tp, p); 387 } 388 389 /* 390 * close routine. returns zero if successful, else error code 391 */ 392 int 393 cyclose(dev, flag, mode, p) 394 dev_t dev; 395 int flag, mode; 396 struct proc *p; 397 { 398 int card = CY_CARD(dev); 399 int port = CY_PORT(dev); 400 struct cy_softc *sc = cy_cd.cd_devs[card]; 401 struct cy_port *cy = &sc->sc_ports[port]; 402 struct tty *tp = cy->cy_tty; 403 int s; 404 405 #ifdef CY_DEBUG 406 printf("%s close port %d, flag 0x%x, mode 0x%x\n", sc->sc_dev.dv_xname, 407 port, flag, mode); 408 #endif 409 410 (*linesw[tp->t_line].l_close)(tp, flag, p); 411 s = spltty(); 412 413 if (ISSET(tp->t_cflag, HUPCL) && 414 !ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR)) { 415 /* drop DTR and RTS 416 (should we wait for output buffer to become empty first?) */ 417 cy_modem_control(cy, 0, DMSET); 418 } 419 420 /* 421 * XXX should we disable modem change and 422 * receive interrupts here or somewhere ? 423 */ 424 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 425 426 splx(s); 427 ttyclose(tp); 428 429 return (0); 430 } 431 432 /* 433 * Read routine 434 */ 435 int 436 cyread(dev, uio, flag) 437 dev_t dev; 438 struct uio *uio; 439 int flag; 440 { 441 int card = CY_CARD(dev); 442 int port = CY_PORT(dev); 443 struct cy_softc *sc = cy_cd.cd_devs[card]; 444 struct cy_port *cy = &sc->sc_ports[port]; 445 struct tty *tp = cy->cy_tty; 446 447 #ifdef CY_DEBUG 448 printf("%s read port %d uio %p flag 0x%x\n", sc->sc_dev.dv_xname, 449 port, uio, flag); 450 #endif 451 452 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 453 } 454 455 /* 456 * Write routine 457 */ 458 int 459 cywrite(dev, uio, flag) 460 dev_t dev; 461 struct uio *uio; 462 int flag; 463 { 464 int card = CY_CARD(dev); 465 int port = CY_PORT(dev); 466 struct cy_softc *sc = cy_cd.cd_devs[card]; 467 struct cy_port *cy = &sc->sc_ports[port]; 468 struct tty *tp = cy->cy_tty; 469 470 #ifdef CY_DEBUG 471 printf("%s write port %d uio %p flag 0x%x\n", sc->sc_dev.dv_xname, 472 port, uio, flag); 473 #endif 474 475 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 476 } 477 478 /* 479 * return tty pointer 480 */ 481 struct tty * 482 cytty(dev) 483 dev_t dev; 484 { 485 int card = CY_CARD(dev); 486 int port = CY_PORT(dev); 487 struct cy_softc *sc = cy_cd.cd_devs[card]; 488 struct cy_port *cy = &sc->sc_ports[port]; 489 struct tty *tp = cy->cy_tty; 490 491 return (tp); 492 } 493 494 /* 495 * ioctl routine 496 */ 497 int 498 cyioctl(dev, cmd, data, flag, p) 499 dev_t dev; 500 u_long cmd; 501 caddr_t data; 502 int flag; 503 struct proc *p; 504 { 505 int card = CY_CARD(dev); 506 int port = CY_PORT(dev); 507 struct cy_softc *sc = cy_cd.cd_devs[card]; 508 struct cy_port *cy = &sc->sc_ports[port]; 509 struct tty *tp = cy->cy_tty; 510 int error; 511 512 #ifdef CY_DEBUG 513 printf("%s port %d ioctl cmd 0x%lx data %p flag 0x%x\n", 514 sc->sc_dev.dv_xname, port, cmd, data, flag); 515 #endif 516 517 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 518 if (error >= 0) 519 return (error); 520 521 error = ttioctl(tp, cmd, data, flag, p); 522 if (error >= 0) 523 return (error); 524 525 /* XXX should not allow dropping DTR when dialin? */ 526 527 switch (cmd) { 528 case TIOCSBRK: /* start break */ 529 SET(cy->cy_flags, CYF_START_BREAK); 530 cy_enable_transmitter(cy); 531 break; 532 533 case TIOCCBRK: /* stop break */ 534 SET(cy->cy_flags, CYF_END_BREAK); 535 cy_enable_transmitter(cy); 536 break; 537 538 case TIOCSDTR: /* DTR on */ 539 cy_modem_control(cy, TIOCM_DTR, DMBIS); 540 break; 541 542 case TIOCCDTR: /* DTR off */ 543 cy_modem_control(cy, TIOCM_DTR, DMBIC); 544 break; 545 546 case TIOCMSET: /* set new modem control line values */ 547 cy_modem_control(cy, *((int *)data), DMSET); 548 break; 549 550 case TIOCMBIS: /* turn modem control bits on */ 551 cy_modem_control(cy, *((int *)data), DMBIS); 552 break; 553 554 case TIOCMBIC: /* turn modem control bits off */ 555 cy_modem_control(cy, *((int *)data), DMBIC); 556 break; 557 558 case TIOCMGET: /* get modem control/status line state */ 559 *((int *)data) = cy_modem_control(cy, 0, DMGET); 560 break; 561 562 case TIOCGFLAGS: 563 *((int *)data) = cy->cy_openflags | 564 (CY_DIALOUT(dev) ? TIOCFLAG_SOFTCAR : 0); 565 break; 566 567 case TIOCSFLAGS: 568 error = suser(p); 569 if (error != 0) 570 return (EPERM); 571 572 cy->cy_openflags = *((int *)data) & 573 (TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL | 574 TIOCFLAG_CRTSCTS | TIOCFLAG_MDMBUF); 575 break; 576 577 default: 578 return (ENOTTY); 579 } 580 581 return (0); 582 } 583 584 /* 585 * start output 586 */ 587 void 588 cystart(tp) 589 struct tty *tp; 590 { 591 int card = CY_CARD(tp->t_dev); 592 int port = CY_PORT(tp->t_dev); 593 struct cy_softc *sc = cy_cd.cd_devs[card]; 594 struct cy_port *cy = &sc->sc_ports[port]; 595 int s; 596 597 #ifdef CY_DEBUG 598 printf("%s port %d start, tty %p\n", sc->sc_dev.dv_xname, port, tp); 599 #endif 600 601 s = spltty(); 602 603 #ifdef CY_DEBUG1 604 cy->cy_start_count++; 605 #endif 606 607 if (!ISSET(tp->t_state, TS_TTSTOP | TS_TIMEOUT | TS_BUSY)) { 608 ttwakeupwr(tp); 609 if (tp->t_outq.c_cc == 0) 610 goto out; 611 612 SET(tp->t_state, TS_BUSY); 613 cy_enable_transmitter(cy); 614 } 615 out: 616 617 splx(s); 618 } 619 620 /* 621 * stop output 622 */ 623 int 624 cystop(tp, flag) 625 struct tty *tp; 626 int flag; 627 { 628 int card = CY_CARD(tp->t_dev); 629 int port = CY_PORT(tp->t_dev); 630 struct cy_softc *sc = cy_cd.cd_devs[card]; 631 struct cy_port *cy = &sc->sc_ports[port]; 632 int s; 633 634 #ifdef CY_DEBUG 635 printf("%s port %d stop tty %p flag 0x%x\n", sc->sc_dev.dv_xname, 636 port, tp, flag); 637 #endif 638 639 s = spltty(); 640 641 if (ISSET(tp->t_state, TS_BUSY)) { 642 if (!ISSET(tp->t_state, TS_TTSTOP)) 643 SET(tp->t_state, TS_FLUSH); 644 645 /* 646 * the transmit interrupt routine will disable transmit when it 647 * notices that CYF_STOP has been set. 648 */ 649 SET(cy->cy_flags, CYF_STOP); 650 } 651 splx(s); 652 return (0); 653 } 654 655 /* 656 * parameter setting routine. 657 * returns 0 if successful, else returns error code 658 */ 659 int 660 cyparam(tp, t) 661 struct tty *tp; 662 struct termios *t; 663 { 664 int card = CY_CARD(tp->t_dev); 665 int port = CY_PORT(tp->t_dev); 666 struct cy_softc *sc = cy_cd.cd_devs[card]; 667 struct cy_port *cy = &sc->sc_ports[port]; 668 int ibpr, obpr, i_clk_opt, o_clk_opt; 669 int s, opt; 670 671 #ifdef CY_DEBUG 672 printf("%s port %d param tty %p termios %p\n", sc->sc_dev.dv_xname, 673 port, tp, t); 674 printf("ispeed %d ospeed %d\n", t->c_ispeed, t->c_ospeed); 675 #endif 676 677 if (t->c_ospeed != 0 && 678 cy_speed(t->c_ospeed, &o_clk_opt, &obpr, cy->cy_clock) < 0) 679 return (EINVAL); 680 681 if (t->c_ispeed != 0 && 682 cy_speed(t->c_ispeed, &i_clk_opt, &ibpr, cy->cy_clock) < 0) 683 return (EINVAL); 684 685 s = spltty(); 686 687 /* hang up the line is ospeed is zero, else turn DTR on */ 688 cy_modem_control(cy, TIOCM_DTR, (t->c_ospeed == 0 ? DMBIC : DMBIS)); 689 690 /* channel was selected by the above call to cy_modem_control() */ 691 /* cd_write_reg(cy, CD1400_CAR, port & CD1400_CAR_CHAN); */ 692 693 /* set transmit speed */ 694 if (t->c_ospeed != 0) { 695 cd_write_reg(cy, CD1400_TCOR, o_clk_opt); 696 cd_write_reg(cy, CD1400_TBPR, obpr); 697 } 698 /* set receive speed */ 699 if (t->c_ispeed != 0) { 700 cd_write_reg(cy, CD1400_RCOR, i_clk_opt); 701 cd_write_reg(cy, CD1400_RBPR, ibpr); 702 } 703 704 opt = CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN 705 | (ISSET(t->c_cflag, CREAD) ? CD1400_CCR_RCVEN : CD1400_CCR_RCVDIS); 706 707 if (opt != cy->cy_channel_control) { 708 cy->cy_channel_control = opt; 709 cd1400_channel_cmd(cy, opt); 710 } 711 712 /* compute COR1 contents */ 713 opt = 0; 714 if (ISSET(t->c_cflag, PARENB)) { 715 if (ISSET(t->c_cflag, PARODD)) 716 opt |= CD1400_COR1_PARODD; 717 opt |= CD1400_COR1_PARNORMAL; 718 } 719 720 if (!ISSET(t->c_iflag, INPCK)) 721 opt |= CD1400_COR1_NOINPCK; /* no parity checking */ 722 723 if (ISSET(t->c_cflag, CSTOPB)) 724 opt |= CD1400_COR1_STOP2; 725 726 switch (t->c_cflag & CSIZE) { 727 case CS5: 728 opt |= CD1400_COR1_CS5; 729 break; 730 731 case CS6: 732 opt |= CD1400_COR1_CS6; 733 break; 734 735 case CS7: 736 opt |= CD1400_COR1_CS7; 737 break; 738 739 default: 740 opt |= CD1400_COR1_CS8; 741 break; 742 } 743 744 cd_write_reg(cy, CD1400_COR1, opt); 745 746 #ifdef CY_DEBUG 747 printf("cor1 = 0x%x...", opt); 748 #endif 749 750 /* 751 * use the CD1400 automatic CTS flow control if CRTSCTS is set 752 * 753 * CD1400_COR2_ETC is used because breaks are generated with 754 * embedded transmit commands 755 */ 756 cd_write_reg(cy, CD1400_COR2, 757 CD1400_COR2_ETC | 758 (ISSET(t->c_cflag, CRTSCTS) ? CD1400_COR2_CCTS_OFLOW : 0)); 759 760 cd_write_reg(cy, CD1400_COR3, RX_FIFO_THRESHOLD); 761 762 cd1400_channel_cmd(cy, 763 CD1400_CCR_CMDCORCHG | 764 CD1400_CCR_COR1 | CD1400_CCR_COR2 | CD1400_CCR_COR3); 765 766 cd_write_reg(cy, CD1400_COR4, CD1400_COR4_PFO_EXCEPTION); 767 cd_write_reg(cy, CD1400_COR5, 0); 768 769 /* 770 * set modem change option registers to generate interrupts 771 * on carrier detect changes. 772 * 773 * if hardware RTS handshaking is used (CY_HW_RTS, DTR and RTS lines 774 * exchanged), also set the handshaking threshold. 775 */ 776 #ifdef CY_HW_RTS 777 cd_write_reg(cy, CD1400_MCOR1, CD1400_MCOR1_CDzd | 778 (ISSET(t->c_cflag, CRTSCTS) ? RX_DTR_THRESHOLD : 0)); 779 #else 780 cd_write_reg(cy, CD1400_MCOR1, CD1400_MCOR1_CDzd); 781 #endif /* CY_HW_RTS */ 782 783 cd_write_reg(cy, CD1400_MCOR2, CD1400_MCOR2_CDod); 784 785 /* 786 * set receive timeout to approx. 2ms 787 * could use more complex logic here... 788 * (but is it actually needed or even useful?) 789 */ 790 cd_write_reg(cy, CD1400_RTPR, 2); 791 792 /* 793 * should do anything else here? 794 * XXX check MDMBUF handshaking like in com.c? 795 */ 796 797 splx(s); 798 return (0); 799 } 800 801 /* 802 * set/get modem line status 803 * 804 * bits can be: TIOCM_DTR, TIOCM_RTS, TIOCM_CTS, TIOCM_CD, TIOCM_RI, TIOCM_DSR 805 * 806 * RTS and DTR are exchanged if CY_HW_RTS is set 807 * 808 */ 809 int 810 cy_modem_control(cy, bits, howto) 811 struct cy_port *cy; 812 int bits; 813 int howto; 814 { 815 int s, msvr; 816 817 s = spltty(); 818 819 /* select channel */ 820 cd_write_reg(cy, CD1400_CAR, cy->cy_port_num & CD1400_CAR_CHAN); 821 822 /* does not manipulate RTS if it is used for flow control */ 823 switch (howto) { 824 case DMGET: 825 bits = 0; 826 if (cy->cy_channel_control & CD1400_CCR_RCVEN) 827 bits |= TIOCM_LE; 828 msvr = cd_read_reg(cy, CD1400_MSVR2); 829 #ifdef CY_HW_RTS 830 if (cd_read_reg(cy, CD1400_MSVR1) & CD1400_MSVR1_RTS) 831 bits |= TIOCM_DTR; 832 if (msvr & CD1400_MSVR2_DTR) 833 bits |= TIOCM_RTS; 834 #else 835 if (cd_read_reg(cy, CD1400_MSVR1) & CD1400_MSVR1_RTS) 836 bits |= TIOCM_RTS; 837 if (msvr & CD1400_MSVR2_DTR) 838 bits |= TIOCM_DTR; 839 #endif /* CY_HW_RTS */ 840 if (msvr & CD1400_MSVR2_CTS) 841 bits |= TIOCM_CTS; 842 if (msvr & CD1400_MSVR2_CD) 843 bits |= TIOCM_CD; 844 if (msvr & CD1400_MSVR2_DSR) /* not connected on some 845 Cyclom cards? */ 846 bits |= TIOCM_DSR; 847 if (msvr & CD1400_MSVR2_RI) /* not connected on 848 Cyclom-8Y cards? */ 849 bits |= TIOCM_RI; 850 splx(s); 851 return (bits); 852 853 case DMSET: /* replace old values with new ones */ 854 #ifdef CY_HW_RTS 855 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS)) 856 cd_write_reg(cy, CD1400_MSVR2, 857 ((bits & TIOCM_RTS) ? CD1400_MSVR2_DTR : 0)); 858 cd_write_reg(cy, CD1400_MSVR1, 859 ((bits & TIOCM_DTR) ? CD1400_MSVR1_RTS : 0)); 860 #else 861 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS)) 862 cd_write_reg(cy, CD1400_MSVR1, 863 ((bits & TIOCM_RTS) ? CD1400_MSVR1_RTS : 0)); 864 cd_write_reg(cy, CD1400_MSVR2, 865 ((bits & TIOCM_DTR) ? CD1400_MSVR2_DTR : 0)); 866 #endif /* CY_HW_RTS */ 867 break; 868 869 case DMBIS: /* set bits */ 870 #ifdef CY_HW_RTS 871 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 872 (bits & TIOCM_RTS) != 0) 873 cd_write_reg(cy, CD1400_MSVR2, CD1400_MSVR2_DTR); 874 if (bits & TIOCM_DTR) 875 cd_write_reg(cy, CD1400_MSVR1, CD1400_MSVR1_RTS); 876 #else 877 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 878 (bits & TIOCM_RTS) != 0) 879 cd_write_reg(cy, CD1400_MSVR1, CD1400_MSVR1_RTS); 880 if (bits & TIOCM_DTR) 881 cd_write_reg(cy, CD1400_MSVR2, CD1400_MSVR2_DTR); 882 #endif /* CY_HW_RTS */ 883 break; 884 885 case DMBIC: /* clear bits */ 886 #ifdef CY_HW_RTS 887 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 888 (bits & TIOCM_RTS)) 889 cd_write_reg(cy, CD1400_MSVR2, 0); 890 if (bits & TIOCM_DTR) 891 cd_write_reg(cy, CD1400_MSVR1, 0); 892 #else 893 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 894 (bits & TIOCM_RTS)) 895 cd_write_reg(cy, CD1400_MSVR1, 0); 896 if (bits & TIOCM_DTR) 897 cd_write_reg(cy, CD1400_MSVR2, 0); 898 #endif /* CY_HW_RTS */ 899 break; 900 } 901 splx(s); 902 return (0); 903 } 904 905 /* 906 * Upper-level handler loop (called from timer interrupt?) 907 * This routine is common for multiple cards 908 */ 909 void 910 cy_poll(void *arg) 911 { 912 int port; 913 struct cy_softc *sc = arg; 914 struct cy_port *cy; 915 struct tty *tp; 916 static int counter = 0; 917 #ifdef CY_DEBUG1 918 int did_something; 919 #endif 920 921 int s; 922 923 s = spltty(); 924 925 if (sc->sc_events == 0 && ++counter < 200) { 926 splx(s); 927 goto out; 928 } 929 930 sc->sc_events = 0; 931 splx(s); 932 933 #ifdef CY_DEBUG1 934 sc->sc_poll_count1++; 935 did_something = 0; 936 #endif 937 938 for (port = 0; port < sc->sc_nports; port++) { 939 cy = &sc->sc_ports[port]; 940 if ((tp = cy->cy_tty) == NULL || cy->cy_ibuf == NULL || 941 !ISSET(tp->t_state, TS_ISOPEN | TS_WOPEN)) 942 continue; 943 944 /* 945 * handle received data 946 */ 947 while (cy->cy_ibuf_rd_ptr != cy->cy_ibuf_wr_ptr) { 948 u_char line_stat; 949 int chr; 950 951 line_stat = cy->cy_ibuf_rd_ptr[0]; 952 chr = cy->cy_ibuf_rd_ptr[1]; 953 954 if (line_stat & 955 (CD1400_RDSR_BREAK|CD1400_RDSR_FE)) 956 chr |= TTY_FE; 957 if (line_stat & CD1400_RDSR_PE) 958 chr |= TTY_PE; 959 960 /* 961 * on an overrun error the data is treated as 962 * good just as it should be. 963 */ 964 965 #ifdef CY_DEBUG 966 printf("%s port %d ttyinput 0x%x\n", 967 sc->sc_dev.dv_xname, port, chr); 968 #endif 969 970 (*linesw[tp->t_line].l_rint)(chr, tp); 971 972 s = spltty(); /* really necessary? */ 973 if ((cy->cy_ibuf_rd_ptr += 2) == 974 cy->cy_ibuf_end) 975 cy->cy_ibuf_rd_ptr = cy->cy_ibuf; 976 splx(s); 977 978 #ifdef CY_DEBUG1 979 did_something = 1; 980 #endif 981 } 982 983 #ifndef CY_HW_RTS 984 /* 985 * If we don't have any received data in ibuf and 986 * CRTSCTS is on and RTS is turned off, it is time 987 * to turn RTS back on 988 */ 989 if (ISSET(tp->t_cflag, CRTSCTS)) { 990 /* we can't use cy_modem_control() here as it 991 doesn't change RTS if RTSCTS is on */ 992 cd_write_reg(cy, CD1400_CAR, 993 port & CD1400_CAR_CHAN); 994 995 if ((cd_read_reg(cy, 996 CD1400_MSVR1) & CD1400_MSVR1_RTS) == 0) { 997 cd_write_reg(cy, CD1400_MSVR1, 998 CD1400_MSVR1_RTS); 999 #ifdef CY_DEBUG1 1000 did_something = 1; 1001 #endif 1002 } 1003 } 1004 #endif /* CY_HW_RTS */ 1005 1006 /* 1007 * handle carrier changes 1008 */ 1009 s = spltty(); 1010 if (ISSET(cy->cy_flags, CYF_CARRIER_CHANGED)) { 1011 int carrier; 1012 1013 CLR(cy->cy_flags, CYF_CARRIER_CHANGED); 1014 splx(s); 1015 1016 carrier = ((cy->cy_carrier_stat & 1017 CD1400_MSVR2_CD) != 0); 1018 1019 #ifdef CY_DEBUG 1020 printf("%s: cy_poll: carrier change " 1021 "(port %d, carrier %d)\n", 1022 sc->sc_dev.dv_xname, port, carrier); 1023 #endif 1024 if (CY_DIALIN(tp->t_dev) && 1025 !(*linesw[tp->t_line].l_modem)(tp, carrier)) 1026 cy_modem_control(cy, TIOCM_DTR, DMBIC); 1027 1028 #ifdef CY_DEBUG1 1029 did_something = 1; 1030 #endif 1031 } else { 1032 splx(s); 1033 } 1034 1035 s = spltty(); 1036 if (ISSET(cy->cy_flags, CYF_START)) { 1037 CLR(cy->cy_flags, CYF_START); 1038 splx(s); 1039 1040 (*linesw[tp->t_line].l_start)(tp); 1041 1042 #ifdef CY_DEBUG1 1043 did_something = 1; 1044 #endif 1045 } else { 1046 splx(s); 1047 } 1048 1049 /* could move this to even upper level... */ 1050 if (cy->cy_fifo_overruns) { 1051 cy->cy_fifo_overruns = 0; 1052 /* doesn't report overrun count, 1053 but shouldn't really matter */ 1054 log(LOG_WARNING, "%s: port %d fifo overrun\n", 1055 sc->sc_dev.dv_xname, port); 1056 } 1057 if (cy->cy_ibuf_overruns) { 1058 cy->cy_ibuf_overruns = 0; 1059 log(LOG_WARNING, "%s: port %d ibuf overrun\n", 1060 sc->sc_dev.dv_xname, port); 1061 } 1062 } /* for(port...) */ 1063 #ifdef CY_DEBUG1 1064 if (did_something && counter >= 200) 1065 sc->sc_poll_count2++; 1066 #endif 1067 1068 counter = 0; 1069 1070 out: 1071 timeout_add(&sc->sc_poll_to, 1); 1072 } 1073 1074 /* 1075 * hardware interrupt routine 1076 */ 1077 int 1078 cy_intr(arg) 1079 void *arg; 1080 { 1081 struct cy_softc *sc = arg; 1082 struct cy_port *cy; 1083 int cy_chip, stat; 1084 int int_serviced = -1; 1085 1086 /* 1087 * Check interrupt status of each CD1400 chip on this card 1088 * (multiple cards cannot share the same interrupt) 1089 */ 1090 for (cy_chip = 0; cy_chip < sc->sc_nr_cd1400s; cy_chip++) { 1091 1092 stat = cd_read_reg_sc(sc, cy_chip, CD1400_SVRR); 1093 if (stat == 0) 1094 continue; 1095 1096 if (ISSET(stat, CD1400_SVRR_RXRDY)) { 1097 u_char save_car, save_rir, serv_type; 1098 u_char line_stat, recv_data, n_chars; 1099 u_char *buf_p; 1100 1101 save_rir = cd_read_reg_sc(sc, cy_chip, CD1400_RIR); 1102 save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR); 1103 /* enter rx service */ 1104 cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_rir); 1105 1106 serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_RIVR); 1107 cy = &sc->sc_ports[serv_type >> 3]; 1108 1109 #ifdef CY_DEBUG1 1110 cy->cy_rx_int_count++; 1111 #endif 1112 1113 buf_p = cy->cy_ibuf_wr_ptr; 1114 1115 if (ISSET(serv_type, CD1400_RIVR_EXCEPTION)) { 1116 line_stat = cd_read_reg(cy, CD1400_RDSR); 1117 recv_data = cd_read_reg(cy, CD1400_RDSR); 1118 1119 if (cy->cy_tty == NULL || 1120 !ISSET(cy->cy_tty->t_state, TS_ISOPEN)) 1121 goto end_rx_serv; 1122 1123 #ifdef CY_DEBUG 1124 printf("%s port %d recv exception, " 1125 "line_stat 0x%x, char 0x%x\n", 1126 sc->sc_dev.dv_xname, cy->cy_port_num, 1127 line_stat, recv_data); 1128 #endif 1129 if (ISSET(line_stat, CD1400_RDSR_OE)) 1130 cy->cy_fifo_overruns++; 1131 1132 *buf_p++ = line_stat; 1133 *buf_p++ = recv_data; 1134 if (buf_p == cy->cy_ibuf_end) 1135 buf_p = cy->cy_ibuf; 1136 1137 if (buf_p == cy->cy_ibuf_rd_ptr) { 1138 if (buf_p == cy->cy_ibuf) 1139 buf_p = cy->cy_ibuf_end; 1140 buf_p -= 2; 1141 cy->cy_ibuf_overruns++; 1142 } 1143 sc->sc_events = 1; 1144 } else { /* no exception, received data OK */ 1145 n_chars = cd_read_reg(cy, CD1400_RDCR); 1146 1147 /* If no tty or not open, discard data */ 1148 if (cy->cy_tty == NULL || 1149 !ISSET(cy->cy_tty->t_state, TS_ISOPEN)) { 1150 while (n_chars--) 1151 cd_read_reg(cy, CD1400_RDSR); 1152 goto end_rx_serv; 1153 } 1154 1155 #ifdef CY_DEBUG 1156 printf("%s port %d receive ok %d chars\n", 1157 sc->sc_dev.dv_xname, cy->cy_port_num, 1158 n_chars); 1159 #endif 1160 while (n_chars--) { 1161 *buf_p++ = 0; /* status: OK */ 1162 *buf_p++ = cd_read_reg(cy, 1163 CD1400_RDSR); /* data byte */ 1164 if (buf_p == cy->cy_ibuf_end) 1165 buf_p = cy->cy_ibuf; 1166 if (buf_p == cy->cy_ibuf_rd_ptr) { 1167 if (buf_p == cy->cy_ibuf) 1168 buf_p = cy->cy_ibuf_end; 1169 buf_p -= 2; 1170 cy->cy_ibuf_overruns++; 1171 break; 1172 } 1173 } 1174 sc->sc_events = 1; 1175 } 1176 1177 cy->cy_ibuf_wr_ptr = buf_p; 1178 1179 #ifndef CY_HW_RTS 1180 /* RTS handshaking for incoming data */ 1181 if (ISSET(cy->cy_tty->t_cflag, CRTSCTS)) { 1182 int bf; 1183 1184 bf = buf_p - cy->cy_ibuf_rd_ptr; 1185 if (bf < 0) 1186 bf += IBUF_SIZE; 1187 1188 if (bf > (IBUF_SIZE/2)) /* turn RTS off */ 1189 cd_write_reg(cy, CD1400_MSVR1, 0); 1190 } 1191 #endif /* CY_HW_RTS */ 1192 1193 end_rx_serv: 1194 /* terminate service context */ 1195 cd_write_reg(cy, CD1400_RIR, save_rir & 0x3f); 1196 cd_write_reg(cy, CD1400_CAR, save_car); 1197 int_serviced = 1; 1198 } /* if(rx_service...) */ 1199 1200 if (ISSET(stat, CD1400_SVRR_MDMCH)) { 1201 u_char save_car, save_mir, serv_type, modem_stat; 1202 1203 save_mir = cd_read_reg_sc(sc, cy_chip, CD1400_MIR); 1204 save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR); 1205 /* enter modem service */ 1206 cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_mir); 1207 1208 serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_MIVR); 1209 cy = &sc->sc_ports[serv_type >> 3]; 1210 1211 #ifdef CY_DEBUG1 1212 cy->cy_modem_int_count++; 1213 #endif 1214 1215 modem_stat = cd_read_reg(cy, CD1400_MSVR2); 1216 1217 #ifdef CY_DEBUG 1218 printf("%s port %d modem line change, new stat 0x%x\n", 1219 sc->sc_dev.dv_xname, cy->cy_port_num, modem_stat); 1220 #endif 1221 if (ISSET((cy->cy_carrier_stat ^ modem_stat), 1222 CD1400_MSVR2_CD)) { 1223 SET(cy->cy_flags, CYF_CARRIER_CHANGED); 1224 sc->sc_events = 1; 1225 } 1226 1227 cy->cy_carrier_stat = modem_stat; 1228 1229 /* terminate service context */ 1230 cd_write_reg(cy, CD1400_MIR, save_mir & 0x3f); 1231 cd_write_reg(cy, CD1400_CAR, save_car); 1232 int_serviced = 1; 1233 } /* if(modem_service...) */ 1234 1235 if (ISSET(stat, CD1400_SVRR_TXRDY)) { 1236 u_char save_car, save_tir, serv_type, count, ch; 1237 struct tty *tp; 1238 1239 save_tir = cd_read_reg_sc(sc, cy_chip, CD1400_TIR); 1240 save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR); 1241 /* enter tx service */ 1242 cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_tir); 1243 1244 serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_TIVR); 1245 cy = &sc->sc_ports[serv_type >> 3]; 1246 1247 #ifdef CY_DEBUG1 1248 cy->cy_tx_int_count++; 1249 #endif 1250 #ifdef CY_DEBUG 1251 printf("%s port %d tx service\n", sc->sc_dev.dv_xname, 1252 cy->cy_port_num); 1253 #endif 1254 1255 /* stop transmitting if no tty or CYF_STOP set */ 1256 tp = cy->cy_tty; 1257 if (tp == NULL || ISSET(cy->cy_flags, CYF_STOP)) 1258 goto txdone; 1259 1260 count = 0; 1261 if (ISSET(cy->cy_flags, CYF_SEND_NUL)) { 1262 cd_write_reg(cy, CD1400_TDR, 0); 1263 cd_write_reg(cy, CD1400_TDR, 0); 1264 count += 2; 1265 CLR(cy->cy_flags, CYF_SEND_NUL); 1266 } 1267 1268 if (tp->t_outq.c_cc > 0) { 1269 SET(tp->t_state, TS_BUSY); 1270 while (tp->t_outq.c_cc > 0 && 1271 count < CD1400_TX_FIFO_SIZE) { 1272 ch = getc(&tp->t_outq); 1273 /* remember to double NUL characters 1274 because embedded transmit commands 1275 are enabled */ 1276 if (ch == 0) { 1277 if (count >= 1278 CD1400_TX_FIFO_SIZE-2) { 1279 SET(cy->cy_flags, 1280 CYF_SEND_NUL); 1281 break; 1282 } 1283 1284 cd_write_reg(cy, CD1400_TDR, ch); 1285 count++; 1286 } 1287 1288 cd_write_reg(cy, CD1400_TDR, ch); 1289 count++; 1290 } 1291 } else { 1292 /* no data to send -- check if we should 1293 start/stop a break */ 1294 /* XXX does this cause too much delay before 1295 breaks? */ 1296 if (ISSET(cy->cy_flags, CYF_START_BREAK)) { 1297 cd_write_reg(cy, CD1400_TDR, 0); 1298 cd_write_reg(cy, CD1400_TDR, 0x81); 1299 CLR(cy->cy_flags, CYF_START_BREAK); 1300 } 1301 if (ISSET(cy->cy_flags, CYF_END_BREAK)) { 1302 cd_write_reg(cy, CD1400_TDR, 0); 1303 cd_write_reg(cy, CD1400_TDR, 0x83); 1304 CLR(cy->cy_flags, CYF_END_BREAK); 1305 } 1306 } 1307 1308 if (tp->t_outq.c_cc == 0) { 1309 txdone: 1310 /* 1311 * No data to send or requested to stop. 1312 * Disable transmit interrupt 1313 */ 1314 cd_write_reg(cy, CD1400_SRER, 1315 cd_read_reg(cy, CD1400_SRER) 1316 & ~CD1400_SRER_TXRDY); 1317 CLR(cy->cy_flags, CYF_STOP); 1318 CLR(tp->t_state, TS_BUSY); 1319 } 1320 1321 if (tp->t_outq.c_cc <= tp->t_lowat) { 1322 SET(cy->cy_flags, CYF_START); 1323 sc->sc_events = 1; 1324 } 1325 1326 /* terminate service context */ 1327 cd_write_reg(cy, CD1400_TIR, save_tir & 0x3f); 1328 cd_write_reg(cy, CD1400_CAR, save_car); 1329 int_serviced = 1; 1330 } /* if(tx_service...) */ 1331 } /* for(...all CD1400s on a card) */ 1332 1333 /* ensure an edge for next interrupt */ 1334 bus_space_write_1(sc->sc_memt, sc->sc_memh, 1335 CY_CLEAR_INTR<<sc->sc_bustype, 0); 1336 return (int_serviced); 1337 } 1338 1339 /* 1340 * subroutine to enable CD1400 transmitter 1341 */ 1342 void 1343 cy_enable_transmitter(cy) 1344 struct cy_port *cy; 1345 { 1346 int s; 1347 s = spltty(); 1348 cd_write_reg(cy, CD1400_CAR, cy->cy_port_num & CD1400_CAR_CHAN); 1349 cd_write_reg(cy, CD1400_SRER, cd_read_reg(cy, CD1400_SRER) 1350 | CD1400_SRER_TXRDY); 1351 splx(s); 1352 } 1353 1354 /* 1355 * Execute a CD1400 channel command 1356 */ 1357 void 1358 cd1400_channel_cmd(cy, cmd) 1359 struct cy_port *cy; 1360 int cmd; 1361 { 1362 u_int waitcnt = 5 * 8 * 1024; /* approx 5 ms */ 1363 1364 #ifdef CY_DEBUG 1365 printf("c1400_channel_cmd cy %p command 0x%x\n", cy, cmd); 1366 #endif 1367 1368 /* wait until cd1400 is ready to process a new command */ 1369 while (cd_read_reg(cy, CD1400_CCR) != 0 && waitcnt-- > 0) 1370 ; 1371 1372 if (waitcnt == 0) 1373 log(LOG_ERR, "cy: channel command timeout\n"); 1374 1375 cd_write_reg(cy, CD1400_CCR, cmd); 1376 } 1377 1378 /* 1379 * Compute clock option register and baud rate register values 1380 * for a given speed. Return 0 on success, -1 on failure. 1381 * 1382 * The error between requested and actual speed seems 1383 * to be well within allowed limits (less than 3%) 1384 * with every speed value between 50 and 150000 bps. 1385 */ 1386 int 1387 cy_speed(speed_t speed, int *cor, int *bpr, int cy_clock) 1388 { 1389 int c, co, br; 1390 1391 if (speed < 50 || speed > 150000) 1392 return (-1); 1393 1394 for (c = 0, co = 8; co <= 2048; co <<= 2, c++) { 1395 br = (cy_clock + (co * speed) / 2) / (co * speed); 1396 if (br < 0x100) { 1397 *bpr = br; 1398 *cor = c; 1399 return (0); 1400 } 1401 } 1402 1403 return (-1); 1404 } 1405