xref: /openbsd/sys/dev/ic/if_wireg.h (revision 7d8f85a8)
1 /*	$OpenBSD: if_wireg.h,v 1.20 2002/06/21 03:02:00 fgsch Exp $	*/
2 
3 /*
4  * Copyright (c) 1997, 1998, 1999
5  *	Bill Paul <wpaul@ctr.columbia.edu>.  All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Bill Paul.
18  * 4. Neither the name of the author nor the names of any co-contributors
19  *    may be used to endorse or promote products derived from this software
20  *    without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
26  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
32  * THE POSSIBILITY OF SUCH DAMAGE.
33  *
34  *	From: if_wireg.h,v 1.8.2.2 2001/08/25 00:48:25 nsayer Exp $
35  */
36 
37 #pragma pack(1)
38 
39 #define WI_TIMEOUT	50000	/* 10x XXX just a guess at a good value.  */
40 
41 #define WI_PORT0	0
42 #define WI_PORT1	1
43 #define WI_PORT2	2
44 #define WI_PORT3	3
45 #define WI_PORT4	4
46 #define WI_PORT5	5
47 
48 /* Default port: 0 (only 0 exists on stations) */
49 #define WI_DEFAULT_PORT	(WI_PORT0 << 8)
50 
51 /* Default TX rate: 2Mbps, auto fallback */
52 #define WI_DEFAULT_TX_RATE	3
53 
54 /* Default network name (wildcard) */
55 #define WI_DEFAULT_NETNAME	""
56 
57 #define WI_DEFAULT_AP_DENSITY	1
58 
59 #define WI_DEFAULT_RTS_THRESH	2347
60 
61 #define WI_DEFAULT_DATALEN	2304
62 
63 #define WI_DEFAULT_CREATE_IBSS	0
64 
65 #define WI_DEFAULT_PM_ENABLED	0
66 
67 #define WI_DEFAULT_MAX_SLEEP	100
68 
69 #define WI_DEFAULT_NODENAME	"WaveLAN/IEEE node"
70 
71 #define WI_DEFAULT_IBSS		"IBSS"
72 
73 #define WI_DEFAULT_CHAN		3
74 
75 #define	WI_DEFAULT_ROAMING	1
76 
77 #define	WI_DEFAULT_AUTHTYPE	1
78 
79 #define	WI_DEFAULT_DIVERSITY	0
80 
81 /*
82  * register space access macros
83  */
84 
85 #if defined(__sparc__)
86 
87 #define CSR_WRITE_4(sc, reg, val)	\
88 	bus_space_write_4(sc->wi_btag, sc->wi_bhandle,	\
89 	    (sc->sc_pci? reg * 2: reg), htole32(val))
90 #define CSR_WRITE_2(sc, reg, val)	\
91 	bus_space_write_2(sc->wi_btag, sc->wi_bhandle,	\
92 	    (sc->sc_pci? reg * 2: reg), htole16(val))
93 #define CSR_WRITE_1(sc, reg, val)	\
94 	bus_space_write_1(sc->wi_btag, sc->wi_bhandle,	\
95 	    (sc->sc_pci? reg * 2: reg), val)
96 
97 #define CSR_READ_4(sc, reg)		\
98 	letoh32(bus_space_read_4(sc->wi_btag, sc->wi_bhandle,	\
99 	    (sc->sc_pci? reg * 2: reg)))
100 #define CSR_READ_2(sc, reg)		\
101 	letoh16(bus_space_read_2(sc->wi_btag, sc->wi_bhandle,	\
102 	    (sc->sc_pci? reg * 2: reg)))
103 #define CSR_READ_1(sc, reg)		\
104 	bus_space_read_1(sc->wi_btag, sc->wi_bhandle,	\
105 	    (sc->sc_pci? reg * 2: reg))
106 
107 #else
108 
109 #define CSR_WRITE_4(sc, reg, val)	\
110 	bus_space_write_4(sc->wi_btag, sc->wi_bhandle,	\
111 	    (sc->sc_pci? reg * 2: reg), val)
112 #define CSR_WRITE_2(sc, reg, val)	\
113 	bus_space_write_2(sc->wi_btag, sc->wi_bhandle,	\
114 	    (sc->sc_pci? reg * 2: reg), val)
115 #define CSR_WRITE_1(sc, reg, val)	\
116 	bus_space_write_1(sc->wi_btag, sc->wi_bhandle,	\
117 	    (sc->sc_pci? reg * 2: reg), val)
118 
119 #define CSR_READ_4(sc, reg)		\
120 	bus_space_read_4(sc->wi_btag, sc->wi_bhandle,	\
121 	    (sc->sc_pci? reg * 2: reg))
122 #define CSR_READ_2(sc, reg)		\
123 	bus_space_read_2(sc->wi_btag, sc->wi_bhandle,	\
124 	    (sc->sc_pci? reg * 2: reg))
125 #define CSR_READ_1(sc, reg)		\
126 	bus_space_read_1(sc->wi_btag, sc->wi_bhandle,	\
127 	    (sc->sc_pci? reg * 2: reg))
128 
129 #endif
130 
131 #define CSR_READ_RAW_2(sc, ba, dst, sz) \
132 	bus_space_read_raw_multi_2((sc)->wi_btag, (sc)->wi_bhandle, \
133 	    (sc->sc_pci? ba * 2: ba), (dst), (sz))
134 #define CSR_WRITE_RAW_2(sc, ba, dst, sz) \
135 	bus_space_write_raw_multi_2((sc)->wi_btag, (sc)->wi_bhandle, \
136 	    (sc->sc_pci? ba * 2: ba), (dst), (sz))
137 
138 /*
139  * The WaveLAN/IEEE cards contain an 802.11 MAC controller which Lucent
140  * calls 'Hermes.' In typical fashion, getting documentation about this
141  * controller is about as easy as squeezing blood from a stone. Here
142  * is more or less what I know:
143  *
144  * - The Hermes controller is firmware driven, and the host interacts
145  *   with the Hermes via a firmware interface, which can change.
146  *
147  * - The Hermes is described in a document called: "Hermes Firmware
148  *   WaveLAN/IEEE Station Functions," document #010245, which of course
149  *   Lucent will not release without an NDA.
150  *
151  * - Lucent has created a library called HCF (Hardware Control Functions)
152  *   though which it wants developers to interact with the card. The HCF
153  *   is needlessly complex, ill conceived and badly documented. Actually,
154  *   the comments in the HCP code itself aren't bad, but the publically
155  *   available manual that comes with it is awful, probably due largely to
156  *   the fact that it has been emasculated in order to hide information
157  *   that Lucent wants to keep proprietary. The purpose of the HCF seems
158  *   to be to insulate the driver programmer from the Hermes itself so that
159  *   Lucent has an excuse not to release programming in for it.
160  *
161  * - Lucent only makes available documentation and code for 'HCF Light'
162  *   which is a stripped down version of HCF with certain features not
163  *   implemented, most notably support for 802.11 frames.
164  *
165  * - The HCF code which I have seen blows goats. Whoever decided to
166  *   use a 132 column format should be shot.
167  *
168  * Rather than actually use the Lucent HCF library, I have stripped all
169  * the useful information from it and used it to create a driver in the
170  * usual BSD form. Note: I don't want to hear anybody whining about the
171  * fact that the Lucent code is GPLed and mine isn't. I did not actually
172  * put any of Lucent's code in this driver: I only used it as a reference
173  * to obtain information about the underlying hardware. The Hermes
174  * programming interface is not GPLed, so bite me.
175  */
176 
177 /*
178  * Size of Hermes & Prism2 I/O space.
179  */
180 #define WI_IOSIZ		0x40
181 
182 /*
183  * Hermes register definitions and what little I know about them.
184  */
185 
186 /* Hermes command/status registers. */
187 #define WI_COMMAND		0x00
188 #define WI_PARAM0		0x02
189 #define WI_PARAM1		0x04
190 #define WI_PARAM2		0x06
191 #define WI_STATUS		0x08
192 #define WI_RESP0		0x0A
193 #define WI_RESP1		0x0C
194 #define WI_RESP2		0x0E
195 
196 /* Command register values. */
197 #define WI_CMD_BUSY		0x8000 /* busy bit */
198 #define WI_CMD_INI		0x0000 /* initialize */
199 #define WI_CMD_ENABLE		0x0001 /* enable */
200 #define WI_CMD_DISABLE		0x0002 /* disable */
201 #define WI_CMD_DIAG		0x0003
202 #define WI_CMD_ALLOC_MEM	0x000A /* allocate NIC memory */
203 #define WI_CMD_TX		0x000B /* transmit */
204 #define WI_CMD_NOTIFY		0x0010
205 #define WI_CMD_INQUIRE		0x0011
206 #define WI_CMD_ACCESS		0x0021
207 #define WI_CMD_PROGRAM		0x0022
208 
209 #define WI_CMD_CODE_MASK	0x003F
210 
211 /*
212  * Reclaim qualifier bit, applicable to the
213  * TX and INQUIRE commands.
214  */
215 #define WI_RECLAIM		0x0100 /* reclaim NIC memory */
216 
217 /*
218  * ACCESS command qualifier bits.
219  */
220 #define WI_ACCESS_READ		0x0000
221 #define WI_ACCESS_WRITE		0x0100
222 
223 /*
224  * PROGRAM command qualifier bits.
225  */
226 #define WI_PROGRAM_DISABLE	0x0000
227 #define WI_PROGRAM_ENABLE_RAM	0x0100
228 #define WI_PROGRAM_ENABLE_NVRAM	0x0200
229 #define WI_PROGRAM_NVRAM	0x0300
230 
231 /* Status register values */
232 #define WI_STAT_CMD_CODE	0x003F
233 #define WI_STAT_DIAG_ERR	0x0100
234 #define WI_STAT_INQ_ERR		0x0500
235 #define WI_STAT_CMD_RESULT	0x7F00
236 
237 /* memory handle management registers */
238 #define WI_INFO_FID		0x10
239 #define WI_RX_FID		0x20
240 #define WI_ALLOC_FID		0x22
241 #define WI_TX_CMP_FID		0x24
242 
243 /*
244  * Buffer Access Path (BAP) registers.
245  * These are I/O channels. I believe you can use each one for
246  * any desired purpose independently of the other. In general
247  * though, we use BAP1 for reading and writing LTV records and
248  * reading received data frames, and BAP0 for writing transmit
249  * frames. This is a convention though, not a rule.
250  */
251 #define WI_SEL0			0x18
252 #define WI_SEL1			0x1A
253 #define WI_OFF0			0x1C
254 #define WI_OFF1			0x1E
255 #define WI_DATA0		0x36
256 #define WI_DATA1		0x38
257 #define WI_BAP0			WI_DATA0
258 #define WI_BAP1			WI_DATA1
259 
260 #define WI_OFF_BUSY		0x8000
261 #define WI_OFF_ERR		0x4000
262 #define WI_OFF_DATAOFF		0x0FFF
263 
264 /* Event registers */
265 #define WI_EVENT_STAT		0x30	/* Event status */
266 #define WI_INT_EN		0x32	/* Interrupt enable/disable */
267 #define WI_EVENT_ACK		0x34	/* Ack event */
268 
269 /* Events */
270 #define WI_EV_TICK		0x8000	/* aux timer tick */
271 #define WI_EV_RES		0x4000	/* controller h/w error (time out) */
272 #define WI_EV_INFO_DROP		0x2000	/* no RAM to build unsolicited frame */
273 #define WI_EV_NO_CARD		0x0800	/* card removed (hunh?) */
274 #define WI_EV_DUIF_RX		0x0400	/* wavelan management packet received */
275 #define WI_EV_INFO		0x0080	/* async info frame */
276 #define WI_EV_CMD		0x0010	/* command completed */
277 #define WI_EV_ALLOC		0x0008	/* async alloc/reclaim completed */
278 #define WI_EV_TX_EXC		0x0004	/* async xmit completed with failure */
279 #define WI_EV_TX		0x0002	/* async xmit completed succesfully */
280 #define WI_EV_RX		0x0001	/* async rx completed */
281 
282 #define WI_INTRS	\
283 	(WI_EV_RX|WI_EV_TX|WI_EV_TX_EXC|WI_EV_ALLOC|WI_EV_INFO|WI_EV_INFO_DROP)
284 
285 /* Host software registers */
286 #define WI_SW0			0x28
287 #define WI_SW1			0x2A
288 #define WI_SW2			0x2C
289 #define WI_SW3			0x2E
290 
291 #define WI_CNTL			0x14
292 
293 #define WI_CNTL_AUX_ENA		0xC000
294 #define WI_CNTL_AUX_ENA_STAT	0xC000
295 #define WI_CNTL_AUX_DIS_STAT	0x0000
296 #define WI_CNTL_AUX_ENA_CNTL	0x8000
297 #define WI_CNTL_AUX_DIS_CNTL	0x4000
298 
299 #define WI_AUX_PAGE		0x3A
300 #define WI_AUX_OFFSET		0x3C
301 #define WI_AUX_DATA		0x3E
302 
303 #define WI_COR_OFFSET		0x3E0	/* COR attribute offset of card */
304 
305 #define WI_PLX_LOCALRES		0x14	/* PLX chip's local registers */
306 #define WI_PLX_MEMRES		0x18	/* Prism attribute memory (PLX) */
307 #define WI_PLX_IORES		0x1C	/* Prism I/O space (PLX) */
308 #define WI_PLX_INTCSR		0x4C	/* PLX Interrupt CSR */
309 #define WI_PLX_INTEN		0x40	/* Interrupt Enable bit */
310 #define WI_PLX_COR_VALUE	0x41	/* Enable with irq in level trigger */
311 
312 #define WI_TMD_LOCALRES		0x14	/* TMD chip's local registers */
313 #define WI_TMD_IORES		0x18	/* Prism I/O space (TMD) */
314 #define WI_TMD_COR_OFFSET	0x00	/* COR attribute offset of Prism2 */
315 #define WI_TMD_COR_VALUE	0x45
316 
317 /*
318  * PCI Host Interface Registers (HFA3842 Specific)
319  * The value of all Register's Offset, such as WI_INFO_FID and WI_PARAM0,
320  * has doubled.
321  * About WI_PCI_COR: In this Register, only soft-reset bit implement; Bit(7).
322  */
323 #define WI_PCI_CBMA		0x10
324 #define WI_PCI_COR_OFFSET	0x4C
325 #define WI_PCI_HCR		0x5C
326 #define WI_PCI_MASTER0_ADDRH	0x80
327 #define WI_PCI_MASTER0_ADDRL	0x84
328 #define WI_PCI_MASTER0_LEN	0x88
329 #define WI_PCI_MASTER0_CON	0x8C
330 
331 #define WI_PCI_STATUS		0x98
332 
333 #define WI_PCI_MASTER1_ADDRH	0xA0
334 #define WI_PCI_MASTER1_ADDRL	0xA4
335 #define WI_PCI_MASTER1_LEN	0xA8
336 #define WI_PCI_MASTER1_CON	0xAC
337 
338 #define WI_COR_SOFT_RESET	(1 << 7)
339 #define WI_COR_CLEAR		0x00
340 
341 /*
342  * One form of communication with the Hermes is with what Lucent calls
343  * LTV records, where LTV stands for Length, Type and Value. The length
344  * and type are 16 bits and are in native byte order. The value is in
345  * multiples of 16 bits and is in little endian byte order.
346  */
347 struct wi_ltv_gen {
348 	u_int16_t		wi_len;
349 	u_int16_t		wi_type;
350 	u_int16_t		wi_val;
351 };
352 
353 struct wi_ltv_str {
354 	u_int16_t		wi_len;
355 	u_int16_t		wi_type;
356 	u_int16_t		wi_str[17];
357 };
358 
359 #define WI_SETVAL(recno, val)			\
360 	do {					\
361 		struct wi_ltv_gen	g;	\
362 						\
363 		g.wi_len = 2;			\
364 		g.wi_type = recno;		\
365 		g.wi_val = htole16(val);	\
366 		wi_write_record(sc, &g);	\
367 	} while (0)
368 
369 #define WI_SETSTR(recno, str)					\
370 	do {							\
371 		struct wi_ltv_str	s;			\
372 		int			l;			\
373 								\
374 		l = (str.i_len + 1) & ~0x1;			\
375 		bzero((char *)&s, sizeof(s));			\
376 		s.wi_len = (l / 2) + 2;				\
377 		s.wi_type = recno;				\
378 		s.wi_str[0] = htole16(str.i_len);		\
379 		bcopy(str.i_nwid, &s.wi_str[1], str.i_len);	\
380 		wi_write_record(sc, (struct wi_ltv_gen *)&s);	\
381 	} while (0)
382 
383 /*
384  * Download buffer location and length (0xFD01).
385  */
386 #define WI_RID_DNLD_BUF		0xFD01
387 struct wi_ltv_dnld_buf {
388 	u_int16_t		wi_len;
389 	u_int16_t		wi_type;
390 	u_int16_t		wi_buf_pg; /* page addr of intermediate dl buf*/
391 	u_int16_t		wi_buf_off; /* offset of idb */
392 	u_int16_t		wi_buf_len; /* len of idb */
393 };
394 
395 /*
396  * Mem sizes (0xFD02).
397  */
398 #define WI_RID_MEMSZ		0xFD02
399 struct wi_ltv_memsz {
400 	u_int16_t		wi_len;
401 	u_int16_t		wi_type;
402 	u_int16_t		wi_mem_ram;
403 	u_int16_t		wi_mem_nvram;
404 };
405 
406 /*
407  * NIC Identification (0xFD0B == WI_RID_CARD_ID)
408  */
409 struct wi_ltv_ver {
410 	u_int16_t	wi_len;
411 	u_int16_t	wi_type;
412 	u_int16_t	wi_ver[4];
413 #define	WI_NIC_LUCENT		0x0001
414 #define	WI_NIC_SONY		0x0002
415 #define	WI_NIC_LUCENT_EM	0x0005
416 #define	WI_NIC_EVB2		0x8000
417 #define	WI_NIC_HWB3763		0x8001
418 #define	WI_NIC_HWB3163		0x8002
419 #define	WI_NIC_HWB3163B		0x8003
420 #define	WI_NIC_EVB3		0x8004
421 #define	WI_NIC_HWB1153		0x8007
422 #define	WI_NIC_P2_SST		0x8008  /* Prism2 with SST flush */
423 #define	WI_NIC_PRISM2_5		0x800C
424 #define	WI_NIC_3874A		0x8013	/* Prism2.5 Mini-PCI */
425 #define	WI_NIC_37300P		0x801a
426 };
427 
428 /*
429  * List of intended regulatory domains (WI_RID_DOMAINS = 0xFD11).
430  */
431 struct wi_ltv_domains {
432 	u_int16_t		wi_len;
433 	u_int16_t		wi_type;
434 	u_int16_t		wi_domains[6];
435 };
436 
437 /*
438  * CIS struct (0xFD13 == WI_RID_CIS).
439  */
440 struct wi_ltv_cis {
441 	u_int16_t		wi_len;
442 	u_int16_t		wi_type;
443 	u_int16_t		wi_cis[240];
444 };
445 
446 /*
447  * Communications quality (0xFD43 == WI_RID_COMMQUAL).
448  */
449 struct wi_ltv_commqual {
450 	u_int16_t		wi_len;
451 	u_int16_t		wi_type;
452 	u_int16_t		wi_coms_qual;
453 	u_int16_t		wi_sig_lvl;
454 	u_int16_t		wi_noise_lvl;
455 };
456 
457 /*
458  * Actual system scale thresholds (0xFD46 == WI_RID_SCALETHRESH).
459  */
460 struct wi_ltv_scalethresh {
461 	u_int16_t		wi_len;
462 	u_int16_t		wi_type;
463 	u_int16_t		wi_energy_detect;
464 	u_int16_t		wi_carrier_detect;
465 	u_int16_t		wi_defer;
466 	u_int16_t		wi_cell_search;
467 	u_int16_t		wi_out_of_range;
468 	u_int16_t		wi_delta_snr;
469 };
470 
471 /*
472  * PCF info struct (0xFD87 == WI_RID_PCF).
473  */
474 struct wi_ltv_pcf {
475 	u_int16_t		wi_len;
476 	u_int16_t		wi_type;
477 	u_int16_t		wi_energy_detect;
478 	u_int16_t		wi_carrier_detect;
479 	u_int16_t		wi_defer;
480 	u_int16_t		wi_cell_search;
481 	u_int16_t		wi_range;
482 };
483 
484 /*
485  * Connection control characteristics (0xFC00 == WI_RID_PORTTYPE).
486  * 1 == Basic Service Set (BSS)
487  * 2 == Wireless Distribudion System (WDS)
488  * 3 == Pseudo IBSS (aka ad-hoc demo)
489  * 4 == IBSS
490  */
491 #define WI_PORTTYPE_BSS		0x1
492 #define WI_PORTTYPE_WDS		0x2
493 #define WI_PORTTYPE_ADHOC	0x3
494 #define WI_PORTTYPE_IBSS	0x4
495 #define WI_PORTTYPE_AP		0x6
496 
497 /*
498  * Mac addresses.
499  */
500 struct wi_ltv_macaddr {
501 	u_int16_t		wi_len;
502 	u_int16_t		wi_type;
503 	u_int16_t		wi_mac_addr[3];
504 };
505 
506 /*
507  * Station set identification (SSID).
508  */
509 struct wi_ltv_ssid {
510 	u_int16_t		wi_len;
511 	u_int16_t		wi_type;
512 	u_int16_t		wi_id[17];
513 };
514 
515 /*
516  * Set our station name (0xFC0E == WI_RID_NODENAME).
517  */
518 struct wi_ltv_nodename {
519 	u_int16_t		wi_len;
520 	u_int16_t		wi_type;
521 	u_int16_t		wi_nodename[17];
522 };
523 
524 /*
525  * Multicast addresses to be put in filter. We're allowed up
526  * to 16 addresses in the filter (0xFC80 == WI_RID_MCAST).
527  */
528 struct wi_ltv_mcast {
529 	u_int16_t		wi_len;
530 	u_int16_t		wi_type;
531 	struct ether_addr	wi_mcast[16];
532 };
533 
534 /*
535  * Supported rates.
536  */
537 #define WI_SUPPRATES_1M		0x0001
538 #define WI_SUPPRATES_2M		0x0002
539 #define WI_SUPPRATES_5M		0x0004
540 #define WI_SUPPRATES_11M	0x0008
541 #define	WI_RATES_BITS	"\20\0011M\0022M\0035.5M\00411M"
542 
543 /*
544  * Information frame types.
545  */
546 #define WI_INFO_NOTIFY		0xF000	/* Handover address */
547 #define WI_INFO_COUNTERS	0xF100	/* Statistics counters */
548 #define WI_INFO_SCAN_RESULTS	0xF101	/* Scan results */
549 #define WI_INFO_LINK_STAT	0xF200	/* Link status */
550 #define WI_INFO_ASSOC_STAT	0xF201	/* Association status */
551 
552 /*
553  * Hermes transmit/receive frame structure
554  */
555 struct wi_frame {
556 	u_int16_t		wi_status;	/* 0x00 */
557 	u_int16_t		wi_rsvd0;	/* 0x02 */
558 	u_int16_t		wi_rsvd1;	/* 0x04 */
559 	u_int16_t		wi_q_info;	/* 0x06 */
560 	u_int16_t		wi_rsvd2;	/* 0x08 */
561 	u_int8_t		wi_tx_rtry;	/* 0x0A */
562 	u_int8_t		wi_tx_rate;	/* 0x0A */
563 	u_int16_t		wi_tx_ctl;	/* 0x0C */
564 	u_int16_t		wi_frame_ctl;	/* 0x0E */
565 	u_int16_t		wi_id;		/* 0x10 */
566 	u_int8_t		wi_addr1[6];	/* 0x12 */
567 	u_int8_t		wi_addr2[6];	/* 0x18 */
568 	u_int8_t		wi_addr3[6];	/* 0x1E */
569 	u_int16_t		wi_seq_ctl;	/* 0x24 */
570 	u_int8_t		wi_addr4[6];	/* 0x26 */
571 	u_int16_t		wi_dat_len;	/* 0x2C */
572 	u_int8_t		wi_dst_addr[6];	/* 0x2E */
573 	u_int8_t		wi_src_addr[6];	/* 0x34 */
574 	u_int16_t		wi_len;		/* 0x3A */
575 	u_int16_t		wi_dat[3];	/* 0x3C */ /* SNAP header */
576 	u_int16_t		wi_type;	/* 0x42 */
577 };
578 
579 #define WI_802_3_OFFSET		0x2E
580 #define WI_802_11_OFFSET	0x44
581 #define WI_802_11_OFFSET_RAW	0x3C
582 #define WI_802_11_OFFSET_HDR	0x0E
583 
584 #define WI_STAT_BADCRC		0x0001
585 #define WI_STAT_UNDECRYPTABLE	0x0002
586 #define WI_STAT_ERRSTAT		0x0003
587 #define WI_STAT_MAC_PORT	0x0700
588 #define WI_STAT_1042		0x2000	/* RFC1042 encoded */
589 #define WI_STAT_TUNNEL		0x4000	/* Bridge-tunnel encoded */
590 #define WI_STAT_WMP_MSG		0x6000	/* WaveLAN-II management protocol */
591 #define WI_STAT_MGMT		0x8000	/* 802.11b management frames */
592 #define WI_RXSTAT_MSG_TYPE	0xE000
593 
594 #define WI_ENC_TX_802_3		0x00
595 #define WI_ENC_TX_802_11	0x11
596 #define	WI_ENC_TX_MGMT		0x08
597 #define WI_ENC_TX_E_II		0x0E
598 
599 #define WI_ENC_TX_1042		0x00
600 #define WI_ENC_TX_TUNNEL	0xF8
601 
602 #define WI_TXCNTL_MACPORT	0x00FF
603 #define WI_TXCNTL_STRUCTTYPE	0xFF00
604 #define WI_TXCNTL_TX_EX		0x0004
605 #define WI_TXCNTL_TX_OK		0x0002
606 #define WI_TXCNTL_NOCRYPT	0x0080
607 
608 
609 /*
610  * SNAP (sub-network access protocol) constants for transmission
611  * of IP datagrams over IEEE 802 networks, taken from RFC1042.
612  * We need these for the LLC/SNAP header fields in the TX/RX frame
613  * structure.
614  */
615 #define WI_SNAP_K1		0xaa	/* assigned global SAP for SNAP */
616 #define WI_SNAP_K2		0x00
617 #define WI_SNAP_CONTROL		0x03	/* unnumbered information format */
618 #define WI_SNAP_WORD0		(WI_SNAP_K1 | (WI_SNAP_K1 << 8))
619 #define WI_SNAP_WORD1		(WI_SNAP_K2 | (WI_SNAP_CONTROL << 8))
620 #define WI_SNAPHDR_LEN		0x6
621 #define WI_FCS_LEN		0x4
622 
623 #pragma pack()
624