1 /* $OpenBSD: ncr53c9x.c,v 1.57 2014/01/26 17:26:55 miod Exp $ */ 2 /* $NetBSD: ncr53c9x.c,v 1.56 2000/11/30 14:41:46 thorpej Exp $ */ 3 4 /* 5 * Copyright (c) 1996 Charles M. Hannum. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Charles M. Hannum. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1994 Peter Galbavy 35 * Copyright (c) 1995 Paul Kranenburg 36 * All rights reserved. 37 * 38 * Redistribution and use in source and binary forms, with or without 39 * modification, are permitted provided that the following conditions 40 * are met: 41 * 1. Redistributions of source code must retain the above copyright 42 * notice, this list of conditions and the following disclaimer. 43 * 2. Redistributions in binary form must reproduce the above copyright 44 * notice, this list of conditions and the following disclaimer in the 45 * documentation and/or other materials provided with the distribution. 46 * 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 49 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 50 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 51 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 52 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 53 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 55 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 56 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 57 * POSSIBILITY OF SUCH DAMAGE. 58 */ 59 60 /* 61 * Based on aic6360 by Jarle Greipsland 62 * 63 * Acknowledgements: Many of the algorithms used in this driver are 64 * inspired by the work of Julian Elischer (julian@tfs.com) and 65 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million! 66 */ 67 68 #include <sys/types.h> 69 #include <sys/param.h> 70 #include <sys/systm.h> 71 #include <sys/kernel.h> 72 #include <sys/errno.h> 73 #include <sys/ioctl.h> 74 #include <sys/device.h> 75 #include <sys/buf.h> 76 #include <sys/malloc.h> 77 #include <sys/proc.h> 78 #include <sys/queue.h> 79 #include <sys/pool.h> 80 81 #include <scsi/scsi_all.h> 82 #include <scsi/scsiconf.h> 83 #include <scsi/scsi_message.h> 84 85 #include <machine/cpu.h> 86 87 #include <dev/ic/ncr53c9xreg.h> 88 #include <dev/ic/ncr53c9xvar.h> 89 90 #ifdef NCR53C9X_DEBUG 91 int ncr53c9x_debug = 0; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/ 92 #endif 93 #ifdef DEBUG 94 int ncr53c9x_notag = 0; 95 #endif 96 97 /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *); 98 /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *, 99 struct ncr53c9x_ecb *); 100 /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int); 101 /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *); 102 /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *, 103 struct scsi_xfer *, int); 104 /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *); 105 /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *, 106 struct ncr53c9x_ecb *); 107 /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *); 108 /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *); 109 /*static*/ void ncr53c9x_timeout(void *arg); 110 /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *, 111 struct ncr53c9x_ecb *); 112 /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *, 113 struct ncr53c9x_ecb *); 114 115 void ncr53c9x_sense(struct ncr53c9x_softc *, 116 struct ncr53c9x_ecb *); 117 void ncr53c9x_free_ecb(void *, void *); 118 void *ncr53c9x_get_ecb(void *); 119 120 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int); 121 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *, 122 struct ncr53c9x_tinfo *); 123 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *, 124 int64_t lun); 125 126 static void ncr53c9x_wrfifo(struct ncr53c9x_softc *, u_char *, int); 127 static int ncr53c9x_rdfifo(struct ncr53c9x_softc *, int); 128 #define NCR_RDFIFO_START 0 129 #define NCR_RDFIFO_CONTINUE 1 130 131 #define NCR_SET_COUNT(sc, size) do { \ 132 NCR_WRITE_REG((sc), NCR_TCL, (size)); \ 133 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \ 134 if ((sc->sc_cfg2 & NCRCFG2_FE) || \ 135 (sc->sc_rev == NCR_VARIANT_FAS366)) { \ 136 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \ 137 } \ 138 if (sc->sc_rev == NCR_VARIANT_FAS366) { \ 139 NCR_WRITE_REG(sc, NCR_RCH, 0); \ 140 } \ 141 } while (0) 142 143 static int ecb_pool_initialized = 0; 144 static struct scsi_iopool ecb_iopool; 145 static struct pool ecb_pool; 146 147 struct cfdriver esp_cd = { 148 NULL, "esp", DV_DULL 149 }; 150 151 void ncr53c9x_scsi_cmd(struct scsi_xfer *); 152 int ncr53c9x_scsi_probe(struct scsi_link *); 153 void ncr53c9x_scsi_free(struct scsi_link *); 154 155 struct scsi_adapter ncr53c9x_adapter = { 156 ncr53c9x_scsi_cmd, /* cmd */ 157 scsi_minphys, /* minphys */ 158 ncr53c9x_scsi_probe, /* lun probe */ 159 ncr53c9x_scsi_free, /* lun free */ 160 NULL /* ioctl */ 161 }; 162 163 /* 164 * Names for the NCR53c9x variants, corresponding to the variant tags 165 * in ncr53c9xvar.h. 166 */ 167 const char *ncr53c9x_variant_names[] = { 168 "ESP100", 169 "ESP100A", 170 "ESP200", 171 "NCR53C94", 172 "NCR53C96", 173 "ESP406", 174 "FAS408", 175 "FAS216", 176 "AM53C974", 177 "FAS366/HME", 178 }; 179 180 /* 181 * Search linked list for LUN info by LUN id. 182 */ 183 static struct ncr53c9x_linfo * 184 ncr53c9x_lunsearch(ti, lun) 185 struct ncr53c9x_tinfo *ti; 186 int64_t lun; 187 { 188 struct ncr53c9x_linfo *li; 189 LIST_FOREACH(li, &ti->luns, link) 190 if (li->lun == lun) 191 return (li); 192 return (NULL); 193 } 194 195 /* 196 * Attach this instance, and then all the sub-devices 197 */ 198 void 199 ncr53c9x_attach(sc) 200 struct ncr53c9x_softc *sc; 201 { 202 struct scsibus_attach_args saa; 203 204 /* 205 * Allocate SCSI message buffers. 206 * Front-ends can override allocation to avoid alignment 207 * handling in the DMA engines. Note that ncr53c9x_msgout() 208 * can request a 1 byte DMA transfer. 209 */ 210 if (sc->sc_omess == NULL) 211 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT); 212 213 if (sc->sc_imess == NULL) 214 sc->sc_imess = malloc(NCR_MAX_MSG_LEN+1, M_DEVBUF, M_NOWAIT); 215 216 if (sc->sc_omess == NULL || sc->sc_imess == NULL) { 217 printf("out of memory\n"); 218 return; 219 } 220 221 /* 222 * Note, the front-end has set us up to print the chip variation. 223 */ 224 if (sc->sc_rev >= NCR_VARIANT_MAX) { 225 printf("\n%s: unknown variant %d, devices not attached\n", 226 sc->sc_dev.dv_xname, sc->sc_rev); 227 return; 228 } 229 230 printf(": %s, %dMHz\n", ncr53c9x_variant_names[sc->sc_rev], 231 sc->sc_freq); 232 233 sc->sc_ccf = FREQTOCCF(sc->sc_freq); 234 235 /* The value *must not* be == 1. Make it 2 */ 236 if (sc->sc_ccf == 1) 237 sc->sc_ccf = 2; 238 239 /* 240 * The recommended timeout is 250ms. This register is loaded 241 * with a value calculated as follows, from the docs: 242 * 243 * (timout period) x (CLK frequency) 244 * reg = ------------------------------------- 245 * 8192 x (Clock Conversion Factor) 246 * 247 * Since CCF has a linear relation to CLK, this generally computes 248 * to the constant of 153. 249 */ 250 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf); 251 252 /* CCF register only has 3 bits; 0 is actually 8 */ 253 sc->sc_ccf &= 7; 254 255 /* Find how many targets we need to support */ 256 switch (sc->sc_rev) { 257 case NCR_VARIANT_FAS366: 258 sc->sc_ntarg = 16; 259 break; 260 default: 261 sc->sc_ntarg = 8; 262 break; 263 } 264 265 /* Reset state & bus */ 266 sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags; 267 sc->sc_state = 0; 268 ncr53c9x_init(sc, 1); 269 270 /* 271 * fill in the prototype scsi_link. 272 */ 273 sc->sc_link.adapter_softc = sc; 274 sc->sc_link.adapter_target = sc->sc_id; 275 sc->sc_link.adapter = &ncr53c9x_adapter; 276 sc->sc_link.openings = 2; 277 sc->sc_link.adapter_buswidth = sc->sc_ntarg; 278 sc->sc_link.pool = &ecb_iopool; 279 280 bzero(&saa, sizeof(saa)); 281 saa.saa_sc_link = &sc->sc_link; 282 283 /* 284 * Now try to attach all the sub-devices 285 */ 286 config_found(&sc->sc_dev, &saa, scsiprint); 287 } 288 289 /* 290 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus, 291 * only this controller, but kills any on-going commands, and also stops 292 * and resets the DMA. 293 * 294 * After reset, registers are loaded with the defaults from the attach 295 * routine above. 296 */ 297 void 298 ncr53c9x_reset(sc) 299 struct ncr53c9x_softc *sc; 300 { 301 302 /* reset DMA first */ 303 NCRDMA_RESET(sc); 304 305 /* reset SCSI chip */ 306 NCRCMD(sc, NCRCMD_RSTCHIP); 307 NCRCMD(sc, NCRCMD_NOP); 308 DELAY(500); 309 310 /* do these backwards, and fall through */ 311 switch (sc->sc_rev) { 312 case NCR_VARIANT_ESP406: 313 case NCR_VARIANT_FAS408: 314 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT); 315 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4); 316 case NCR_VARIANT_AM53C974: 317 case NCR_VARIANT_FAS216: 318 case NCR_VARIANT_NCR53C94: 319 case NCR_VARIANT_NCR53C96: 320 case NCR_VARIANT_ESP200: 321 sc->sc_features |= NCR_F_HASCFG3; 322 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 323 case NCR_VARIANT_ESP100A: 324 sc->sc_features |= NCR_F_SELATN3; 325 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 326 case NCR_VARIANT_ESP100: 327 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 328 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 329 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 330 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 331 break; 332 case NCR_VARIANT_FAS366: 333 sc->sc_features |= 334 NCR_F_SELATN3 | NCR_F_HASCFG3 | NCR_F_FASTSCSI; 335 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO; 336 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI; 337 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 338 sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE | NCRCFG2_HME32 */ 339 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 340 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 341 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 342 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 343 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 344 break; 345 default: 346 printf("%s: unknown revision code, assuming ESP100\n", 347 sc->sc_dev.dv_xname); 348 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 349 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 350 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 351 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 352 } 353 354 if (sc->sc_rev == NCR_VARIANT_AM53C974) 355 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4); 356 357 #if 0 358 printf("%s: ncr53c9x_reset: revision %d\n", 359 sc->sc_dev.dv_xname, sc->sc_rev); 360 printf("%s: ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, ccf 0x%x, timeout 0x%x\n", 361 sc->sc_dev.dv_xname, 362 sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3, 363 sc->sc_ccf, sc->sc_timeout); 364 #endif 365 } 366 367 /* 368 * Reset the SCSI bus, but not the chip 369 */ 370 void 371 ncr53c9x_scsi_reset(sc) 372 struct ncr53c9x_softc *sc; 373 { 374 375 (*sc->sc_glue->gl_dma_stop)(sc); 376 377 printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname); 378 NCRCMD(sc, NCRCMD_RSTSCSI); 379 } 380 381 /* 382 * Initialize ncr53c9x state machine 383 */ 384 void 385 ncr53c9x_init(sc, doreset) 386 struct ncr53c9x_softc *sc; 387 int doreset; 388 { 389 struct ncr53c9x_ecb *ecb; 390 struct ncr53c9x_linfo *li; 391 int r, i; 392 393 NCR_TRACE(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state)); 394 395 if (!ecb_pool_initialized) { 396 /* All instances share this pool */ 397 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0, 398 "ncr53c9x_ecb", NULL); 399 pool_setipl(&ecb_pool, IPL_BIO); 400 scsi_iopool_init(&ecb_iopool, NULL, 401 ncr53c9x_get_ecb, ncr53c9x_free_ecb); 402 ecb_pool_initialized = 1; 403 } 404 405 if (sc->sc_state == 0) { 406 /* First time through; initialize. */ 407 408 TAILQ_INIT(&sc->ready_list); 409 sc->sc_nexus = NULL; 410 bzero(sc->sc_tinfo, sizeof(sc->sc_tinfo)); 411 for (r = 0; r < sc->sc_ntarg; r++) { 412 LIST_INIT(&sc->sc_tinfo[r].luns); 413 } 414 } else { 415 /* Cancel any active commands. */ 416 sc->sc_state = NCR_CLEANING; 417 sc->sc_msgify = 0; 418 if ((ecb = sc->sc_nexus) != NULL) { 419 ecb->xs->error = XS_TIMEOUT; 420 ncr53c9x_done(sc, ecb); 421 } 422 for (r = 0; r < sc->sc_ntarg; r++) { 423 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) { 424 if ((ecb = li->untagged)) { 425 li->untagged = NULL; 426 /* 427 * XXXXXXX 428 * Should we terminate a command 429 * that never reached the disk? 430 */ 431 li->busy = 0; 432 ecb->xs->error = XS_TIMEOUT; 433 ncr53c9x_done(sc, ecb); 434 } 435 for (i = 0; i < 256; i++) 436 if ((ecb = li->queued[i])) { 437 li->queued[i] = NULL; 438 ecb->xs->error = XS_TIMEOUT; 439 ncr53c9x_done(sc, ecb); 440 } 441 li->used = 0; 442 } 443 } 444 } 445 446 /* 447 * reset the chip to a known state 448 */ 449 ncr53c9x_reset(sc); 450 451 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE; 452 for (r = 0; r < sc->sc_ntarg; r++) { 453 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r]; 454 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */ 455 456 ti->flags = ((!(sc->sc_cfflags & (1 << (r + 16))) && 457 sc->sc_minsync) ? 0 : T_SYNCHOFF) | 458 ((sc->sc_cfflags & (1 << r)) ? T_RSELECTOFF : 0) | 459 T_NEED_TO_RESET; 460 #ifdef DEBUG 461 if (ncr53c9x_notag) 462 ti->flags &= ~T_TAG; 463 #endif 464 ti->period = sc->sc_minsync; 465 ti->offset = 0; 466 ti->cfg3 = 0; 467 } 468 469 if (doreset) { 470 sc->sc_state = NCR_SBR; 471 NCRCMD(sc, NCRCMD_RSTSCSI); 472 /* 473 * XXX gross... 474 * On some systems, commands issued too close to a reset 475 * do not work correctly. We'll force a short delay on 476 * known-to-be-sensitive chips. 477 */ 478 switch (sc->sc_rev) { 479 case NCR_VARIANT_NCR53C94: 480 DELAY(600000); /* 600ms */ 481 break; 482 case NCR_VARIANT_NCR53C96: 483 DELAY(100000); /* 100ms */ 484 break; 485 } 486 } else { 487 sc->sc_state = NCR_IDLE; 488 ncr53c9x_sched(sc); 489 } 490 } 491 492 /* 493 * Read the NCR registers, and save their contents for later use. 494 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading 495 * NCR_INTR - so make sure it is the last read. 496 * 497 * I think that (from reading the docs) most bits in these registers 498 * only make sense when he DMA CSR has an interrupt showing. Call only 499 * if an interrupt is pending. 500 */ 501 __inline__ void 502 ncr53c9x_readregs(sc) 503 struct ncr53c9x_softc *sc; 504 { 505 506 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT); 507 /* Only the stepo bits are of interest */ 508 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK; 509 510 if (sc->sc_rev == NCR_VARIANT_FAS366) 511 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2); 512 513 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR); 514 515 if (sc->sc_glue->gl_clear_latched_intr != NULL) 516 (*sc->sc_glue->gl_clear_latched_intr)(sc); 517 518 /* 519 * Determine the SCSI bus phase, return either a real SCSI bus phase 520 * or some pseudo phase we use to detect certain exceptions. 521 */ 522 523 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS) 524 ? /* Disconnected */ BUSFREE_PHASE 525 : sc->sc_espstat & NCRSTAT_PHASE; 526 527 NCR_MISC(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ", 528 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2)); 529 } 530 531 /* 532 * Convert Synchronous Transfer Period to chip register Clock Per Byte value. 533 */ 534 static inline int 535 ncr53c9x_stp2cpb(sc, period) 536 struct ncr53c9x_softc *sc; 537 int period; 538 { 539 int v; 540 v = (sc->sc_freq * period) / 250; 541 if (ncr53c9x_cpb2stp(sc, v) < period) 542 /* Correct round-down error */ 543 v++; 544 return (v); 545 } 546 547 static inline void 548 ncr53c9x_setsync(sc, ti) 549 struct ncr53c9x_softc *sc; 550 struct ncr53c9x_tinfo *ti; 551 { 552 u_char syncoff, synctp; 553 u_char cfg3 = sc->sc_cfg3 | ti->cfg3; 554 555 if (ti->flags & T_SYNCMODE) { 556 syncoff = ti->offset; 557 synctp = ncr53c9x_stp2cpb(sc, ti->period); 558 if (sc->sc_features & NCR_F_FASTSCSI) { 559 /* 560 * If the period is 200ns or less (ti->period <= 50), 561 * put the chip in Fast SCSI mode. 562 */ 563 if (ti->period <= 50) 564 /* 565 * There are (at least) 4 variations of the 566 * configuration 3 register. The drive attach 567 * routine sets the appropriate bit to put the 568 * chip into Fast SCSI mode so that it doesn't 569 * have to be figured out here each time. 570 */ 571 cfg3 |= (sc->sc_rev == NCR_VARIANT_AM53C974) ? 572 NCRAMDCFG3_FSCSI : NCRCFG3_FSCSI; 573 } 574 575 /* 576 * Am53c974 requires different SYNCTP values when the 577 * FSCSI bit is off. 578 */ 579 if (sc->sc_rev == NCR_VARIANT_AM53C974 && 580 (cfg3 & NCRAMDCFG3_FSCSI) == 0) 581 synctp--; 582 } else { 583 syncoff = 0; 584 synctp = 0; 585 } 586 587 if (sc->sc_features & NCR_F_HASCFG3) 588 NCR_WRITE_REG(sc, NCR_CFG3, cfg3); 589 590 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff); 591 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp); 592 } 593 594 /* 595 * Send a command to a target, set the driver state to NCR_SELECTING 596 * and let the caller take care of the rest. 597 * 598 * Keeping this as a function allows me to say that this may be done 599 * by DMA instead of programmed I/O soon. 600 */ 601 void 602 ncr53c9x_select(sc, ecb) 603 struct ncr53c9x_softc *sc; 604 struct ncr53c9x_ecb *ecb; 605 { 606 struct scsi_link *sc_link = ecb->xs->sc_link; 607 int target = sc_link->target; 608 int lun = sc_link->lun; 609 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target]; 610 int tiflags = ti->flags; 611 u_char *cmd; 612 int clen; 613 int selatn3, selatns; 614 size_t dmasize; 615 616 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag%x,%x)] ", 617 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1])); 618 619 sc->sc_state = NCR_SELECTING; 620 /* 621 * Schedule the timeout now, the first time we will go away 622 * expecting to come back due to an interrupt, because it is 623 * always possible that the interrupt may never happen. 624 */ 625 if ((ecb->xs->flags & SCSI_POLL) == 0) { 626 int timeout = ecb->timeout; 627 628 if (timeout > 1000000) 629 timeout = (timeout / 1000) * hz; 630 else 631 timeout = (timeout * hz) / 1000; 632 timeout_add(&ecb->to, timeout); 633 } 634 635 /* 636 * The docs say the target register is never reset, and I 637 * can't think of a better place to set it 638 */ 639 if (sc->sc_rev == NCR_VARIANT_FAS366) { 640 NCRCMD(sc, NCRCMD_FLUSH); 641 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME); 642 } else { 643 NCR_WRITE_REG(sc, NCR_SELID, target); 644 } 645 ncr53c9x_setsync(sc, ti); 646 647 if ((ecb->flags & ECB_SENSE) != 0) { 648 /* 649 * For REQUEST SENSE, we should not send an IDENTIFY or 650 * otherwise mangle the target. There should be no MESSAGE IN 651 * phase. 652 */ 653 if (sc->sc_features & NCR_F_DMASELECT) { 654 /* setup DMA transfer for command */ 655 dmasize = clen = ecb->clen; 656 sc->sc_cmdlen = clen; 657 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd; 658 659 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, 660 &dmasize); 661 /* Program the SCSI counter */ 662 NCR_SET_COUNT(sc, dmasize); 663 664 if (sc->sc_rev != NCR_VARIANT_FAS366) 665 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 666 667 /* And get the targets attention */ 668 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA); 669 NCRDMA_GO(sc); 670 } else { 671 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen); 672 NCRCMD(sc, NCRCMD_SELNATN); 673 } 674 return; 675 } 676 677 selatn3 = selatns = 0; 678 if (ecb->tag[0] != 0) { 679 if (sc->sc_features & NCR_F_SELATN3) 680 /* use SELATN3 to send tag messages */ 681 selatn3 = 1; 682 else 683 /* We don't have SELATN3; use SELATNS to send tags */ 684 selatns = 1; 685 } 686 687 if (ti->flags & T_NEGOTIATE) { 688 /* We have to use SELATNS to send sync/wide messages */ 689 selatn3 = 0; 690 selatns = 1; 691 } 692 693 cmd = (u_char *)&ecb->cmd.cmd; 694 695 if (selatn3) { 696 /* We'll use tags with SELATN3 */ 697 clen = ecb->clen + 3; 698 cmd -= 3; 699 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */ 700 cmd[1] = ecb->tag[0]; /* msg[1] */ 701 cmd[2] = ecb->tag[1]; /* msg[2] */ 702 } else { 703 /* We don't have tags, or will send messages with SELATNS */ 704 clen = ecb->clen + 1; 705 cmd -= 1; 706 cmd[0] = MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF) == 0); 707 } 708 709 if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) { 710 711 /* setup DMA transfer for command */ 712 dmasize = clen; 713 sc->sc_cmdlen = clen; 714 sc->sc_cmdp = cmd; 715 716 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize); 717 /* Program the SCSI counter */ 718 NCR_SET_COUNT(sc, dmasize); 719 720 /* load the count in */ 721 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */ 722 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 723 724 /* And get the targets attention */ 725 if (selatn3) { 726 sc->sc_msgout = SEND_TAG; 727 sc->sc_flags |= NCR_ATN; 728 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA); 729 } else 730 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA); 731 NCRDMA_GO(sc); 732 return; 733 } 734 735 /* 736 * Who am I. This is where we tell the target that we are 737 * happy for it to disconnect etc. 738 */ 739 740 /* Now get the command into the FIFO */ 741 ncr53c9x_wrfifo(sc, cmd, clen); 742 743 /* And get the targets attention */ 744 if (selatns) { 745 NCR_MISC(("SELATNS \n")); 746 /* Arbitrate, select and stop after IDENTIFY message */ 747 NCRCMD(sc, NCRCMD_SELATNS); 748 } else if (selatn3) { 749 sc->sc_msgout = SEND_TAG; 750 sc->sc_flags |= NCR_ATN; 751 NCRCMD(sc, NCRCMD_SELATN3); 752 } else 753 NCRCMD(sc, NCRCMD_SELATN); 754 } 755 756 /* 757 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 758 */ 759 760 void * 761 ncr53c9x_get_ecb(void *null) 762 { 763 struct ncr53c9x_ecb *ecb; 764 765 ecb = pool_get(&ecb_pool, M_NOWAIT|M_ZERO); 766 if (ecb == NULL) 767 return (NULL); 768 769 timeout_set(&ecb->to, ncr53c9x_timeout, ecb); 770 ecb->flags |= ECB_ALLOC; 771 772 return (ecb); 773 } 774 775 void 776 ncr53c9x_free_ecb(void *null, void *ecb) 777 { 778 pool_put(&ecb_pool, ecb); 779 } 780 781 int 782 ncr53c9x_scsi_probe(struct scsi_link *sc_link) 783 { 784 struct ncr53c9x_softc *sc = sc_link->adapter_softc; 785 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->target]; 786 struct ncr53c9x_linfo *li; 787 int64_t lun = sc_link->lun; 788 int s; 789 790 /* Initialize LUN info and add to list. */ 791 li = malloc(sizeof(*li), M_DEVBUF, M_WAITOK | M_ZERO); 792 if (li == NULL) 793 return (ENOMEM); 794 795 li->last_used = time_second; 796 li->lun = lun; 797 798 s = splbio(); 799 LIST_INSERT_HEAD(&ti->luns, li, link); 800 if (lun < NCR_NLUN) 801 ti->lun[lun] = li; 802 splx(s); 803 804 return (0); 805 806 } 807 808 void 809 ncr53c9x_scsi_free(struct scsi_link *sc_link) 810 { 811 struct ncr53c9x_softc *sc = sc_link->adapter_softc; 812 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->target]; 813 struct ncr53c9x_linfo *li; 814 int64_t lun = sc_link->lun; 815 int s; 816 817 s = splbio(); 818 li = TINFO_LUN(ti, lun); 819 820 LIST_REMOVE(li, link); 821 if (lun < NCR_NLUN) 822 ti->lun[lun] = NULL; 823 splx(s); 824 825 free(li, M_DEVBUF); 826 } 827 828 /* 829 * Start a SCSI-command 830 * This function is called by the higher level SCSI-driver to queue/run 831 * SCSI-commands. 832 */ 833 void 834 ncr53c9x_scsi_cmd(xs) 835 struct scsi_xfer *xs; 836 { 837 struct scsi_link *sc_link = xs->sc_link; 838 struct ncr53c9x_softc *sc = sc_link->adapter_softc; 839 struct ncr53c9x_ecb *ecb; 840 struct ncr53c9x_tinfo *ti; 841 struct ncr53c9x_linfo *li; 842 int64_t lun = sc_link->lun; 843 int s, flags; 844 845 NCR_TRACE(("[ncr53c9x_scsi_cmd] ")); 846 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 847 sc_link->target)); 848 849 /* 850 * Commands larger than 12 bytes seem to confuse the chip 851 * (at least on FAS366 flavours). 852 */ 853 if (xs->cmdlen > 12) { 854 memset(&xs->sense, 0, sizeof(xs->sense)); 855 /* sense data borrowed from gdt(4) */ 856 xs->sense.error_code = SSD_ERRCODE_VALID | SSD_ERRCODE_CURRENT; 857 xs->sense.flags = SKEY_ILLEGAL_REQUEST; 858 xs->sense.add_sense_code = 0x20; /* illcmd */ 859 xs->error = XS_SENSE; 860 scsi_done(xs); 861 return; 862 } 863 864 flags = xs->flags; 865 ti = &sc->sc_tinfo[sc_link->target]; 866 li = TINFO_LUN(ti, lun); 867 868 /* Initialize ecb */ 869 ecb = xs->io; 870 ecb->xs = xs; 871 ecb->timeout = xs->timeout; 872 873 if (flags & SCSI_RESET) { 874 ecb->flags |= ECB_RESET; 875 ecb->clen = 0; 876 ecb->dleft = 0; 877 } else { 878 bcopy(xs->cmd, &ecb->cmd.cmd, xs->cmdlen); 879 ecb->clen = xs->cmdlen; 880 ecb->daddr = xs->data; 881 ecb->dleft = xs->datalen; 882 } 883 ecb->stat = 0; 884 885 s = splbio(); 886 887 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain); 888 ecb->flags |= ECB_READY; 889 if (sc->sc_state == NCR_IDLE) 890 ncr53c9x_sched(sc); 891 892 splx(s); 893 894 if ((flags & SCSI_POLL) == 0) 895 return; 896 897 /* Not allowed to use interrupts, use polling instead */ 898 if (ncr53c9x_poll(sc, xs, ecb->timeout)) { 899 ncr53c9x_timeout(ecb); 900 if (ncr53c9x_poll(sc, xs, ecb->timeout)) 901 ncr53c9x_timeout(ecb); 902 } 903 } 904 905 /* 906 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 907 */ 908 int 909 ncr53c9x_poll(sc, xs, count) 910 struct ncr53c9x_softc *sc; 911 struct scsi_xfer *xs; 912 int count; 913 { 914 int s; 915 916 NCR_TRACE(("[ncr53c9x_poll] ")); 917 while (count) { 918 if (NCRDMA_ISINTR(sc)) { 919 s = splbio(); 920 ncr53c9x_intr(sc); 921 splx(s); 922 } 923 #if alternatively 924 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT) { 925 s = splbio(); 926 ncr53c9x_intr(sc); 927 splx(s); 928 } 929 #endif 930 if ((xs->flags & ITSDONE) != 0) 931 return (0); 932 s = splbio(); 933 if (sc->sc_state == NCR_IDLE) { 934 NCR_TRACE(("[ncr53c9x_poll: rescheduling] ")); 935 ncr53c9x_sched(sc); 936 } 937 splx(s); 938 DELAY(1000); 939 count--; 940 } 941 return (1); 942 } 943 944 945 /* 946 * LOW LEVEL SCSI UTILITIES 947 */ 948 949 /* 950 * Schedule a scsi operation. This has now been pulled out of the interrupt 951 * handler so that we may call it from ncr53c9x_scsi_cmd and ncr53c9x_done. 952 * This may save us an unnecessary interrupt just to get things going. 953 * Should only be called when state == NCR_IDLE and at bio pl. 954 */ 955 void 956 ncr53c9x_sched(sc) 957 struct ncr53c9x_softc *sc; 958 { 959 struct ncr53c9x_ecb *ecb; 960 struct scsi_link *sc_link; 961 struct ncr53c9x_tinfo *ti; 962 int lun; 963 struct ncr53c9x_linfo *li; 964 int s, tag; 965 966 NCR_TRACE(("[ncr53c9x_sched] ")); 967 if (sc->sc_state != NCR_IDLE) 968 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state); 969 970 /* 971 * Find first ecb in ready queue that is for a target/lunit 972 * combinations that is not busy. 973 */ 974 TAILQ_FOREACH(ecb, &sc->ready_list, chain) { 975 sc_link = ecb->xs->sc_link; 976 ti = &sc->sc_tinfo[sc_link->target]; 977 lun = sc_link->lun; 978 979 /* Select type of tag for this command */ 980 if ((ti->flags & (T_RSELECTOFF)) != 0) 981 tag = 0; 982 else if ((ti->flags & T_TAG) == 0) 983 tag = 0; 984 else if ((ecb->flags & ECB_SENSE) != 0) 985 tag = 0; 986 else 987 tag = MSG_SIMPLE_Q_TAG; 988 #if 0 989 /* XXXX Use tags for polled commands? */ 990 if (ecb->xs->flags & SCSI_POLL) 991 tag = 0; 992 #endif 993 s = splbio(); 994 li = TINFO_LUN(ti, lun); 995 if (!li) { 996 /* Initialize LUN info and add to list. */ 997 if ((li = malloc(sizeof(*li), M_DEVBUF, 998 M_NOWAIT | M_ZERO)) == NULL) { 999 splx(s); 1000 continue; 1001 } 1002 li->lun = lun; 1003 1004 LIST_INSERT_HEAD(&ti->luns, li, link); 1005 if (lun < NCR_NLUN) 1006 ti->lun[lun] = li; 1007 } 1008 li->last_used = time_second; 1009 if (!tag) { 1010 /* Try to issue this as an un-tagged command */ 1011 if (!li->untagged) 1012 li->untagged = ecb; 1013 } 1014 if (li->untagged) { 1015 tag = 0; 1016 if ((li->busy != 1) && !li->used) { 1017 /* We need to issue this untagged command now */ 1018 ecb = li->untagged; 1019 sc_link = ecb->xs->sc_link; 1020 } 1021 else { 1022 /* Not ready yet */ 1023 splx(s); 1024 continue; 1025 } 1026 } 1027 ecb->tag[0] = tag; 1028 if (tag) { 1029 int i; 1030 1031 /* Allocate a tag */ 1032 if (li->used == 255) { 1033 /* no free tags */ 1034 splx(s); 1035 continue; 1036 } 1037 /* Start from the last used location */ 1038 for (i=li->avail; i<256; i++) { 1039 if (li->queued[i] == NULL) 1040 break; 1041 } 1042 /* Couldn't find one, start again from the beginning */ 1043 if (i == 256) { 1044 for (i = 0; i<256; i++) { 1045 if (li->queued[i] == NULL) 1046 break; 1047 } 1048 } 1049 #ifdef DIAGNOSTIC 1050 if (i == 256) 1051 panic("ncr53c9x_sched: tag alloc failure"); 1052 #endif 1053 1054 /* Save where to start next time. */ 1055 li->avail = i+1; 1056 li->used++; 1057 1058 li->queued[i] = ecb; 1059 ecb->tag[1] = i; 1060 } 1061 splx(s); 1062 if (li->untagged && (li->busy != 1)) { 1063 li->busy = 1; 1064 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1065 ecb->flags &= ~ECB_READY; 1066 sc->sc_nexus = ecb; 1067 ncr53c9x_select(sc, ecb); 1068 break; 1069 } 1070 if (!li->untagged && tag) { 1071 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1072 ecb->flags &= ~ECB_READY; 1073 sc->sc_nexus = ecb; 1074 ncr53c9x_select(sc, ecb); 1075 break; 1076 } else 1077 NCR_MISC(("%d:%d busy\n", 1078 sc_link->target, 1079 sc_link->lun)); 1080 } 1081 } 1082 1083 void 1084 ncr53c9x_sense(sc, ecb) 1085 struct ncr53c9x_softc *sc; 1086 struct ncr53c9x_ecb *ecb; 1087 { 1088 struct scsi_xfer *xs = ecb->xs; 1089 struct scsi_link *sc_link = xs->sc_link; 1090 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->target]; 1091 struct scsi_sense *ss = (void *)&ecb->cmd.cmd; 1092 struct ncr53c9x_linfo *li; 1093 int lun = sc_link->lun; 1094 1095 NCR_MISC(("requesting sense ")); 1096 /* Next, setup a request sense command block */ 1097 bzero(ss, sizeof(*ss)); 1098 ss->opcode = REQUEST_SENSE; 1099 ss->byte2 = sc_link->lun << 5; 1100 ss->length = sizeof(struct scsi_sense_data); 1101 ecb->clen = sizeof(*ss); 1102 ecb->daddr = (char *)&xs->sense; 1103 ecb->dleft = sizeof(struct scsi_sense_data); 1104 ecb->flags |= ECB_SENSE; 1105 ecb->timeout = NCR_SENSE_TIMEOUT; 1106 ti->senses++; 1107 li = TINFO_LUN(ti, lun); 1108 if (li->busy) li->busy = 0; 1109 ncr53c9x_dequeue(sc, ecb); 1110 li->untagged = ecb; 1111 li->busy = 2; 1112 if (ecb == sc->sc_nexus) { 1113 ncr53c9x_select(sc, ecb); 1114 } else { 1115 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 1116 ecb->flags |= ECB_READY; 1117 if (sc->sc_state == NCR_IDLE) 1118 ncr53c9x_sched(sc); 1119 } 1120 } 1121 1122 /* 1123 * POST PROCESSING OF SCSI_CMD (usually current) 1124 */ 1125 void 1126 ncr53c9x_done(sc, ecb) 1127 struct ncr53c9x_softc *sc; 1128 struct ncr53c9x_ecb *ecb; 1129 { 1130 struct scsi_xfer *xs = ecb->xs; 1131 struct scsi_link *sc_link = xs->sc_link; 1132 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->target]; 1133 int lun = sc_link->lun; 1134 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun); 1135 1136 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error)); 1137 1138 timeout_del(&ecb->to); 1139 1140 if (ecb->stat == SCSI_QUEUE_FULL) { 1141 /* 1142 * Set current throttle -- we should reset 1143 * this periodically 1144 */ 1145 sc_link->openings = li->used - 1; 1146 printf("\n%s: QFULL -- throttling to %d commands\n", 1147 sc->sc_dev.dv_xname, sc_link->openings); 1148 } 1149 1150 /* 1151 * Now, if we've come here with no error code, i.e. we've kept the 1152 * initial XS_NOERROR, and the status code signals that we should 1153 * check sense, we'll need to set up a request sense cmd block and 1154 * push the command back into the ready queue *before* any other 1155 * commands for this target/lunit, else we lose the sense info. 1156 * We don't support chk sense conditions for the request sense cmd. 1157 */ 1158 if (xs->error == XS_NOERROR) { 1159 xs->status = ecb->stat; 1160 if ((ecb->flags & ECB_ABORT) != 0) { 1161 xs->error = XS_TIMEOUT; 1162 } else if ((ecb->flags & ECB_SENSE) != 0) { 1163 xs->error = XS_SENSE; 1164 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) { 1165 /* First, save the return values */ 1166 xs->resid = ecb->dleft; 1167 ncr53c9x_sense(sc, ecb); 1168 return; 1169 } else { 1170 xs->resid = ecb->dleft; 1171 } 1172 } 1173 1174 #ifdef NCR53C9X_DEBUG 1175 if (ncr53c9x_debug & NCR_SHOWMISC) { 1176 if (xs->resid != 0) 1177 printf("resid=%lu ", (unsigned long)xs->resid); 1178 if (xs->error == XS_SENSE) 1179 printf("sense=0x%02x\n", xs->sense.error_code); 1180 else 1181 printf("error=%d\n", xs->error); 1182 } 1183 #endif 1184 1185 /* 1186 * Remove the ECB from whatever queue it's on. 1187 */ 1188 ncr53c9x_dequeue(sc, ecb); 1189 if (ecb == sc->sc_nexus) { 1190 sc->sc_nexus = NULL; 1191 if (sc->sc_state != NCR_CLEANING) { 1192 sc->sc_state = NCR_IDLE; 1193 ncr53c9x_sched(sc); 1194 } 1195 } 1196 1197 ti->cmds++; 1198 scsi_done(xs); 1199 } 1200 1201 void 1202 ncr53c9x_dequeue(sc, ecb) 1203 struct ncr53c9x_softc *sc; 1204 struct ncr53c9x_ecb *ecb; 1205 { 1206 struct ncr53c9x_tinfo *ti = 1207 &sc->sc_tinfo[ecb->xs->sc_link->target]; 1208 struct ncr53c9x_linfo *li; 1209 int64_t lun = ecb->xs->sc_link->lun; 1210 1211 li = TINFO_LUN(ti, lun); 1212 #ifdef DIAGNOSTIC 1213 if ((!li) || (li->lun != lun)) 1214 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist", 1215 (long long)lun, ecb); 1216 #endif 1217 if (li->untagged == ecb) { 1218 li->busy = 0; 1219 li->untagged = NULL; 1220 } 1221 if (ecb->tag[0] && li->queued[ecb->tag[1]]) { 1222 #ifdef DIAGNOSTIC 1223 if (li->queued[ecb->tag[1]] && (li->queued[ecb->tag[1]] != ecb)) 1224 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p " 1225 "instead of ecb %p", ecb->tag[1], 1226 (long long)lun, 1227 li->queued[ecb->tag[1]], ecb); 1228 #endif 1229 li->queued[ecb->tag[1]] = NULL; 1230 li->used --; 1231 1232 } 1233 if (ecb->flags & ECB_READY) { 1234 ecb->flags &= ~ECB_READY; 1235 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1236 } 1237 } 1238 1239 /* 1240 * INTERRUPT/PROTOCOL ENGINE 1241 */ 1242 1243 /* 1244 * Schedule an outgoing message by prioritizing it, and asserting 1245 * attention on the bus. We can only do this when we are the initiator 1246 * else there will be an illegal command interrupt. 1247 */ 1248 #define ncr53c9x_sched_msgout(m) \ 1249 do { \ 1250 NCR_MISC(("ncr53c9x_sched_msgout %x %d ", m, __LINE__)); \ 1251 NCRCMD(sc, NCRCMD_SETATN); \ 1252 sc->sc_flags |= NCR_ATN; \ 1253 sc->sc_msgpriq |= (m); \ 1254 } while (0) 1255 1256 static void 1257 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc) 1258 { 1259 NCR_MISC(("[flushfifo] ")); 1260 1261 NCRCMD(sc, NCRCMD_FLUSH); 1262 1263 if (sc->sc_phase == COMMAND_PHASE || 1264 sc->sc_phase == MESSAGE_OUT_PHASE) 1265 DELAY(2); 1266 } 1267 1268 static int 1269 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how) 1270 { 1271 int i, n; 1272 u_char *buf; 1273 1274 switch(how) { 1275 case NCR_RDFIFO_START: 1276 buf = sc->sc_imess; 1277 sc->sc_imlen = 0; 1278 break; 1279 case NCR_RDFIFO_CONTINUE: 1280 buf = sc->sc_imess + sc->sc_imlen; 1281 break; 1282 default: 1283 panic("ncr53c9x_rdfifo: bad flag"); 1284 break; 1285 } 1286 1287 /* 1288 * XXX buffer (sc_imess) size for message 1289 */ 1290 1291 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF; 1292 1293 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1294 n *= 2; 1295 1296 for (i = 0; i < n; i++) 1297 buf[i] = NCR_READ_REG(sc, NCR_FIFO); 1298 1299 if (sc->sc_espstat2 & FAS_STAT2_ISHUTTLE) { 1300 1301 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1302 buf[i++] = NCR_READ_REG(sc, NCR_FIFO); 1303 1304 NCR_READ_REG(sc, NCR_FIFO); 1305 1306 ncr53c9x_flushfifo(sc); 1307 } 1308 } else { 1309 for (i = 0; i < n; i++) 1310 buf[i] = NCR_READ_REG(sc, NCR_FIFO); 1311 } 1312 1313 sc->sc_imlen += i; 1314 1315 #ifdef NCR53C9X_DEBUG 1316 { 1317 int j; 1318 1319 NCR_TRACE(("\n[rdfifo %s (%d):", 1320 (how == NCR_RDFIFO_START) ? "start" : "cont", 1321 (int)sc->sc_imlen)); 1322 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1323 for (j = 0; j < sc->sc_imlen; j++) 1324 printf(" %02x", sc->sc_imess[j]); 1325 printf("]\n"); 1326 } 1327 } 1328 #endif 1329 return sc->sc_imlen; 1330 } 1331 1332 static void 1333 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len) 1334 { 1335 int i; 1336 1337 #ifdef NCR53C9X_DEBUG 1338 NCR_MISC(("[wrfifo(%d):", len)); 1339 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1340 for (i = 0; i < len; i++) 1341 printf(" %02x", p[i]); 1342 printf("]\n"); 1343 } 1344 #endif 1345 1346 for (i = 0; i < len; i++) { 1347 NCR_WRITE_REG(sc, NCR_FIFO, p[i]); 1348 1349 if (sc->sc_rev == NCR_VARIANT_FAS366) 1350 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1351 } 1352 } 1353 1354 int 1355 ncr53c9x_reselect(sc, message, tagtype, tagid) 1356 struct ncr53c9x_softc *sc; 1357 int message; 1358 int tagtype; 1359 int tagid; 1360 { 1361 u_char selid, target, lun; 1362 struct ncr53c9x_ecb *ecb = NULL; 1363 struct ncr53c9x_tinfo *ti; 1364 struct ncr53c9x_linfo *li; 1365 1366 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1367 target = sc->sc_selid; 1368 } else { 1369 /* 1370 * The SCSI chip made a snapshot of the data bus while the reselection 1371 * was being negotiated. This enables us to determine which target did 1372 * the reselect. 1373 */ 1374 selid = sc->sc_selid & ~(1 << sc->sc_id); 1375 if (selid & (selid - 1)) { 1376 printf("%s: reselect with invalid selid %02x;" 1377 " sending DEVICE RESET\n", sc->sc_dev.dv_xname, selid); 1378 goto reset; 1379 1380 } 1381 target = ffs(selid) - 1; 1382 } 1383 lun = message & 0x07; 1384 1385 /* 1386 * Search wait queue for disconnected cmd 1387 * The list should be short, so I haven't bothered with 1388 * any more sophisticated structures than a simple 1389 * singly linked list. 1390 */ 1391 ti = &sc->sc_tinfo[target]; 1392 li = TINFO_LUN(ti, lun); 1393 1394 /* 1395 * We can get as far as the LUN with the IDENTIFY 1396 * message. Check to see if we're running an 1397 * un-tagged command. Otherwise ack the IDENTIFY 1398 * and wait for a tag message. 1399 */ 1400 if (li != NULL) { 1401 if (li->untagged != NULL && li->busy) 1402 ecb = li->untagged; 1403 else if (tagtype != MSG_SIMPLE_Q_TAG) { 1404 /* Wait for tag to come by */ 1405 sc->sc_state = NCR_IDENTIFIED; 1406 return (0); 1407 } else if (tagtype) ecb = li->queued[tagid]; 1408 } 1409 if (ecb == NULL) { 1410 printf("%s: reselect from target %d lun %d tag %x:%x with no nexus;" 1411 " sending ABORT\n", sc->sc_dev.dv_xname, target, lun, tagtype, tagid); 1412 goto abort; 1413 } 1414 1415 /* Make this nexus active again. */ 1416 sc->sc_state = NCR_CONNECTED; 1417 sc->sc_nexus = ecb; 1418 ncr53c9x_setsync(sc, ti); 1419 1420 if (ecb->flags & ECB_RESET) 1421 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1422 else if (ecb->flags & ECB_ABORT) 1423 ncr53c9x_sched_msgout(SEND_ABORT); 1424 1425 /* Do an implicit RESTORE POINTERS. */ 1426 sc->sc_dp = ecb->daddr; 1427 sc->sc_dleft = ecb->dleft; 1428 1429 return (0); 1430 1431 reset: 1432 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1433 return (1); 1434 1435 abort: 1436 ncr53c9x_sched_msgout(SEND_ABORT); 1437 return (1); 1438 } 1439 1440 static inline int 1441 __verify_msg_format(u_char *p, int len) 1442 { 1443 1444 if (len == 1 && IS1BYTEMSG(p[0])) 1445 return 1; 1446 if (len == 2 && IS2BYTEMSG(p[0])) 1447 return 1; 1448 if (len >= 3 && ISEXTMSG(p[0]) && 1449 len == p[1] + 2) 1450 return 1; 1451 1452 return 0; 1453 } 1454 1455 /* 1456 * Get an incoming message as initiator. 1457 * 1458 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a 1459 * byte in the FIFO 1460 */ 1461 void 1462 ncr53c9x_msgin(sc) 1463 struct ncr53c9x_softc *sc; 1464 { 1465 1466 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen)); 1467 1468 if (sc->sc_imlen == 0) { 1469 printf("%s: msgin: no msg byte available\n", sc->sc_dev.dv_xname); 1470 return; 1471 } 1472 1473 /* 1474 * Prepare for a new message. A message should (according 1475 * to the SCSI standard) be transmitted in one single 1476 * MESSAGE_IN_PHASE. If we have been in some other phase, 1477 * then this is a new message. 1478 */ 1479 if (sc->sc_prevphase != MESSAGE_IN_PHASE && sc->sc_state != NCR_RESELECTED) { 1480 printf("%s: phase change, dropping message, prev %d, state %d\n", 1481 sc->sc_dev.dv_xname, sc->sc_prevphase, sc->sc_state); 1482 sc->sc_flags &= ~NCR_DROP_MSGI; 1483 sc->sc_imlen = 0; 1484 } 1485 1486 NCR_TRACE(("<msgbyte:0x%02x>", sc->sc_imess[0])); 1487 1488 /* 1489 * If we're going to reject the message, don't bother storing 1490 * the incoming bytes. But still, we need to ACK them. 1491 */ 1492 if ((sc->sc_flags & NCR_DROP_MSGI)) { 1493 NCRCMD(sc, NCRCMD_MSGOK); 1494 printf("<dropping msg byte %x>", 1495 sc->sc_imess[sc->sc_imlen]); 1496 return; 1497 } 1498 1499 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) { 1500 ncr53c9x_sched_msgout(SEND_REJECT); 1501 sc->sc_flags |= NCR_DROP_MSGI; 1502 } else { 1503 u_char *pb; 1504 int plen; 1505 1506 switch (sc->sc_state) { 1507 /* 1508 * if received message is the first of reselection 1509 * then first byte is selid, and then message 1510 */ 1511 case NCR_RESELECTED: 1512 pb = sc->sc_imess + 1; 1513 plen = sc->sc_imlen - 1; 1514 break; 1515 default: 1516 pb = sc->sc_imess; 1517 plen = sc->sc_imlen; 1518 break; 1519 } 1520 1521 if (__verify_msg_format(pb, plen)) 1522 goto gotit; 1523 } 1524 1525 /* Ack what we have so far */ 1526 NCRCMD(sc, NCRCMD_MSGOK); 1527 return; 1528 1529 gotit: 1530 NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state)); 1531 /* we got complete message, flush the imess, XXX nobody uses imlen below */ 1532 sc->sc_imlen = 0; 1533 1534 /* 1535 * Now we should have a complete message (1 byte, 2 byte 1536 * and moderately long extended messages). We only handle 1537 * extended messages which total length is shorter than 1538 * NCR_MAX_MSG_LEN. Longer messages will be amputated. 1539 */ 1540 switch (sc->sc_state) { 1541 struct ncr53c9x_ecb *ecb; 1542 struct ncr53c9x_tinfo *ti; 1543 struct ncr53c9x_linfo *li; 1544 int lun; 1545 1546 case NCR_CONNECTED: 1547 ecb = sc->sc_nexus; 1548 ti = &sc->sc_tinfo[ecb->xs->sc_link->target]; 1549 1550 switch (sc->sc_imess[0]) { 1551 case MSG_CMDCOMPLETE: 1552 NCR_MSGS(("cmdcomplete ")); 1553 if (sc->sc_dleft < 0) { 1554 sc_print_addr(ecb->xs->sc_link); 1555 printf("got %ld extra bytes\n", 1556 -(long)sc->sc_dleft); 1557 sc->sc_dleft = 0; 1558 } 1559 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) 1560 ? 0 1561 : sc->sc_dleft; 1562 if ((ecb->flags & ECB_SENSE) == 0) 1563 ecb->xs->resid = ecb->dleft; 1564 sc->sc_state = NCR_CMDCOMPLETE; 1565 break; 1566 1567 case MSG_MESSAGE_REJECT: 1568 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout)); 1569 switch (sc->sc_msgout) { 1570 case SEND_TAG: 1571 /* Target does not like tagged queuing. 1572 * - Flush the command queue 1573 * - Disable tagged queuing for the target 1574 * - Dequeue ecb from the queued array. 1575 */ 1576 printf("%s: tagged queuing rejected: target %d\n", 1577 sc->sc_dev.dv_xname, ecb->xs->sc_link->target); 1578 1579 NCR_MSGS(("(rejected sent tag)")); 1580 NCRCMD(sc, NCRCMD_FLUSH); 1581 DELAY(1); 1582 ti->flags &= ~T_TAG; 1583 lun = ecb->xs->sc_link->lun; 1584 li = TINFO_LUN(ti, lun); 1585 if (ecb->tag[0] && 1586 li->queued[ecb->tag[1]] != NULL) { 1587 li->queued[ecb->tag[1]] = NULL; 1588 li->used--; 1589 } 1590 ecb->tag[0] = ecb->tag[1] = 0; 1591 li->untagged = ecb; 1592 li->busy = 1; 1593 break; 1594 1595 case SEND_SDTR: 1596 printf("%s: sync transfer rejected: target %d\n", 1597 sc->sc_dev.dv_xname, ecb->xs->sc_link->target); 1598 sc->sc_flags &= ~NCR_SYNCHNEGO; 1599 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 1600 ncr53c9x_setsync(sc, ti); 1601 break; 1602 1603 case SEND_WDTR: 1604 printf("%s: wide transfer rejected: target %d\n", 1605 sc->sc_dev.dv_xname, ecb->xs->sc_link->target); 1606 ti->flags &= ~T_WIDE; 1607 ti->width = 0; 1608 break; 1609 1610 case SEND_INIT_DET_ERR: 1611 goto abort; 1612 } 1613 break; 1614 1615 case MSG_NOOP: 1616 NCR_MSGS(("noop ")); 1617 break; 1618 1619 case MSG_HEAD_OF_Q_TAG: 1620 case MSG_SIMPLE_Q_TAG: 1621 case MSG_ORDERED_Q_TAG: 1622 NCR_MSGS(("TAG %x:%x", sc->sc_imess[0], sc->sc_imess[1])); 1623 break; 1624 1625 case MSG_DISCONNECT: 1626 NCR_MSGS(("disconnect ")); 1627 ti->dconns++; 1628 sc->sc_state = NCR_DISCONNECT; 1629 1630 /* 1631 * Mark the fact that all bytes have moved. The 1632 * target may not bother to do a SAVE POINTERS 1633 * at this stage. This flag will set the residual 1634 * count to zero on MSG COMPLETE. 1635 */ 1636 if (sc->sc_dleft == 0) 1637 ecb->flags |= ECB_TENTATIVE_DONE; 1638 1639 break; 1640 1641 case MSG_SAVEDATAPOINTER: 1642 NCR_MSGS(("save datapointer ")); 1643 ecb->daddr = sc->sc_dp; 1644 ecb->dleft = sc->sc_dleft; 1645 break; 1646 1647 case MSG_RESTOREPOINTERS: 1648 NCR_MSGS(("restore datapointer ")); 1649 sc->sc_dp = ecb->daddr; 1650 sc->sc_dleft = ecb->dleft; 1651 break; 1652 1653 case MSG_EXTENDED: 1654 NCR_MSGS(("extended(%x) ", sc->sc_imess[2])); 1655 switch (sc->sc_imess[2]) { 1656 case MSG_EXT_SDTR: 1657 NCR_MSGS(("SDTR period %d, offset %d ", 1658 sc->sc_imess[3], sc->sc_imess[4])); 1659 if (sc->sc_imess[1] != 3) 1660 goto reject; 1661 ti->period = sc->sc_imess[3]; 1662 ti->offset = sc->sc_imess[4]; 1663 ti->flags &= ~T_NEGOTIATE; 1664 if (sc->sc_minsync == 0 || 1665 ti->offset == 0 || 1666 ti->period > 124) { 1667 #ifdef NCR53C9X_DEBUG 1668 sc_print_addr(ecb->xs->sc_link); 1669 printf("async mode\n"); 1670 #endif 1671 if ((sc->sc_flags&NCR_SYNCHNEGO) 1672 == 0) { 1673 /* 1674 * target initiated negotiation 1675 */ 1676 ti->offset = 0; 1677 ti->flags &= ~T_SYNCMODE; 1678 ncr53c9x_sched_msgout( 1679 SEND_SDTR); 1680 } else { 1681 /* we are async */ 1682 ti->flags &= ~T_SYNCMODE; 1683 } 1684 } else { 1685 #ifdef NCR53C9X_DEBUG 1686 int r, s; 1687 #endif 1688 int p; 1689 1690 p = ncr53c9x_stp2cpb(sc, ti->period); 1691 ti->period = ncr53c9x_cpb2stp(sc, p); 1692 #ifdef NCR53C9X_DEBUG 1693 sc_print_addr(ecb->xs->sc_link); 1694 r = 250/ti->period; 1695 s = (100*250)/ti->period - 100*r; 1696 printf("max sync rate %d.%02dMB/s\n", 1697 r, s); 1698 #endif 1699 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) { 1700 /* 1701 * target initiated negotiation 1702 */ 1703 if (ti->period < 1704 sc->sc_minsync) 1705 ti->period = 1706 sc->sc_minsync; 1707 if (ti->offset > 15) 1708 ti->offset = 15; 1709 ti->flags &= ~T_SYNCMODE; 1710 ncr53c9x_sched_msgout( 1711 SEND_SDTR); 1712 } else { 1713 /* we are sync */ 1714 ti->flags |= T_SYNCMODE; 1715 } 1716 } 1717 sc->sc_flags &= ~NCR_SYNCHNEGO; 1718 ncr53c9x_setsync(sc, ti); 1719 break; 1720 1721 case MSG_EXT_WDTR: 1722 printf("%s: wide mode %d\n", 1723 sc->sc_dev.dv_xname, sc->sc_imess[3]); 1724 if (sc->sc_imess[3] == 1) { 1725 ti->cfg3 |= NCRFASCFG3_EWIDE; 1726 ncr53c9x_setsync(sc, ti); 1727 } else 1728 ti->width = 0; 1729 ti->flags &= ~T_WIDE; 1730 break; 1731 default: 1732 sc_print_addr(ecb->xs->sc_link); 1733 printf("unrecognized MESSAGE EXTENDED;" 1734 " sending REJECT\n"); 1735 goto reject; 1736 } 1737 break; 1738 1739 default: 1740 NCR_MSGS(("ident ")); 1741 sc_print_addr(ecb->xs->sc_link); 1742 printf("unrecognized MESSAGE; sending REJECT\n"); 1743 reject: 1744 ncr53c9x_sched_msgout(SEND_REJECT); 1745 break; 1746 } 1747 break; 1748 1749 case NCR_IDENTIFIED: 1750 /* 1751 * IDENTIFY message was received and queue tag is expected now 1752 */ 1753 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) || 1754 (sc->sc_msgify == 0)) { 1755 printf("%s: TAG reselect without IDENTIFY;" 1756 " MSG %x;" 1757 " sending DEVICE RESET\n", 1758 sc->sc_dev.dv_xname, 1759 sc->sc_imess[0]); 1760 goto reset; 1761 } 1762 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 1763 sc->sc_imess[0], sc->sc_imess[1]); 1764 break; 1765 1766 case NCR_RESELECTED: 1767 if (MSG_ISIDENTIFY(sc->sc_imess[1])) { 1768 sc->sc_msgify = sc->sc_imess[1]; 1769 } else { 1770 printf("%s: reselect without IDENTIFY;" 1771 " MSG %x;" 1772 " sending DEVICE RESET\n", 1773 sc->sc_dev.dv_xname, 1774 sc->sc_imess[1]); 1775 goto reset; 1776 } 1777 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0); 1778 break; 1779 1780 default: 1781 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", 1782 sc->sc_dev.dv_xname); 1783 reset: 1784 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1785 break; 1786 1787 abort: 1788 ncr53c9x_sched_msgout(SEND_ABORT); 1789 break; 1790 } 1791 1792 /* if we have more messages to send set ATN */ 1793 if (sc->sc_msgpriq) 1794 NCRCMD(sc, NCRCMD_SETATN); 1795 1796 /* Ack last message byte */ 1797 NCRCMD(sc, NCRCMD_MSGOK); 1798 1799 /* Done, reset message pointer. */ 1800 sc->sc_flags &= ~NCR_DROP_MSGI; 1801 sc->sc_imlen = 0; 1802 } 1803 1804 1805 /* 1806 * Send the highest priority, scheduled message 1807 */ 1808 void 1809 ncr53c9x_msgout(sc) 1810 struct ncr53c9x_softc *sc; 1811 { 1812 struct ncr53c9x_tinfo *ti; 1813 struct ncr53c9x_ecb *ecb; 1814 size_t size; 1815 1816 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]", 1817 sc->sc_msgpriq, sc->sc_prevphase)); 1818 1819 /* 1820 * XXX - the NCR_ATN flag is not in sync with the actual ATN 1821 * condition on the SCSI bus. The 53c9x chip 1822 * automatically turns off ATN before sending the 1823 * message byte. (see also the comment below in the 1824 * default case when picking out a message to send) 1825 */ 1826 if (sc->sc_flags & NCR_ATN) { 1827 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) { 1828 new: 1829 NCRCMD(sc, NCRCMD_FLUSH); 1830 /* DELAY(1); */ 1831 sc->sc_msgoutq = 0; 1832 sc->sc_omlen = 0; 1833 } 1834 } else { 1835 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { 1836 ncr53c9x_sched_msgout(sc->sc_msgoutq); 1837 goto new; 1838 } else { 1839 printf("%s at line %d: unexpected MESSAGE OUT phase\n", 1840 sc->sc_dev.dv_xname, __LINE__); 1841 } 1842 } 1843 1844 if (sc->sc_omlen == 0) { 1845 /* Pick up highest priority message */ 1846 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq; 1847 sc->sc_msgoutq |= sc->sc_msgout; 1848 sc->sc_msgpriq &= ~sc->sc_msgout; 1849 sc->sc_omlen = 1; /* "Default" message len */ 1850 switch (sc->sc_msgout) { 1851 case SEND_SDTR: 1852 ecb = sc->sc_nexus; 1853 ti = &sc->sc_tinfo[ecb->xs->sc_link->target]; 1854 sc->sc_omess[0] = MSG_EXTENDED; 1855 sc->sc_omess[1] = 3; 1856 sc->sc_omess[2] = MSG_EXT_SDTR; 1857 sc->sc_omess[3] = ti->period; 1858 sc->sc_omess[4] = ti->offset; 1859 sc->sc_omlen = 5; 1860 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) { 1861 ti->flags |= T_SYNCMODE; 1862 ncr53c9x_setsync(sc, ti); 1863 } 1864 break; 1865 case SEND_WDTR: 1866 ecb = sc->sc_nexus; 1867 ti = &sc->sc_tinfo[ecb->xs->sc_link->target]; 1868 sc->sc_omess[0] = MSG_EXTENDED; 1869 sc->sc_omess[1] = 2; 1870 sc->sc_omess[2] = MSG_EXT_WDTR; 1871 sc->sc_omess[3] = ti->width; 1872 sc->sc_omlen = 4; 1873 break; 1874 case SEND_IDENTIFY: 1875 if (sc->sc_state != NCR_CONNECTED) { 1876 printf("%s at line %d: no nexus\n", 1877 sc->sc_dev.dv_xname, __LINE__); 1878 } 1879 ecb = sc->sc_nexus; 1880 sc->sc_omess[0] = 1881 MSG_IDENTIFY(ecb->xs->sc_link->lun, 0); 1882 break; 1883 case SEND_TAG: 1884 if (sc->sc_state != NCR_CONNECTED) { 1885 printf("%s at line %d: no nexus\n", 1886 sc->sc_dev.dv_xname, __LINE__); 1887 } 1888 ecb = sc->sc_nexus; 1889 sc->sc_omess[0] = ecb->tag[0]; 1890 sc->sc_omess[1] = ecb->tag[1]; 1891 sc->sc_omlen = 2; 1892 break; 1893 case SEND_DEV_RESET: 1894 sc->sc_flags |= NCR_ABORTING; 1895 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1896 ecb = sc->sc_nexus; 1897 ti = &sc->sc_tinfo[ecb->xs->sc_link->target]; 1898 ti->flags &= ~T_SYNCMODE; 1899 if ((ti->flags & T_SYNCHOFF) == 0) 1900 /* We can re-start sync negotiation */ 1901 ti->flags |= T_NEGOTIATE; 1902 break; 1903 case SEND_PARITY_ERROR: 1904 sc->sc_omess[0] = MSG_PARITY_ERROR; 1905 break; 1906 case SEND_ABORT: 1907 sc->sc_flags |= NCR_ABORTING; 1908 sc->sc_omess[0] = MSG_ABORT; 1909 break; 1910 case SEND_INIT_DET_ERR: 1911 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 1912 break; 1913 case SEND_REJECT: 1914 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 1915 break; 1916 default: 1917 /* 1918 * We normally do not get here, since the chip 1919 * automatically turns off ATN before the last 1920 * byte of a message is sent to the target. 1921 * However, if the target rejects our (multi-byte) 1922 * message early by switching to MSG IN phase 1923 * ATN remains on, so the target may return to 1924 * MSG OUT phase. If there are no scheduled messages 1925 * left we send a NO-OP. 1926 * 1927 * XXX - Note that this leaves no useful purpose for 1928 * the NCR_ATN flag. 1929 */ 1930 sc->sc_flags &= ~NCR_ATN; 1931 sc->sc_omess[0] = MSG_NOOP; 1932 break; 1933 } 1934 sc->sc_omp = sc->sc_omess; 1935 } 1936 1937 #ifdef DEBUG 1938 { 1939 int i; 1940 1941 for (i = 0; i<sc->sc_omlen; i++) 1942 NCR_MISC(("<msgbyte:0x%02x>", sc->sc_omess[i])); 1943 } 1944 #endif 1945 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1946 /* 1947 * XXX fifo size 1948 */ 1949 ncr53c9x_flushfifo(sc); 1950 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen); 1951 NCRCMD(sc, NCRCMD_TRANS); 1952 } else { 1953 /* (re)send the message */ 1954 size = min(sc->sc_omlen, sc->sc_maxxfer); 1955 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size); 1956 /* Program the SCSI counter */ 1957 NCR_SET_COUNT(sc, size); 1958 1959 /* Load the count in and start the message-out transfer */ 1960 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 1961 NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA); 1962 NCRDMA_GO(sc); 1963 } 1964 } 1965 1966 /* 1967 * This is the most critical part of the driver, and has to know 1968 * how to deal with *all* error conditions and phases from the SCSI 1969 * bus. If there are no errors and the DMA was active, then call the 1970 * DMA pseudo-interrupt handler. If this returns 1, then that was it 1971 * and we can return from here without further processing. 1972 * 1973 * Most of this needs verifying. 1974 */ 1975 int sdebug = 0; 1976 int 1977 ncr53c9x_intr(arg) 1978 void *arg; 1979 { 1980 struct ncr53c9x_softc *sc = arg; 1981 struct ncr53c9x_ecb *ecb; 1982 struct scsi_link *sc_link; 1983 struct ncr53c9x_tinfo *ti; 1984 size_t size; 1985 int nfifo; 1986 1987 NCR_TRACE(("[ncr53c9x_intr: state %d] ", sc->sc_state)); 1988 1989 if (!NCRDMA_ISINTR(sc)) 1990 return (0); 1991 1992 again: 1993 /* and what do the registers say... */ 1994 ncr53c9x_readregs(sc); 1995 1996 /* 1997 * At the moment, only a SCSI Bus Reset or Illegal 1998 * Command are classed as errors. A disconnect is a 1999 * valid condition, and we let the code check is the 2000 * "NCR_BUSFREE_OK" flag was set before declaring it 2001 * and error. 2002 * 2003 * Also, the status register tells us about "Gross 2004 * Errors" and "Parity errors". Only the Gross Error 2005 * is really bad, and the parity errors are dealt 2006 * with later 2007 * 2008 * TODO 2009 * If there are too many parity error, go to slow 2010 * cable mode ? 2011 */ 2012 2013 /* SCSI Reset */ 2014 if (sc->sc_espintr & NCRINTR_SBR) { 2015 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2016 NCRCMD(sc, NCRCMD_FLUSH); 2017 DELAY(1); 2018 } 2019 if (sc->sc_state != NCR_SBR) { 2020 printf("%s: SCSI bus reset\n", 2021 sc->sc_dev.dv_xname); 2022 ncr53c9x_init(sc, 0); /* Restart everything */ 2023 return (1); 2024 } 2025 #if 0 2026 /*XXX*/ printf("<expected bus reset: " 2027 "[intr %x, stat %x, step %d]>\n", 2028 sc->sc_espintr, sc->sc_espstat, 2029 sc->sc_espstep); 2030 #endif 2031 if (sc->sc_nexus) 2032 panic("%s: nexus in reset state", 2033 sc->sc_dev.dv_xname); 2034 goto sched; 2035 } 2036 2037 ecb = sc->sc_nexus; 2038 2039 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL) 2040 if (sc->sc_espintr & NCRINTR_ERR || 2041 sc->sc_espstat & NCRSTAT_GE) { 2042 2043 if (sc->sc_espstat & NCRSTAT_GE) { 2044 /* Gross Error; no target ? */ 2045 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2046 NCRCMD(sc, NCRCMD_FLUSH); 2047 DELAY(1); 2048 } 2049 if (sc->sc_state == NCR_CONNECTED || 2050 sc->sc_state == NCR_SELECTING) { 2051 ecb->xs->error = XS_TIMEOUT; 2052 ncr53c9x_done(sc, ecb); 2053 } 2054 return (1); 2055 } 2056 2057 if (sc->sc_espintr & NCRINTR_ILL) { 2058 if (sc->sc_flags & NCR_EXPECT_ILLCMD) { 2059 /* 2060 * Eat away "Illegal command" interrupt 2061 * on a ESP100 caused by a re-selection 2062 * while we were trying to select 2063 * another target. 2064 */ 2065 #ifdef DEBUG 2066 printf("%s: ESP100 work-around activated\n", 2067 sc->sc_dev.dv_xname); 2068 #endif 2069 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2070 return (1); 2071 } 2072 /* illegal command, out of sync ? */ 2073 printf("%s: illegal command: 0x%x " 2074 "(state %d, phase %x, prevphase %x)\n", 2075 sc->sc_dev.dv_xname, sc->sc_lastcmd, 2076 sc->sc_state, sc->sc_phase, 2077 sc->sc_prevphase); 2078 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2079 NCRCMD(sc, NCRCMD_FLUSH); 2080 DELAY(1); 2081 } 2082 ncr53c9x_init(sc, 1); /* Restart everything */ 2083 return (1); 2084 } 2085 } 2086 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2087 2088 /* 2089 * Call if DMA is active. 2090 * 2091 * If DMA_INTR returns true, then maybe go 'round the loop 2092 * again in case there is no more DMA queued, but a phase 2093 * change is expected. 2094 */ 2095 if (NCRDMA_ISACTIVE(sc)) { 2096 int r = NCRDMA_INTR(sc); 2097 if (r == -1) { 2098 printf("%s: DMA error; resetting\n", 2099 sc->sc_dev.dv_xname); 2100 ncr53c9x_init(sc, 1); 2101 return (1); 2102 } 2103 /* If DMA active here, then go back to work... */ 2104 if (NCRDMA_ISACTIVE(sc)) 2105 return (1); 2106 2107 if ((sc->sc_espstat & NCRSTAT_TC) == 0) { 2108 /* 2109 * DMA not completed. If we can not find a 2110 * acceptable explanation, print a diagnostic. 2111 */ 2112 if (sc->sc_state == NCR_SELECTING) 2113 /* 2114 * This can happen if we are reselected 2115 * while using DMA to select a target. 2116 */ 2117 /*void*/; 2118 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE){ 2119 /* 2120 * Our (multi-byte) message (eg SDTR) 2121 * was interrupted by the target to 2122 * send a MSG REJECT. 2123 * Print diagnostic if current phase 2124 * is not MESSAGE IN. 2125 */ 2126 if (sc->sc_phase != MESSAGE_IN_PHASE) 2127 printf("%s: !TC on MSG OUT" 2128 " [intr %x, stat %x, step %d]" 2129 " prevphase %x, resid %lx\n", 2130 sc->sc_dev.dv_xname, 2131 sc->sc_espintr, 2132 sc->sc_espstat, 2133 sc->sc_espstep, 2134 sc->sc_prevphase, 2135 (u_long)sc->sc_omlen); 2136 } else if (sc->sc_dleft == 0) { 2137 /* 2138 * The DMA operation was started for 2139 * a DATA transfer. Print a diagnostic 2140 * if the DMA counter and TC bit 2141 * appear to be out of sync. 2142 */ 2143 printf("%s: !TC on DATA XFER" 2144 " [intr %x, stat %x, step %d]" 2145 " prevphase %x, resid %x\n", 2146 sc->sc_dev.dv_xname, 2147 sc->sc_espintr, 2148 sc->sc_espstat, 2149 sc->sc_espstep, 2150 sc->sc_prevphase, 2151 ecb?ecb->dleft:-1); 2152 } 2153 } 2154 } 2155 2156 /* 2157 * check for less serious errors 2158 */ 2159 if (sc->sc_espstat & NCRSTAT_PE) { 2160 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname); 2161 if (sc->sc_prevphase == MESSAGE_IN_PHASE) 2162 ncr53c9x_sched_msgout(SEND_PARITY_ERROR); 2163 else 2164 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR); 2165 } 2166 2167 if (sc->sc_espintr & NCRINTR_DIS) { 2168 sc->sc_msgify = 0; 2169 NCR_MISC(("<DISC [intr %x, stat %x, step %d]>", 2170 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep)); 2171 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2172 NCRCMD(sc, NCRCMD_FLUSH); 2173 /* DELAY(1); */ 2174 } 2175 /* 2176 * This command must (apparently) be issued within 2177 * 250mS of a disconnect. So here you are... 2178 */ 2179 NCRCMD(sc, NCRCMD_ENSEL); 2180 2181 switch (sc->sc_state) { 2182 case NCR_RESELECTED: 2183 goto sched; 2184 2185 case NCR_SELECTING: 2186 ecb->xs->error = XS_SELTIMEOUT; 2187 goto finish; 2188 2189 case NCR_CONNECTED: 2190 if ((sc->sc_flags & NCR_SYNCHNEGO)) { 2191 #ifdef NCR53C9X_DEBUG 2192 if (ecb) 2193 sc_print_addr(ecb->xs->sc_link); 2194 printf("sync nego not completed!\n"); 2195 #endif 2196 ti = &sc->sc_tinfo[ecb->xs->sc_link->target]; 2197 sc->sc_flags &= ~NCR_SYNCHNEGO; 2198 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 2199 } 2200 2201 /* it may be OK to disconnect */ 2202 if ((sc->sc_flags & NCR_ABORTING) == 0) { 2203 /* 2204 * Section 5.1.1 of the SCSI 2 spec 2205 * suggests issuing a REQUEST SENSE 2206 * following an unexpected disconnect. 2207 * Some devices go into a contingent 2208 * allegiance condition when 2209 * disconnecting, and this is necessary 2210 * to clean up their state. 2211 */ 2212 printf("%s: unexpected disconnect; ", 2213 sc->sc_dev.dv_xname); 2214 if (ecb->flags & ECB_SENSE) { 2215 printf("resetting\n"); 2216 goto reset; 2217 } 2218 printf("sending REQUEST SENSE\n"); 2219 timeout_del(&ecb->to); 2220 ncr53c9x_sense(sc, ecb); 2221 goto out; 2222 } 2223 2224 ecb->xs->error = XS_TIMEOUT; 2225 goto finish; 2226 2227 case NCR_DISCONNECT: 2228 sc->sc_nexus = NULL; 2229 goto sched; 2230 2231 case NCR_CMDCOMPLETE: 2232 goto finish; 2233 } 2234 } 2235 2236 switch (sc->sc_state) { 2237 2238 case NCR_SBR: 2239 printf("%s: waiting for SCSI Bus Reset to happen\n", 2240 sc->sc_dev.dv_xname); 2241 return (1); 2242 2243 case NCR_RESELECTED: 2244 /* 2245 * we must be continuing a message ? 2246 */ 2247 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2248 printf("%s: target didn't identify\n", 2249 sc->sc_dev.dv_xname); 2250 ncr53c9x_init(sc, 1); 2251 return (1); 2252 } 2253 printf("<<RESELECT CONT'd>>"); 2254 #if XXXX 2255 ncr53c9x_msgin(sc); 2256 if (sc->sc_state != NCR_CONNECTED) { 2257 /* IDENTIFY fail?! */ 2258 printf("%s: identify failed\n", 2259 sc->sc_dev.dv_xname); 2260 ncr53c9x_init(sc, 1); 2261 return (1); 2262 } 2263 #endif 2264 break; 2265 2266 case NCR_IDENTIFIED: 2267 ecb = sc->sc_nexus; 2268 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2269 int i = (NCR_READ_REG(sc, NCR_FFLAG) 2270 & NCRFIFO_FF); 2271 /* 2272 * Things are seriously fucked up. 2273 * Pull the brakes, i.e. reset 2274 */ 2275 printf("%s: target didn't send tag: %d bytes in fifo\n", 2276 sc->sc_dev.dv_xname, i); 2277 /* Drain and display fifo */ 2278 while (i-- > 0) 2279 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO)); 2280 ncr53c9x_init(sc, 1); 2281 return (1); 2282 } else 2283 goto msgin; 2284 2285 break; 2286 case NCR_IDLE: 2287 case NCR_SELECTING: 2288 ecb = sc->sc_nexus; 2289 if (sc->sc_espintr & NCRINTR_RESEL) { 2290 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0; 2291 sc->sc_flags = 0; 2292 /* 2293 * If we're trying to select a 2294 * target ourselves, push our command 2295 * back into the ready list. 2296 */ 2297 if (sc->sc_state == NCR_SELECTING) { 2298 NCR_MISC(("backoff selector ")); 2299 timeout_del(&ecb->to); 2300 ncr53c9x_dequeue(sc, ecb); 2301 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 2302 ecb->flags |= ECB_READY; 2303 ecb = sc->sc_nexus = NULL; 2304 } 2305 sc->sc_state = NCR_RESELECTED; 2306 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2307 /* 2308 * Things are seriously fucked up. 2309 * Pull the brakes, i.e. reset 2310 */ 2311 printf("%s: target didn't identify\n", 2312 sc->sc_dev.dv_xname); 2313 ncr53c9x_init(sc, 1); 2314 return (1); 2315 } 2316 /* 2317 * The C90 only inhibits FIFO writes until 2318 * reselection is complete, instead of 2319 * waiting until the interrupt status register 2320 * has been read. So, if the reselect happens 2321 * while we were entering a command bytes (for 2322 * another target) some of those bytes can 2323 * appear in the FIFO here, after the 2324 * interrupt is taken. 2325 */ 2326 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2327 2328 if (nfifo < 2 || 2329 (nfifo > 2 && 2330 sc->sc_rev != NCR_VARIANT_ESP100)) { 2331 printf("%s: RESELECT: " 2332 "%d bytes in FIFO! " 2333 "[intr %x, stat %x, step %d, prevphase %x]\n", 2334 sc->sc_dev.dv_xname, 2335 nfifo, 2336 sc->sc_espintr, 2337 sc->sc_espstat, 2338 sc->sc_espstep, 2339 sc->sc_prevphase); 2340 ncr53c9x_init(sc, 1); 2341 return (1); 2342 } 2343 sc->sc_selid = sc->sc_imess[0]; 2344 NCR_MISC(("selid=%2x ", sc->sc_selid)); 2345 2346 /* Handle identify message */ 2347 ncr53c9x_msgin(sc); 2348 if (nfifo != 2) { 2349 /* 2350 * Note: this should not happen 2351 * with `dmaselect' on. 2352 */ 2353 sc->sc_flags |= NCR_EXPECT_ILLCMD; 2354 NCRCMD(sc, NCRCMD_FLUSH); 2355 } else if (sc->sc_features & NCR_F_DMASELECT && 2356 sc->sc_rev == NCR_VARIANT_ESP100) { 2357 sc->sc_flags |= NCR_EXPECT_ILLCMD; 2358 } 2359 2360 if (sc->sc_state != NCR_CONNECTED && 2361 sc->sc_state != NCR_IDENTIFIED) { 2362 /* IDENTIFY fail?! */ 2363 printf("%s: identify failed, state %d, intr %02x\n", 2364 sc->sc_dev.dv_xname, sc->sc_state, 2365 sc->sc_espintr); 2366 ncr53c9x_init(sc, 1); 2367 return (1); 2368 } 2369 goto shortcut; /* ie. next phase expected soon */ 2370 } 2371 2372 #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS) 2373 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) { 2374 /* 2375 * Arbitration won; examine the `step' register 2376 * to determine how far the selection could progress. 2377 */ 2378 ecb = sc->sc_nexus; 2379 if (!ecb) 2380 panic("ncr53c9x: no nexus"); 2381 2382 sc_link = ecb->xs->sc_link; 2383 ti = &sc->sc_tinfo[sc_link->target]; 2384 2385 switch (sc->sc_espstep) { 2386 case 0: 2387 /* 2388 * The target did not respond with a 2389 * message out phase - probably an old 2390 * device that doesn't recognize ATN. 2391 * Clear ATN and just continue, the 2392 * target should be in the command 2393 * phase. 2394 * XXXX check for command phase? 2395 */ 2396 NCRCMD(sc, NCRCMD_RSTATN); 2397 break; 2398 case 1: 2399 if ((ti->flags & T_NEGOTIATE) == 0 && 2400 ecb->tag[0] == 0) { 2401 printf("%s: step 1 & !NEG\n", 2402 sc->sc_dev.dv_xname); 2403 goto reset; 2404 } 2405 if (sc->sc_phase != MESSAGE_OUT_PHASE) { 2406 printf("%s: !MSGOUT\n", 2407 sc->sc_dev.dv_xname); 2408 goto reset; 2409 } 2410 if (ti->flags & T_WIDE) { 2411 ncr53c9x_sched_msgout(SEND_WDTR); 2412 } 2413 if (ti->flags & T_NEGOTIATE) { 2414 /* Start negotiating */ 2415 ti->period = sc->sc_minsync; 2416 ti->offset = 15; 2417 sc->sc_flags |= NCR_SYNCHNEGO; 2418 if (ecb->tag[0]) 2419 ncr53c9x_sched_msgout(SEND_TAG|SEND_SDTR); 2420 else 2421 ncr53c9x_sched_msgout(SEND_SDTR); 2422 } else { 2423 /* Could not do ATN3 so send TAG */ 2424 ncr53c9x_sched_msgout(SEND_TAG); 2425 } 2426 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */ 2427 break; 2428 case 3: 2429 /* 2430 * Grr, this is supposed to mean 2431 * "target left command phase prematurely". 2432 * It seems to happen regularly when 2433 * sync mode is on. 2434 * Look at FIFO to see if command went out. 2435 * (Timing problems?) 2436 */ 2437 if (sc->sc_features & NCR_F_DMASELECT) { 2438 if (sc->sc_cmdlen == 0) 2439 /* Hope for the best.. */ 2440 break; 2441 } else if ((NCR_READ_REG(sc, NCR_FFLAG) 2442 & NCRFIFO_FF) == 0) { 2443 /* Hope for the best.. */ 2444 break; 2445 } 2446 printf("(%s:%d:%d): selection failed;" 2447 " %d left in FIFO " 2448 "[intr %x, stat %x, step %d]\n", 2449 sc->sc_dev.dv_xname, 2450 sc_link->target, 2451 sc_link->lun, 2452 NCR_READ_REG(sc, NCR_FFLAG) 2453 & NCRFIFO_FF, 2454 sc->sc_espintr, sc->sc_espstat, 2455 sc->sc_espstep); 2456 NCRCMD(sc, NCRCMD_FLUSH); 2457 ncr53c9x_sched_msgout(SEND_ABORT); 2458 return (1); 2459 case 2: 2460 /* Select stuck at Command Phase */ 2461 NCRCMD(sc, NCRCMD_FLUSH); 2462 break; 2463 case 4: 2464 if (sc->sc_features & NCR_F_DMASELECT && 2465 sc->sc_cmdlen != 0) 2466 printf("(%s:%d:%d): select; " 2467 "%lu left in DMA buffer " 2468 "[intr %x, stat %x, step %d]\n", 2469 sc->sc_dev.dv_xname, 2470 sc_link->target, 2471 sc_link->lun, 2472 (u_long)sc->sc_cmdlen, 2473 sc->sc_espintr, 2474 sc->sc_espstat, 2475 sc->sc_espstep); 2476 /* So far, everything went fine */ 2477 break; 2478 } 2479 2480 sc->sc_prevphase = INVALID_PHASE; /* ?? */ 2481 /* Do an implicit RESTORE POINTERS. */ 2482 sc->sc_dp = ecb->daddr; 2483 sc->sc_dleft = ecb->dleft; 2484 sc->sc_state = NCR_CONNECTED; 2485 break; 2486 2487 } else { 2488 2489 printf("%s: unexpected status after select" 2490 ": [intr %x, stat %x, step %x]\n", 2491 sc->sc_dev.dv_xname, 2492 sc->sc_espintr, sc->sc_espstat, 2493 sc->sc_espstep); 2494 NCRCMD(sc, NCRCMD_FLUSH); 2495 DELAY(1); 2496 goto reset; 2497 } 2498 if (sc->sc_state == NCR_IDLE) { 2499 printf("%s: stray interrupt\n", 2500 sc->sc_dev.dv_xname); 2501 return (0); 2502 } 2503 break; 2504 2505 case NCR_CONNECTED: 2506 if (sc->sc_flags & NCR_ICCS) { 2507 /* "Initiate Command Complete Steps" in progress */ 2508 u_char msg; 2509 2510 sc->sc_flags &= ~NCR_ICCS; 2511 2512 if (!(sc->sc_espintr & NCRINTR_DONE)) { 2513 printf("%s: ICCS: " 2514 ": [intr %x, stat %x, step %x]\n", 2515 sc->sc_dev.dv_xname, 2516 sc->sc_espintr, sc->sc_espstat, 2517 sc->sc_espstep); 2518 } 2519 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2520 if (sc->sc_imlen < 2) 2521 printf("%s: can't get status, only %d bytes\n", 2522 sc->sc_dev.dv_xname, (int)sc->sc_imlen); 2523 ecb->stat = sc->sc_imess[sc->sc_imlen - 2]; 2524 msg = sc->sc_imess[sc->sc_imlen - 1]; 2525 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg)); 2526 if (msg == MSG_CMDCOMPLETE) { 2527 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) 2528 ? 0 2529 : sc->sc_dleft; 2530 if ((ecb->flags & ECB_SENSE) == 0) 2531 ecb->xs->resid = ecb->dleft; 2532 sc->sc_state = NCR_CMDCOMPLETE; 2533 } else 2534 printf("%s: STATUS_PHASE: msg %d\n", 2535 sc->sc_dev.dv_xname, msg); 2536 sc->sc_imlen = 0; 2537 NCRCMD(sc, NCRCMD_MSGOK); 2538 goto shortcut; /* ie. wait for disconnect */ 2539 } 2540 break; 2541 default: 2542 /* Don't panic: reset. */ 2543 printf("%s: invalid state: %d\n", 2544 sc->sc_dev.dv_xname, 2545 sc->sc_state); 2546 ncr53c9x_scsi_reset(sc); 2547 goto out; 2548 break; 2549 } 2550 2551 /* 2552 * Driver is now in state NCR_CONNECTED, i.e. we 2553 * have a current command working the SCSI bus. 2554 */ 2555 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) { 2556 panic("ncr53c9x no nexus"); 2557 } 2558 2559 switch (sc->sc_phase) { 2560 case MESSAGE_OUT_PHASE: 2561 NCR_PHASE(("MESSAGE_OUT_PHASE ")); 2562 ncr53c9x_msgout(sc); 2563 sc->sc_prevphase = MESSAGE_OUT_PHASE; 2564 break; 2565 case MESSAGE_IN_PHASE: 2566 msgin: 2567 NCR_PHASE(("MESSAGE_IN_PHASE ")); 2568 if (sc->sc_espintr & NCRINTR_BS) { 2569 if ((sc->sc_rev != NCR_VARIANT_FAS366) || 2570 !(sc->sc_espstat2 & FAS_STAT2_EMPTY)) { 2571 NCRCMD(sc, NCRCMD_FLUSH); 2572 } 2573 sc->sc_flags |= NCR_WAITI; 2574 NCRCMD(sc, NCRCMD_TRANS); 2575 } else if (sc->sc_espintr & NCRINTR_FC) { 2576 if ((sc->sc_flags & NCR_WAITI) == 0) { 2577 printf("%s: MSGIN: unexpected FC bit: " 2578 "[intr %x, stat %x, step %x]\n", 2579 sc->sc_dev.dv_xname, 2580 sc->sc_espintr, sc->sc_espstat, 2581 sc->sc_espstep); 2582 } 2583 sc->sc_flags &= ~NCR_WAITI; 2584 ncr53c9x_rdfifo(sc, 2585 (sc->sc_prevphase == sc->sc_phase) ? 2586 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START); 2587 ncr53c9x_msgin(sc); 2588 } else { 2589 printf("%s: MSGIN: weird bits: " 2590 "[intr %x, stat %x, step %x]\n", 2591 sc->sc_dev.dv_xname, 2592 sc->sc_espintr, sc->sc_espstat, 2593 sc->sc_espstep); 2594 } 2595 sc->sc_prevphase = MESSAGE_IN_PHASE; 2596 goto shortcut; /* i.e. expect data to be ready */ 2597 break; 2598 case COMMAND_PHASE: 2599 /* 2600 * Send the command block. Normally we don't see this 2601 * phase because the SEL_ATN command takes care of 2602 * all this. However, we end up here if either the 2603 * target or we wanted to exchange some more messages 2604 * first (e.g. to start negotiations). 2605 */ 2606 2607 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ", 2608 ecb->cmd.cmd.opcode, ecb->clen)); 2609 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2610 NCRCMD(sc, NCRCMD_FLUSH); 2611 /* DELAY(1); */ 2612 } 2613 if (sc->sc_features & NCR_F_DMASELECT) { 2614 /* setup DMA transfer for command */ 2615 size = ecb->clen; 2616 sc->sc_cmdlen = size; 2617 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd; 2618 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 2619 0, &size); 2620 /* Program the SCSI counter */ 2621 NCR_SET_COUNT(sc, size); 2622 2623 /* load the count in */ 2624 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2625 2626 /* start the command transfer */ 2627 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA); 2628 NCRDMA_GO(sc); 2629 } else { 2630 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen); 2631 NCRCMD(sc, NCRCMD_TRANS); 2632 } 2633 sc->sc_prevphase = COMMAND_PHASE; 2634 break; 2635 case DATA_OUT_PHASE: 2636 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft)); 2637 NCRCMD(sc, NCRCMD_FLUSH); 2638 size = min(sc->sc_dleft, sc->sc_maxxfer); 2639 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 2640 0, &size); 2641 sc->sc_prevphase = DATA_OUT_PHASE; 2642 goto setup_xfer; 2643 case DATA_IN_PHASE: 2644 NCR_PHASE(("DATA_IN_PHASE ")); 2645 if (sc->sc_rev == NCR_VARIANT_ESP100) 2646 NCRCMD(sc, NCRCMD_FLUSH); 2647 size = min(sc->sc_dleft, sc->sc_maxxfer); 2648 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 2649 1, &size); 2650 sc->sc_prevphase = DATA_IN_PHASE; 2651 setup_xfer: 2652 /* Target returned to data phase: wipe "done" memory */ 2653 ecb->flags &= ~ECB_TENTATIVE_DONE; 2654 2655 /* Program the SCSI counter */ 2656 NCR_SET_COUNT(sc, size); 2657 2658 /* load the count in */ 2659 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2660 2661 /* 2662 * Note that if `size' is 0, we've already transceived 2663 * all the bytes we want but we're still in DATA PHASE. 2664 * Apparently, the device needs padding. Also, a 2665 * transfer size of 0 means "maximum" to the chip 2666 * DMA logic. 2667 */ 2668 NCRCMD(sc, 2669 (size==0?NCRCMD_TRPAD:NCRCMD_TRANS)|NCRCMD_DMA); 2670 NCRDMA_GO(sc); 2671 return (1); 2672 case STATUS_PHASE: 2673 NCR_PHASE(("STATUS_PHASE ")); 2674 sc->sc_flags |= NCR_ICCS; 2675 NCRCMD(sc, NCRCMD_ICCS); 2676 sc->sc_prevphase = STATUS_PHASE; 2677 goto shortcut; /* i.e. expect status results soon */ 2678 break; 2679 case INVALID_PHASE: 2680 break; 2681 default: 2682 printf("%s: unexpected bus phase; resetting\n", 2683 sc->sc_dev.dv_xname); 2684 goto reset; 2685 } 2686 2687 out: 2688 return (1); 2689 2690 reset: 2691 ncr53c9x_init(sc, 1); 2692 goto out; 2693 2694 finish: 2695 ncr53c9x_done(sc, ecb); 2696 goto out; 2697 2698 sched: 2699 sc->sc_state = NCR_IDLE; 2700 ncr53c9x_sched(sc); 2701 goto out; 2702 2703 shortcut: 2704 /* 2705 * The idea is that many of the SCSI operations take very little 2706 * time, and going away and getting interrupted is too high an 2707 * overhead to pay. For example, selecting, sending a message 2708 * and command and then doing some work can be done in one "pass". 2709 * 2710 * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1 2711 * at 40MHz. This needs testing. 2712 */ 2713 { 2714 struct timeval wait, cur; 2715 2716 microtime(&wait); 2717 wait.tv_usec += 50/sc->sc_freq; 2718 if (wait.tv_usec > 1000000) { 2719 wait.tv_sec++; 2720 wait.tv_usec -= 1000000; 2721 } 2722 do { 2723 if (NCRDMA_ISINTR(sc)) 2724 goto again; 2725 microtime(&cur); 2726 } while (timercmp(&cur, &wait, <=)); 2727 } 2728 goto out; 2729 } 2730 2731 void 2732 ncr53c9x_abort(sc, ecb) 2733 struct ncr53c9x_softc *sc; 2734 struct ncr53c9x_ecb *ecb; 2735 { 2736 2737 /* 2 secs for the abort */ 2738 ecb->timeout = NCR_ABORT_TIMEOUT; 2739 ecb->flags |= ECB_ABORT; 2740 2741 if (ecb == sc->sc_nexus) { 2742 int timeout = ecb->timeout; 2743 2744 /* 2745 * If we're still selecting, the message will be scheduled 2746 * after selection is complete. 2747 */ 2748 if (sc->sc_state == NCR_CONNECTED) 2749 ncr53c9x_sched_msgout(SEND_ABORT); 2750 2751 /* 2752 * Reschedule timeout. 2753 */ 2754 if (timeout > 1000000) 2755 timeout = (timeout / 1000) * hz; 2756 else 2757 timeout = (timeout * hz) / 1000; 2758 timeout_add(&ecb->to, timeout); 2759 } else { 2760 /* 2761 * Just leave the command where it is. 2762 * XXX - what choice do we have but to reset the SCSI 2763 * eventually? 2764 */ 2765 if (sc->sc_state == NCR_IDLE) 2766 ncr53c9x_sched(sc); 2767 } 2768 } 2769 2770 void 2771 ncr53c9x_timeout(arg) 2772 void *arg; 2773 { 2774 struct ncr53c9x_ecb *ecb = arg; 2775 struct scsi_xfer *xs = ecb->xs; 2776 struct scsi_link *sc_link = xs->sc_link; 2777 struct ncr53c9x_softc *sc = sc_link->adapter_softc; 2778 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[sc_link->target]; 2779 int s; 2780 2781 sc_print_addr(sc_link); 2782 printf("timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], " 2783 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, " 2784 "msg(q %x,o %x) %s>", 2785 ecb, ecb->flags, ecb->dleft, ecb->stat, 2786 sc->sc_state, sc->sc_nexus, 2787 NCR_READ_REG(sc, NCR_STAT), 2788 sc->sc_phase, sc->sc_prevphase, 2789 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout, 2790 NCRDMA_ISACTIVE(sc) ? "DMA active" : ""); 2791 #if NCR53C9X_DEBUG > 1 2792 printf("TRACE: %s.", ecb->trace); 2793 #endif 2794 2795 s = splbio(); 2796 2797 if (ecb->flags & ECB_ABORT) { 2798 /* abort timed out */ 2799 printf(" AGAIN\n"); 2800 2801 ncr53c9x_init(sc, 1); 2802 } else { 2803 /* abort the operation that has timed out */ 2804 printf("\n"); 2805 xs->error = XS_TIMEOUT; 2806 ncr53c9x_abort(sc, ecb); 2807 2808 /* Disable sync mode if stuck in a data phase */ 2809 if (ecb == sc->sc_nexus && 2810 (ti->flags & T_SYNCMODE) != 0 && 2811 (sc->sc_phase & (MSGI|CDI)) == 0) { 2812 sc_print_addr(sc_link); 2813 printf("sync negotiation disabled\n"); 2814 sc->sc_cfflags |= (1 << (sc_link->target + 16)); 2815 } 2816 } 2817 2818 splx(s); 2819 } 2820