xref: /openbsd/sys/dev/ic/ns16550reg.h (revision d415bd75)
1 /*	$OpenBSD: ns16550reg.h,v 1.6 2022/01/11 11:51:14 uaa Exp $	*/
2 /*	$NetBSD: ns16550reg.h,v 1.4 1994/10/27 04:18:43 cgd Exp $	*/
3 
4 /*-
5  * Copyright (c) 1991 The Regents of the University of California.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. Neither the name of the University nor the names of its contributors
17  *    may be used to endorse or promote products derived from this software
18  *    without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30  * SUCH DAMAGE.
31  *
32  *	@(#)ns16550.h	7.1 (Berkeley) 5/9/91
33  */
34 
35 /*
36  * NS16550 (and above) UART registers
37  */
38 
39 #define	com_data	0	/* data register (R/W) */
40 #define	com_dlbl	0	/* divisor latch low (W) */
41 #define	com_dlbh	1	/* divisor latch high (W) */
42 #define	com_ier		1	/* interrupt enable (W) */
43 #define	com_iir		2	/* interrupt identification (R) */
44 #define	com_fifo	2	/* FIFO control (W) */
45 #define com_fctl	2	/* extended FIFO control (W) */
46 #define com_efr		2	/* extended features register (W) */
47 #define	com_lctl	3	/* line control register (R/W) */
48 #define	com_cfcr	3	/* line control register (R/W) */
49 #define	com_mcr		4	/* modem control register (R/W) */
50 #define	com_lsr		5	/* line status register (R/W) */
51 #define	com_msr		6	/* modem status register (R/W) */
52 #define com_scratch	7	/* scratch register (R/W) */
53 
54 /*
55  * Synopsys DesignWare APB UART additional registers
56  */
57 #define	com_usr		31	/* UART status register (R) */
58 #define	com_cpr		61	/* component parameter register (R) */
59