xref: /openbsd/sys/dev/isa/isavar.h (revision db3296cf)
1 /*	$OpenBSD: isavar.h,v 1.45 2002/12/20 01:56:32 mickey Exp $	*/
2 /*	$NetBSD: isavar.h,v 1.26 1997/06/06 23:43:57 thorpej Exp $	*/
3 
4 /*-
5  * Copyright (c) 1997 The NetBSD Foundation, Inc.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to The NetBSD Foundation
9  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10  * NASA Ames Research Center.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  * 3. All advertising materials mentioning features or use of this software
21  *    must display the following acknowledgement:
22  *	This product includes software developed by the NetBSD
23  *	Foundation, Inc. and its contributors.
24  * 4. Neither the name of The NetBSD Foundation nor the names of its
25  *    contributors may be used to endorse or promote products derived
26  *    from this software without specific prior written permission.
27  *
28  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38  * POSSIBILITY OF SUCH DAMAGE.
39  */
40 
41 /*
42  * Copyright (c) 1996 Christos Zoulas.  All rights reserved.
43  *
44  * Redistribution and use in source and binary forms, with or without
45  * modification, are permitted provided that the following conditions
46  * are met:
47  * 1. Redistributions of source code must retain the above copyright
48  *    notice, this list of conditions and the following disclaimer.
49  * 2. Redistributions in binary form must reproduce the above copyright
50  *    notice, this list of conditions and the following disclaimer in the
51  *    documentation and/or other materials provided with the distribution.
52  * 3. All advertising materials mentioning features or use of this software
53  *    must display the following acknowledgement:
54  *	This product includes software developed by Christos Zoulas.
55  * 4. The name of the author may not be used to endorse or promote products
56  *    derived from this software without specific prior written permission.
57  *
58  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
59  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
60  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
61  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
62  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
63  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
64  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
65  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
66  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
67  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
68  */
69 
70 /*
71  * Copyright (c) 1995 Chris G. Demetriou
72  * Copyright (c) 1992 Berkeley Software Design, Inc.
73  * All rights reserved.
74  *
75  * Redistribution and use in source and binary forms, with or without
76  * modification, are permitted provided that the following conditions
77  * are met:
78  * 1. Redistributions of source code must retain the above copyright
79  *    notice, this list of conditions and the following disclaimer.
80  * 2. Redistributions in binary form must reproduce the above copyright
81  *    notice, this list of conditions and the following disclaimer in the
82  *    documentation and/or other materials provided with the distribution.
83  * 3. All advertising materials mentioning features or use of this software
84  *    must display the following acknowledgement:
85  *	This product includes software developed by Berkeley Software
86  *	Design, Inc.
87  * 4. The name of Berkeley Software Design must not be used to endorse
88  *    or promote products derived from this software without specific
89  *    prior written permission.
90  *
91  * THIS SOFTWARE IS PROVIDED BY BERKELEY SOFTWARE DESIGN, INC. ``AS IS'' AND
92  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
93  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
94  * ARE DISCLAIMED.  IN NO EVENT SHALL BERKELEY SOFTWARE DESIGN, INC. BE LIABLE
95  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
96  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
97  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
98  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
99  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
100  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
101  * SUCH DAMAGE.
102  *
103  *	BSDI Id: isavar.h,v 1.5 1992/12/01 18:06:00 karels Exp
104  */
105 
106 #ifndef _DEV_ISA_ISAVAR_H_
107 #define	_DEV_ISA_ISAVAR_H_
108 
109 /*
110  * Definitions for ISA and ISA PnP autoconfiguration.
111  */
112 
113 #include <sys/queue.h>
114 #include <machine/bus.h>
115 
116 #ifndef NISADMA
117 #include "isadma.h"
118 #endif
119 
120 /*
121  * Structures and definitions needed by the machine-dependent header.
122  */
123 struct isabus_attach_args;
124 
125 #if (__alpha__ + amiga + __i386__ + arc + __wgrisc__ + __powerpc__ + __hppa__ != 1)
126 #error "COMPILING ISA FOR UNSUPPORTED MACHINE, OR MORE THAN ONE."
127 #endif
128 #ifdef __alpha__
129 #include <alpha/isa/isa_machdep.h>
130 #endif
131 #ifdef amiga
132 #include <amiga/isa/isa_machdep.h>
133 #endif
134 #ifdef __i386__
135 #include <i386/isa/isa_machdep.h>
136 #endif
137 #ifdef arc
138 #include <arc/isa/isa_machdep.h>
139 #endif
140 #ifdef __wgrisc__
141 #include <wgrisc/isa/isa_machdep.h>
142 #endif
143 #ifdef __powerpc__
144 #ifdef __mvmeppc__
145 #include <mvmeppc/isa/isa_machdep.h>
146 #else
147 #include <powerpc/isa/isa_machdep.h>
148 #endif
149 #endif
150 #ifdef __hppa__
151 #include <hppa/include/isa_machdep.h>
152 #endif
153 
154 #include "isapnp.h"
155 
156 #if NISAPNP > 0
157 /*
158  * Structures and definitions needed by the machine-dependent header.
159  */
160 struct isapnp_softc;
161 
162 #if (__i386__ != 1 && __alpha__ != 1)
163 ERROR: COMPILING ISAPNP FOR UNSUPPORTED MACHINE, OR MORE THAN ONE.
164 #endif
165 #if __i386__
166 #include <i386/isa/isapnp_machdep.h>
167 #endif
168 #if __alpha__
169 #include <alpha/isa/isapnp_machdep.h>
170 #endif
171 #endif	/* NISAPNP */
172 
173 # define ISAPNP_WRITE_ADDR(sc, v) \
174     bus_space_write_1(sc->sc_iot, sc->sc_addr_ioh, 0, v)
175 # define ISAPNP_WRITE_DATA(sc, v) \
176     bus_space_write_1(sc->sc_iot, sc->sc_wrdata_ioh, 0, v)
177 # define ISAPNP_READ_DATA(sc) \
178     bus_space_read_1(sc->sc_iot, sc->sc_read_ioh, 0)
179 
180 # define ISAPNP_MALLOC(a) malloc(a, M_DEVBUF, M_WAITOK)
181 # define ISAPNP_FREE(a) free(a, M_DEVBUF)
182 # define ISAPNP_CLONE_SETUP(dest, src) \
183 	do { \
184 		bzero((dest), sizeof(*(dest))); \
185 		(dest)->ia_ic = (src)->ia_ic; \
186 	} while (0)
187 
188 #ifndef _DEV_ISA_ISAPNPREG_H_
189 /*
190  * `reg' defines needed only for these structures.
191  */
192 #define ISAPNP_MAX_CARDS 	8
193 #define ISAPNP_MAX_IDENT	32
194 #define ISAPNP_MAX_DEVCLASS	16
195 #define ISAPNP_SERIAL_SIZE	9
196 
197 #define ISAPNP_NUM_MEM		4
198 #define ISAPNP_NUM_IO		8
199 #define ISAPNP_NUM_IRQ		16
200 #define ISAPNP_NUM_DRQ		8
201 #define ISAPNP_NUM_MEM32	4
202 #endif	/* _DEV_ISA_ISAPNPREG_H_ */
203 
204 /*
205  * ISA PnP-specific structures.
206  */
207 struct isapnp_softc {
208 	struct device		sc_dev;
209 	TAILQ_HEAD(, isadev)
210 		sc_subdevs;		/* list of all children */
211 
212 	bus_space_tag_t sc_iot;		/* isa io space tag */
213 	bus_space_tag_t sc_memt;	/* isa mem space tag */
214 #if NISADMA > 0
215 	bus_dma_tag_t sc_dmat;		/* isa DMA tag */
216 #endif /* NISADMA > 0 */
217 
218 	int			sc_read_port;
219 	bus_space_handle_t	sc_addr_ioh;
220 	bus_space_handle_t	sc_wrdata_ioh;
221 	bus_space_handle_t	sc_read_ioh;
222 	bus_space_handle_t	sc_memh;
223 	u_int8_t		sc_ncards;
224     	u_int8_t		sc_id[ISAPNP_MAX_CARDS][ISAPNP_SERIAL_SIZE];
225 };
226 
227 struct isapnp_region {
228 	bus_space_handle_t h;
229 	u_int32_t base;
230 
231 	u_int32_t minbase;
232 	u_int32_t maxbase;
233 	u_int32_t length;
234 	u_int32_t align;
235 	u_int8_t  flags;
236 };
237 
238 struct isapnp_pin {
239 	int16_t	  num;
240 	u_int8_t  flags:4;
241 	u_int8_t  type:4;
242 	u_int16_t bits;
243 };
244 
245 struct isapnp_knowndev {
246 	const char pnpid[8];
247 	const char driver[5];
248 };
249 
250 /*
251  * ISA bus attach arguments
252  */
253 struct isabus_attach_args {
254 	char	*iba_busname;		/* XXX should be common */
255 	bus_space_tag_t iba_iot;	/* isa i/o space tag */
256 	bus_space_tag_t iba_memt;	/* isa mem space tag */
257 #if NISADMA > 0
258 	bus_dma_tag_t iba_dmat;		/* isa DMA tag */
259 #endif
260 	isa_chipset_tag_t iba_ic;
261 };
262 
263 /*
264  * ISA/ISA PnP shared driver attach arguments
265  */
266 struct isa_attach_args {
267 	struct device  *ia_isa;		/* isa device */
268 	bus_space_tag_t ia_iot;		/* isa i/o space tag */
269 	bus_space_tag_t ia_memt;	/* isa mem space tag */
270 #if NISADMA > 0
271 	bus_dma_tag_t ia_dmat;		/* DMA tag */
272 #endif
273 	bus_space_handle_t ia_delaybah;	/* i/o handle for `delay port' */
274 
275 	isa_chipset_tag_t ia_ic;
276 
277 	/*
278 	 * ISA PnP configuration support.  `ipa_' prefixes are used to denote
279 	 * PnP specific members of this structure.
280 	 */
281 	struct isa_attach_args	*ipa_sibling;
282 	struct isa_attach_args	*ipa_child;
283 
284 	char	ipa_devident[ISAPNP_MAX_IDENT];
285 	char	ipa_devlogic[ISAPNP_MAX_DEVCLASS];
286 	char	ipa_devcompat[ISAPNP_MAX_DEVCLASS];
287 	char	ipa_devclass[ISAPNP_MAX_DEVCLASS];
288 
289 	u_char	ipa_pref;
290 	u_char	ipa_devnum;
291 
292 	u_char	ipa_nio;
293 	u_char	ipa_nirq;
294 	u_char	ipa_ndrq;
295 	u_char	ipa_nmem;
296 	u_char	ipa_nmem32;
297 
298 	struct isapnp_region	ipa_io[ISAPNP_NUM_IO];
299 	struct isapnp_region	ipa_mem[ISAPNP_NUM_MEM];
300 	struct isapnp_region	ipa_mem32[ISAPNP_NUM_MEM32];
301 	struct isapnp_pin	ipa_irq[ISAPNP_NUM_IRQ];
302 	struct isapnp_pin	ipa_drq[ISAPNP_NUM_DRQ];
303 
304 	/*
305 	 * Compatibility defines for ISA drivers.
306 	 */
307 #define ia_iobase	ipa_io[0].base
308 #define ia_iosize	ipa_io[0].length
309 #define ia_ioh		ipa_io[0].h
310 #define ia_irq		ipa_irq[0].num
311 #define	ia_drq		ipa_drq[0].num
312 #define	ia_drq2		ipa_drq[1].num
313 #define ia_maddr	ipa_mem[0].base
314 #define ia_msize	ipa_mem[0].length
315 #define ia_memh		ipa_mem[0].h
316 
317 	void	*ia_aux;		/* driver specific */
318 };
319 
320 #define	IOBASEUNK	-1		/* i/o address is unknown */
321 #define	IRQUNK		-1		/* interrupt request line is unknown */
322 #define	DRQUNK		-1		/* DMA request line is unknown */
323 #define	MADDRUNK	-1		/* shared memory address is unknown */
324 
325 /*
326  * Per-device ISA variables
327  */
328 struct isadev {
329 	struct  device *id_dev;		/* back pointer to generic */
330 	TAILQ_ENTRY(isadev)
331 		id_bchain;		/* bus chain */
332 };
333 
334 /*
335  * ISA master bus
336  */
337 struct isa_softc {
338 	struct	device sc_dev;		/* base device */
339 	TAILQ_HEAD(, isadev)
340 		sc_subdevs;		/* list of all children */
341 
342 	bus_space_tag_t sc_iot;		/* isa io space tag */
343 	bus_space_tag_t sc_memt;	/* isa mem space tag */
344 #if NISADMA > 0
345 	bus_dma_tag_t sc_dmat;		/* isa DMA tag */
346 #endif /* NISADMA > 0 */
347 
348 	isa_chipset_tag_t sc_ic;
349 
350 #if NISADMA > 0
351 	/*
352 	 * Bitmap representing the DRQ channels available
353 	 * for ISA.
354 	 */
355 	int	sc_drqmap;
356 #define sc_drq	sc_drqmap		/* XXX compatibility mode */
357 
358 	bus_space_handle_t sc_dma1h;	/* i/o handle for DMA controller #1 */
359 	bus_space_handle_t sc_dma2h;	/* i/o handle for DMA controller #2 */
360 	bus_space_handle_t sc_dmapgh;	/* i/o handle for DMA page registers */
361 
362 	/*
363 	 * DMA maps used for the 8 DMA channels.
364 	 */
365 	bus_dmamap_t	sc_dmamaps[8];
366 	bus_size_t 	sc_dmalength[8];
367 
368 	int	sc_dmareads;		/* state for isa_dmadone() */
369 	int	sc_dmafinished;		/* DMA completion state */
370 #endif /* NISADMA > 0 */
371 
372 	/*
373 	 * This i/o handle is used to map port 0x84, which is
374 	 * read to provide a 1.25us delay.  This access handle
375 	 * is mapped in isaattach(), and exported to drivers
376 	 * via isa_attach_args.
377 	 */
378 	bus_space_handle_t   sc_delaybah;
379 };
380 
381 #define	ISA_DRQ_ISFREE(isadev, drq) \
382 	((((struct isa_softc *)(isadev))->sc_drqmap & (1 << (drq))) == 0)
383 
384 #define	ISA_DRQ_ALLOC(isadev, drq) \
385 	((struct isa_softc *)(isadev))->sc_drqmap |= (1 << (drq))
386 
387 #define	ISA_DRQ_FREE(isadev, drq) \
388 	((struct isa_softc *)(isadev))->sc_drqmap &= ~(1 << (drq))
389 
390 #define		cf_iobase		cf_loc[0]
391 #define		cf_iosize		cf_loc[1]
392 #define		cf_maddr		cf_loc[2]
393 #define		cf_msize		cf_loc[3]
394 #define		cf_irq			cf_loc[4]
395 #define		cf_drq			cf_loc[5]
396 #define		cf_drq2			cf_loc[6]
397 
398 /*
399  * ISA interrupt handler manipulation.
400  *
401  * To establish an ISA interrupt handler, a driver calls isa_intr_establish()
402  * with the interrupt number, type, level, function, and function argument of
403  * the interrupt it wants to handle.  Isa_intr_establish() returns an opaque
404  * handle to an event descriptor if it succeeds, and invokes panic() if it
405  * fails.  (XXX It should return NULL, then drivers should handle that, but
406  * what should they do?)  Interrupt handlers should return 0 for "interrupt
407  * not for me", 1  for "I took care of it", or -1 for "I guess it was mine,
408  * but I wasn't expecting it."
409  *
410  * To remove an interrupt handler, the driver calls isa_intr_disestablish()
411  * with the handle returned by isa_intr_establish() for that handler.
412  */
413 
414 /* ISA interrupt sharing types */
415 char	*isa_intr_typename(int type);
416 
417 void	isascan(struct device *parent, void *match);
418 int	isaprint(void *, const char *);
419 
420 /*
421  * Some ISA devices (e.g. on a VLB) can perform 32-bit DMA.  This
422  * flag is passed to bus_dmamap_create() to indicate that fact.
423  */
424 #define	ISABUS_DMA_32BIT	BUS_DMA_BUS1
425 
426 /*
427  * ISA PnP prototypes and support macros.
428  */
429 static __inline void isapnp_write_reg(struct isapnp_softc *, int, u_char);
430 static __inline u_char isapnp_read_reg(struct isapnp_softc *, int);
431 
432 static __inline void
433 isapnp_write_reg(sc, r, v)
434 	struct isapnp_softc *sc;
435 	int r;
436 	u_char v;
437 {
438 	ISAPNP_WRITE_ADDR(sc, r);
439 	ISAPNP_WRITE_DATA(sc, v);
440 }
441 
442 static __inline u_char
443 isapnp_read_reg(sc, r)
444 	struct isapnp_softc *sc;
445 {
446 	ISAPNP_WRITE_ADDR(sc, r);
447 	return ISAPNP_READ_DATA(sc);
448 }
449 
450 struct isa_attach_args *
451     isapnp_get_resource(struct isapnp_softc *, int, struct isa_attach_args *);
452 char *isapnp_id_to_vendor(char *, const u_char *);
453 
454 int isapnp_config(bus_space_tag_t, bus_space_tag_t,
455     struct isa_attach_args *);
456 void isapnp_unconfig(bus_space_tag_t, bus_space_tag_t,
457     struct isa_attach_args *);
458 
459 void isapnp_isa_attach_hook(struct isa_softc *);
460 #ifdef DEBUG_ISAPNP
461 void isapnp_print_mem(const char *, const struct isapnp_region *);
462 void isapnp_print_io(const char *, const struct isapnp_region *);
463 void isapnp_print_irq(const char *, const struct isapnp_pin *);
464 void isapnp_print_drq(const char *, const struct isapnp_pin *);
465 void isapnp_print_dep_start(const char *, const u_char);
466 void isapnp_print_attach(const struct isa_attach_args *);
467 void isapnp_get_config(struct isapnp_softc *,
468 	struct isa_attach_args *);
469 void isapnp_print_config(const struct isa_attach_args *);
470 #endif	/* DEBUG_ISAPNP */
471 #endif /* _DEV_ISA_ISAVAR_H_ */
472