1*471aeecfSnaddy /* $OpenBSD: skgpio.c,v 1.5 2022/04/06 18:59:29 naddy Exp $ */
21f1c1562Sjsg
31f1c1562Sjsg /*
41f1c1562Sjsg * Copyright (c) 2014 Matt Dainty <matt@bodgit-n-scarper.com>
51f1c1562Sjsg *
61f1c1562Sjsg * Permission to use, copy, modify, and distribute this software for any
71f1c1562Sjsg * purpose with or without fee is hereby granted, provided that the above
81f1c1562Sjsg * copyright notice and this permission notice appear in all copies.
91f1c1562Sjsg *
101f1c1562Sjsg * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
111f1c1562Sjsg * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
121f1c1562Sjsg * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
131f1c1562Sjsg * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
141f1c1562Sjsg * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
151f1c1562Sjsg * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
161f1c1562Sjsg * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
171f1c1562Sjsg */
181f1c1562Sjsg
191f1c1562Sjsg /*
201f1c1562Sjsg * Soekris net6501 GPIO and LEDs as implemented by the onboard Xilinx FPGA
211f1c1562Sjsg */
221f1c1562Sjsg
231f1c1562Sjsg #include <sys/param.h>
241f1c1562Sjsg #include <sys/systm.h>
251f1c1562Sjsg #include <sys/device.h>
261f1c1562Sjsg #include <sys/gpio.h>
271f1c1562Sjsg
281f1c1562Sjsg #include <machine/bus.h>
291f1c1562Sjsg
301f1c1562Sjsg #include <dev/isa/isavar.h>
311f1c1562Sjsg
321f1c1562Sjsg #include <dev/gpio/gpiovar.h>
331f1c1562Sjsg
341f1c1562Sjsg #define SKGPIO_BASE 0x680 /* Base address of FPGA I/O */
351f1c1562Sjsg #define SKGPIO_IOSIZE 32 /* I/O region size */
361f1c1562Sjsg
371f1c1562Sjsg #define SKGPIO_NPINS 16 /* Number of Pins */
381f1c1562Sjsg #define SKGPIO_GPIO_INPUT 0x000 /* Current state of pins */
391f1c1562Sjsg #define SKGPIO_GPIO_OUTPUT 0x004 /* Set state of output pins */
401f1c1562Sjsg #define SKGPIO_GPIO_RESET 0x008 /* Reset output pins */
411f1c1562Sjsg #define SKGPIO_GPIO_SET 0x00c /* Set output pins */
421f1c1562Sjsg #define SKGPIO_GPIO_DIR 0x010 /* Direction, set for output */
431f1c1562Sjsg
441f1c1562Sjsg #define SKGPIO_NLEDS 2 /* Number of LEDs */
451f1c1562Sjsg #define SKGPIO_LED_ERROR 0x01c /* Offset to error LED */
461f1c1562Sjsg #define SKGPIO_LED_READY 0x01d /* Offset to ready LED */
471f1c1562Sjsg
481f1c1562Sjsg const u_int skgpio_led_offset[SKGPIO_NLEDS] = {
491f1c1562Sjsg SKGPIO_LED_ERROR, SKGPIO_LED_READY
501f1c1562Sjsg };
511f1c1562Sjsg
521f1c1562Sjsg struct skgpio_softc {
531f1c1562Sjsg struct device sc_dev;
541f1c1562Sjsg
551f1c1562Sjsg bus_space_tag_t sc_iot;
561f1c1562Sjsg bus_space_handle_t sc_ioh;
571f1c1562Sjsg
581f1c1562Sjsg struct gpio_chipset_tag sc_gpio_gc;
591f1c1562Sjsg gpio_pin_t sc_gpio_pins[SKGPIO_NPINS];
601f1c1562Sjsg
611f1c1562Sjsg /* Fake GPIO device for the LEDs */
621f1c1562Sjsg struct gpio_chipset_tag sc_led_gc;
631f1c1562Sjsg gpio_pin_t sc_led_pins[SKGPIO_NLEDS];
641f1c1562Sjsg };
651f1c1562Sjsg
661f1c1562Sjsg int skgpio_match(struct device *, void *, void *);
671f1c1562Sjsg void skgpio_attach(struct device *, struct device *, void *);
681f1c1562Sjsg int skgpio_gpio_read(void *, int);
691f1c1562Sjsg void skgpio_gpio_write(void *, int, int);
701f1c1562Sjsg void skgpio_gpio_ctl(void *, int, int);
711f1c1562Sjsg int skgpio_led_read(void *, int);
721f1c1562Sjsg void skgpio_led_write(void *, int, int);
731f1c1562Sjsg void skgpio_led_ctl(void *, int, int);
741f1c1562Sjsg
75*471aeecfSnaddy const struct cfattach skgpio_ca = {
761f1c1562Sjsg sizeof(struct skgpio_softc), skgpio_match, skgpio_attach
771f1c1562Sjsg };
781f1c1562Sjsg
791f1c1562Sjsg struct cfdriver skgpio_cd = {
801f1c1562Sjsg NULL, "skgpio", DV_DULL
811f1c1562Sjsg };
821f1c1562Sjsg
831f1c1562Sjsg int
skgpio_match(struct device * parent,void * match,void * aux)841f1c1562Sjsg skgpio_match(struct device *parent, void *match, void *aux)
851f1c1562Sjsg {
861f1c1562Sjsg struct isa_attach_args *ia = aux;
871f1c1562Sjsg bus_space_handle_t ioh;
881f1c1562Sjsg
897f25511aSmiod if (hw_vendor == NULL || hw_prod == NULL ||
907f25511aSmiod strcmp(hw_vendor, "Soekris Engineering") != 0 ||
917f25511aSmiod strcmp(hw_prod, "net6501") != 0)
921f1c1562Sjsg return (0);
931f1c1562Sjsg
941f1c1562Sjsg if (ia->ia_iobase != SKGPIO_BASE || bus_space_map(ia->ia_iot,
951f1c1562Sjsg ia->ia_iobase, SKGPIO_IOSIZE, 0, &ioh) != 0)
961f1c1562Sjsg return (0);
971f1c1562Sjsg
981f1c1562Sjsg bus_space_unmap(ia->ia_iot, ioh, SKGPIO_IOSIZE);
991f1c1562Sjsg ia->ia_iosize = SKGPIO_IOSIZE;
1001f1c1562Sjsg ia->ipa_nio = 1;
1011f1c1562Sjsg ia->ipa_nmem = 0;
1021f1c1562Sjsg ia->ipa_nirq = 0;
1031f1c1562Sjsg ia->ipa_ndrq = 0;
1041f1c1562Sjsg
1051f1c1562Sjsg return (1);
1061f1c1562Sjsg }
1071f1c1562Sjsg
1081f1c1562Sjsg void
skgpio_attach(struct device * parent,struct device * self,void * aux)1091f1c1562Sjsg skgpio_attach(struct device *parent, struct device *self, void *aux)
1101f1c1562Sjsg {
1111f1c1562Sjsg struct skgpio_softc *sc = (void *)self;
1121f1c1562Sjsg struct isa_attach_args *ia = aux;
1131f1c1562Sjsg struct gpiobus_attach_args gba1, gba2;
1141f1c1562Sjsg u_int data;
1151f1c1562Sjsg int i;
1161f1c1562Sjsg
1171f1c1562Sjsg if (bus_space_map(ia->ia_iot, ia->ia_iobase, ia->ia_iosize, 0,
1181f1c1562Sjsg &sc->sc_ioh) != 0) {
1191f1c1562Sjsg printf(": can't map i/o space\n");
1201f1c1562Sjsg return;
1211f1c1562Sjsg }
1221f1c1562Sjsg
1231f1c1562Sjsg printf("\n");
1241f1c1562Sjsg
1251f1c1562Sjsg sc->sc_iot = ia->ia_iot;
1261f1c1562Sjsg
1271f1c1562Sjsg data = bus_space_read_2(sc->sc_iot, sc->sc_ioh, SKGPIO_GPIO_DIR);
1281f1c1562Sjsg
1291f1c1562Sjsg for (i = 0; i < SKGPIO_NPINS; i++) {
1301f1c1562Sjsg sc->sc_gpio_pins[i].pin_num = i;
1311f1c1562Sjsg sc->sc_gpio_pins[i].pin_caps = GPIO_PIN_INPUT |
1321f1c1562Sjsg GPIO_PIN_OUTPUT;
1331f1c1562Sjsg sc->sc_gpio_pins[i].pin_flags = (data & (1 << i)) ?
1341f1c1562Sjsg GPIO_PIN_OUTPUT : GPIO_PIN_INPUT;
1351f1c1562Sjsg sc->sc_gpio_pins[i].pin_state = skgpio_gpio_read(sc, i);
1361f1c1562Sjsg }
1371f1c1562Sjsg
1381f1c1562Sjsg sc->sc_gpio_gc.gp_cookie = sc;
1391f1c1562Sjsg sc->sc_gpio_gc.gp_pin_read = skgpio_gpio_read;
1401f1c1562Sjsg sc->sc_gpio_gc.gp_pin_write = skgpio_gpio_write;
1411f1c1562Sjsg sc->sc_gpio_gc.gp_pin_ctl = skgpio_gpio_ctl;
1421f1c1562Sjsg
1431f1c1562Sjsg gba1.gba_name = "gpio";
1441f1c1562Sjsg gba1.gba_gc = &sc->sc_gpio_gc;
1451f1c1562Sjsg gba1.gba_pins = sc->sc_gpio_pins;
1461f1c1562Sjsg gba1.gba_npins = SKGPIO_NPINS;
1471f1c1562Sjsg
1481f1c1562Sjsg (void)config_found(&sc->sc_dev, &gba1, gpiobus_print);
1491f1c1562Sjsg
1501f1c1562Sjsg for (i = 0; i < SKGPIO_NLEDS; i++) {
1511f1c1562Sjsg sc->sc_led_pins[i].pin_num = i;
1521f1c1562Sjsg sc->sc_led_pins[i].pin_caps = GPIO_PIN_OUTPUT;
1531f1c1562Sjsg sc->sc_led_pins[i].pin_flags = GPIO_PIN_OUTPUT;
1541f1c1562Sjsg sc->sc_led_pins[i].pin_state = skgpio_led_read(sc, i);
1551f1c1562Sjsg }
1561f1c1562Sjsg
1571f1c1562Sjsg sc->sc_led_gc.gp_cookie = sc;
1581f1c1562Sjsg sc->sc_led_gc.gp_pin_read = skgpio_led_read;
1591f1c1562Sjsg sc->sc_led_gc.gp_pin_write = skgpio_led_write;
1601f1c1562Sjsg sc->sc_led_gc.gp_pin_ctl = skgpio_led_ctl;
1611f1c1562Sjsg
1621f1c1562Sjsg gba2.gba_name = "gpio";
1631f1c1562Sjsg gba2.gba_gc = &sc->sc_led_gc;
1641f1c1562Sjsg gba2.gba_pins = sc->sc_led_pins;
1651f1c1562Sjsg gba2.gba_npins = SKGPIO_NLEDS;
1661f1c1562Sjsg
1671f1c1562Sjsg (void)config_found(&sc->sc_dev, &gba2, gpiobus_print);
1681f1c1562Sjsg }
1691f1c1562Sjsg
1701f1c1562Sjsg int
skgpio_gpio_read(void * arg,int pin)1711f1c1562Sjsg skgpio_gpio_read(void *arg, int pin)
1721f1c1562Sjsg {
1731f1c1562Sjsg struct skgpio_softc *sc = arg;
1741f1c1562Sjsg u_int16_t data;
1751f1c1562Sjsg
1761f1c1562Sjsg data = bus_space_read_2(sc->sc_iot, sc->sc_ioh, SKGPIO_GPIO_INPUT);
1771f1c1562Sjsg
1781f1c1562Sjsg return (data & (1 << pin)) ? GPIO_PIN_HIGH : GPIO_PIN_LOW;
1791f1c1562Sjsg }
1801f1c1562Sjsg
1811f1c1562Sjsg void
skgpio_gpio_write(void * arg,int pin,int value)1821f1c1562Sjsg skgpio_gpio_write(void *arg, int pin, int value)
1831f1c1562Sjsg {
1841f1c1562Sjsg struct skgpio_softc *sc = arg;
1851f1c1562Sjsg u_int16_t data;
1861f1c1562Sjsg
1871f1c1562Sjsg data = bus_space_read_2(sc->sc_iot, sc->sc_ioh, SKGPIO_GPIO_INPUT);
1881f1c1562Sjsg
1891f1c1562Sjsg if (value == GPIO_PIN_LOW)
1901f1c1562Sjsg data &= ~(1 << pin);
1911f1c1562Sjsg else if (value == GPIO_PIN_HIGH)
1921f1c1562Sjsg data |= (1 << pin);
1931f1c1562Sjsg
1941f1c1562Sjsg bus_space_write_2(sc->sc_iot, sc->sc_ioh, SKGPIO_GPIO_OUTPUT, data);
1951f1c1562Sjsg }
1961f1c1562Sjsg
1971f1c1562Sjsg void
skgpio_gpio_ctl(void * arg,int pin,int flags)1981f1c1562Sjsg skgpio_gpio_ctl(void *arg, int pin, int flags)
1991f1c1562Sjsg {
2001f1c1562Sjsg struct skgpio_softc *sc = arg;
2011f1c1562Sjsg u_int16_t data;
2021f1c1562Sjsg
2031f1c1562Sjsg data = bus_space_read_2(sc->sc_iot, sc->sc_ioh, SKGPIO_GPIO_DIR);
2041f1c1562Sjsg
2051f1c1562Sjsg if (flags & GPIO_PIN_INPUT)
2061f1c1562Sjsg data &= ~(1 << pin);
2071f1c1562Sjsg if (flags & GPIO_PIN_OUTPUT)
2081f1c1562Sjsg data |= (1 << pin);
2091f1c1562Sjsg
2101f1c1562Sjsg bus_space_write_2(sc->sc_iot, sc->sc_ioh, SKGPIO_GPIO_DIR, data);
2111f1c1562Sjsg }
2121f1c1562Sjsg
2131f1c1562Sjsg int
skgpio_led_read(void * arg,int pin)2141f1c1562Sjsg skgpio_led_read(void *arg, int pin)
2151f1c1562Sjsg {
2161f1c1562Sjsg struct skgpio_softc *sc = arg;
2171f1c1562Sjsg u_int8_t value;
2181f1c1562Sjsg
2191f1c1562Sjsg value = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
2201f1c1562Sjsg skgpio_led_offset[pin]);
2211f1c1562Sjsg
2221f1c1562Sjsg return (value & 0x1) ? GPIO_PIN_HIGH : GPIO_PIN_LOW;
2231f1c1562Sjsg }
2241f1c1562Sjsg
2251f1c1562Sjsg void
skgpio_led_write(void * arg,int pin,int value)2261f1c1562Sjsg skgpio_led_write(void *arg, int pin, int value)
2271f1c1562Sjsg {
2281f1c1562Sjsg struct skgpio_softc *sc = arg;
2291f1c1562Sjsg
2301f1c1562Sjsg bus_space_write_1(sc->sc_iot, sc->sc_ioh, skgpio_led_offset[pin],
2311f1c1562Sjsg value);
2321f1c1562Sjsg }
2331f1c1562Sjsg
2341f1c1562Sjsg void
skgpio_led_ctl(void * arg,int pin,int flags)2351f1c1562Sjsg skgpio_led_ctl(void *arg, int pin, int flags)
2361f1c1562Sjsg {
2371f1c1562Sjsg }
238