1 /* $OpenBSD: wdc_isa.c,v 1.15 2011/06/20 01:09:25 matthew Exp $ */ 2 /* $NetBSD: wdc_isa.c,v 1.15 1999/05/19 14:41:25 bouyer Exp $ */ 3 4 /*- 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Charles M. Hannum and by Onno van der Linden. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/types.h> 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/device.h> 37 #include <sys/malloc.h> 38 39 #include <machine/bus.h> 40 #include <machine/intr.h> 41 42 #include <dev/isa/isavar.h> 43 #include <dev/isa/isadmavar.h> 44 45 #include <dev/ata/atavar.h> 46 #include <dev/ic/wdcvar.h> 47 48 #include "isadma.h" 49 50 #define WDC_ISA_REG_NPORTS 8 51 #define WDC_ISA_AUXREG_OFFSET 0x206 52 #define WDC_ISA_AUXREG_NPORTS 1 /* XXX "fdc" owns ports 0x3f7/0x377 */ 53 54 /* options passed via the 'flags' config keyword */ 55 #define WDC_OPTIONS_32 0x01 /* try to use 32bit data I/O */ 56 57 struct wdc_isa_softc { 58 struct wdc_softc sc_wdcdev; 59 struct channel_softc *wdc_chanptr; 60 struct channel_softc wdc_channel; 61 struct device *sc_isa; 62 isa_chipset_tag_t sc_ic; 63 void *sc_ih; 64 int sc_drq; 65 }; 66 67 int wdc_isa_probe(struct device *, void *, void *); 68 void wdc_isa_attach(struct device *, struct device *, void *); 69 70 struct cfattach wdc_isa_ca = { 71 sizeof(struct wdc_isa_softc), wdc_isa_probe, wdc_isa_attach 72 }; 73 74 #if NISADMA > 0 75 static void wdc_isa_dma_setup(struct wdc_isa_softc *); 76 static int wdc_isa_dma_init(void *, int, int, void *, size_t, int); 77 static void wdc_isa_dma_start(void *, int, int); 78 static int wdc_isa_dma_finish(void *, int, int, int); 79 #endif /* NISADMA > 0 */ 80 81 int 82 wdc_isa_probe(struct device *parent, void *match, void *aux) 83 { 84 struct channel_softc ch; 85 struct isa_attach_args *ia = aux; 86 struct cfdata *cf = ((struct device *)match)->dv_cfdata; 87 int result = 0; 88 89 bzero(&ch, sizeof ch); 90 ch.cmd_iot = ia->ia_iot; 91 if (bus_space_map(ch.cmd_iot, ia->ia_iobase, WDC_ISA_REG_NPORTS, 0, 92 &ch.cmd_ioh)) 93 goto out; 94 95 ch.ctl_iot = ia->ia_iot; 96 if (bus_space_map(ch.ctl_iot, ia->ia_iobase + WDC_ISA_AUXREG_OFFSET, 97 WDC_ISA_AUXREG_NPORTS, 0, &ch.ctl_ioh)) 98 goto outunmap; 99 100 if (cf->cf_flags & WDC_OPTION_PROBE_VERBOSE) 101 ch.ch_flags |= WDCF_VERBOSE_PROBE; 102 103 result = wdcprobe(&ch); 104 if (result) { 105 ia->ia_iosize = WDC_ISA_REG_NPORTS; 106 ia->ia_msize = 0; 107 } 108 109 bus_space_unmap(ch.ctl_iot, ch.ctl_ioh, WDC_ISA_AUXREG_NPORTS); 110 outunmap: 111 bus_space_unmap(ch.cmd_iot, ch.cmd_ioh, WDC_ISA_REG_NPORTS); 112 out: 113 return (result); 114 } 115 116 void 117 wdc_isa_attach(struct device *parent, struct device *self, void *aux) 118 { 119 struct wdc_isa_softc *sc = (void *)self; 120 struct isa_attach_args *ia = aux; 121 122 printf("\n"); 123 124 sc->wdc_channel.cmd_iot = ia->ia_iot; 125 sc->wdc_channel.ctl_iot = ia->ia_iot; 126 sc->sc_ic = ia->ia_ic; 127 sc->sc_isa = parent; 128 129 if (bus_space_map(sc->wdc_channel.cmd_iot, ia->ia_iobase, 130 WDC_ISA_REG_NPORTS, 0, &sc->wdc_channel.cmd_ioh) || 131 bus_space_map(sc->wdc_channel.ctl_iot, 132 ia->ia_iobase + WDC_ISA_AUXREG_OFFSET, WDC_ISA_AUXREG_NPORTS, 133 0, &sc->wdc_channel.ctl_ioh)) { 134 printf("%s: couldn't map registers\n", 135 sc->sc_wdcdev.sc_dev.dv_xname); 136 } 137 sc->wdc_channel.data32iot = sc->wdc_channel.cmd_iot; 138 sc->wdc_channel.data32ioh = sc->wdc_channel.cmd_ioh; 139 140 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, IST_EDGE, 141 IPL_BIO, wdcintr, &sc->wdc_channel, sc->sc_wdcdev.sc_dev.dv_xname); 142 143 if (ia->ia_drq != DRQUNK) { 144 #if NISADMA > 0 145 sc->sc_drq = ia->ia_drq; 146 147 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DMA; 148 sc->sc_wdcdev.dma_arg = sc; 149 sc->sc_wdcdev.dma_init = wdc_isa_dma_init; 150 sc->sc_wdcdev.dma_start = wdc_isa_dma_start; 151 sc->sc_wdcdev.dma_finish = wdc_isa_dma_finish; 152 wdc_isa_dma_setup(sc); 153 #else /* NISADMA > 0 */ 154 printf("%s: ignoring drq, isa dma not supported", 155 sc->sc_wdcdev.sc_dev.dv_xname); 156 #endif /* NISADMA > 0 */ 157 } 158 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_PREATA; 159 if (sc->sc_wdcdev.sc_dev.dv_cfdata->cf_flags & WDC_OPTIONS_32) 160 sc->sc_wdcdev.cap |= WDC_CAPABILITY_DATA32; 161 sc->sc_wdcdev.PIO_cap = 0; 162 sc->wdc_chanptr = &sc->wdc_channel; 163 sc->sc_wdcdev.channels = &sc->wdc_chanptr; 164 sc->sc_wdcdev.nchannels = 1; 165 sc->wdc_channel.channel = 0; 166 sc->wdc_channel.wdc = &sc->sc_wdcdev; 167 sc->wdc_channel.ch_queue = wdc_alloc_queue(); 168 if (sc->wdc_channel.ch_queue == NULL) { 169 printf("%s: cannot allocate channel queue", 170 sc->sc_wdcdev.sc_dev.dv_xname); 171 return; 172 } 173 wdcattach(&sc->wdc_channel); 174 wdc_print_current_modes(&sc->wdc_channel); 175 } 176 177 #if NISADMA > 0 178 static void 179 wdc_isa_dma_setup(struct wdc_isa_softc *sc) 180 { 181 if (isa_dmamap_create(sc->sc_isa, sc->sc_drq, 182 MAXPHYS, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW)) { 183 printf("%s: can't create map for drq %d\n", 184 sc->sc_wdcdev.sc_dev.dv_xname, sc->sc_drq); 185 sc->sc_wdcdev.cap &= ~WDC_CAPABILITY_DMA; 186 } 187 } 188 189 static int 190 wdc_isa_dma_init(void *v, int channel, int drive, void *databuf, size_t datalen, 191 int read) 192 { 193 struct wdc_isa_softc *sc = v; 194 195 isa_dmastart(sc->sc_isa, sc->sc_drq, databuf, datalen, NULL, 196 (read ? DMAMODE_READ : DMAMODE_WRITE), 197 BUS_DMA_NOWAIT); 198 199 return 0; 200 } 201 202 static void 203 wdc_isa_dma_start(void *v, int channel, int drive) 204 { 205 /* nothing to do */ 206 } 207 208 static int 209 wdc_isa_dma_finish(void *v, int channel, int drive, int force) 210 { 211 struct wdc_isa_softc *sc = v; 212 213 isa_dmadone(sc->sc_isa, sc->sc_drq); 214 215 return 0; 216 } 217 #endif /* NISADMA > 0 */ 218