1 /* $OpenBSD: brgphyreg.h,v 1.1 2000/08/28 05:22:25 jason Exp $ */ 2 3 /* 4 * Copyright (c) 2000 5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD: src/sys/dev/mii/brgphyreg.h,v 1.1 2000/04/22 01:58:17 wpaul Exp $ 35 */ 36 37 #ifndef _DEV_MII_BRGPHYREG_H_ 38 #define _DEV_MII_BRGPHYREG_H_ 39 40 /* 41 * Broadcom BCM5400 registers 42 */ 43 44 #define BRGPHY_MII_BMCR 0x00 45 #define BRGPHY_BMCR_RESET 0x8000 46 #define BRGPHY_BMCR_LOOP 0x4000 47 #define BRGPHY_BMCR_SPD0 0x2000 /* speed select, lower bit */ 48 #define BRGPHY_BMCR_AUTOEN 0x1000 /* Autoneg enabled */ 49 #define BRGPHY_BMCR_PDOWN 0x0800 /* Power down */ 50 #define BRGPHY_BMCR_ISO 0x0400 /* Isolate */ 51 #define BRGPHY_BMCR_STARTNEG 0x0200 /* Restart autoneg */ 52 #define BRGPHY_BMCR_FDX 0x0100 /* Duplex mode */ 53 #define BRGPHY_BMCR_CTEST 0x0080 /* Collision test enable */ 54 #define BRGPHY_BMCR_SPD1 0x0040 /* Speed select, upper bit */ 55 56 #define BRGPHY_S1000 BRGPHY_BMCR_SPD1 /* 1000mbps */ 57 #define BRGPHY_S100 BRGPHY_BMCR_SPD0 /* 100mpbs */ 58 #define BRGPHY_S10 0 /* 10mbps */ 59 60 #define BRGPHY_MII_BMSR 0x01 61 #define BRGPHY_BMSR_EXTSTS 0x0100 /* Extended status present */ 62 #define BRGPHY_BMSR_PRESUB 0x0040 /* Preamble surpression */ 63 #define BRGPHY_BMSR_ACOMP 0x0020 /* Autoneg complete */ 64 #define BRGPHY_BMSR_RFAULT 0x0010 /* Remote fault condition occured */ 65 #define BRGPHY_BMSR_ANEG 0x0008 /* Autoneg capable */ 66 #define BRGPHY_BMSR_LINK 0x0004 /* Link status */ 67 #define BRGPHY_BMSR_JABBER 0x0002 /* Jabber detected */ 68 #define BRGPHY_BMSR_EXT 0x0001 /* Extended capability */ 69 70 #define BRGPHY_MII_ANAR 0x04 71 #define BRGPHY_ANAR_NP 0x8000 /* Next page */ 72 #define BRGPHY_ANAR_RF 0x2000 /* Remote fault */ 73 #define BRGPHY_ANAR_ASP 0x0800 /* Asymetric Pause */ 74 #define BRGPHY_ANAR_PC 0x0400 /* Pause capable */ 75 #define BRGPHY_ANAR_SEL 0x001F /* selector field, 00001=Ethernet */ 76 77 #define BRGPHY_MII_ANLPAR 0x05 78 #define BRGPHY_ANLPAR_NP 0x8000 /* Next page */ 79 #define BRGPHY_ANLPAR_RF 0x2000 /* Remote fault */ 80 #define BRGPHY_ANLPAR_ASP 0x0800 /* Asymetric Pause */ 81 #define BRGPHY_ANLPAR_PC 0x0400 /* Pause capable */ 82 #define BRGPHY_ANLPAR_SEL 0x001F /* selector field, 00001=Ethernet */ 83 84 #define BRGPHY_SEL_TYPE 0x0001 /* ethernet */ 85 86 #define BRGPHY_MII_ANER 0x06 87 #define BRGPHY_ANER_PDF 0x0010 /* Parallel detection fault */ 88 #define BRGPHY_ANER_LPNP 0x0008 /* Link partner can next page */ 89 #define BRGPHY_ANER_NP 0x0004 /* Local PHY can next page */ 90 #define BRGPHY_ANER_RX 0x0002 /* Next page received */ 91 #define BRGPHY_ANER_LPAN 0x0001 /* Link partner autoneg capable */ 92 93 #define BRGPHY_MII_NEXTP 0x07 /* Next page */ 94 95 #define BRGPHY_MII_NEXTP_LP 0x08 /* Next page of link partner */ 96 97 #define BRGPHY_MII_1000CTL 0x09 /* 1000baseT control */ 98 #define BRGPHY_1000CTL_TST 0xE000 /* test modes */ 99 #define BRGPHY_1000CTL_MSE 0x1000 /* Master/Slave enable */ 100 #define BRGPHY_1000CTL_MSC 0x0800 /* Master/Slave configuration */ 101 #define BRGPHY_1000CTL_RD 0x0400 /* Repeater/DTE */ 102 #define BRGPHY_1000CTL_AFD 0x0200 /* Advertise full duplex */ 103 #define BRGPHY_1000CTL_AHD 0x0100 /* Advertise half duplex */ 104 105 #define BRGPHY_MII_1000STS 0x0A /* 1000baseT status */ 106 #define BRGPHY_1000STS_MSF 0x8000 /* Master/slave fault */ 107 #define BRGPHY_1000STS_MSR 0x4000 /* Master/slave result */ 108 #define BRGPHY_1000STS_LRS 0x2000 /* Local receiver status */ 109 #define BRGPHY_1000STS_RRS 0x1000 /* Remote receiver status */ 110 #define BRGPHY_1000STS_LPFD 0x0800 /* Link partner can FD */ 111 #define BRGPHY_1000STS_LPHD 0x0400 /* Link partner can HD */ 112 #define BRGPHY_1000STS_IEC 0x00FF /* Idle error count */ 113 114 #define BRGPHY_MII_EXTSTS 0x0F /* Extended status */ 115 #define BRGPHY_EXTSTS_X_FD_CAP 0x8000 /* 1000base-X FD capable */ 116 #define BRGPHY_EXTSTS_X_HD_CAP 0x4000 /* 1000base-X HD capable */ 117 #define BRGPHY_EXTSTS_T_FD_CAP 0x2000 /* 1000base-T FD capable */ 118 #define BRGPHY_EXTSTS_T_HD_CAP 0x1000 /* 1000base-T HD capable */ 119 120 #define BRGPHY_MII_PHY_EXTCTL 0x10 /* PHY extended control */ 121 #define BRGPHY_PHY_EXTCTL_MAC_PHY 0x8000 /* 10BIT/GMI-interface */ 122 #define BRGPHY_PHY_EXTCTL_DIS_CROSS 0x4000 /* Disable MDI crossover */ 123 #define BRGPHY_PHY_EXTCTL_TX_DIS 0x2000 /* Tx output disable d*/ 124 #define BRGPHY_PHY_EXTCTL_INT_DIS 0x1000 /* Interrupts disabled */ 125 #define BRGPHY_PHY_EXTCTL_F_INT 0x0800 /* Force interrupt */ 126 #define BRGPHY_PHY_EXTCTL_BY_45 0x0400 /* Bypass 4B5B-Decoder */ 127 #define BRGPHY_PHY_EXTCTL_BY_SCR 0x0200 /* Bypass scrambler */ 128 #define BRGPHY_PHY_EXTCTL_BY_MLT3 0x0100 /* Bypass MLT3 encoder */ 129 #define BRGPHY_PHY_EXTCTL_BY_RXA 0x0080 /* Bypass RX alignment */ 130 #define BRGPHY_PHY_EXTCTL_RES_SCR 0x0040 /* Reset scrambler */ 131 #define BRGPHY_PHY_EXTCTL_EN_LTR 0x0020 /* Enable LED traffic mode */ 132 #define BRGPHY_PHY_EXTCTL_LED_ON 0x0010 /* Force LEDs on */ 133 #define BRGPHY_PHY_EXTCTL_LED_OFF 0x0008 /* Force LEDs off */ 134 #define BRGPHY_PHY_EXTCTL_EX_IPG 0x0004 /* Extended TX IPG mode */ 135 #define BRGPHY_PHY_EXTCTL_3_LED 0x0002 /* Three link LED mode */ 136 #define BRGPHY_PHY_EXTCTL_HIGH_LA 0x0001 /* GMII Fifo Elasticy (?) */ 137 138 #define BRGPHY_MII_PHY_EXTSTS 0x11 /* PHY extended status */ 139 #define BRGPHY_PHY_EXTSTS_CROSS_STAT 0x2000 /* MDI crossover status */ 140 #define BRGPHY_PHY_EXTSTS_INT_STAT 0x1000 /* Interrupt status */ 141 #define BRGPHY_PHY_EXTSTS_RRS 0x0800 /* Remote receiver status */ 142 #define BRGPHY_PHY_EXTSTS_LRS 0x0400 /* Local receiver status */ 143 #define BRGPHY_PHY_EXTSTS_LOCKED 0x0200 /* Locked */ 144 #define BRGPHY_PHY_EXTSTS_LS 0x0100 /* Link status */ 145 #define BRGPHY_PHY_EXTSTS_RF 0x0080 /* Remove fault */ 146 #define BRGPHY_PHY_EXTSTS_CE_ER 0x0040 /* Carrier ext error */ 147 #define BRGPHY_PHY_EXTSTS_BAD_SSD 0x0020 /* Bad SSD */ 148 #define BRGPHY_PHY_EXTSTS_BAD_ESD 0x0010 /* Bad ESS */ 149 #define BRGPHY_PHY_EXTSTS_RX_ER 0x0008 /* RX error */ 150 #define BRGPHY_PHY_EXTSTS_TX_ER 0x0004 /* TX error */ 151 #define BRGPHY_PHY_EXTSTS_LOCK_ER 0x0002 /* Lock error */ 152 #define BRGPHY_PHY_EXTSTS_MLT3_ER 0x0001 /* MLT3 code error */ 153 154 #define BRGPHY_MII_RXERRCNT 0x12 /* RX error counter */ 155 156 #define BRGPHY_MII_FCERRCNT 0x13 /* false carrier sense counter */ 157 #define BGRPHY_FCERRCNT 0x00FF /* False carrier counter */ 158 159 #define BRGPHY_MII_RXNOCNT 0x14 /* RX not OK counter */ 160 #define BRGPHY_RXNOCNT_LOCAL 0xFF00 /* Local RX not OK counter */ 161 #define BRGPHY_RXNOCNT_REMOTE 0x00FF /* Local RX not OK counter */ 162 163 #define BRGPHY_MII_AUXCTL 0x18 /* AUX control */ 164 #define BRGPHY_AUXCTL_LOW_SQ 0x8000 /* Low squelch */ 165 #define BRGPHY_AUXCTL_LONG_PKT 0x4000 /* RX long packets */ 166 #define BRGPHY_AUXCTL_ER_CTL 0x3000 /* Edgerate control */ 167 #define BRGPHY_AUXCTL_TX_TST 0x0400 /* TX test, always 1 */ 168 #define BRGPHY_AUXCTL_DIS_PRF 0x0080 /* dis part resp filter */ 169 #define BRGPHY_AUXCTL_DIAG_MODE 0x0004 /* Diagnostic mode */ 170 171 #define BRGPHY_MII_AUXSTS 0x19 /* AUX status */ 172 #define BRGPHY_AUXSTS_ACOMP 0x8000 /* autoneg complete */ 173 #define BRGPHY_AUXSTS_AN_ACK 0x4000 /* autoneg complete ack */ 174 #define BRGPHY_AUXSTS_AN_ACK_D 0x2000 /* autoneg complete ack detect */ 175 #define BRGPHY_AUXSTS_AN_NPW 0x1000 /* autoneg next page wait */ 176 #define BRGPHY_AUXSTS_AN_RES 0x0700 /* AN HDC */ 177 #define BRGPHY_AUXSTS_PDF 0x0080 /* Parallel detect. fault */ 178 #define BRGPHY_AUXSTS_RF 0x0040 /* remote fault */ 179 #define BRGPHY_AUXSTS_ANP_R 0x0020 /* AN page received */ 180 #define BRGPHY_AUXSTS_LP_ANAB 0x0010 /* LP AN ability */ 181 #define BRGPHY_AUXSTS_LP_NPAB 0x0008 /* LP Next page ability */ 182 #define BRGPHY_AUXSTS_LINK 0x0004 /* Link status */ 183 #define BRGPHY_AUXSTS_PRR 0x0002 /* Pause resolution-RX */ 184 #define BRGPHY_AUXSTS_PRT 0x0001 /* Pause resolution-TX */ 185 186 #define BRGPHY_RES_1000FD 0x0700 /* 1000baseT full duplex */ 187 #define BRGPHY_RES_1000HD 0x0600 /* 1000baseT half duplex */ 188 189 #define BRGPHY_MII_ISR 0x1A /* interrupt status */ 190 #define BRGPHY_ISR_PSERR 0x4000 /* Pair swap error */ 191 #define BRGPHY_ISR_MDXI_SC 0x2000 /* MDIX Status Change */ 192 #define BRGPHY_ISR_HCT 0x1000 /* counter above 32K */ 193 #define BRGPHY_ISR_LCT 0x0800 /* all counter below 128 */ 194 #define BRGPHY_ISR_AN_PR 0x0400 /* Autoneg page received */ 195 #define BRGPHY_ISR_NO_HDCL 0x0200 /* No HCD Link */ 196 #define BRGPHY_ISR_NO_HDC 0x0100 /* No HCD */ 197 #define BRGPHY_ISR_USHDC 0x0080 /* Negotiated Unsupported HCD */ 198 #define BRGPHY_ISR_SCR_S_ERR 0x0040 /* Scrambler sync error */ 199 #define BRGPHY_ISR_RRS_CHG 0x0020 /* Remote RX status change */ 200 #define BRGPHY_ISR_LRS_CHG 0x0010 /* Local RX status change */ 201 #define BRGPHY_ISR_DUP_CHG 0x0008 /* Duplex mode change */ 202 #define BRGPHY_ISR_LSP_CHG 0x0004 /* Link speed changed */ 203 #define BRGPHY_ISR_LNK_CHG 0x0002 /* Link status change */ 204 #define BRGPHY_ISR_CRCERR 0x0001 /* CEC error */ 205 206 #define BRGPHY_MII_IMR 0x1B /* interrupt mask */ 207 #define BRGPHY_IMR_PSERR 0x4000 /* Pair swap error */ 208 #define BRGPHY_IMR_MDXI_SC 0x2000 /* MDIX Status Change */ 209 #define BRGPHY_IMR_HCT 0x1000 /* counter above 32K */ 210 #define BRGPHY_IMR_LCT 0x0800 /* all counter below 128 */ 211 #define BRGPHY_IMR_AN_PR 0x0400 /* Autoneg page received */ 212 #define BRGPHY_IMR_NO_HDCL 0x0200 /* No HCD Link */ 213 #define BRGPHY_IMR_NO_HDC 0x0100 /* No HCD */ 214 #define BRGPHY_IMR_USHDC 0x0080 /* Negotiated Unsupported HCD */ 215 #define BRGPHY_IMR_SCR_S_ERR 0x0040 /* Scrambler sync error */ 216 #define BRGPHY_IMR_RRS_CHG 0x0020 /* Remote RX status change */ 217 #define BRGPHY_IMR_LRS_CHG 0x0010 /* Local RX status change */ 218 #define BRGPHY_IMR_DUP_CHG 0x0008 /* Duplex mode change */ 219 #define BRGPHY_IMR_LSP_CHG 0x0004 /* Link speed changed */ 220 #define BRGPHY_IMR_LNK_CHG 0x0002 /* Link status change */ 221 #define BRGPHY_IMR_CRCERR 0x0001 /* CEC error */ 222 223 #define BRGPHY_INTRS \ 224 ~(BRGPHY_IMR_LNK_CHG|BRGPHY_IMR_LSP_CHG|BRGPHY_IMR_DUP_CHG) 225 226 #endif /* _DEV_BRGPHY_MIIREG_H_ */ 227