1 /* $OpenBSD: agp_amd.c,v 1.16 2010/08/07 19:32:44 oga Exp $ */ 2 /* $NetBSD: agp_amd.c,v 1.6 2001/10/06 02:48:50 thorpej Exp $ */ 3 4 /*- 5 * Copyright (c) 2000 Doug Rabson 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD: src/sys/pci/agp_amd.c,v 1.6 2001/07/05 21:28:46 jhb Exp $ 30 */ 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/malloc.h> 35 #include <sys/kernel.h> 36 #include <sys/lock.h> 37 #include <sys/conf.h> 38 #include <sys/device.h> 39 #include <sys/agpio.h> 40 41 #include <dev/pci/pcivar.h> 42 #include <dev/pci/pcireg.h> 43 #include <dev/pci/vga_pcivar.h> 44 #include <dev/pci/agpvar.h> 45 #include <dev/pci/agpreg.h> 46 47 #include <dev/pci/pcidevs.h> 48 49 #define READ2(off) bus_space_read_2(asc->iot, asc->ioh, off) 50 #define READ4(off) bus_space_read_4(asc->iot, asc->ioh, off) 51 #define WRITE2(off,v) bus_space_write_2(asc->iot, asc->ioh, off, v) 52 #define WRITE4(off,v) bus_space_write_4(asc->iot, asc->ioh, off, v) 53 54 struct agp_amd_gatt { 55 bus_dmamap_t ag_dmamap; 56 bus_dma_segment_t ag_dmaseg; 57 int ag_nseg; 58 u_int32_t ag_entries; 59 u_int32_t *ag_vdir; /* virtual address of page dir */ 60 bus_addr_t ag_pdir; /* bus address of page dir */ 61 u_int32_t *ag_virtual; /* virtual address of gatt */ 62 bus_addr_t ag_physical; /* bus address of gatt */ 63 size_t ag_size; 64 }; 65 66 struct agp_amd_softc { 67 struct device dev; 68 struct agp_softc *agpdev; 69 struct agp_amd_gatt *gatt; 70 pci_chipset_tag_t asc_pc; 71 pcitag_t asc_tag; 72 bus_space_handle_t ioh; 73 bus_space_tag_t iot; 74 bus_addr_t asc_apaddr; 75 bus_size_t asc_apsize; 76 pcireg_t asc_apctrl; 77 pcireg_t asc_modectrl; 78 u_int16_t asc_status; 79 }; 80 81 void agp_amd_attach(struct device *, struct device *, void *); 82 int agp_amd_activate(struct device *, int); 83 void agp_amd_save(struct agp_amd_softc *); 84 void agp_amd_restore(struct agp_amd_softc *); 85 int agp_amd_probe(struct device *, void *, void *); 86 bus_size_t agp_amd_get_aperture(void *); 87 struct agp_amd_gatt *agp_amd_alloc_gatt(bus_dma_tag_t, bus_size_t); 88 int agp_amd_set_aperture(void *, bus_size_t); 89 void agp_amd_bind_page(void *, bus_size_t, paddr_t, int); 90 void agp_amd_unbind_page(void *, bus_size_t); 91 void agp_amd_flush_tlb(void *); 92 93 struct cfattach amdagp_ca = { 94 sizeof(struct agp_amd_softc), agp_amd_probe, agp_amd_attach, NULL, 95 agp_amd_activate 96 }; 97 98 struct cfdriver amdagp_cd = { 99 NULL, "amdagp", DV_DULL 100 }; 101 102 const struct agp_methods agp_amd_methods = { 103 agp_amd_bind_page, 104 agp_amd_unbind_page, 105 agp_amd_flush_tlb, 106 }; 107 108 109 struct agp_amd_gatt * 110 agp_amd_alloc_gatt(bus_dma_tag_t dmat, bus_size_t apsize) 111 { 112 bus_size_t entries = apsize >> AGP_PAGE_SHIFT; 113 struct agp_amd_gatt *gatt; 114 int i, npages; 115 caddr_t vdir; 116 117 gatt = malloc(sizeof(struct agp_amd_gatt), M_AGP, M_NOWAIT); 118 if (!gatt) 119 return (0); 120 gatt->ag_size = AGP_PAGE_SIZE + entries * sizeof(u_int32_t); 121 122 if (agp_alloc_dmamem(dmat, gatt->ag_size, &gatt->ag_dmamap, 123 &gatt->ag_pdir, &gatt->ag_dmaseg) != 0) { 124 printf("failed to allocate GATT\n"); 125 free(gatt, M_AGP); 126 return (NULL); 127 } 128 129 if (bus_dmamem_map(dmat, &gatt->ag_dmaseg, 1, gatt->ag_size, 130 &vdir, BUS_DMA_NOWAIT) != 0) { 131 printf("failed to map GATT\n"); 132 agp_free_dmamem(dmat, gatt->ag_size, gatt->ag_dmamap, 133 &gatt->ag_dmaseg); 134 free(gatt, M_AGP); 135 return (NULL); 136 } 137 138 gatt->ag_vdir = (u_int32_t *)vdir; 139 gatt->ag_entries = entries; 140 gatt->ag_virtual = (u_int32_t *)(vdir + AGP_PAGE_SIZE); 141 gatt->ag_physical = gatt->ag_pdir + AGP_PAGE_SIZE; 142 143 /* 144 * Map the pages of the GATT into the page directory. 145 */ 146 npages = ((gatt->ag_size - 1) >> AGP_PAGE_SHIFT); 147 148 for (i = 0; i < npages; i++) 149 gatt->ag_vdir[i] = (gatt->ag_physical + i * AGP_PAGE_SIZE) | 1; 150 151 /* 152 * Make sure the chipset can see everything. 153 */ 154 agp_flush_cache(); 155 156 return (gatt); 157 } 158 159 #if 0 160 void 161 agp_amd_free_gatt(bus_dma_tag_t dmat, struct agp_amd_gatt *gatt) 162 { 163 bus_dmamem_unmap(dmat, gatt->ag_virtual, gatt->ag_size); 164 agp_free_dmamem(dmat, gatt->ag_size, 165 gatt->ag_dmamap, (caddr_t)gatt->ag_virtual, &gatt->ag_dmaseg, 166 gatt->ag_nseg); 167 free(gatt, M_AGP); 168 } 169 #endif 170 171 int 172 agp_amd_probe(struct device *parent, void *match, void *aux) 173 { 174 struct agp_attach_args *aa = aux; 175 struct pci_attach_args *pa = aa->aa_pa; 176 177 /* Must be a pchb */ 178 if (agpbus_probe(aa) == 1 && PCI_VENDOR(pa->pa_id) == PCI_VENDOR_AMD && 179 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_SC751_SC || 180 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_761_PCHB || 181 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_AMD_762_PCHB)) 182 return (1); 183 return (0); 184 } 185 186 void 187 agp_amd_attach(struct device *parent, struct device *self, void *aux) 188 { 189 struct agp_amd_softc *asc = (struct agp_amd_softc *)self; 190 struct agp_attach_args *aa = aux; 191 struct pci_attach_args *pa = aa->aa_pa; 192 struct agp_amd_gatt *gatt; 193 pcireg_t reg; 194 int error; 195 196 asc->asc_pc = pa->pa_pc; 197 asc->asc_tag = pa->pa_tag; 198 199 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, AGP_APBASE, 200 PCI_MAPREG_TYPE_MEM, &asc->asc_apaddr, NULL, NULL) != 0) { 201 printf(": can't get aperture info\n"); 202 return; 203 } 204 205 error = pci_mapreg_map(pa, AGP_AMD751_REGISTERS, 206 PCI_MAPREG_TYPE_MEM, 0, &asc->iot, &asc->ioh, NULL, NULL, 0); 207 if (error != 0) { 208 printf("can't map AGP registers\n"); 209 return; 210 } 211 212 asc->asc_apsize = agp_amd_get_aperture(asc); 213 214 for (;;) { 215 gatt = agp_amd_alloc_gatt(pa->pa_dmat, asc->asc_apsize); 216 if (gatt != NULL) 217 break; 218 219 /* 220 * almost certainly error allocating contigious dma memory 221 * so reduce aperture so that the gatt size reduces. 222 */ 223 asc->asc_apsize /= 2; 224 if (agp_amd_set_aperture(asc, asc->asc_apsize)) { 225 printf(": failed to set aperture\n"); 226 return; 227 } 228 } 229 asc->gatt = gatt; 230 231 /* Install the gatt. */ 232 WRITE4(AGP_AMD751_ATTBASE, gatt->ag_physical); 233 234 /* Enable synchronisation between host and agp. */ 235 reg = pci_conf_read(asc->asc_pc, asc->asc_tag, AGP_AMD751_MODECTRL); 236 reg &= ~0x00ff00ff; 237 reg |= (AGP_AMD751_MODECTRL_SYNEN) | (AGP_AMD751_MODECTRL2_GPDCE << 16); 238 pci_conf_write(asc->asc_pc, asc->asc_tag, AGP_AMD751_MODECTRL, reg); 239 /* Enable the TLB and flush */ 240 WRITE2(AGP_AMD751_STATUS, 241 READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE); 242 agp_amd_flush_tlb(asc); 243 244 asc->agpdev = (struct agp_softc *)agp_attach_bus(pa, &agp_amd_methods, 245 asc->asc_apaddr, asc->asc_apsize, &asc->dev); 246 return; 247 } 248 249 #if 0 250 int 251 agp_amd_detach(void *sc) 252 { 253 struct agp_amd_softc *asc = sc; 254 pcireg_t reg; 255 256 /* Disable the TLB.. */ 257 WRITE2(AGP_AMD751_STATUS, 258 READ2(AGP_AMD751_STATUS) & ~AGP_AMD751_STATUS_GCE); 259 260 /* Disable host-agp sync */ 261 reg = pci_conf_read(asc->asc_pc, asc->asc_tag, AGP_AMD751_MODECTRL); 262 reg &= 0xffffff00; 263 pci_conf_write(asc->asc_pc, asc->asc_pcitag, AGP_AMD751_MODECTRL, reg); 264 265 /* Clear the GATT base */ 266 WRITE4(AGP_AMD751_ATTBASE, 0); 267 268 /* Put the aperture back the way it started. */ 269 agp_amd_set_aperture(asc, asc->initial_aperture); 270 271 agp_amd_free_gatt(asc, asc->gatt); 272 273 /* XXXfvdl no pci_mapreg_unmap */ 274 275 return (0); 276 } 277 #endif 278 279 int 280 agp_amd_activate(struct device *arg, int act) 281 { 282 struct agp_amd_softc *asc = (struct agp_amd_softc *)arg; 283 284 switch (act) { 285 case DVACT_SUSPEND: 286 agp_amd_save(asc); 287 break; 288 case DVACT_RESUME: 289 agp_amd_restore(asc); 290 break; 291 } 292 293 return (0); 294 } 295 296 void 297 agp_amd_save(struct agp_amd_softc *asc) 298 { 299 asc->asc_apctrl = pci_conf_read(asc->asc_pc, asc->asc_tag, 300 AGP_AMD751_APCTRL); 301 asc->asc_modectrl = pci_conf_read(asc->asc_pc, asc->asc_tag, 302 AGP_AMD751_MODECTRL); 303 asc->asc_status = READ2(AGP_AMD751_STATUS); 304 } 305 306 void 307 agp_amd_restore(struct agp_amd_softc *asc) 308 { 309 310 /* restore aperture size */ 311 pci_conf_write(asc->asc_pc, asc->asc_tag, AGP_AMD751_APCTRL, 312 asc->asc_apctrl); 313 314 /* Install the gatt. */ 315 WRITE4(AGP_AMD751_ATTBASE, asc->gatt->ag_physical); 316 317 /* Reenable synchronisation between host and agp. */ 318 pci_conf_write(asc->asc_pc, asc->asc_tag, AGP_AMD751_MODECTRL, 319 asc->asc_modectrl); 320 /* Enable the TLB and flush */ 321 WRITE2(AGP_AMD751_STATUS, asc->asc_status); 322 agp_amd_flush_tlb(asc); 323 } 324 325 bus_size_t 326 agp_amd_get_aperture(void *sc) 327 { 328 struct agp_amd_softc *asc = sc; 329 int vas; 330 331 vas = (pci_conf_read(asc->asc_pc, asc->asc_tag, 332 AGP_AMD751_APCTRL) & 0x06); 333 vas >>= 1; 334 /* 335 * The aperture size is equal to 32M<<vas. 336 */ 337 return ((32 * 1024 * 1024) << vas); 338 } 339 340 int 341 agp_amd_set_aperture(void *sc, bus_size_t aperture) 342 { 343 struct agp_amd_softc *asc = sc; 344 int vas; 345 pcireg_t reg; 346 347 /* 348 * Check for a power of two and make sure its within the 349 * programmable range. 350 */ 351 if (aperture & (aperture - 1) 352 || aperture < 32*1024*1024 353 || aperture > 2U*1024*1024*1024) 354 return (EINVAL); 355 356 vas = ffs(aperture / 32*1024*1024) - 1; 357 358 reg = pci_conf_read(asc->asc_pc, asc->asc_tag, AGP_AMD751_APCTRL); 359 reg = (reg & ~0x06) | (vas << 1); 360 pci_conf_write(asc->asc_pc, asc->asc_tag, AGP_AMD751_APCTRL, reg); 361 362 return (0); 363 } 364 365 void 366 agp_amd_bind_page(void *sc, bus_size_t offset, paddr_t physical, int flags) 367 { 368 struct agp_amd_softc *asc = sc; 369 370 asc->gatt->ag_virtual[(offset - asc->asc_apaddr) >> AGP_PAGE_SHIFT] = 371 physical | 1; 372 } 373 374 void 375 agp_amd_unbind_page(void *sc, bus_size_t offset) 376 { 377 struct agp_amd_softc *asc = sc; 378 379 asc->gatt->ag_virtual[(offset - asc->asc_apaddr) >> AGP_PAGE_SHIFT] = 0; 380 } 381 382 void 383 agp_amd_flush_tlb(void *sc) 384 { 385 struct agp_amd_softc *asc = sc; 386 387 /* Set the cache invalidate bit and wait for the chipset to clear */ 388 WRITE4(AGP_AMD751_TLBCTRL, 1); 389 do { 390 DELAY(1); 391 } while (READ4(AGP_AMD751_TLBCTRL)); 392 } 393