1 /* $OpenBSD: autri.c,v 1.44 2020/01/11 09:08:39 cheloha Exp $ */ 2 3 /* 4 * Copyright (c) 2001 SOMEYA Yoshihiko and KUROSAWA Takahiro. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * Trident 4DWAVE-DX/NX, SiS 7018, ALi M5451 Sound Driver 30 * 31 * The register information is taken from the ALSA driver. 32 * 33 * Documentation links: 34 * - ftp://ftp.alsa-project.org/pub/manuals/trident/ 35 */ 36 37 #include "midi.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/fcntl.h> 43 #include <sys/malloc.h> 44 #include <sys/device.h> 45 46 #include <dev/pci/pcidevs.h> 47 #include <dev/pci/pcireg.h> 48 #include <dev/pci/pcivar.h> 49 50 #include <sys/audioio.h> 51 #include <dev/audio_if.h> 52 #include <dev/midi_if.h> 53 #include <dev/ic/ac97.h> 54 #include <dev/ic/mpuvar.h> 55 56 #include <machine/bus.h> 57 #include <machine/intr.h> 58 59 #include <dev/pci/autrireg.h> 60 #include <dev/pci/autrivar.h> 61 62 #ifdef AUDIO_DEBUG 63 # define DPRINTF(x) if (autridebug) printf x 64 # define DPRINTFN(n,x) if (autridebug > (n)) printf x 65 int autridebug = 0; 66 #else 67 # define DPRINTF(x) 68 # define DPRINTFN(n,x) 69 #endif 70 71 int autri_match(struct device *, void *, void *); 72 void autri_attach(struct device *, struct device *, void *); 73 int autri_activate(struct device *, int); 74 int autri_intr(void *); 75 76 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 77 #define KERNADDR(p) ((void *)((p)->addr)) 78 79 int autri_allocmem(struct autri_softc *, size_t, size_t, struct autri_dma *); 80 int autri_freemem(struct autri_softc *, struct autri_dma *); 81 82 #define TWRITE1(sc, r, x) bus_space_write_1((sc)->memt, (sc)->memh, (r), (x)) 83 #define TWRITE2(sc, r, x) bus_space_write_2((sc)->memt, (sc)->memh, (r), (x)) 84 #define TWRITE4(sc, r, x) bus_space_write_4((sc)->memt, (sc)->memh, (r), (x)) 85 #define TREAD1(sc, r) bus_space_read_1((sc)->memt, (sc)->memh, (r)) 86 #define TREAD2(sc, r) bus_space_read_2((sc)->memt, (sc)->memh, (r)) 87 #define TREAD4(sc, r) bus_space_read_4((sc)->memt, (sc)->memh, (r)) 88 89 static __inline void autri_reg_set_1(struct autri_softc *, int, uint8_t); 90 static __inline void autri_reg_clear_1(struct autri_softc *, int, uint8_t); 91 static __inline void autri_reg_set_4(struct autri_softc *, int, uint32_t); 92 static __inline void autri_reg_clear_4(struct autri_softc *, int, uint32_t); 93 94 int autri_attach_codec(void *sc, struct ac97_codec_if *); 95 int autri_read_codec(void *sc, u_int8_t a, u_int16_t *d); 96 int autri_write_codec(void *sc, u_int8_t a, u_int16_t d); 97 void autri_reset_codec(void *sc); 98 enum ac97_host_flags autri_flags_codec(void *); 99 100 int autri_init(void *sc); 101 struct autri_dma *autri_find_dma(struct autri_softc *, void *); 102 void autri_setup_channel(struct autri_softc *sc,int mode, 103 struct audio_params *param); 104 void autri_enable_interrupt(struct autri_softc *sc, int ch); 105 void autri_disable_interrupt(struct autri_softc *sc, int ch); 106 void autri_startch(struct autri_softc *sc, int ch, int ch_intr); 107 void autri_stopch(struct autri_softc *sc, int ch, int ch_intr); 108 void autri_enable_loop_interrupt(void *sc); 109 #if 0 110 void autri_disable_loop_interrupt(void *sc); 111 #endif 112 113 struct cfdriver autri_cd = { 114 NULL, "autri", DV_DULL 115 }; 116 117 struct cfattach autri_ca = { 118 sizeof(struct autri_softc), autri_match, autri_attach, NULL, 119 autri_activate 120 }; 121 122 int autri_open(void *, int); 123 void autri_close(void *); 124 int autri_set_params(void *, int, int, struct audio_params *, 125 struct audio_params *); 126 int autri_round_blocksize(void *, int); 127 int autri_trigger_output(void *, void *, void *, int, void (*)(void *), 128 void *, struct audio_params *); 129 int autri_trigger_input(void *, void *, void *, int, void (*)(void *), 130 void *, struct audio_params *); 131 int autri_halt_output(void *); 132 int autri_halt_input(void *); 133 int autri_mixer_set_port(void *, mixer_ctrl_t *); 134 int autri_mixer_get_port(void *, mixer_ctrl_t *); 135 void *autri_malloc(void *, int, size_t, int, int); 136 void autri_free(void *, void *, int); 137 int autri_get_props(void *); 138 int autri_query_devinfo(void *addr, mixer_devinfo_t *dip); 139 140 int autri_get_portnum_by_name(struct autri_softc *, char *, char *, char *); 141 142 struct audio_hw_if autri_hw_if = { 143 autri_open, 144 autri_close, 145 autri_set_params, 146 autri_round_blocksize, 147 NULL, /* commit_settings */ 148 NULL, /* init_output */ 149 NULL, /* init_input */ 150 NULL, /* start_output */ 151 NULL, /* start_input */ 152 autri_halt_output, 153 autri_halt_input, 154 NULL, /* speaker_ctl */ 155 NULL, /* setfd */ 156 autri_mixer_set_port, 157 autri_mixer_get_port, 158 autri_query_devinfo, 159 autri_malloc, 160 autri_free, 161 NULL, 162 autri_get_props, 163 autri_trigger_output, 164 autri_trigger_input 165 }; 166 167 #if NMIDI > 0 168 void autri_midi_close(void *); 169 void autri_midi_getinfo(void *, struct midi_info *); 170 int autri_midi_open(void *, int, void (*)(void *, int), 171 void (*)(void *), void *); 172 int autri_midi_output(void *, int); 173 174 struct midi_hw_if autri_midi_hw_if = { 175 autri_midi_open, 176 autri_midi_close, 177 autri_midi_output, 178 NULL, /* flush */ 179 autri_midi_getinfo, 180 NULL, /* ioctl */ 181 }; 182 #endif 183 184 /* 185 * register set/clear bit 186 */ 187 static __inline void 188 autri_reg_set_1(struct autri_softc *sc, int no, uint8_t mask) 189 { 190 bus_space_write_1(sc->memt, sc->memh, no, 191 (bus_space_read_1(sc->memt, sc->memh, no) | mask)); 192 } 193 194 static __inline void 195 autri_reg_clear_1(struct autri_softc *sc, int no, uint8_t mask) 196 { 197 bus_space_write_1(sc->memt, sc->memh, no, 198 (bus_space_read_1(sc->memt, sc->memh, no) & ~mask)); 199 } 200 201 static __inline void 202 autri_reg_set_4(struct autri_softc *sc, int no, uint32_t mask) 203 { 204 bus_space_write_4(sc->memt, sc->memh, no, 205 (bus_space_read_4(sc->memt, sc->memh, no) | mask)); 206 } 207 208 static __inline void 209 autri_reg_clear_4(struct autri_softc *sc, int no, uint32_t mask) 210 { 211 bus_space_write_4(sc->memt, sc->memh, no, 212 (bus_space_read_4(sc->memt, sc->memh, no) & ~mask)); 213 } 214 215 /* 216 * AC97 codec 217 */ 218 int 219 autri_attach_codec(void *sc_, struct ac97_codec_if *codec_if) 220 { 221 struct autri_codec_softc *sc = sc_; 222 223 DPRINTF(("autri_attach_codec()\n")); 224 225 sc->codec_if = codec_if; 226 return 0; 227 } 228 229 int 230 autri_read_codec(void *sc_, u_int8_t index, u_int16_t *data) 231 { 232 struct autri_codec_softc *codec = sc_; 233 struct autri_softc *sc = codec->sc; 234 u_int32_t status, addr, cmd, busy; 235 u_int16_t count; 236 237 /*DPRINTF(("sc->sc->type : 0x%X",sc->sc->type));*/ 238 239 switch (sc->sc_devid) { 240 case AUTRI_DEVICE_ID_4DWAVE_DX: 241 addr = AUTRI_DX_ACR1; 242 cmd = AUTRI_DX_ACR1_CMD_READ; 243 busy = AUTRI_DX_ACR1_BUSY_READ; 244 break; 245 case AUTRI_DEVICE_ID_4DWAVE_NX: 246 addr = AUTRI_NX_ACR2; 247 cmd = AUTRI_NX_ACR2_CMD_READ; 248 busy = AUTRI_NX_ACR2_BUSY_READ | AUTRI_NX_ACR2_RECV_WAIT; 249 break; 250 case AUTRI_DEVICE_ID_SIS_7018: 251 addr = AUTRI_SIS_ACRD; 252 cmd = AUTRI_SIS_ACRD_CMD_READ; 253 busy = AUTRI_SIS_ACRD_BUSY_READ | AUTRI_SIS_ACRD_AUDIO_BUSY; 254 break; 255 case AUTRI_DEVICE_ID_ALI_M5451: 256 if (sc->sc_revision > 0x01) 257 addr = AUTRI_ALI_ACWR; 258 else 259 addr = AUTRI_ALI_ACRD; 260 cmd = AUTRI_ALI_ACRD_CMD_READ; 261 busy = AUTRI_ALI_ACRD_BUSY_READ; 262 break; 263 default: 264 printf("%s: autri_read_codec : unknown device\n", 265 sc->sc_dev.dv_xname); 266 return -1; 267 } 268 269 /* wait for 'Ready to Read' */ 270 for (count=0; count < 0xffff; count++) { 271 if ((TREAD4(sc, addr) & busy) == 0) 272 break; 273 DELAY(1); 274 } 275 276 if (count == 0xffff) { 277 printf("%s: Codec timeout. Busy reading AC97 codec.\n", 278 sc->sc_dev.dv_xname); 279 return -1; 280 } 281 282 /* send Read Command to AC97 */ 283 TWRITE4(sc, addr, (index & 0x7f) | cmd); 284 285 /* wait for 'Returned data is available' */ 286 for (count=0; count < 0xffff; count++) { 287 status = TREAD4(sc, addr); 288 if ((status & busy) == 0) 289 break; 290 DELAY(1); 291 } 292 293 if (count == 0xffff) { 294 printf("%s: Codec timeout. Busy reading AC97 codec.\n", 295 sc->sc_dev.dv_xname); 296 return -1; 297 } 298 299 *data = (status >> 16) & 0x0000ffff; 300 /*DPRINTF(("autri_read_codec(0x%X) return 0x%X\n",reg,*data));*/ 301 return 0; 302 } 303 304 int 305 autri_write_codec(void *sc_, u_int8_t index, u_int16_t data) 306 { 307 struct autri_codec_softc *codec = sc_; 308 struct autri_softc *sc = codec->sc; 309 u_int32_t addr, cmd, busy; 310 u_int16_t count; 311 312 /*DPRINTF(("autri_write_codec(0x%X,0x%X)\n",index,data));*/ 313 314 switch (sc->sc_devid) { 315 case AUTRI_DEVICE_ID_4DWAVE_DX: 316 addr = AUTRI_DX_ACR0; 317 cmd = AUTRI_DX_ACR0_CMD_WRITE; 318 busy = AUTRI_DX_ACR0_BUSY_WRITE; 319 break; 320 case AUTRI_DEVICE_ID_4DWAVE_NX: 321 addr = AUTRI_NX_ACR1; 322 cmd = AUTRI_NX_ACR1_CMD_WRITE; 323 busy = AUTRI_NX_ACR1_BUSY_WRITE; 324 break; 325 case AUTRI_DEVICE_ID_SIS_7018: 326 addr = AUTRI_SIS_ACWR; 327 cmd = AUTRI_SIS_ACWR_CMD_WRITE; 328 busy = AUTRI_SIS_ACWR_BUSY_WRITE | AUTRI_SIS_ACWR_AUDIO_BUSY; 329 break; 330 case AUTRI_DEVICE_ID_ALI_M5451: 331 addr = AUTRI_ALI_ACWR; 332 cmd = AUTRI_ALI_ACWR_CMD_WRITE; 333 if (sc->sc_revision > 0x01) 334 cmd |= 0x0100; 335 busy = AUTRI_ALI_ACWR_BUSY_WRITE; 336 break; 337 default: 338 printf("%s: autri_write_codec : unknown device.\n", 339 sc->sc_dev.dv_xname); 340 return -1; 341 } 342 343 /* wait for 'Ready to Write' */ 344 for (count=0; count < 0xffff; count++) { 345 if ((TREAD4(sc, addr) & busy) == 0) 346 break; 347 DELAY(1); 348 } 349 350 if (count == 0xffff) { 351 printf("%s: Codec timeout. Busy writing AC97 codec\n", 352 sc->sc_dev.dv_xname); 353 return -1; 354 } 355 356 /* send Write Command to AC97 */ 357 TWRITE4(sc, addr, (data << 16) | (index & 0x7f) | cmd); 358 359 return 0; 360 } 361 362 void 363 autri_reset_codec(void *sc_) 364 { 365 struct autri_codec_softc *codec = sc_; 366 struct autri_softc *sc = codec->sc; 367 u_int32_t reg, ready; 368 int addr, count = 200; 369 370 DPRINTF(("autri_reset_codec(codec=%p,sc=%p)\n",codec,sc)); 371 DPRINTF(("sc->sc_devid=%X\n",sc->sc_devid)); 372 373 switch (sc->sc_devid) { 374 case AUTRI_DEVICE_ID_4DWAVE_DX: 375 /* warm reset AC97 codec */ 376 autri_reg_set_4(sc, AUTRI_DX_ACR2, 1); 377 delay(100); 378 /* release reset */ 379 autri_reg_clear_4(sc, AUTRI_DX_ACR2, 1); 380 delay(100); 381 382 addr = AUTRI_DX_ACR2; 383 ready = AUTRI_DX_ACR2_CODEC_READY; 384 break; 385 case AUTRI_DEVICE_ID_4DWAVE_NX: 386 /* warm reset AC97 codec */ 387 autri_reg_set_4(sc, AUTRI_NX_ACR0, 1); 388 delay(100); 389 /* release reset */ 390 autri_reg_clear_4(sc, AUTRI_NX_ACR0, 1); 391 delay(100); 392 393 addr = AUTRI_NX_ACR0; 394 ready = AUTRI_NX_ACR0_CODEC_READY; 395 break; 396 case AUTRI_DEVICE_ID_SIS_7018: 397 /* warm reset AC97 codec */ 398 autri_reg_set_4(sc, AUTRI_SIS_SCTRL, 2); 399 delay(1000); 400 /* release reset (warm & cold) */ 401 autri_reg_clear_4(sc, AUTRI_SIS_SCTRL, 3); 402 delay(2000); 403 404 addr = AUTRI_SIS_SCTRL; 405 ready = AUTRI_SIS_SCTRL_CODEC_READY; 406 break; 407 case AUTRI_DEVICE_ID_ALI_M5451: 408 /* warm reset AC97 codec */ 409 autri_reg_set_4(sc, AUTRI_ALI_SCTRL, 1); 410 delay(100); 411 /* release reset (warm & cold) */ 412 autri_reg_clear_4(sc, AUTRI_ALI_SCTRL, 3); 413 delay(100); 414 415 addr = AUTRI_ALI_SCTRL; 416 ready = AUTRI_ALI_SCTRL_CODEC_READY; 417 break; 418 } 419 420 /* wait for 'Codec Ready' */ 421 while (count--) { 422 reg = TREAD4(sc, addr); 423 if (reg & ready) 424 break; 425 delay(1000); 426 } 427 428 if (count == 0) 429 printf("%s: Codec timeout. AC97 is not ready for operation.\n", 430 sc->sc_dev.dv_xname); 431 } 432 433 enum ac97_host_flags 434 autri_flags_codec(void *v) 435 { 436 struct autri_codec_softc *sc = v; 437 438 return (sc->flags); 439 } 440 441 /* 442 * 443 */ 444 const struct pci_matchid autri_devices[] = { 445 { PCI_VENDOR_TRIDENT, PCI_PRODUCT_TRIDENT_4DWAVE_NX }, 446 { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_7018 }, 447 { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M5451 } 448 }; 449 450 int 451 autri_match(struct device *parent, void *match, void *aux) 452 { 453 struct pci_attach_args *pa = aux; 454 455 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_TRIDENT && 456 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_TRIDENT_4DWAVE_DX) { 457 /* 458 * IBM makes a pcn network card and improperly 459 * sets the vendor and product ID's. Avoid matching. 460 */ 461 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_NETWORK) 462 return (0); 463 else 464 return (1); 465 } 466 467 return (pci_matchbyid((struct pci_attach_args *)aux, autri_devices, 468 nitems(autri_devices))); 469 } 470 471 void 472 autri_attach(struct device *parent, struct device *self, void *aux) 473 { 474 struct autri_softc *sc = (struct autri_softc *)self; 475 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 476 pci_chipset_tag_t pc = pa->pa_pc; 477 struct autri_codec_softc *codec; 478 bus_size_t iosize; 479 pci_intr_handle_t ih; 480 char const *intrstr; 481 mixer_ctrl_t ctl; 482 int i, r; 483 484 sc->sc_devid = pa->pa_id; 485 sc->sc_class = pa->pa_class; 486 sc->sc_revision = PCI_REVISION(pa->pa_class); 487 488 /* map register to memory */ 489 if (pci_mapreg_map(pa, AUTRI_PCI_MEMORY_BASE, 490 PCI_MAPREG_TYPE_MEM, 0, &sc->memt, &sc->memh, NULL, &iosize, 0)) { 491 printf("%s: can't map mem space\n", sc->sc_dev.dv_xname); 492 return; 493 } 494 495 /* map and establish the interrupt */ 496 if (pci_intr_map(pa, &ih)) { 497 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 498 bus_space_unmap(sc->memt, sc->memh, iosize); 499 return; 500 } 501 intrstr = pci_intr_string(pc, ih); 502 sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO | IPL_MPSAFE, 503 autri_intr, sc, sc->sc_dev.dv_xname); 504 if (sc->sc_ih == NULL) { 505 printf("%s: couldn't establish interrupt", 506 sc->sc_dev.dv_xname); 507 if (intrstr != NULL) 508 printf(" at %s", intrstr); 509 printf("\n"); 510 bus_space_unmap(sc->memt, sc->memh, iosize); 511 return; 512 } 513 printf(": %s\n", intrstr); 514 515 sc->sc_dmatag = pa->pa_dmat; 516 sc->sc_pc = pc; 517 sc->sc_pt = pa->pa_tag; 518 519 /* initialize the device */ 520 autri_init(sc); 521 522 /* attach AC97 codec */ 523 codec = &sc->sc_codec; 524 memcpy(&codec->sc_dev, &sc->sc_dev, sizeof(codec->sc_dev)); 525 codec->sc = sc; 526 527 codec->host_if.arg = codec; 528 codec->host_if.attach = autri_attach_codec; 529 codec->host_if.reset = autri_reset_codec; 530 codec->host_if.read = autri_read_codec; 531 codec->host_if.write = autri_write_codec; 532 codec->host_if.flags = autri_flags_codec; 533 codec->flags = AC97_HOST_DONT_READ | AC97_HOST_SWAPPED_CHANNELS; 534 if (sc->sc_dev.dv_cfdata->cf_flags & 0x0001) 535 codec->flags &= ~AC97_HOST_SWAPPED_CHANNELS; 536 537 if ((r = ac97_attach(&codec->host_if)) != 0) { 538 printf("%s: can't attach codec (error 0x%X)\n", 539 sc->sc_dev.dv_xname, r); 540 pci_intr_disestablish(pc, sc->sc_ih); 541 bus_space_unmap(sc->memt, sc->memh, iosize); 542 return; 543 } 544 545 /* disable mutes */ 546 for (i = 0; i < 4; i++) { 547 static struct { 548 char *class, *device; 549 } d[] = { 550 { AudioCoutputs, AudioNmaster}, 551 { AudioCinputs, AudioNdac}, 552 { AudioCinputs, AudioNcd}, 553 { AudioCrecord, AudioNvolume}, 554 }; 555 556 ctl.type = AUDIO_MIXER_ENUM; 557 ctl.un.ord = 0; 558 559 #if 0 560 ctl.dev = sc->sc_codec.codec_if->vtbl->get_portnum_by_name(sc->sc_codec.codec_if, 561 d[i].class, d[i].device, AudioNmute); 562 #endif 563 ctl.dev = autri_get_portnum_by_name(sc,d[i].class, 564 d[i].device, AudioNmute); 565 autri_mixer_set_port(sc, &ctl); 566 } 567 568 /* set a reasonable default volume */ 569 ctl.type = AUDIO_MIXER_VALUE; 570 ctl.un.value.num_channels = 2; 571 ctl.un.value.level[AUDIO_MIXER_LEVEL_LEFT] = 572 ctl.un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 127; 573 574 ctl.dev = autri_get_portnum_by_name(sc,AudioCoutputs,AudioNmaster,NULL); 575 autri_mixer_set_port(sc, &ctl); 576 577 audio_attach_mi(&autri_hw_if, sc, &sc->sc_dev); 578 579 #if NMIDI > 0 580 midi_attach_mi(&autri_midi_hw_if, sc, &sc->sc_dev); 581 #endif 582 } 583 584 int 585 autri_activate(struct device *self, int act) 586 { 587 struct autri_softc *sc = (struct autri_softc *)self; 588 589 if (act == DVACT_RESUME) { 590 autri_init(sc); 591 ac97_resume(&sc->sc_codec.host_if, sc->sc_codec.codec_if); 592 } 593 return (config_activate_children(self, act)); 594 } 595 596 int 597 autri_init(void *sc_) 598 { 599 struct autri_softc *sc = sc_; 600 pcireg_t reg; 601 602 pci_chipset_tag_t pc = sc->sc_pc; 603 pcitag_t pt = sc->sc_pt; 604 605 DPRINTF(("in autri_init()\n")); 606 DPRINTFN(5,("pci_conf_read(0x40) : 0x%X\n",pci_conf_read(pc,pt,0x40))); 607 DPRINTFN(5,("pci_conf_read(0x44) : 0x%X\n",pci_conf_read(pc,pt,0x44))); 608 609 switch (sc->sc_devid) { 610 case AUTRI_DEVICE_ID_4DWAVE_DX: 611 /* disable Legacy Control */ 612 pci_conf_write(pc, pt, AUTRI_PCI_DDMA_CFG,0); 613 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 614 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & 0xffff0000); 615 delay(100); 616 /* audio engine reset */ 617 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 618 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg | 0x00040000); 619 delay(100); 620 /* release reset */ 621 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 622 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & ~0x00040000); 623 delay(100); 624 /* DAC on */ 625 autri_reg_set_4(sc,AUTRI_DX_ACR2,0x02); 626 break; 627 case AUTRI_DEVICE_ID_4DWAVE_NX: 628 /* disable Legacy Control */ 629 pci_conf_write(pc, pt, AUTRI_PCI_DDMA_CFG,0); 630 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 631 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & 0xffff0000); 632 delay(100); 633 /* audio engine reset */ 634 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 635 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg | 0x00010000); 636 delay(100); 637 /* release reset */ 638 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 639 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & ~0x00010000); 640 delay(100); 641 /* DAC on */ 642 autri_reg_set_4(sc,AUTRI_NX_ACR0,0x02); 643 break; 644 case AUTRI_DEVICE_ID_SIS_7018: 645 /* disable Legacy Control */ 646 pci_conf_write(pc, pt, AUTRI_PCI_DDMA_CFG,0); 647 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 648 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & 0xffff0000); 649 delay(100); 650 /* reset Digital Controller */ 651 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 652 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg | 0x000c0000); 653 delay(100); 654 /* release reset */ 655 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 656 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & ~0x00040000); 657 delay(100); 658 /* disable AC97 GPIO interrupt */ 659 TWRITE1(sc, AUTRI_SIS_ACGPIO, 0); 660 /* enable 64 channel mode */ 661 autri_reg_set_4(sc, AUTRI_LFO_GC_CIR, BANK_B_EN); 662 break; 663 case AUTRI_DEVICE_ID_ALI_M5451: 664 /* disable Legacy Control */ 665 pci_conf_write(pc, pt, AUTRI_PCI_DDMA_CFG,0); 666 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 667 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & 0xffff0000); 668 delay(100); 669 /* reset Digital Controller */ 670 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 671 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg | 0x000c0000); 672 delay(100); 673 /* release reset */ 674 reg = pci_conf_read(pc, pt, AUTRI_PCI_LEGACY_IOBASE); 675 pci_conf_write(pc, pt, AUTRI_PCI_LEGACY_IOBASE, reg & ~0x00040000); 676 delay(100); 677 /* enable PCM input */ 678 autri_reg_set_4(sc, AUTRI_ALI_GCONTROL, AUTRI_ALI_GCONTROL_PCM_IN); 679 break; 680 } 681 682 if (sc->sc_devid == AUTRI_DEVICE_ID_ALI_M5451) { 683 sc->sc_play.ch = 0; 684 sc->sc_play.ch_intr = 1; 685 sc->sc_rec.ch = 2; 686 sc->sc_rec.ch_intr = 3; 687 } else { 688 sc->sc_play.ch = 0x20; 689 sc->sc_play.ch_intr = 0x21; 690 sc->sc_rec.ch = 0x22; 691 sc->sc_rec.ch_intr = 0x23; 692 } 693 694 /* clear channel status */ 695 TWRITE4(sc, AUTRI_STOP_A, 0xffffffff); 696 TWRITE4(sc, AUTRI_STOP_B, 0xffffffff); 697 698 /* disable channel interrupt */ 699 TWRITE4(sc, AUTRI_AINTEN_A, 0); 700 TWRITE4(sc, AUTRI_AINTEN_B, 0); 701 702 #if 0 703 /* TLB */ 704 if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) { 705 TWRITE4(sc,AUTRI_NX_TLBC,0); 706 } 707 #endif 708 709 autri_enable_loop_interrupt(sc); 710 711 DPRINTF(("out autri_init()\n")); 712 return 0; 713 } 714 715 void 716 autri_enable_loop_interrupt(void *sc_) 717 { 718 struct autri_softc *sc = sc_; 719 u_int32_t reg; 720 721 /*reg = (ENDLP_IE | MIDLP_IE);*/ 722 reg = ENDLP_IE; 723 #if 0 724 if (sc->sc_devid == AUTRI_DEVICE_ID_SIS_7018) 725 reg |= BANK_B_EN; 726 #endif 727 autri_reg_set_4(sc,AUTRI_LFO_GC_CIR,reg); 728 } 729 730 #if 0 731 void 732 autri_disable_loop_interrupt(void *sc_) 733 { 734 struct autri_softc *sc = sc_; 735 u_int32_t reg; 736 737 reg = (ENDLP_IE | MIDLP_IE); 738 autri_reg_clear_4(sc,AUTRI_LFO_GC_CIR,reg); 739 } 740 #endif 741 742 int 743 autri_intr(void *p) 744 { 745 struct autri_softc *sc = p; 746 u_int32_t intsrc; 747 u_int32_t mask, active[2]; 748 int ch, endch; 749 /* 750 u_int32_t reg; 751 u_int32_t cso,eso; 752 */ 753 754 mtx_enter(&audio_lock); 755 intsrc = TREAD4(sc,AUTRI_MISCINT); 756 if ((intsrc & (ADDRESS_IRQ|MPU401_IRQ)) == 0) { 757 mtx_leave(&audio_lock); 758 return 0; 759 } 760 761 if (intsrc & ADDRESS_IRQ) { 762 763 active[0] = TREAD4(sc,AUTRI_AIN_A); 764 active[1] = TREAD4(sc,AUTRI_AIN_B); 765 766 if (sc->sc_devid == AUTRI_DEVICE_ID_ALI_M5451) { 767 endch = 32; 768 } else { 769 endch = 64; 770 } 771 772 for (ch=0; ch<endch; ch++) { 773 mask = 1 << (ch & 0x1f); 774 if (active[(ch & 0x20) ? 1 : 0] & mask) { 775 776 /* clear interrupt */ 777 TWRITE4(sc, (ch & 0x20) ? AUTRI_AIN_B : AUTRI_AIN_A, mask); 778 /* disable interrupt */ 779 autri_reg_clear_4(sc,(ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A, mask); 780 #if 0 781 reg = TREAD4(sc,AUTRI_LFO_GC_CIR) & ~0x0000003f; 782 TWRITE4(sc,AUTRI_LFO_GC_CIR, reg | ch); 783 784 if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) { 785 cso = TREAD4(sc, 0xe0) & 0x00ffffff; 786 eso = TREAD4(sc, 0xe8) & 0x00ffffff; 787 } else { 788 cso = (TREAD4(sc, 0xe0) >> 16) & 0x0000ffff; 789 eso = (TREAD4(sc, 0xe8) >> 16) & 0x0000ffff; 790 } 791 /*printf("cso=%d, eso=%d\n",cso,eso);*/ 792 #endif 793 if (ch == sc->sc_play.ch_intr) { 794 if (sc->sc_play.intr) 795 sc->sc_play.intr(sc->sc_play.intr_arg); 796 } 797 798 if (ch == sc->sc_rec.ch_intr) { 799 if (sc->sc_rec.intr) 800 sc->sc_rec.intr(sc->sc_rec.intr_arg); 801 } 802 803 /* enable interrupt */ 804 autri_reg_set_4(sc, (ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A, mask); 805 } 806 } 807 } 808 809 if (intsrc & MPU401_IRQ) { 810 /* XXX */ 811 } 812 813 autri_reg_set_4(sc,AUTRI_MISCINT, 814 ST_TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW); 815 mtx_leave(&audio_lock); 816 return 1; 817 } 818 819 /* 820 * 821 */ 822 823 int 824 autri_allocmem(struct autri_softc *sc, size_t size, size_t align, 825 struct autri_dma *p) 826 { 827 int error; 828 829 p->size = size; 830 error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0, 831 p->segs, nitems(p->segs), &p->nsegs, BUS_DMA_NOWAIT); 832 if (error) 833 return (error); 834 835 error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size, 836 &p->addr, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 837 if (error) 838 goto free; 839 840 error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size, 841 0, BUS_DMA_NOWAIT, &p->map); 842 if (error) 843 goto unmap; 844 845 error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL, 846 BUS_DMA_NOWAIT); 847 if (error) 848 goto destroy; 849 return (0); 850 851 destroy: 852 bus_dmamap_destroy(sc->sc_dmatag, p->map); 853 unmap: 854 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size); 855 free: 856 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs); 857 return (error); 858 } 859 860 int 861 autri_freemem(struct autri_softc *sc, struct autri_dma *p) 862 { 863 bus_dmamap_unload(sc->sc_dmatag, p->map); 864 bus_dmamap_destroy(sc->sc_dmatag, p->map); 865 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size); 866 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs); 867 return 0; 868 } 869 870 int 871 autri_open(void *addr, int flags) 872 { 873 DPRINTF(("autri_open()\n")); 874 DPRINTFN(5,("MISCINT : 0x%08X\n", 875 TREAD4((struct autri_softc *)addr, AUTRI_MISCINT))); 876 DPRINTFN(5,("LFO_GC_CIR : 0x%08X\n", 877 TREAD4((struct autri_softc *)addr, AUTRI_LFO_GC_CIR))); 878 return 0; 879 } 880 881 void 882 autri_close(void *addr) 883 { 884 DPRINTF(("autri_close()\n")); 885 } 886 887 int 888 autri_set_params(void *addr, int setmode, int usemode, struct audio_params *play, 889 struct audio_params *rec) 890 { 891 struct audio_params *p; 892 int mode; 893 894 for (mode = AUMODE_RECORD; mode != -1; 895 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 896 if ((setmode & mode) == 0) 897 continue; 898 p = mode == AUMODE_PLAY ? play : rec; 899 p->sample_rate = 48000; 900 if (p->precision != 8) 901 p->precision = 16; 902 if (p->channels != 1) 903 p->channels = 2; 904 p->encoding = p->precision == 16 ? 905 AUDIO_ENCODING_SLINEAR_LE : AUDIO_ENCODING_ULINEAR_LE; 906 p->bps = AUDIO_BPS(p->precision); 907 p->msb = 1; 908 } 909 910 return 0; 911 } 912 913 int 914 autri_round_blocksize(void *addr, int block) 915 { 916 return ((block + 3) & -4); 917 } 918 919 int 920 autri_halt_output(void *addr) 921 { 922 struct autri_softc *sc = addr; 923 924 DPRINTF(("autri_halt_output()\n")); 925 mtx_enter(&audio_lock); 926 sc->sc_play.intr = NULL; 927 autri_stopch(sc, sc->sc_play.ch, sc->sc_play.ch_intr); 928 autri_disable_interrupt(sc, sc->sc_play.ch_intr); 929 mtx_leave(&audio_lock); 930 return 0; 931 } 932 933 int 934 autri_halt_input(void *addr) 935 { 936 struct autri_softc *sc = addr; 937 938 DPRINTF(("autri_halt_input()\n")); 939 mtx_enter(&audio_lock); 940 sc->sc_rec.intr = NULL; 941 autri_stopch(sc, sc->sc_rec.ch, sc->sc_rec.ch_intr); 942 autri_disable_interrupt(sc, sc->sc_rec.ch_intr); 943 mtx_leave(&audio_lock); 944 return 0; 945 } 946 947 int 948 autri_mixer_set_port(void *addr, mixer_ctrl_t *cp) 949 { 950 struct autri_softc *sc = addr; 951 952 return (sc->sc_codec.codec_if->vtbl->mixer_set_port( 953 sc->sc_codec.codec_if, cp)); 954 } 955 956 int 957 autri_mixer_get_port(void *addr, mixer_ctrl_t *cp) 958 { 959 struct autri_softc *sc = addr; 960 961 return (sc->sc_codec.codec_if->vtbl->mixer_get_port( 962 sc->sc_codec.codec_if, cp)); 963 } 964 965 int 966 autri_query_devinfo(void *addr, mixer_devinfo_t *dip) 967 { 968 struct autri_softc *sc = addr; 969 970 return (sc->sc_codec.codec_if->vtbl->query_devinfo( 971 sc->sc_codec.codec_if, dip)); 972 } 973 974 int 975 autri_get_portnum_by_name(struct autri_softc *sc, char *class, char *device, 976 char *qualifier) 977 { 978 return (sc->sc_codec.codec_if->vtbl->get_portnum_by_name( 979 sc->sc_codec.codec_if, class, device, qualifier)); 980 } 981 982 void * 983 autri_malloc(void *addr, int direction, size_t size, int pool, int flags) 984 { 985 struct autri_softc *sc = addr; 986 struct autri_dma *p; 987 int error; 988 989 p = malloc(sizeof(*p), pool, flags); 990 if (!p) 991 return NULL; 992 993 #if 0 994 error = autri_allocmem(sc, size, 16, p); 995 #endif 996 error = autri_allocmem(sc, size, 0x10000, p); 997 if (error) { 998 free(p, pool, sizeof(*p)); 999 return NULL; 1000 } 1001 1002 p->next = sc->sc_dmas; 1003 sc->sc_dmas = p; 1004 return KERNADDR(p); 1005 } 1006 1007 void 1008 autri_free(void *addr, void *ptr, int pool) 1009 { 1010 struct autri_softc *sc = addr; 1011 struct autri_dma **pp, *p; 1012 1013 for (pp = &sc->sc_dmas; (p = *pp) != NULL; pp = &p->next) { 1014 if (KERNADDR(p) == ptr) { 1015 autri_freemem(sc, p); 1016 *pp = p->next; 1017 free(p, pool, sizeof(*p)); 1018 return; 1019 } 1020 } 1021 } 1022 1023 struct autri_dma * 1024 autri_find_dma(struct autri_softc *sc, void *addr) 1025 { 1026 struct autri_dma *p; 1027 1028 for (p = sc->sc_dmas; p && KERNADDR(p) != addr; p = p->next) 1029 ; 1030 1031 return p; 1032 } 1033 1034 int 1035 autri_get_props(void *addr) 1036 { 1037 return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | 1038 AUDIO_PROP_FULLDUPLEX); 1039 } 1040 1041 void 1042 autri_setup_channel(struct autri_softc *sc, int mode, struct audio_params *param) 1043 { 1044 int i, ch, channel; 1045 u_int32_t reg, cr[5]; 1046 u_int32_t cso, eso; 1047 u_int32_t delta, dch[2], ctrl; 1048 u_int32_t alpha_fms, fm_vol, attribute; 1049 1050 u_int32_t dmaaddr, dmalen; 1051 int factor, rvol, cvol; 1052 struct autri_chstatus *chst; 1053 1054 ctrl = AUTRI_CTRL_LOOPMODE; 1055 switch (param->encoding) { 1056 case AUDIO_ENCODING_SLINEAR_BE: 1057 case AUDIO_ENCODING_SLINEAR_LE: 1058 ctrl |= AUTRI_CTRL_SIGNED; 1059 break; 1060 } 1061 1062 factor = 0; 1063 if (param->precision == 16) { 1064 ctrl |= AUTRI_CTRL_16BIT; 1065 factor++; 1066 } 1067 1068 if (param->channels == 2) { 1069 ctrl |= AUTRI_CTRL_STEREO; 1070 factor++; 1071 } 1072 1073 delta = (u_int32_t)param->sample_rate; 1074 if (delta < 4000) 1075 delta = 4000; 1076 if (delta > 48000) 1077 delta = 48000; 1078 1079 attribute = 0; 1080 1081 dch[1] = ((delta << 12) / 48000) & 0x0000ffff; 1082 if (mode == AUMODE_PLAY) { 1083 chst = &sc->sc_play; 1084 dch[0] = ((delta << 12) / 48000) & 0x0000ffff; 1085 ctrl |= AUTRI_CTRL_WAVEVOL; 1086 /* 1087 if (sc->sc_devid == AUTRI_DEVICE_ID_ALI_M5451) 1088 ctrl |= 0x80000000; 1089 */ 1090 } else { 1091 chst = &sc->sc_rec; 1092 dch[0] = ((48000 << 12) / delta) & 0x0000ffff; 1093 if (sc->sc_devid == AUTRI_DEVICE_ID_SIS_7018) { 1094 ctrl |= AUTRI_CTRL_MUTE_SIS; 1095 attribute = AUTRI_ATTR_PCMREC_SIS; 1096 if (delta != 48000) 1097 attribute |= AUTRI_ATTR_ENASRC_SIS; 1098 } 1099 ctrl |= AUTRI_CTRL_MUTE; 1100 } 1101 1102 dmaaddr = DMAADDR(chst->dma); 1103 cso = alpha_fms = 0; 1104 rvol = cvol = 0x7f; 1105 fm_vol = 0x0 | ((rvol & 0x7f) << 7) | (cvol & 0x7f); 1106 1107 for (ch=0; ch<2; ch++) { 1108 1109 if (ch == 0) 1110 dmalen = (chst->length >> factor); 1111 else { 1112 /* channel for interrupt */ 1113 dmalen = (chst->blksize >> factor); 1114 if (sc->sc_devid == AUTRI_DEVICE_ID_SIS_7018) 1115 ctrl |= AUTRI_CTRL_MUTE_SIS; 1116 else 1117 ctrl |= AUTRI_CTRL_MUTE; 1118 attribute = 0; 1119 } 1120 1121 eso = dmalen - 1; 1122 1123 switch (sc->sc_devid) { 1124 case AUTRI_DEVICE_ID_4DWAVE_DX: 1125 cr[0] = (cso << 16) | (alpha_fms & 0x0000ffff); 1126 cr[1] = dmaaddr; 1127 cr[2] = (eso << 16) | (dch[ch] & 0x0000ffff); 1128 cr[3] = fm_vol; 1129 cr[4] = ctrl; 1130 break; 1131 case AUTRI_DEVICE_ID_4DWAVE_NX: 1132 cr[0] = (dch[ch] << 24) | (cso & 0x00ffffff); 1133 cr[1] = dmaaddr; 1134 cr[2] = ((dch[ch] << 16) & 0xff000000) | (eso & 0x00ffffff); 1135 cr[3] = (alpha_fms << 16) | (fm_vol & 0x0000ffff); 1136 cr[4] = ctrl; 1137 break; 1138 case AUTRI_DEVICE_ID_SIS_7018: 1139 cr[0] = (cso << 16) | (alpha_fms & 0x0000ffff); 1140 cr[1] = dmaaddr; 1141 cr[2] = (eso << 16) | (dch[ch] & 0x0000ffff); 1142 cr[3] = attribute; 1143 cr[4] = ctrl; 1144 break; 1145 case AUTRI_DEVICE_ID_ALI_M5451: 1146 cr[0] = (cso << 16) | (alpha_fms & 0x0000ffff); 1147 cr[1] = dmaaddr; 1148 cr[2] = (eso << 16) | (dch[ch] & 0x0000ffff); 1149 cr[3] = 0; 1150 cr[4] = ctrl; 1151 break; 1152 } 1153 1154 /* write channel data */ 1155 channel = (ch == 0) ? chst->ch : chst->ch_intr; 1156 1157 reg = TREAD4(sc,AUTRI_LFO_GC_CIR) & ~0x0000003f; 1158 TWRITE4(sc,AUTRI_LFO_GC_CIR, reg | channel); 1159 1160 for (i=0; i<5; i++) { 1161 TWRITE4(sc, AUTRI_ARAM_CR + i*sizeof(cr[0]), cr[i]); 1162 DPRINTFN(5,("cr[%d] : 0x%08X\n", i, cr[i])); 1163 } 1164 1165 /* Bank A only */ 1166 if (channel < 0x20) { 1167 TWRITE4(sc, AUTRI_EBUF1, AUTRI_EMOD_STILL); 1168 TWRITE4(sc, AUTRI_EBUF2, AUTRI_EMOD_STILL); 1169 } 1170 } 1171 1172 } 1173 1174 int 1175 autri_trigger_output(void *addr, void *start, void *end, int blksize, 1176 void (*intr)(void *), void *arg, struct audio_params *param) 1177 { 1178 struct autri_softc *sc = addr; 1179 struct autri_dma *p; 1180 1181 DPRINTFN(5,("autri_trigger_output: sc=%p start=%p end=%p " 1182 "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg)); 1183 1184 sc->sc_play.intr = intr; 1185 sc->sc_play.intr_arg = arg; 1186 sc->sc_play.offset = 0; 1187 sc->sc_play.blksize = blksize; 1188 sc->sc_play.length = (char *)end - (char *)start; 1189 1190 p = autri_find_dma(sc, start); 1191 if (!p) { 1192 printf("autri_trigger_output: bad addr %p\n", start); 1193 return (EINVAL); 1194 } 1195 1196 sc->sc_play.dma = p; 1197 1198 /* */ 1199 mtx_enter(&audio_lock); 1200 autri_setup_channel(sc, AUMODE_PLAY, param); 1201 1202 /* volume set to no attenuation */ 1203 TWRITE4(sc, AUTRI_MUSICVOL_WAVEVOL, 0); 1204 1205 /* enable interrupt */ 1206 autri_enable_interrupt(sc, sc->sc_play.ch_intr); 1207 1208 /* start channel */ 1209 autri_startch(sc, sc->sc_play.ch, sc->sc_play.ch_intr); 1210 mtx_leave(&audio_lock); 1211 return 0; 1212 } 1213 1214 int 1215 autri_trigger_input(void *addr, void *start, void *end, int blksize, void (*intr)(void *), void *arg, struct audio_params *param) 1216 { 1217 struct autri_softc *sc = addr; 1218 struct autri_dma *p; 1219 1220 DPRINTFN(5,("autri_trigger_input: sc=%p start=%p end=%p " 1221 "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg)); 1222 1223 sc->sc_rec.intr = intr; 1224 sc->sc_rec.intr_arg = arg; 1225 sc->sc_rec.offset = 0; 1226 sc->sc_rec.blksize = blksize; 1227 sc->sc_rec.length = (char *)end - (char *)start; 1228 1229 /* */ 1230 p = autri_find_dma(sc, start); 1231 if (!p) { 1232 printf("autri_trigger_input: bad addr %p\n", start); 1233 return (EINVAL); 1234 } 1235 1236 sc->sc_rec.dma = p; 1237 mtx_enter(&audio_lock); 1238 1239 /* */ 1240 if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) { 1241 autri_reg_set_4(sc, AUTRI_NX_ACR0, AUTRI_NX_ACR0_PSB_CAPTURE); 1242 TWRITE1(sc, AUTRI_NX_RCI3, AUTRI_NX_RCI3_ENABLE | sc->sc_rec.ch); 1243 } 1244 1245 #if 0 1246 /* 4DWAVE only allows capturing at a 48KHz rate */ 1247 if (sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_DX || 1248 sc->sc_devid == AUTRI_DEVICE_ID_4DWAVE_NX) 1249 param->sample_rate = 48000; 1250 #endif 1251 1252 autri_setup_channel(sc, AUMODE_RECORD, param); 1253 1254 /* enable interrupt */ 1255 autri_enable_interrupt(sc, sc->sc_rec.ch_intr); 1256 1257 /* start channel */ 1258 autri_startch(sc, sc->sc_rec.ch, sc->sc_rec.ch_intr); 1259 mtx_leave(&audio_lock); 1260 return 0; 1261 } 1262 1263 #if 0 1264 int 1265 autri_halt(struct autri_softc *sc) 1266 { 1267 DPRINTF(("autri_halt().\n")); 1268 /*autri_stopch(sc);*/ 1269 autri_disable_interrupt(sc, sc->sc_play.channel); 1270 autri_disable_interrupt(sc, sc->sc_rec.channel); 1271 return 0; 1272 } 1273 #endif 1274 1275 void 1276 autri_enable_interrupt(struct autri_softc *sc, int ch) 1277 { 1278 int reg; 1279 1280 reg = (ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A; 1281 ch &= 0x1f; 1282 1283 autri_reg_set_4(sc, reg, 1 << ch); 1284 } 1285 1286 void 1287 autri_disable_interrupt(struct autri_softc *sc, int ch) 1288 { 1289 int reg; 1290 1291 reg = (ch & 0x20) ? AUTRI_AINTEN_B : AUTRI_AINTEN_A; 1292 ch &= 0x1f; 1293 1294 autri_reg_clear_4(sc, reg, 1 << ch); 1295 } 1296 1297 void 1298 autri_startch(struct autri_softc *sc, int ch, int ch_intr) 1299 { 1300 int reg; 1301 u_int32_t chmask; 1302 1303 reg = (ch & 0x20) ? AUTRI_START_B : AUTRI_START_A; 1304 ch &= 0x1f; 1305 chmask = (1 << ch) | (1 << ch_intr); 1306 1307 autri_reg_set_4(sc, reg, chmask); 1308 } 1309 1310 void 1311 autri_stopch(struct autri_softc *sc, int ch, int ch_intr) 1312 { 1313 int reg; 1314 u_int32_t chmask; 1315 1316 reg = (ch & 0x20) ? AUTRI_STOP_B : AUTRI_STOP_A; 1317 ch &= 0x1f; 1318 chmask = (1 << ch) | (1 << ch_intr); 1319 1320 autri_reg_set_4(sc, reg, chmask); 1321 } 1322 1323 #if NMIDI > 0 1324 int 1325 autri_midi_open(void *addr, int flags, void (*iintr)(void *, int), 1326 void (*ointr)(void *), void *arg) 1327 { 1328 struct autri_softc *sc = addr; 1329 1330 DPRINTF(("autri_midi_open()\n")); 1331 1332 DPRINTFN(5,("MPUR1 : 0x%02X\n",TREAD1(sc,AUTRI_MPUR1))); 1333 DPRINTFN(5,("MPUR2 : 0x%02X\n",TREAD1(sc,AUTRI_MPUR2))); 1334 1335 sc->sc_iintr = iintr; 1336 sc->sc_ointr = ointr; 1337 sc->sc_arg = arg; 1338 1339 if (flags & FREAD) 1340 autri_reg_clear_1(sc, AUTRI_MPUR2, AUTRI_MIDIIN_ENABLE_INTR); 1341 1342 if (flags & FWRITE) 1343 autri_reg_set_1(sc, AUTRI_MPUR2, AUTRI_MIDIOUT_CONNECT); 1344 1345 return (0); 1346 } 1347 1348 void 1349 autri_midi_close(void *addr) 1350 { 1351 struct autri_softc *sc = addr; 1352 1353 DPRINTF(("autri_midi_close()\n")); 1354 1355 /* give uart a chance to drain */ 1356 tsleep_nsec(sc, PWAIT, "autri", MSEC_TO_NSEC(100)); 1357 1358 sc->sc_iintr = NULL; 1359 sc->sc_ointr = NULL; 1360 } 1361 1362 int 1363 autri_midi_output(void *addr, int d) 1364 { 1365 struct autri_softc *sc = addr; 1366 1367 if ((TREAD1(sc, AUTRI_MPUR1) & AUTRI_MIDIOUT_READY) != 0) { 1368 TWRITE1(sc, AUTRI_MPUR0, d); 1369 return 0; 1370 } 1371 return 1; 1372 } 1373 1374 void 1375 autri_midi_getinfo(void *addr, struct midi_info *mi) 1376 { 1377 mi->name = "4DWAVE MIDI UART"; 1378 mi->props = MIDI_PROP_CAN_INPUT; 1379 } 1380 1381 #endif 1382