1*f005ef32Sjsg /*
2*f005ef32Sjsg * Copyright 2022 Advanced Micro Devices, Inc.
3*f005ef32Sjsg *
4*f005ef32Sjsg * Permission is hereby granted, free of charge, to any person obtaining a
5*f005ef32Sjsg * copy of this software and associated documentation files (the "Software"),
6*f005ef32Sjsg * to deal in the Software without restriction, including without limitation
7*f005ef32Sjsg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8*f005ef32Sjsg * and/or sell copies of the Software, and to permit persons to whom the
9*f005ef32Sjsg * Software is furnished to do so, subject to the following conditions:
10*f005ef32Sjsg *
11*f005ef32Sjsg * The above copyright notice and this permission notice shall be included in
12*f005ef32Sjsg * all copies or substantial portions of the Software.
13*f005ef32Sjsg *
14*f005ef32Sjsg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*f005ef32Sjsg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*f005ef32Sjsg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17*f005ef32Sjsg * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18*f005ef32Sjsg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19*f005ef32Sjsg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20*f005ef32Sjsg * OTHER DEALINGS IN THE SOFTWARE.
21*f005ef32Sjsg *
22*f005ef32Sjsg */
23*f005ef32Sjsg #include "amdgpu.h"
24*f005ef32Sjsg #include "smuio_v13_0_3.h"
25*f005ef32Sjsg #include "soc15_common.h"
26*f005ef32Sjsg #include "smuio/smuio_13_0_3_offset.h"
27*f005ef32Sjsg #include "smuio/smuio_13_0_3_sh_mask.h"
28*f005ef32Sjsg
29*f005ef32Sjsg #define PKG_TYPE_MASK 0x00000003L
30*f005ef32Sjsg
31*f005ef32Sjsg /**
32*f005ef32Sjsg * smuio_v13_0_3_get_die_id - query die id from FCH.
33*f005ef32Sjsg *
34*f005ef32Sjsg * @adev: amdgpu device pointer
35*f005ef32Sjsg *
36*f005ef32Sjsg * Returns die id
37*f005ef32Sjsg */
smuio_v13_0_3_get_die_id(struct amdgpu_device * adev)38*f005ef32Sjsg static u32 smuio_v13_0_3_get_die_id(struct amdgpu_device *adev)
39*f005ef32Sjsg {
40*f005ef32Sjsg u32 data, die_id;
41*f005ef32Sjsg
42*f005ef32Sjsg data = RREG32_SOC15(SMUIO, 0, regSMUIO_MCM_CONFIG);
43*f005ef32Sjsg die_id = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, DIE_ID);
44*f005ef32Sjsg
45*f005ef32Sjsg return die_id;
46*f005ef32Sjsg }
47*f005ef32Sjsg
48*f005ef32Sjsg /**
49*f005ef32Sjsg * smuio_v13_0_3_get_socket_id - query socket id from FCH
50*f005ef32Sjsg *
51*f005ef32Sjsg * @adev: amdgpu device pointer
52*f005ef32Sjsg *
53*f005ef32Sjsg * Returns socket id
54*f005ef32Sjsg */
smuio_v13_0_3_get_socket_id(struct amdgpu_device * adev)55*f005ef32Sjsg static u32 smuio_v13_0_3_get_socket_id(struct amdgpu_device *adev)
56*f005ef32Sjsg {
57*f005ef32Sjsg u32 data, socket_id;
58*f005ef32Sjsg
59*f005ef32Sjsg data = RREG32_SOC15(SMUIO, 0, regSMUIO_MCM_CONFIG);
60*f005ef32Sjsg socket_id = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, SOCKET_ID);
61*f005ef32Sjsg
62*f005ef32Sjsg return socket_id;
63*f005ef32Sjsg }
64*f005ef32Sjsg
65*f005ef32Sjsg /**
66*f005ef32Sjsg * smuio_v13_0_3_get_pkg_type - query package type set by MP1/bootcode
67*f005ef32Sjsg *
68*f005ef32Sjsg * @adev: amdgpu device pointer
69*f005ef32Sjsg *
70*f005ef32Sjsg * Returns package type
71*f005ef32Sjsg */
72*f005ef32Sjsg
smuio_v13_0_3_get_pkg_type(struct amdgpu_device * adev)73*f005ef32Sjsg static enum amdgpu_pkg_type smuio_v13_0_3_get_pkg_type(struct amdgpu_device *adev)
74*f005ef32Sjsg {
75*f005ef32Sjsg enum amdgpu_pkg_type pkg_type;
76*f005ef32Sjsg u32 data;
77*f005ef32Sjsg
78*f005ef32Sjsg data = RREG32_SOC15(SMUIO, 0, regSMUIO_MCM_CONFIG);
79*f005ef32Sjsg data = REG_GET_FIELD(data, SMUIO_MCM_CONFIG, PKG_TYPE);
80*f005ef32Sjsg /* pkg_type[4:0]
81*f005ef32Sjsg *
82*f005ef32Sjsg * bit 1 == 1 APU form factor
83*f005ef32Sjsg *
84*f005ef32Sjsg * b0100 - b1111 - Reserved
85*f005ef32Sjsg */
86*f005ef32Sjsg switch (data & PKG_TYPE_MASK) {
87*f005ef32Sjsg case 0x2:
88*f005ef32Sjsg pkg_type = AMDGPU_PKG_TYPE_APU;
89*f005ef32Sjsg break;
90*f005ef32Sjsg default:
91*f005ef32Sjsg pkg_type = AMDGPU_PKG_TYPE_UNKNOWN;
92*f005ef32Sjsg break;
93*f005ef32Sjsg }
94*f005ef32Sjsg
95*f005ef32Sjsg return pkg_type;
96*f005ef32Sjsg }
97*f005ef32Sjsg
98*f005ef32Sjsg
99*f005ef32Sjsg const struct amdgpu_smuio_funcs smuio_v13_0_3_funcs = {
100*f005ef32Sjsg .get_die_id = smuio_v13_0_3_get_die_id,
101*f005ef32Sjsg .get_socket_id = smuio_v13_0_3_get_socket_id,
102*f005ef32Sjsg .get_pkg_type = smuio_v13_0_3_get_pkg_type,
103*f005ef32Sjsg };
104