1fb4d8502Sjsg /*
2fb4d8502Sjsg * Copyright 2012-15 Advanced Micro Devices, Inc.
3fb4d8502Sjsg *
4fb4d8502Sjsg * Permission is hereby granted, free of charge, to any person obtaining a
5fb4d8502Sjsg * copy of this software and associated documentation files (the "Software"),
6fb4d8502Sjsg * to deal in the Software without restriction, including without limitation
7fb4d8502Sjsg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8fb4d8502Sjsg * and/or sell copies of the Software, and to permit persons to whom the
9fb4d8502Sjsg * Software is furnished to do so, subject to the following conditions:
10fb4d8502Sjsg *
11fb4d8502Sjsg * The above copyright notice and this permission notice shall be included in
12fb4d8502Sjsg * all copies or substantial portions of the Software.
13fb4d8502Sjsg *
14fb4d8502Sjsg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15fb4d8502Sjsg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16fb4d8502Sjsg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17fb4d8502Sjsg * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18fb4d8502Sjsg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19fb4d8502Sjsg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20fb4d8502Sjsg * OTHER DEALINGS IN THE SOFTWARE.
21fb4d8502Sjsg *
22fb4d8502Sjsg * Authors: AMD
23fb4d8502Sjsg *
24fb4d8502Sjsg */
25fb4d8502Sjsg
26fb4d8502Sjsg #include "dm_services.h"
27c349dbc7Sjsg #include "basics/dc_common.h"
28fb4d8502Sjsg #include "dc.h"
29fb4d8502Sjsg #include "core_types.h"
30fb4d8502Sjsg #include "resource.h"
31fb4d8502Sjsg #include "ipp.h"
32fb4d8502Sjsg #include "timing_generator.h"
331bb76ff1Sjsg #include "dc_dmub_srv.h"
34fb4d8502Sjsg
35fb4d8502Sjsg #define DC_LOGGER dc->ctx->logger
36fb4d8502Sjsg
37fb4d8502Sjsg /*******************************************************************************
38fb4d8502Sjsg * Private functions
39fb4d8502Sjsg ******************************************************************************/
update_stream_signal(struct dc_stream_state * stream,struct dc_sink * sink)40c349dbc7Sjsg void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink)
41fb4d8502Sjsg {
42c349dbc7Sjsg if (sink->sink_signal == SIGNAL_TYPE_NONE)
43c349dbc7Sjsg stream->signal = stream->link->connector_signal;
44fb4d8502Sjsg else
45c349dbc7Sjsg stream->signal = sink->sink_signal;
46fb4d8502Sjsg
47fb4d8502Sjsg if (dc_is_dvi_signal(stream->signal)) {
48fb4d8502Sjsg if (stream->ctx->dc->caps.dual_link_dvi &&
49c349dbc7Sjsg (stream->timing.pix_clk_100hz / 10) > TMDS_MAX_PIXEL_CLOCK &&
50c349dbc7Sjsg sink->sink_signal != SIGNAL_TYPE_DVI_SINGLE_LINK)
51fb4d8502Sjsg stream->signal = SIGNAL_TYPE_DVI_DUAL_LINK;
52fb4d8502Sjsg else
53fb4d8502Sjsg stream->signal = SIGNAL_TYPE_DVI_SINGLE_LINK;
54fb4d8502Sjsg }
55fb4d8502Sjsg }
56fb4d8502Sjsg
dc_stream_construct(struct dc_stream_state * stream,struct dc_sink * dc_sink_data)57332c92d0Sjsg static bool dc_stream_construct(struct dc_stream_state *stream,
58fb4d8502Sjsg struct dc_sink *dc_sink_data)
59fb4d8502Sjsg {
60fb4d8502Sjsg uint32_t i = 0;
61fb4d8502Sjsg
62fb4d8502Sjsg stream->sink = dc_sink_data;
63fb4d8502Sjsg dc_sink_retain(dc_sink_data);
64fb4d8502Sjsg
65c349dbc7Sjsg stream->ctx = dc_sink_data->ctx;
66c349dbc7Sjsg stream->link = dc_sink_data->link;
67c349dbc7Sjsg stream->sink_patches = dc_sink_data->edid_caps.panel_patch;
68c349dbc7Sjsg stream->converter_disable_audio = dc_sink_data->converter_disable_audio;
69c349dbc7Sjsg stream->qs_bit = dc_sink_data->edid_caps.qs_bit;
70c349dbc7Sjsg stream->qy_bit = dc_sink_data->edid_caps.qy_bit;
71c349dbc7Sjsg
72fb4d8502Sjsg /* Copy audio modes */
73fb4d8502Sjsg /* TODO - Remove this translation */
74*f005ef32Sjsg for (i = 0; i < (dc_sink_data->edid_caps.audio_mode_count); i++) {
75fb4d8502Sjsg stream->audio_info.modes[i].channel_count = dc_sink_data->edid_caps.audio_modes[i].channel_count;
76fb4d8502Sjsg stream->audio_info.modes[i].format_code = dc_sink_data->edid_caps.audio_modes[i].format_code;
77fb4d8502Sjsg stream->audio_info.modes[i].sample_rates.all = dc_sink_data->edid_caps.audio_modes[i].sample_rate;
78fb4d8502Sjsg stream->audio_info.modes[i].sample_size = dc_sink_data->edid_caps.audio_modes[i].sample_size;
79fb4d8502Sjsg }
80fb4d8502Sjsg stream->audio_info.mode_count = dc_sink_data->edid_caps.audio_mode_count;
81fb4d8502Sjsg stream->audio_info.audio_latency = dc_sink_data->edid_caps.audio_latency;
82fb4d8502Sjsg stream->audio_info.video_latency = dc_sink_data->edid_caps.video_latency;
83fb4d8502Sjsg memmove(
84fb4d8502Sjsg stream->audio_info.display_name,
85fb4d8502Sjsg dc_sink_data->edid_caps.display_name,
86fb4d8502Sjsg AUDIO_INFO_DISPLAY_NAME_SIZE_IN_CHARS);
87fb4d8502Sjsg stream->audio_info.manufacture_id = dc_sink_data->edid_caps.manufacturer_id;
88fb4d8502Sjsg stream->audio_info.product_id = dc_sink_data->edid_caps.product_id;
89fb4d8502Sjsg stream->audio_info.flags.all = dc_sink_data->edid_caps.speaker_flags;
90fb4d8502Sjsg
91fb4d8502Sjsg if (dc_sink_data->dc_container_id != NULL) {
92fb4d8502Sjsg struct dc_container_id *dc_container_id = dc_sink_data->dc_container_id;
93fb4d8502Sjsg
94fb4d8502Sjsg stream->audio_info.port_id[0] = dc_container_id->portId[0];
95fb4d8502Sjsg stream->audio_info.port_id[1] = dc_container_id->portId[1];
96fb4d8502Sjsg } else {
97fb4d8502Sjsg /* TODO - WindowDM has implemented,
98fb4d8502Sjsg other DMs need Unhardcode port_id */
99fb4d8502Sjsg stream->audio_info.port_id[0] = 0x5558859e;
100fb4d8502Sjsg stream->audio_info.port_id[1] = 0xd989449;
101fb4d8502Sjsg }
102fb4d8502Sjsg
103fb4d8502Sjsg /* EDID CAP translation for HDMI 2.0 */
104fb4d8502Sjsg stream->timing.flags.LTE_340MCSC_SCRAMBLE = dc_sink_data->edid_caps.lte_340mcsc_scramble;
105fb4d8502Sjsg
106c349dbc7Sjsg memset(&stream->timing.dsc_cfg, 0, sizeof(stream->timing.dsc_cfg));
107c349dbc7Sjsg stream->timing.dsc_cfg.num_slices_h = 0;
108c349dbc7Sjsg stream->timing.dsc_cfg.num_slices_v = 0;
109c349dbc7Sjsg stream->timing.dsc_cfg.bits_per_pixel = 128;
110c349dbc7Sjsg stream->timing.dsc_cfg.block_pred_enable = 1;
111c349dbc7Sjsg stream->timing.dsc_cfg.linebuf_depth = 9;
112c349dbc7Sjsg stream->timing.dsc_cfg.version_minor = 2;
113c349dbc7Sjsg stream->timing.dsc_cfg.ycbcr422_simple = 0;
114fb4d8502Sjsg
115c349dbc7Sjsg update_stream_signal(stream, dc_sink_data);
116fb4d8502Sjsg
117fb4d8502Sjsg stream->out_transfer_func = dc_create_transfer_func();
118332c92d0Sjsg if (stream->out_transfer_func == NULL) {
119332c92d0Sjsg dc_sink_release(dc_sink_data);
120332c92d0Sjsg return false;
121332c92d0Sjsg }
122fb4d8502Sjsg stream->out_transfer_func->type = TF_TYPE_BYPASS;
123c349dbc7Sjsg
124c349dbc7Sjsg stream->stream_id = stream->ctx->dc_stream_id_count;
125c349dbc7Sjsg stream->ctx->dc_stream_id_count++;
126332c92d0Sjsg
127332c92d0Sjsg return true;
128fb4d8502Sjsg }
129fb4d8502Sjsg
dc_stream_destruct(struct dc_stream_state * stream)130c349dbc7Sjsg static void dc_stream_destruct(struct dc_stream_state *stream)
131fb4d8502Sjsg {
132fb4d8502Sjsg dc_sink_release(stream->sink);
133fb4d8502Sjsg if (stream->out_transfer_func != NULL) {
134fb4d8502Sjsg dc_transfer_func_release(stream->out_transfer_func);
135fb4d8502Sjsg stream->out_transfer_func = NULL;
136fb4d8502Sjsg }
137fb4d8502Sjsg }
138fb4d8502Sjsg
dc_stream_retain(struct dc_stream_state * stream)139fb4d8502Sjsg void dc_stream_retain(struct dc_stream_state *stream)
140fb4d8502Sjsg {
141fb4d8502Sjsg kref_get(&stream->refcount);
142fb4d8502Sjsg }
143fb4d8502Sjsg
dc_stream_free(struct kref * kref)144fb4d8502Sjsg static void dc_stream_free(struct kref *kref)
145fb4d8502Sjsg {
146fb4d8502Sjsg struct dc_stream_state *stream = container_of(kref, struct dc_stream_state, refcount);
147fb4d8502Sjsg
148c349dbc7Sjsg dc_stream_destruct(stream);
149fb4d8502Sjsg kfree(stream);
150fb4d8502Sjsg }
151fb4d8502Sjsg
dc_stream_release(struct dc_stream_state * stream)152fb4d8502Sjsg void dc_stream_release(struct dc_stream_state *stream)
153fb4d8502Sjsg {
154fb4d8502Sjsg if (stream != NULL) {
155fb4d8502Sjsg kref_put(&stream->refcount, dc_stream_free);
156fb4d8502Sjsg }
157fb4d8502Sjsg }
158fb4d8502Sjsg
dc_create_stream_for_sink(struct dc_sink * sink)159fb4d8502Sjsg struct dc_stream_state *dc_create_stream_for_sink(
160fb4d8502Sjsg struct dc_sink *sink)
161fb4d8502Sjsg {
162fb4d8502Sjsg struct dc_stream_state *stream;
163fb4d8502Sjsg
164fb4d8502Sjsg if (sink == NULL)
165fb4d8502Sjsg return NULL;
166fb4d8502Sjsg
167fb4d8502Sjsg stream = kzalloc(sizeof(struct dc_stream_state), GFP_KERNEL);
168fb4d8502Sjsg if (stream == NULL)
169332c92d0Sjsg goto alloc_fail;
170fb4d8502Sjsg
171332c92d0Sjsg if (dc_stream_construct(stream, sink) == false)
172332c92d0Sjsg goto construct_fail;
173fb4d8502Sjsg
174fb4d8502Sjsg kref_init(&stream->refcount);
175fb4d8502Sjsg
176fb4d8502Sjsg return stream;
177332c92d0Sjsg
178332c92d0Sjsg construct_fail:
179332c92d0Sjsg kfree(stream);
180332c92d0Sjsg
181332c92d0Sjsg alloc_fail:
182332c92d0Sjsg return NULL;
183fb4d8502Sjsg }
184fb4d8502Sjsg
dc_copy_stream(const struct dc_stream_state * stream)185c349dbc7Sjsg struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream)
186c349dbc7Sjsg {
187c349dbc7Sjsg struct dc_stream_state *new_stream;
188c349dbc7Sjsg
189c349dbc7Sjsg new_stream = kmemdup(stream, sizeof(struct dc_stream_state), GFP_KERNEL);
190c349dbc7Sjsg if (!new_stream)
191c349dbc7Sjsg return NULL;
192c349dbc7Sjsg
193c349dbc7Sjsg if (new_stream->sink)
194c349dbc7Sjsg dc_sink_retain(new_stream->sink);
195c349dbc7Sjsg
196c349dbc7Sjsg if (new_stream->out_transfer_func)
197c349dbc7Sjsg dc_transfer_func_retain(new_stream->out_transfer_func);
198c349dbc7Sjsg
199c349dbc7Sjsg new_stream->stream_id = new_stream->ctx->dc_stream_id_count;
200c349dbc7Sjsg new_stream->ctx->dc_stream_id_count++;
201c349dbc7Sjsg
2021bb76ff1Sjsg /* If using dynamic encoder assignment, wait till stream committed to assign encoder. */
2031bb76ff1Sjsg if (new_stream->ctx->dc->res_pool->funcs->link_encs_assign)
2041bb76ff1Sjsg new_stream->link_enc = NULL;
2051bb76ff1Sjsg
206c349dbc7Sjsg kref_init(&new_stream->refcount);
207c349dbc7Sjsg
208c349dbc7Sjsg return new_stream;
209c349dbc7Sjsg }
210c349dbc7Sjsg
211c349dbc7Sjsg /**
212c349dbc7Sjsg * dc_stream_get_status_from_state - Get stream status from given dc state
213c349dbc7Sjsg * @state: DC state to find the stream status in
214c349dbc7Sjsg * @stream: The stream to get the stream status for
215c349dbc7Sjsg *
216c349dbc7Sjsg * The given stream is expected to exist in the given dc state. Otherwise, NULL
217c349dbc7Sjsg * will be returned.
218c349dbc7Sjsg */
dc_stream_get_status_from_state(struct dc_state * state,struct dc_stream_state * stream)219c349dbc7Sjsg struct dc_stream_status *dc_stream_get_status_from_state(
220c349dbc7Sjsg struct dc_state *state,
221fb4d8502Sjsg struct dc_stream_state *stream)
222fb4d8502Sjsg {
223fb4d8502Sjsg uint8_t i;
224fb4d8502Sjsg
2255ca02815Sjsg if (state == NULL)
2265ca02815Sjsg return NULL;
2275ca02815Sjsg
228c349dbc7Sjsg for (i = 0; i < state->stream_count; i++) {
229c349dbc7Sjsg if (stream == state->streams[i])
230c349dbc7Sjsg return &state->stream_status[i];
231fb4d8502Sjsg }
232fb4d8502Sjsg
233fb4d8502Sjsg return NULL;
234fb4d8502Sjsg }
235fb4d8502Sjsg
236fb4d8502Sjsg /**
237c349dbc7Sjsg * dc_stream_get_status() - Get current stream status of the given stream state
238c349dbc7Sjsg * @stream: The stream to get the stream status for.
239c349dbc7Sjsg *
240c349dbc7Sjsg * The given stream is expected to exist in dc->current_state. Otherwise, NULL
241c349dbc7Sjsg * will be returned.
242c349dbc7Sjsg */
dc_stream_get_status(struct dc_stream_state * stream)243c349dbc7Sjsg struct dc_stream_status *dc_stream_get_status(
244c349dbc7Sjsg struct dc_stream_state *stream)
245c349dbc7Sjsg {
246c349dbc7Sjsg struct dc *dc = stream->ctx->dc;
247c349dbc7Sjsg return dc_stream_get_status_from_state(dc->current_state, stream);
248c349dbc7Sjsg }
249c349dbc7Sjsg
program_cursor_attributes(struct dc * dc,struct dc_stream_state * stream,const struct dc_cursor_attributes * attributes)2505ca02815Sjsg static void program_cursor_attributes(
2515ca02815Sjsg struct dc *dc,
252fb4d8502Sjsg struct dc_stream_state *stream,
253fb4d8502Sjsg const struct dc_cursor_attributes *attributes)
254fb4d8502Sjsg {
255fb4d8502Sjsg int i;
256fb4d8502Sjsg struct resource_context *res_ctx;
257fb4d8502Sjsg struct pipe_ctx *pipe_to_program = NULL;
258fb4d8502Sjsg
2595ca02815Sjsg if (!stream)
2605ca02815Sjsg return;
261fb4d8502Sjsg
262c349dbc7Sjsg res_ctx = &dc->current_state->res_ctx;
263ad8b1aafSjsg
264fb4d8502Sjsg for (i = 0; i < MAX_PIPES; i++) {
265fb4d8502Sjsg struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
266fb4d8502Sjsg
267fb4d8502Sjsg if (pipe_ctx->stream != stream)
268fb4d8502Sjsg continue;
269fb4d8502Sjsg
270fb4d8502Sjsg if (!pipe_to_program) {
271fb4d8502Sjsg pipe_to_program = pipe_ctx;
272c349dbc7Sjsg dc->hwss.cursor_lock(dc, pipe_to_program, true);
2731bb76ff1Sjsg if (pipe_to_program->next_odm_pipe)
2741bb76ff1Sjsg dc->hwss.cursor_lock(dc, pipe_to_program->next_odm_pipe, true);
275fb4d8502Sjsg }
276fb4d8502Sjsg
277c349dbc7Sjsg dc->hwss.set_cursor_attribute(pipe_ctx);
278*f005ef32Sjsg if (dc->ctx->dmub_srv)
2791bb76ff1Sjsg dc_send_update_cursor_info_to_dmu(pipe_ctx, i);
280c349dbc7Sjsg if (dc->hwss.set_cursor_sdr_white_level)
281c349dbc7Sjsg dc->hwss.set_cursor_sdr_white_level(pipe_ctx);
282fb4d8502Sjsg }
283fb4d8502Sjsg
2841bb76ff1Sjsg if (pipe_to_program) {
285c349dbc7Sjsg dc->hwss.cursor_lock(dc, pipe_to_program, false);
2861bb76ff1Sjsg if (pipe_to_program->next_odm_pipe)
2871bb76ff1Sjsg dc->hwss.cursor_lock(dc, pipe_to_program->next_odm_pipe, false);
2881bb76ff1Sjsg }
2895ca02815Sjsg }
290fb4d8502Sjsg
2915ca02815Sjsg #ifndef TRIM_FSFT
2925ca02815Sjsg /*
2935ca02815Sjsg * dc_optimize_timing_for_fsft() - dc to optimize timing
2945ca02815Sjsg */
dc_optimize_timing_for_fsft(struct dc_stream_state * pStream,unsigned int max_input_rate_in_khz)2955ca02815Sjsg bool dc_optimize_timing_for_fsft(
2965ca02815Sjsg struct dc_stream_state *pStream,
2975ca02815Sjsg unsigned int max_input_rate_in_khz)
2985ca02815Sjsg {
2995ca02815Sjsg struct dc *dc;
3005ca02815Sjsg
3015ca02815Sjsg dc = pStream->ctx->dc;
3025ca02815Sjsg
3035ca02815Sjsg return (dc->hwss.optimize_timing_for_fsft &&
3045ca02815Sjsg dc->hwss.optimize_timing_for_fsft(dc, &pStream->timing, max_input_rate_in_khz));
3055ca02815Sjsg }
3065ca02815Sjsg #endif
3075ca02815Sjsg
is_subvp_high_refresh_candidate(struct dc_stream_state * stream)308*f005ef32Sjsg static bool is_subvp_high_refresh_candidate(struct dc_stream_state *stream)
309*f005ef32Sjsg {
310*f005ef32Sjsg uint32_t refresh_rate;
311*f005ef32Sjsg struct dc *dc = stream->ctx->dc;
312*f005ef32Sjsg
313*f005ef32Sjsg refresh_rate = (stream->timing.pix_clk_100hz * (uint64_t)100 +
314*f005ef32Sjsg stream->timing.v_total * stream->timing.h_total - (uint64_t)1);
315*f005ef32Sjsg refresh_rate = div_u64(refresh_rate, stream->timing.v_total);
316*f005ef32Sjsg refresh_rate = div_u64(refresh_rate, stream->timing.h_total);
317*f005ef32Sjsg
318*f005ef32Sjsg /* If there's any stream that fits the SubVP high refresh criteria,
319*f005ef32Sjsg * we must return true. This is because cursor updates are asynchronous
320*f005ef32Sjsg * with full updates, so we could transition into a SubVP config and
321*f005ef32Sjsg * remain in HW cursor mode if there's no cursor update which will
322*f005ef32Sjsg * then cause corruption.
323*f005ef32Sjsg */
324*f005ef32Sjsg if ((refresh_rate >= 120 && refresh_rate <= 175 &&
325*f005ef32Sjsg stream->timing.v_addressable >= 1440 &&
326*f005ef32Sjsg stream->timing.v_addressable <= 2160) &&
327*f005ef32Sjsg (dc->current_state->stream_count > 1 ||
328*f005ef32Sjsg (dc->current_state->stream_count == 1 && !stream->allow_freesync)))
329*f005ef32Sjsg return true;
330*f005ef32Sjsg
331*f005ef32Sjsg return false;
332*f005ef32Sjsg }
333*f005ef32Sjsg
3345ca02815Sjsg /*
3355ca02815Sjsg * dc_stream_set_cursor_attributes() - Update cursor attributes and set cursor surface address
3365ca02815Sjsg */
dc_stream_set_cursor_attributes(struct dc_stream_state * stream,const struct dc_cursor_attributes * attributes)3375ca02815Sjsg bool dc_stream_set_cursor_attributes(
3385ca02815Sjsg struct dc_stream_state *stream,
3395ca02815Sjsg const struct dc_cursor_attributes *attributes)
3405ca02815Sjsg {
3415ca02815Sjsg struct dc *dc;
3425ca02815Sjsg bool reset_idle_optimizations = false;
3435ca02815Sjsg
3445ca02815Sjsg if (NULL == stream) {
3455ca02815Sjsg dm_error("DC: dc_stream is NULL!\n");
3465ca02815Sjsg return false;
3475ca02815Sjsg }
3485ca02815Sjsg if (NULL == attributes) {
3495ca02815Sjsg dm_error("DC: attributes is NULL!\n");
3505ca02815Sjsg return false;
3515ca02815Sjsg }
3525ca02815Sjsg
3535ca02815Sjsg if (attributes->address.quad_part == 0) {
3545ca02815Sjsg dm_output_to_console("DC: Cursor address is 0!\n");
3555ca02815Sjsg return false;
3565ca02815Sjsg }
3575ca02815Sjsg
3585ca02815Sjsg dc = stream->ctx->dc;
3591bb76ff1Sjsg
360*f005ef32Sjsg /* SubVP is not compatible with HW cursor larger than 64 x 64 x 4.
361*f005ef32Sjsg * Therefore, if cursor is greater than 64 x 64 x 4, fallback to SW cursor in the following case:
362*f005ef32Sjsg * 1. If the config is a candidate for SubVP high refresh (both single an dual display configs)
363*f005ef32Sjsg * 2. If not subvp high refresh, for single display cases, if resolution is >= 5K and refresh rate < 120hz
364*f005ef32Sjsg * 3. If not subvp high refresh, for multi display cases, if resolution is >= 4K and refresh rate < 120hz
365*f005ef32Sjsg */
366*f005ef32Sjsg if (dc->debug.allow_sw_cursor_fallback && attributes->height * attributes->width * 4 > 16384) {
367*f005ef32Sjsg if (!dc->debug.disable_subvp_high_refresh && is_subvp_high_refresh_candidate(stream))
3681bb76ff1Sjsg return false;
369*f005ef32Sjsg if (dc->current_state->stream_count == 1 && stream->timing.v_addressable >= 2880 &&
370*f005ef32Sjsg ((stream->timing.pix_clk_100hz * 100) / stream->timing.v_total / stream->timing.h_total) < 120)
371*f005ef32Sjsg return false;
372*f005ef32Sjsg else if (dc->current_state->stream_count > 1 && stream->timing.v_addressable >= 2160 &&
373*f005ef32Sjsg ((stream->timing.pix_clk_100hz * 100) / stream->timing.v_total / stream->timing.h_total) < 120)
374*f005ef32Sjsg return false;
375*f005ef32Sjsg }
3761bb76ff1Sjsg
3775ca02815Sjsg stream->cursor_attributes = *attributes;
3785ca02815Sjsg
3795ca02815Sjsg dc_z10_restore(dc);
3805ca02815Sjsg /* disable idle optimizations while updating cursor */
3815ca02815Sjsg if (dc->idle_optimizations_allowed) {
3825ca02815Sjsg dc_allow_idle_optimizations(dc, false);
3835ca02815Sjsg reset_idle_optimizations = true;
3845ca02815Sjsg }
3855ca02815Sjsg
3865ca02815Sjsg program_cursor_attributes(dc, stream, attributes);
3875ca02815Sjsg
388ad8b1aafSjsg /* re-enable idle optimizations if necessary */
389ad8b1aafSjsg if (reset_idle_optimizations)
390ad8b1aafSjsg dc_allow_idle_optimizations(dc, true);
391ad8b1aafSjsg
392fb4d8502Sjsg return true;
393fb4d8502Sjsg }
394fb4d8502Sjsg
program_cursor_position(struct dc * dc,struct dc_stream_state * stream,const struct dc_cursor_position * position)3955ca02815Sjsg static void program_cursor_position(
3965ca02815Sjsg struct dc *dc,
397fb4d8502Sjsg struct dc_stream_state *stream,
398fb4d8502Sjsg const struct dc_cursor_position *position)
399fb4d8502Sjsg {
400fb4d8502Sjsg int i;
401fb4d8502Sjsg struct resource_context *res_ctx;
402fb4d8502Sjsg struct pipe_ctx *pipe_to_program = NULL;
403fb4d8502Sjsg
4045ca02815Sjsg if (!stream)
4055ca02815Sjsg return;
406fb4d8502Sjsg
407c349dbc7Sjsg res_ctx = &dc->current_state->res_ctx;
408fb4d8502Sjsg
409fb4d8502Sjsg for (i = 0; i < MAX_PIPES; i++) {
410fb4d8502Sjsg struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
411fb4d8502Sjsg
412fb4d8502Sjsg if (pipe_ctx->stream != stream ||
413fb4d8502Sjsg (!pipe_ctx->plane_res.mi && !pipe_ctx->plane_res.hubp) ||
414fb4d8502Sjsg !pipe_ctx->plane_state ||
415fb4d8502Sjsg (!pipe_ctx->plane_res.xfm && !pipe_ctx->plane_res.dpp) ||
416c349dbc7Sjsg (!pipe_ctx->plane_res.ipp && !pipe_ctx->plane_res.dpp))
417fb4d8502Sjsg continue;
418fb4d8502Sjsg
419fb4d8502Sjsg if (!pipe_to_program) {
420fb4d8502Sjsg pipe_to_program = pipe_ctx;
421c349dbc7Sjsg dc->hwss.cursor_lock(dc, pipe_to_program, true);
422fb4d8502Sjsg }
423fb4d8502Sjsg
424c349dbc7Sjsg dc->hwss.set_cursor_position(pipe_ctx);
425*f005ef32Sjsg if (dc->ctx->dmub_srv)
4261bb76ff1Sjsg dc_send_update_cursor_info_to_dmu(pipe_ctx, i);
427fb4d8502Sjsg }
428fb4d8502Sjsg
429fb4d8502Sjsg if (pipe_to_program)
430c349dbc7Sjsg dc->hwss.cursor_lock(dc, pipe_to_program, false);
4315ca02815Sjsg }
432fb4d8502Sjsg
dc_stream_set_cursor_position(struct dc_stream_state * stream,const struct dc_cursor_position * position)4335ca02815Sjsg bool dc_stream_set_cursor_position(
4345ca02815Sjsg struct dc_stream_state *stream,
4355ca02815Sjsg const struct dc_cursor_position *position)
4365ca02815Sjsg {
437*f005ef32Sjsg struct dc *dc;
4385ca02815Sjsg bool reset_idle_optimizations = false;
4395ca02815Sjsg
4405ca02815Sjsg if (NULL == stream) {
4415ca02815Sjsg dm_error("DC: dc_stream is NULL!\n");
4425ca02815Sjsg return false;
4435ca02815Sjsg }
4445ca02815Sjsg
4455ca02815Sjsg if (NULL == position) {
4465ca02815Sjsg dm_error("DC: cursor position is NULL!\n");
4475ca02815Sjsg return false;
4485ca02815Sjsg }
4495ca02815Sjsg
4505ca02815Sjsg dc = stream->ctx->dc;
4515ca02815Sjsg dc_z10_restore(dc);
4525ca02815Sjsg
4535ca02815Sjsg /* disable idle optimizations if enabling cursor */
4541bb76ff1Sjsg if (dc->idle_optimizations_allowed && (!stream->cursor_position.enable || dc->debug.exit_idle_opt_for_cursor_updates)
4551bb76ff1Sjsg && position->enable) {
4565ca02815Sjsg dc_allow_idle_optimizations(dc, false);
4575ca02815Sjsg reset_idle_optimizations = true;
4585ca02815Sjsg }
4595ca02815Sjsg
4605ca02815Sjsg stream->cursor_position = *position;
4615ca02815Sjsg
4625ca02815Sjsg program_cursor_position(dc, stream, position);
463ad8b1aafSjsg /* re-enable idle optimizations if necessary */
464ad8b1aafSjsg if (reset_idle_optimizations)
465ad8b1aafSjsg dc_allow_idle_optimizations(dc, true);
466ad8b1aafSjsg
467fb4d8502Sjsg return true;
468fb4d8502Sjsg }
469fb4d8502Sjsg
dc_stream_add_writeback(struct dc * dc,struct dc_stream_state * stream,struct dc_writeback_info * wb_info)470c349dbc7Sjsg bool dc_stream_add_writeback(struct dc *dc,
471c349dbc7Sjsg struct dc_stream_state *stream,
472c349dbc7Sjsg struct dc_writeback_info *wb_info)
473c349dbc7Sjsg {
474c349dbc7Sjsg bool isDrc = false;
475c349dbc7Sjsg int i = 0;
476c349dbc7Sjsg struct dwbc *dwb;
477c349dbc7Sjsg
478c349dbc7Sjsg if (stream == NULL) {
479c349dbc7Sjsg dm_error("DC: dc_stream is NULL!\n");
480c349dbc7Sjsg return false;
481c349dbc7Sjsg }
482c349dbc7Sjsg
483c349dbc7Sjsg if (wb_info == NULL) {
484c349dbc7Sjsg dm_error("DC: dc_writeback_info is NULL!\n");
485c349dbc7Sjsg return false;
486c349dbc7Sjsg }
487c349dbc7Sjsg
488c349dbc7Sjsg if (wb_info->dwb_pipe_inst >= MAX_DWB_PIPES) {
489c349dbc7Sjsg dm_error("DC: writeback pipe is invalid!\n");
490c349dbc7Sjsg return false;
491c349dbc7Sjsg }
492c349dbc7Sjsg
493c349dbc7Sjsg wb_info->dwb_params.out_transfer_func = stream->out_transfer_func;
494c349dbc7Sjsg
495c349dbc7Sjsg dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst];
496c349dbc7Sjsg dwb->dwb_is_drc = false;
497c349dbc7Sjsg
498c349dbc7Sjsg /* recalculate and apply DML parameters */
499c349dbc7Sjsg
500c349dbc7Sjsg for (i = 0; i < stream->num_wb_info; i++) {
501c349dbc7Sjsg /*dynamic update*/
502c349dbc7Sjsg if (stream->writeback_info[i].wb_enabled &&
503c349dbc7Sjsg stream->writeback_info[i].dwb_pipe_inst == wb_info->dwb_pipe_inst) {
504c349dbc7Sjsg stream->writeback_info[i] = *wb_info;
505c349dbc7Sjsg isDrc = true;
506c349dbc7Sjsg }
507c349dbc7Sjsg }
508c349dbc7Sjsg
509c349dbc7Sjsg if (!isDrc) {
510*f005ef32Sjsg ASSERT(stream->num_wb_info + 1 <= MAX_DWB_PIPES);
511c349dbc7Sjsg stream->writeback_info[stream->num_wb_info++] = *wb_info;
512c349dbc7Sjsg }
513c349dbc7Sjsg
514c349dbc7Sjsg if (dc->hwss.enable_writeback) {
515c349dbc7Sjsg struct dc_stream_status *stream_status = dc_stream_get_status(stream);
516c349dbc7Sjsg struct dwbc *dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst];
517c349dbc7Sjsg dwb->otg_inst = stream_status->primary_otg_inst;
518c349dbc7Sjsg }
519c349dbc7Sjsg return true;
520c349dbc7Sjsg }
521c349dbc7Sjsg
dc_stream_remove_writeback(struct dc * dc,struct dc_stream_state * stream,uint32_t dwb_pipe_inst)522c349dbc7Sjsg bool dc_stream_remove_writeback(struct dc *dc,
523c349dbc7Sjsg struct dc_stream_state *stream,
524c349dbc7Sjsg uint32_t dwb_pipe_inst)
525c349dbc7Sjsg {
526c349dbc7Sjsg int i = 0, j = 0;
527c349dbc7Sjsg if (stream == NULL) {
528c349dbc7Sjsg dm_error("DC: dc_stream is NULL!\n");
529c349dbc7Sjsg return false;
530c349dbc7Sjsg }
531c349dbc7Sjsg
532c349dbc7Sjsg if (dwb_pipe_inst >= MAX_DWB_PIPES) {
533c349dbc7Sjsg dm_error("DC: writeback pipe is invalid!\n");
534c349dbc7Sjsg return false;
535c349dbc7Sjsg }
536c349dbc7Sjsg
537*f005ef32Sjsg if (stream->num_wb_info > MAX_DWB_PIPES) {
538*f005ef32Sjsg dm_error("DC: num_wb_info is invalid!\n");
539*f005ef32Sjsg return false;
540*f005ef32Sjsg }
541*f005ef32Sjsg
542c349dbc7Sjsg // stream->writeback_info[dwb_pipe_inst].wb_enabled = false;
543c349dbc7Sjsg for (i = 0; i < stream->num_wb_info; i++) {
544c349dbc7Sjsg /*dynamic update*/
545c349dbc7Sjsg if (stream->writeback_info[i].wb_enabled &&
546c349dbc7Sjsg stream->writeback_info[i].dwb_pipe_inst == dwb_pipe_inst) {
547c349dbc7Sjsg stream->writeback_info[i].wb_enabled = false;
548c349dbc7Sjsg }
549c349dbc7Sjsg }
550c349dbc7Sjsg
551c349dbc7Sjsg /* remove writeback info for disabled writeback pipes from stream */
552c349dbc7Sjsg for (i = 0, j = 0; i < stream->num_wb_info; i++) {
553c349dbc7Sjsg if (stream->writeback_info[i].wb_enabled) {
5541bb76ff1Sjsg if (j < i)
555c349dbc7Sjsg /* trim the array */
556*f005ef32Sjsg memcpy(&stream->writeback_info[j], &stream->writeback_info[i],
557*f005ef32Sjsg sizeof(struct dc_writeback_info));
558c349dbc7Sjsg j++;
559c349dbc7Sjsg }
560c349dbc7Sjsg }
561c349dbc7Sjsg stream->num_wb_info = j;
562c349dbc7Sjsg
563c349dbc7Sjsg return true;
564c349dbc7Sjsg }
565c349dbc7Sjsg
dc_stream_warmup_writeback(struct dc * dc,int num_dwb,struct dc_writeback_info * wb_info)566c349dbc7Sjsg bool dc_stream_warmup_writeback(struct dc *dc,
567c349dbc7Sjsg int num_dwb,
568c349dbc7Sjsg struct dc_writeback_info *wb_info)
569c349dbc7Sjsg {
570c349dbc7Sjsg if (dc->hwss.mmhubbub_warmup)
571c349dbc7Sjsg return dc->hwss.mmhubbub_warmup(dc, num_dwb, wb_info);
572c349dbc7Sjsg else
573c349dbc7Sjsg return false;
574c349dbc7Sjsg }
dc_stream_get_vblank_counter(const struct dc_stream_state * stream)575fb4d8502Sjsg uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream)
576fb4d8502Sjsg {
577fb4d8502Sjsg uint8_t i;
578c349dbc7Sjsg struct dc *dc = stream->ctx->dc;
579fb4d8502Sjsg struct resource_context *res_ctx =
580c349dbc7Sjsg &dc->current_state->res_ctx;
581fb4d8502Sjsg
582fb4d8502Sjsg for (i = 0; i < MAX_PIPES; i++) {
583fb4d8502Sjsg struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg;
584fb4d8502Sjsg
585d0bf354fSjsg if (res_ctx->pipe_ctx[i].stream != stream || !tg)
586fb4d8502Sjsg continue;
587fb4d8502Sjsg
588fb4d8502Sjsg return tg->funcs->get_frame_count(tg);
589fb4d8502Sjsg }
590fb4d8502Sjsg
591fb4d8502Sjsg return 0;
592fb4d8502Sjsg }
593fb4d8502Sjsg
dc_stream_send_dp_sdp(const struct dc_stream_state * stream,const uint8_t * custom_sdp_message,unsigned int sdp_message_size)594c349dbc7Sjsg bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream,
595c349dbc7Sjsg const uint8_t *custom_sdp_message,
596c349dbc7Sjsg unsigned int sdp_message_size)
597c349dbc7Sjsg {
598c349dbc7Sjsg int i;
599c349dbc7Sjsg struct dc *dc;
600c349dbc7Sjsg struct resource_context *res_ctx;
601c349dbc7Sjsg
602c349dbc7Sjsg if (stream == NULL) {
603c349dbc7Sjsg dm_error("DC: dc_stream is NULL!\n");
604c349dbc7Sjsg return false;
605c349dbc7Sjsg }
606c349dbc7Sjsg
607c349dbc7Sjsg dc = stream->ctx->dc;
608c349dbc7Sjsg res_ctx = &dc->current_state->res_ctx;
609c349dbc7Sjsg
610c349dbc7Sjsg for (i = 0; i < MAX_PIPES; i++) {
611c349dbc7Sjsg struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
612c349dbc7Sjsg
613c349dbc7Sjsg if (pipe_ctx->stream != stream)
614c349dbc7Sjsg continue;
615c349dbc7Sjsg
616c349dbc7Sjsg if (dc->hwss.send_immediate_sdp_message != NULL)
617c349dbc7Sjsg dc->hwss.send_immediate_sdp_message(pipe_ctx,
618c349dbc7Sjsg custom_sdp_message,
619c349dbc7Sjsg sdp_message_size);
620c349dbc7Sjsg else
621c349dbc7Sjsg DC_LOG_WARNING("%s:send_immediate_sdp_message not implemented on this ASIC\n",
622c349dbc7Sjsg __func__);
623c349dbc7Sjsg
624c349dbc7Sjsg }
625c349dbc7Sjsg
626c349dbc7Sjsg return true;
627c349dbc7Sjsg }
628c349dbc7Sjsg
dc_stream_get_scanoutpos(const struct dc_stream_state * stream,uint32_t * v_blank_start,uint32_t * v_blank_end,uint32_t * h_position,uint32_t * v_position)629fb4d8502Sjsg bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream,
630fb4d8502Sjsg uint32_t *v_blank_start,
631fb4d8502Sjsg uint32_t *v_blank_end,
632fb4d8502Sjsg uint32_t *h_position,
633fb4d8502Sjsg uint32_t *v_position)
634fb4d8502Sjsg {
635fb4d8502Sjsg uint8_t i;
636fb4d8502Sjsg bool ret = false;
637c349dbc7Sjsg struct dc *dc = stream->ctx->dc;
638fb4d8502Sjsg struct resource_context *res_ctx =
639c349dbc7Sjsg &dc->current_state->res_ctx;
640fb4d8502Sjsg
641fb4d8502Sjsg for (i = 0; i < MAX_PIPES; i++) {
642fb4d8502Sjsg struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg;
643fb4d8502Sjsg
644d0bf354fSjsg if (res_ctx->pipe_ctx[i].stream != stream || !tg)
645fb4d8502Sjsg continue;
646fb4d8502Sjsg
647fb4d8502Sjsg tg->funcs->get_scanoutpos(tg,
648fb4d8502Sjsg v_blank_start,
649fb4d8502Sjsg v_blank_end,
650fb4d8502Sjsg h_position,
651fb4d8502Sjsg v_position);
652fb4d8502Sjsg
653fb4d8502Sjsg ret = true;
654fb4d8502Sjsg break;
655fb4d8502Sjsg }
656fb4d8502Sjsg
657fb4d8502Sjsg return ret;
658fb4d8502Sjsg }
659fb4d8502Sjsg
dc_stream_dmdata_status_done(struct dc * dc,struct dc_stream_state * stream)660c349dbc7Sjsg bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream)
661c349dbc7Sjsg {
662c349dbc7Sjsg struct pipe_ctx *pipe = NULL;
663c349dbc7Sjsg int i;
664c349dbc7Sjsg
665c349dbc7Sjsg if (!dc->hwss.dmdata_status_done)
666c349dbc7Sjsg return false;
667c349dbc7Sjsg
668c349dbc7Sjsg for (i = 0; i < MAX_PIPES; i++) {
669c349dbc7Sjsg pipe = &dc->current_state->res_ctx.pipe_ctx[i];
670c349dbc7Sjsg if (pipe->stream == stream)
671c349dbc7Sjsg break;
672c349dbc7Sjsg }
673c349dbc7Sjsg /* Stream not found, by default we'll assume HUBP fetched dm data */
674c349dbc7Sjsg if (i == MAX_PIPES)
675c349dbc7Sjsg return true;
676c349dbc7Sjsg
677c349dbc7Sjsg return dc->hwss.dmdata_status_done(pipe);
678c349dbc7Sjsg }
679c349dbc7Sjsg
dc_stream_set_dynamic_metadata(struct dc * dc,struct dc_stream_state * stream,struct dc_dmdata_attributes * attr)680c349dbc7Sjsg bool dc_stream_set_dynamic_metadata(struct dc *dc,
681c349dbc7Sjsg struct dc_stream_state *stream,
682c349dbc7Sjsg struct dc_dmdata_attributes *attr)
683c349dbc7Sjsg {
684c349dbc7Sjsg struct pipe_ctx *pipe_ctx = NULL;
685c349dbc7Sjsg struct hubp *hubp;
686c349dbc7Sjsg int i;
687c349dbc7Sjsg
688c349dbc7Sjsg /* Dynamic metadata is only supported on HDMI or DP */
689c349dbc7Sjsg if (!dc_is_hdmi_signal(stream->signal) && !dc_is_dp_signal(stream->signal))
690c349dbc7Sjsg return false;
691c349dbc7Sjsg
692c349dbc7Sjsg /* Check hardware support */
693c349dbc7Sjsg if (!dc->hwss.program_dmdata_engine)
694c349dbc7Sjsg return false;
695c349dbc7Sjsg
696c349dbc7Sjsg for (i = 0; i < MAX_PIPES; i++) {
697c349dbc7Sjsg pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i];
698c349dbc7Sjsg if (pipe_ctx->stream == stream)
699c349dbc7Sjsg break;
700c349dbc7Sjsg }
701c349dbc7Sjsg
702c349dbc7Sjsg if (i == MAX_PIPES)
703c349dbc7Sjsg return false;
704c349dbc7Sjsg
705c349dbc7Sjsg hubp = pipe_ctx->plane_res.hubp;
706c349dbc7Sjsg if (hubp == NULL)
707c349dbc7Sjsg return false;
708c349dbc7Sjsg
709c349dbc7Sjsg pipe_ctx->stream->dmdata_address = attr->address;
710c349dbc7Sjsg
711c349dbc7Sjsg dc->hwss.program_dmdata_engine(pipe_ctx);
712c349dbc7Sjsg
713c349dbc7Sjsg if (hubp->funcs->dmdata_set_attributes != NULL &&
714c349dbc7Sjsg pipe_ctx->stream->dmdata_address.quad_part != 0) {
715c349dbc7Sjsg hubp->funcs->dmdata_set_attributes(hubp, attr);
716c349dbc7Sjsg }
717c349dbc7Sjsg
718c349dbc7Sjsg return true;
719c349dbc7Sjsg }
720c349dbc7Sjsg
dc_stream_add_dsc_to_resource(struct dc * dc,struct dc_state * state,struct dc_stream_state * stream)721ad8b1aafSjsg enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc,
722ad8b1aafSjsg struct dc_state *state,
723ad8b1aafSjsg struct dc_stream_state *stream)
724ad8b1aafSjsg {
725ad8b1aafSjsg if (dc->res_pool->funcs->add_dsc_to_stream_resource) {
726ad8b1aafSjsg return dc->res_pool->funcs->add_dsc_to_stream_resource(dc, state, stream);
727ad8b1aafSjsg } else {
728ad8b1aafSjsg return DC_NO_DSC_RESOURCE;
729ad8b1aafSjsg }
730ad8b1aafSjsg }
731ad8b1aafSjsg
dc_stream_get_pipe_ctx(struct dc_stream_state * stream)7321bb76ff1Sjsg struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream)
7331bb76ff1Sjsg {
7341bb76ff1Sjsg int i = 0;
7351bb76ff1Sjsg
7361bb76ff1Sjsg for (i = 0; i < MAX_PIPES; i++) {
7371bb76ff1Sjsg struct pipe_ctx *pipe = &stream->ctx->dc->current_state->res_ctx.pipe_ctx[i];
7381bb76ff1Sjsg
7391bb76ff1Sjsg if (pipe->stream == stream)
7401bb76ff1Sjsg return pipe;
7411bb76ff1Sjsg }
7421bb76ff1Sjsg
7431bb76ff1Sjsg return NULL;
7441bb76ff1Sjsg }
7451bb76ff1Sjsg
dc_stream_log(const struct dc * dc,const struct dc_stream_state * stream)746fb4d8502Sjsg void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream)
747fb4d8502Sjsg {
748fb4d8502Sjsg DC_LOG_DC(
749fb4d8502Sjsg "core_stream 0x%p: src: %d, %d, %d, %d; dst: %d, %d, %d, %d, colorSpace:%d\n",
750fb4d8502Sjsg stream,
751fb4d8502Sjsg stream->src.x,
752fb4d8502Sjsg stream->src.y,
753fb4d8502Sjsg stream->src.width,
754fb4d8502Sjsg stream->src.height,
755fb4d8502Sjsg stream->dst.x,
756fb4d8502Sjsg stream->dst.y,
757fb4d8502Sjsg stream->dst.width,
758fb4d8502Sjsg stream->dst.height,
759fb4d8502Sjsg stream->output_color_space);
760fb4d8502Sjsg DC_LOG_DC(
761fb4d8502Sjsg "\tpix_clk_khz: %d, h_total: %d, v_total: %d, pixelencoder:%d, displaycolorDepth:%d\n",
762c349dbc7Sjsg stream->timing.pix_clk_100hz / 10,
763fb4d8502Sjsg stream->timing.h_total,
764fb4d8502Sjsg stream->timing.v_total,
765fb4d8502Sjsg stream->timing.pixel_encoding,
766fb4d8502Sjsg stream->timing.display_color_depth);
767fb4d8502Sjsg DC_LOG_DC(
768fb4d8502Sjsg "\tlink: %d\n",
769c349dbc7Sjsg stream->link->link_index);
7701bb76ff1Sjsg
7711bb76ff1Sjsg DC_LOG_DC(
7721bb76ff1Sjsg "\tdsc: %d, mst_pbn: %d\n",
7731bb76ff1Sjsg stream->timing.flags.DSC,
7741bb76ff1Sjsg stream->timing.dsc_cfg.mst_pbn);
7751bb76ff1Sjsg
7761bb76ff1Sjsg if (stream->sink) {
7771bb76ff1Sjsg if (stream->sink->sink_signal != SIGNAL_TYPE_VIRTUAL &&
7781bb76ff1Sjsg stream->sink->sink_signal != SIGNAL_TYPE_NONE) {
7791bb76ff1Sjsg
7801bb76ff1Sjsg DC_LOG_DC(
7811bb76ff1Sjsg "\tdispname: %s signal: %x\n",
7821bb76ff1Sjsg stream->sink->edid_caps.display_name,
7831bb76ff1Sjsg stream->signal);
7841bb76ff1Sjsg }
7851bb76ff1Sjsg }
786fb4d8502Sjsg }
787ad8b1aafSjsg
788