1 /* 2 * Copyright 2012-14 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef DC_STREAM_H_ 27 #define DC_STREAM_H_ 28 29 #include "dc_types.h" 30 #include "grph_object_defs.h" 31 32 /******************************************************************************* 33 * Stream Interfaces 34 ******************************************************************************/ 35 struct timing_sync_info { 36 int group_id; 37 int group_size; 38 bool master; 39 }; 40 41 struct dc_stream_status { 42 int primary_otg_inst; 43 int stream_enc_inst; 44 45 /** 46 * @plane_count: Total of planes attached to a single stream 47 */ 48 int plane_count; 49 int audio_inst; 50 struct timing_sync_info timing_sync_info; 51 struct dc_plane_state *plane_states[MAX_SURFACE_NUM]; 52 bool is_abm_supported; 53 }; 54 55 enum hubp_dmdata_mode { 56 DMDATA_SW_MODE, 57 DMDATA_HW_MODE 58 }; 59 60 struct dc_dmdata_attributes { 61 /* Specifies whether dynamic meta data will be updated by software 62 * or has to be fetched by hardware (DMA mode) 63 */ 64 enum hubp_dmdata_mode dmdata_mode; 65 /* Specifies if current dynamic meta data is to be used only for the current frame */ 66 bool dmdata_repeat; 67 /* Specifies the size of Dynamic Metadata surface in byte. Size of 0 means no Dynamic metadata is fetched */ 68 uint32_t dmdata_size; 69 /* Specifies if a new dynamic meta data should be fetched for an upcoming frame */ 70 bool dmdata_updated; 71 /* If hardware mode is used, the base address where DMDATA surface is located */ 72 PHYSICAL_ADDRESS_LOC address; 73 /* Specifies whether QOS level will be provided by TTU or it will come from DMDATA_QOS_LEVEL */ 74 bool dmdata_qos_mode; 75 /* If qos_mode = 1, this is the QOS value to be used: */ 76 uint32_t dmdata_qos_level; 77 /* Specifies the value in unit of REFCLK cycles to be added to the 78 * current time to produce the Amortized deadline for Dynamic Metadata chunk request 79 */ 80 uint32_t dmdata_dl_delta; 81 /* An unbounded array of uint32s, represents software dmdata to be loaded */ 82 uint32_t *dmdata_sw_data; 83 }; 84 85 struct dc_writeback_info { 86 bool wb_enabled; 87 int dwb_pipe_inst; 88 struct dc_dwb_params dwb_params; 89 struct mcif_buf_params mcif_buf_params; 90 struct mcif_warmup_params mcif_warmup_params; 91 /* the plane that is the input to TOP_MUX for MPCC that is the DWB source */ 92 struct dc_plane_state *writeback_source_plane; 93 /* source MPCC instance. for use by internally by dc */ 94 int mpcc_inst; 95 }; 96 97 struct dc_writeback_update { 98 unsigned int num_wb_info; 99 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 100 }; 101 102 enum vertical_interrupt_ref_point { 103 START_V_UPDATE = 0, 104 START_V_SYNC, 105 INVALID_POINT 106 107 //For now, only v_update interrupt is used. 108 //START_V_BLANK, 109 //START_V_ACTIVE 110 }; 111 112 struct periodic_interrupt_config { 113 enum vertical_interrupt_ref_point ref_point; 114 int lines_offset; 115 }; 116 117 struct dc_mst_stream_bw_update { 118 bool is_increase; // is bandwidth reduced or increased 119 uint32_t mst_stream_bw; // new mst bandwidth in kbps 120 }; 121 122 union stream_update_flags { 123 struct { 124 uint32_t scaling:1; 125 uint32_t out_tf:1; 126 uint32_t out_csc:1; 127 uint32_t abm_level:1; 128 uint32_t dpms_off:1; 129 uint32_t gamut_remap:1; 130 uint32_t wb_update:1; 131 uint32_t dsc_changed : 1; 132 uint32_t mst_bw : 1; 133 uint32_t crtc_timing_adjust : 1; 134 uint32_t fams_changed : 1; 135 } bits; 136 137 uint32_t raw; 138 }; 139 140 struct test_pattern { 141 enum dp_test_pattern type; 142 enum dp_test_pattern_color_space color_space; 143 struct link_training_settings const *p_link_settings; 144 unsigned char const *p_custom_pattern; 145 unsigned int cust_pattern_size; 146 }; 147 148 #define SUBVP_DRR_MARGIN_US 500 // 500us for DRR margin (SubVP + DRR) 149 150 enum mall_stream_type { 151 SUBVP_NONE, // subvp not in use 152 SUBVP_MAIN, // subvp in use, this stream is main stream 153 SUBVP_PHANTOM, // subvp in use, this stream is a phantom stream 154 }; 155 156 struct mall_stream_config { 157 /* MALL stream config to indicate if the stream is phantom or not. 158 * We will use a phantom stream to indicate that the pipe is phantom. 159 */ 160 enum mall_stream_type type; 161 struct dc_stream_state *paired_stream; // master / slave stream 162 }; 163 164 struct dc_stream_state { 165 // sink is deprecated, new code should not reference 166 // this pointer 167 struct dc_sink *sink; 168 169 struct dc_link *link; 170 /* For dynamic link encoder assignment, update the link encoder assigned to 171 * a stream via the volatile dc_state rather than the static dc_link. 172 */ 173 struct link_encoder *link_enc; 174 struct dc_panel_patch sink_patches; 175 union display_content_support content_support; 176 struct dc_crtc_timing timing; 177 struct dc_crtc_timing_adjust adjust; 178 struct dc_info_packet vrr_infopacket; 179 struct dc_info_packet vsc_infopacket; 180 struct dc_info_packet vsp_infopacket; 181 struct dc_info_packet hfvsif_infopacket; 182 struct dc_info_packet vtem_infopacket; 183 uint8_t dsc_packed_pps[128]; 184 struct rect src; /* composition area */ 185 struct rect dst; /* stream addressable area */ 186 187 struct audio_info audio_info; 188 189 struct dc_info_packet hdr_static_metadata; 190 PHYSICAL_ADDRESS_LOC dmdata_address; 191 bool use_dynamic_meta; 192 193 struct dc_transfer_func *out_transfer_func; 194 struct colorspace_transform gamut_remap_matrix; 195 struct dc_csc_transform csc_color_matrix; 196 197 enum dc_color_space output_color_space; 198 enum dc_dither_option dither_option; 199 200 enum view_3d_format view_format; 201 202 bool use_vsc_sdp_for_colorimetry; 203 bool ignore_msa_timing_param; 204 205 /** 206 * @allow_freesync: 207 * 208 * It say if Freesync is enabled or not. 209 */ 210 bool allow_freesync; 211 212 /** 213 * @vrr_active_variable: 214 * 215 * It describes if VRR is in use. 216 */ 217 bool vrr_active_variable; 218 bool freesync_on_desktop; 219 220 bool converter_disable_audio; 221 uint8_t qs_bit; 222 uint8_t qy_bit; 223 224 /* TODO: custom INFO packets */ 225 /* TODO: ABM info (DMCU) */ 226 /* TODO: CEA VIC */ 227 228 /* DMCU info */ 229 unsigned int abm_level; 230 231 struct periodic_interrupt_config periodic_interrupt; 232 233 /* from core_stream struct */ 234 struct dc_context *ctx; 235 236 /* used by DCP and FMT */ 237 struct bit_depth_reduction_params bit_depth_params; 238 struct clamping_and_pixel_encoding_params clamping; 239 240 int phy_pix_clk; 241 enum amd_signal_type signal; 242 bool dpms_off; 243 244 void *dm_stream_context; 245 246 struct dc_cursor_attributes cursor_attributes; 247 struct dc_cursor_position cursor_position; 248 uint32_t sdr_white_level; // for boosting (SDR) cursor in HDR mode 249 250 /* from stream struct */ 251 struct kref refcount; 252 253 struct crtc_trigger_info triggered_crtc_reset; 254 255 /* writeback */ 256 unsigned int num_wb_info; 257 struct dc_writeback_info writeback_info[MAX_DWB_PIPES]; 258 const struct dc_transfer_func *func_shaper; 259 const struct dc_3dlut *lut3d_func; 260 /* Computed state bits */ 261 bool mode_changed : 1; 262 263 /* Output from DC when stream state is committed or altered 264 * DC may only access these values during: 265 * dc_commit_state, dc_commit_state_no_check, dc_commit_streams 266 * values may not change outside of those calls 267 */ 268 struct { 269 // For interrupt management, some hardware instance 270 // offsets need to be exposed to DM 271 uint8_t otg_offset; 272 } out; 273 274 bool apply_edp_fast_boot_optimization; 275 bool apply_seamless_boot_optimization; 276 uint32_t apply_boot_odm_mode; 277 278 uint32_t stream_id; 279 280 struct test_pattern test_pattern; 281 union stream_update_flags update_flags; 282 283 bool has_non_synchronizable_pclk; 284 bool vblank_synchronized; 285 struct mall_stream_config mall_stream_config; 286 }; 287 288 #define ABM_LEVEL_IMMEDIATE_DISABLE 255 289 290 struct dc_stream_update { 291 struct dc_stream_state *stream; 292 293 struct rect src; 294 struct rect dst; 295 struct dc_transfer_func *out_transfer_func; 296 struct dc_info_packet *hdr_static_metadata; 297 unsigned int *abm_level; 298 299 struct periodic_interrupt_config *periodic_interrupt; 300 301 struct dc_info_packet *vrr_infopacket; 302 struct dc_info_packet *vsc_infopacket; 303 struct dc_info_packet *vsp_infopacket; 304 struct dc_info_packet *hfvsif_infopacket; 305 struct dc_info_packet *vtem_infopacket; 306 bool *dpms_off; 307 bool integer_scaling_update; 308 bool *allow_freesync; 309 bool *vrr_active_variable; 310 311 struct colorspace_transform *gamut_remap; 312 enum dc_color_space *output_color_space; 313 enum dc_dither_option *dither_option; 314 315 struct dc_csc_transform *output_csc_transform; 316 317 struct dc_writeback_update *wb_update; 318 struct dc_dsc_config *dsc_config; 319 struct dc_mst_stream_bw_update *mst_bw_update; 320 struct dc_transfer_func *func_shaper; 321 struct dc_3dlut *lut3d_func; 322 323 struct test_pattern *pending_test_pattern; 324 struct dc_crtc_timing_adjust *crtc_timing_adjust; 325 }; 326 327 bool dc_is_stream_unchanged( 328 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 329 bool dc_is_stream_scaling_unchanged( 330 struct dc_stream_state *old_stream, struct dc_stream_state *stream); 331 332 /* 333 * Setup stream attributes if no stream updates are provided 334 * there will be no impact on the stream parameters 335 * 336 * Set up surface attributes and associate to a stream 337 * The surfaces parameter is an absolute set of all surface active for the stream. 338 * If no surfaces are provided, the stream will be blanked; no memory read. 339 * Any flip related attribute changes must be done through this interface. 340 * 341 * After this call: 342 * Surfaces attributes are programmed and configured to be composed into stream. 343 * This does not trigger a flip. No surface address is programmed. 344 * 345 */ 346 bool dc_update_planes_and_stream(struct dc *dc, 347 struct dc_surface_update *surface_updates, int surface_count, 348 struct dc_stream_state *dc_stream, 349 struct dc_stream_update *stream_update); 350 351 /* 352 * Set up surface attributes and associate to a stream 353 * The surfaces parameter is an absolute set of all surface active for the stream. 354 * If no surfaces are provided, the stream will be blanked; no memory read. 355 * Any flip related attribute changes must be done through this interface. 356 * 357 * After this call: 358 * Surfaces attributes are programmed and configured to be composed into stream. 359 * This does not trigger a flip. No surface address is programmed. 360 */ 361 void dc_commit_updates_for_stream(struct dc *dc, 362 struct dc_surface_update *srf_updates, 363 int surface_count, 364 struct dc_stream_state *stream, 365 struct dc_stream_update *stream_update, 366 struct dc_state *state); 367 /* 368 * Log the current stream state. 369 */ 370 void dc_stream_log(const struct dc *dc, const struct dc_stream_state *stream); 371 372 uint8_t dc_get_current_stream_count(struct dc *dc); 373 struct dc_stream_state *dc_get_stream_at_index(struct dc *dc, uint8_t i); 374 375 /* 376 * Return the current frame counter. 377 */ 378 uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream); 379 380 /* 381 * Send dp sdp message. 382 */ 383 bool dc_stream_send_dp_sdp(const struct dc_stream_state *stream, 384 const uint8_t *custom_sdp_message, 385 unsigned int sdp_message_size); 386 387 /* TODO: Return parsed values rather than direct register read 388 * This has a dependency on the caller (amdgpu_display_get_crtc_scanoutpos) 389 * being refactored properly to be dce-specific 390 */ 391 bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream, 392 uint32_t *v_blank_start, 393 uint32_t *v_blank_end, 394 uint32_t *h_position, 395 uint32_t *v_position); 396 397 enum dc_status dc_add_stream_to_ctx( 398 struct dc *dc, 399 struct dc_state *new_ctx, 400 struct dc_stream_state *stream); 401 402 enum dc_status dc_remove_stream_from_ctx( 403 struct dc *dc, 404 struct dc_state *new_ctx, 405 struct dc_stream_state *stream); 406 407 408 bool dc_add_plane_to_context( 409 const struct dc *dc, 410 struct dc_stream_state *stream, 411 struct dc_plane_state *plane_state, 412 struct dc_state *context); 413 414 bool dc_remove_plane_from_context( 415 const struct dc *dc, 416 struct dc_stream_state *stream, 417 struct dc_plane_state *plane_state, 418 struct dc_state *context); 419 420 bool dc_rem_all_planes_for_stream( 421 const struct dc *dc, 422 struct dc_stream_state *stream, 423 struct dc_state *context); 424 425 bool dc_add_all_planes_for_stream( 426 const struct dc *dc, 427 struct dc_stream_state *stream, 428 struct dc_plane_state * const *plane_states, 429 int plane_count, 430 struct dc_state *context); 431 432 bool dc_stream_add_writeback(struct dc *dc, 433 struct dc_stream_state *stream, 434 struct dc_writeback_info *wb_info); 435 436 bool dc_stream_remove_writeback(struct dc *dc, 437 struct dc_stream_state *stream, 438 uint32_t dwb_pipe_inst); 439 440 enum dc_status dc_stream_add_dsc_to_resource(struct dc *dc, 441 struct dc_state *state, 442 struct dc_stream_state *stream); 443 444 bool dc_stream_warmup_writeback(struct dc *dc, 445 int num_dwb, 446 struct dc_writeback_info *wb_info); 447 448 bool dc_stream_dmdata_status_done(struct dc *dc, struct dc_stream_state *stream); 449 450 bool dc_stream_set_dynamic_metadata(struct dc *dc, 451 struct dc_stream_state *stream, 452 struct dc_dmdata_attributes *dmdata_attr); 453 454 enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream); 455 456 /* 457 * Set up streams and links associated to drive sinks 458 * The streams parameter is an absolute set of all active streams. 459 * 460 * After this call: 461 * Phy, Encoder, Timing Generator are programmed and enabled. 462 * New streams are enabled with blank stream; no memory read. 463 */ 464 /* 465 * Enable stereo when commit_streams is not required, 466 * for example, frame alternate. 467 */ 468 void dc_enable_stereo( 469 struct dc *dc, 470 struct dc_state *context, 471 struct dc_stream_state *streams[], 472 uint8_t stream_count); 473 474 /* Triggers multi-stream synchronization. */ 475 void dc_trigger_sync(struct dc *dc, struct dc_state *context); 476 477 enum surface_update_type dc_check_update_surfaces_for_stream( 478 struct dc *dc, 479 struct dc_surface_update *updates, 480 int surface_count, 481 struct dc_stream_update *stream_update, 482 const struct dc_stream_status *stream_status); 483 484 /** 485 * Create a new default stream for the requested sink 486 */ 487 struct dc_stream_state *dc_create_stream_for_sink(struct dc_sink *dc_sink); 488 489 struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream); 490 491 void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink); 492 493 void dc_stream_retain(struct dc_stream_state *dc_stream); 494 void dc_stream_release(struct dc_stream_state *dc_stream); 495 496 struct dc_stream_status *dc_stream_get_status_from_state( 497 struct dc_state *state, 498 struct dc_stream_state *stream); 499 struct dc_stream_status *dc_stream_get_status( 500 struct dc_stream_state *dc_stream); 501 502 #ifndef TRIM_FSFT 503 bool dc_optimize_timing_for_fsft( 504 struct dc_stream_state *pStream, 505 unsigned int max_input_rate_in_khz); 506 #endif 507 508 /******************************************************************************* 509 * Cursor interfaces - To manages the cursor within a stream 510 ******************************************************************************/ 511 /* TODO: Deprecated once we switch to dc_set_cursor_position */ 512 bool dc_stream_set_cursor_attributes( 513 struct dc_stream_state *stream, 514 const struct dc_cursor_attributes *attributes); 515 516 bool dc_stream_set_cursor_position( 517 struct dc_stream_state *stream, 518 const struct dc_cursor_position *position); 519 520 521 bool dc_stream_adjust_vmin_vmax(struct dc *dc, 522 struct dc_stream_state *stream, 523 struct dc_crtc_timing_adjust *adjust); 524 525 bool dc_stream_get_last_used_drr_vtotal(struct dc *dc, 526 struct dc_stream_state *stream, 527 uint32_t *refresh_rate); 528 529 bool dc_stream_get_crtc_position(struct dc *dc, 530 struct dc_stream_state **stream, 531 int num_streams, 532 unsigned int *v_pos, 533 unsigned int *nom_v_pos); 534 535 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY) 536 bool dc_stream_forward_dmcu_crc_window(struct dc *dc, struct dc_stream_state *stream, 537 struct crc_params *crc_window); 538 bool dc_stream_stop_dmcu_crc_win_update(struct dc *dc, 539 struct dc_stream_state *stream); 540 #endif 541 542 bool dc_stream_configure_crc(struct dc *dc, 543 struct dc_stream_state *stream, 544 struct crc_params *crc_window, 545 bool enable, 546 bool continuous); 547 548 bool dc_stream_get_crc(struct dc *dc, 549 struct dc_stream_state *stream, 550 uint32_t *r_cr, 551 uint32_t *g_y, 552 uint32_t *b_cb); 553 554 void dc_stream_set_static_screen_params(struct dc *dc, 555 struct dc_stream_state **stream, 556 int num_streams, 557 const struct dc_static_screen_params *params); 558 559 void dc_stream_set_dyn_expansion(struct dc *dc, struct dc_stream_state *stream, 560 enum dc_dynamic_expansion option); 561 562 void dc_stream_set_dither_option(struct dc_stream_state *stream, 563 enum dc_dither_option option); 564 565 bool dc_stream_set_gamut_remap(struct dc *dc, 566 const struct dc_stream_state *stream); 567 568 bool dc_stream_program_csc_matrix(struct dc *dc, 569 struct dc_stream_state *stream); 570 571 bool dc_stream_get_crtc_position(struct dc *dc, 572 struct dc_stream_state **stream, 573 int num_streams, 574 unsigned int *v_pos, 575 unsigned int *nom_v_pos); 576 577 struct pipe_ctx *dc_stream_get_pipe_ctx(struct dc_stream_state *stream); 578 579 void dc_dmub_update_dirty_rect(struct dc *dc, 580 int surface_count, 581 struct dc_stream_state *stream, 582 struct dc_surface_update *srf_updates, 583 struct dc_state *context); 584 #endif /* DC_STREAM_H_ */ 585