11bb76ff1Sjsg /*
21bb76ff1Sjsg  * Copyright 2016 Advanced Micro Devices, Inc.
31bb76ff1Sjsg  *
41bb76ff1Sjsg  * Permission is hereby granted, free of charge, to any person obtaining a
51bb76ff1Sjsg  * copy of this software and associated documentation files (the "Software"),
61bb76ff1Sjsg  * to deal in the Software without restriction, including without limitation
71bb76ff1Sjsg  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
81bb76ff1Sjsg  * and/or sell copies of the Software, and to permit persons to whom the
91bb76ff1Sjsg  * Software is furnished to do so, subject to the following conditions:
101bb76ff1Sjsg  *
111bb76ff1Sjsg  * The above copyright notice and this permission notice shall be included in
121bb76ff1Sjsg  * all copies or substantial portions of the Software.
131bb76ff1Sjsg  *
141bb76ff1Sjsg  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
151bb76ff1Sjsg  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
161bb76ff1Sjsg  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
171bb76ff1Sjsg  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
181bb76ff1Sjsg  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
191bb76ff1Sjsg  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
201bb76ff1Sjsg  * OTHER DEALINGS IN THE SOFTWARE.
211bb76ff1Sjsg  *
221bb76ff1Sjsg  * Authors: AMD
231bb76ff1Sjsg  *
241bb76ff1Sjsg  */
251bb76ff1Sjsg 
261bb76ff1Sjsg #include "dce110/dce110_hw_sequencer.h"
271bb76ff1Sjsg #include "dcn10/dcn10_hw_sequencer.h"
281bb76ff1Sjsg #include "dcn20/dcn20_hwseq.h"
291bb76ff1Sjsg #include "dcn201_hwseq.h"
301bb76ff1Sjsg #include "dcn201_init.h"
311bb76ff1Sjsg 
321bb76ff1Sjsg static const struct hw_sequencer_funcs dcn201_funcs = {
331bb76ff1Sjsg 	.program_gamut_remap = dcn10_program_gamut_remap,
341bb76ff1Sjsg 	.init_hw = dcn201_init_hw,
351bb76ff1Sjsg 	.power_down_on_boot = NULL,
361bb76ff1Sjsg 	.apply_ctx_to_hw = dce110_apply_ctx_to_hw,
371bb76ff1Sjsg 	.apply_ctx_for_surface = NULL,
381bb76ff1Sjsg 	.program_front_end_for_ctx = dcn20_program_front_end_for_ctx,
391bb76ff1Sjsg 	.wait_for_pending_cleared = dcn10_wait_for_pending_cleared,
401bb76ff1Sjsg 	.post_unlock_program_front_end = dcn10_post_unlock_program_front_end,
411bb76ff1Sjsg 	.update_plane_addr = dcn201_update_plane_addr,
421bb76ff1Sjsg 	.update_dchub = dcn10_update_dchub,
431bb76ff1Sjsg 	.update_pending_status = dcn10_update_pending_status,
441bb76ff1Sjsg 	.program_output_csc = dcn20_program_output_csc,
451bb76ff1Sjsg 	.enable_accelerated_mode = dce110_enable_accelerated_mode,
461bb76ff1Sjsg 	.enable_timing_synchronization = dcn10_enable_timing_synchronization,
471bb76ff1Sjsg 	.enable_per_frame_crtc_position_reset = dcn10_enable_per_frame_crtc_position_reset,
481bb76ff1Sjsg 	.update_info_frame = dce110_update_info_frame,
491bb76ff1Sjsg 	.send_immediate_sdp_message = dcn10_send_immediate_sdp_message,
501bb76ff1Sjsg 	.enable_stream = dce110_enable_stream,
511bb76ff1Sjsg 	.disable_stream = dce110_disable_stream,
521bb76ff1Sjsg 	.unblank_stream = dcn201_unblank_stream,
531bb76ff1Sjsg 	.blank_stream = dce110_blank_stream,
541bb76ff1Sjsg 	.enable_audio_stream = dce110_enable_audio_stream,
551bb76ff1Sjsg 	.disable_audio_stream = dce110_disable_audio_stream,
561bb76ff1Sjsg 	.disable_plane = dcn10_disable_plane,
571bb76ff1Sjsg 	.pipe_control_lock = dcn201_pipe_control_lock,
581bb76ff1Sjsg 	.interdependent_update_lock = dcn10_lock_all_pipes,
591bb76ff1Sjsg 	.cursor_lock = dcn10_cursor_lock,
601bb76ff1Sjsg 	.prepare_bandwidth = dcn20_prepare_bandwidth,
611bb76ff1Sjsg 	.optimize_bandwidth = dcn20_optimize_bandwidth,
621bb76ff1Sjsg 	.update_bandwidth = dcn20_update_bandwidth,
631bb76ff1Sjsg 	.set_drr = dcn10_set_drr,
641bb76ff1Sjsg 	.get_position = dcn10_get_position,
651bb76ff1Sjsg 	.set_static_screen_control = dcn10_set_static_screen_control,
661bb76ff1Sjsg 	.setup_stereo = dcn10_setup_stereo,
671bb76ff1Sjsg 	.set_avmute = dce110_set_avmute,
681bb76ff1Sjsg 	.log_hw_state = dcn10_log_hw_state,
691bb76ff1Sjsg 	.get_hw_state = dcn10_get_hw_state,
701bb76ff1Sjsg 	.clear_status_bits = dcn10_clear_status_bits,
711bb76ff1Sjsg 	.wait_for_mpcc_disconnect = dcn10_wait_for_mpcc_disconnect,
721bb76ff1Sjsg 	.edp_backlight_control = dce110_edp_backlight_control,
731bb76ff1Sjsg 	.edp_power_control = dce110_edp_power_control,
741bb76ff1Sjsg 	.edp_wait_for_hpd_ready = dce110_edp_wait_for_hpd_ready,
751bb76ff1Sjsg 	.setup_periodic_interrupt = dcn10_setup_periodic_interrupt,
761bb76ff1Sjsg 	.set_clock = dcn10_set_clock,
771bb76ff1Sjsg 	.get_clock = dcn10_get_clock,
781bb76ff1Sjsg 	.program_triplebuffer = dcn20_program_triple_buffer,
791bb76ff1Sjsg 	.dmdata_status_done = dcn20_dmdata_status_done,
801bb76ff1Sjsg 	.set_dmdata_attributes = dcn201_set_dmdata_attributes,
811bb76ff1Sjsg 	.get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
821bb76ff1Sjsg 	.calc_vupdate_position = dcn10_calc_vupdate_position,
831bb76ff1Sjsg 	.set_cursor_position = dcn10_set_cursor_position,
841bb76ff1Sjsg 	.set_cursor_attribute = dcn201_set_cursor_attribute,
851bb76ff1Sjsg 	.set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,
861bb76ff1Sjsg 	.set_backlight_level = dce110_set_backlight_level,
871bb76ff1Sjsg 	.set_abm_immediate_disable = dce110_set_abm_immediate_disable,
881bb76ff1Sjsg 	.set_pipe = dce110_set_pipe,
891bb76ff1Sjsg 	.enable_lvds_link_output = dce110_enable_lvds_link_output,
901bb76ff1Sjsg 	.enable_tmds_link_output = dce110_enable_tmds_link_output,
911bb76ff1Sjsg 	.enable_dp_link_output = dce110_enable_dp_link_output,
921bb76ff1Sjsg 	.disable_link_output = dce110_disable_link_output,
931bb76ff1Sjsg 	.set_disp_pattern_generator = dcn20_set_disp_pattern_generator,
94*f005ef32Sjsg 	.update_visual_confirm_color = dcn10_update_visual_confirm_color,
951bb76ff1Sjsg };
961bb76ff1Sjsg 
971bb76ff1Sjsg static const struct hwseq_private_funcs dcn201_private_funcs = {
981bb76ff1Sjsg 	.init_pipes = NULL,
991bb76ff1Sjsg 	.update_plane_addr = dcn201_update_plane_addr,
1001bb76ff1Sjsg 	.plane_atomic_disconnect = dcn201_plane_atomic_disconnect,
1011bb76ff1Sjsg 	.program_pipe = dcn10_program_pipe,
1021bb76ff1Sjsg 	.update_mpcc = dcn201_update_mpcc,
1031bb76ff1Sjsg 	.set_input_transfer_func = dcn20_set_input_transfer_func,
1041bb76ff1Sjsg 	.set_output_transfer_func = dcn20_set_output_transfer_func,
1051bb76ff1Sjsg 	.power_down = dce110_power_down,
1061bb76ff1Sjsg 	.enable_display_power_gating = dcn10_dummy_display_power_gating,
1071bb76ff1Sjsg 	.blank_pixel_data = dcn20_blank_pixel_data,
1081bb76ff1Sjsg 	.reset_hw_ctx_wrap = dcn10_reset_hw_ctx_wrap,
1091bb76ff1Sjsg 	.enable_stream_timing = dcn20_enable_stream_timing,
1101bb76ff1Sjsg 	.edp_backlight_control = dce110_edp_backlight_control,
1111bb76ff1Sjsg 	.disable_stream_gating = NULL,
1121bb76ff1Sjsg 	.enable_stream_gating = NULL,
1131bb76ff1Sjsg 	.setup_vupdate_interrupt = dcn20_setup_vupdate_interrupt,
1141bb76ff1Sjsg 	.did_underflow_occur = dcn10_did_underflow_occur,
1151bb76ff1Sjsg 	.init_blank = dcn201_init_blank,
1161bb76ff1Sjsg 	.disable_vga = dcn10_disable_vga,
1171bb76ff1Sjsg 	.bios_golden_init = dcn10_bios_golden_init,
1181bb76ff1Sjsg 	.plane_atomic_disable = dcn10_plane_atomic_disable,
1191bb76ff1Sjsg 	.plane_atomic_power_down = dcn10_plane_atomic_power_down,
1201bb76ff1Sjsg 	.enable_power_gating_plane = dcn10_enable_power_gating_plane,
1211bb76ff1Sjsg 	.dpp_pg_control = dcn10_dpp_pg_control,
1221bb76ff1Sjsg 	.hubp_pg_control = dcn10_hubp_pg_control,
1231bb76ff1Sjsg 	.dsc_pg_control = NULL,
1241bb76ff1Sjsg 	.set_hdr_multiplier = dcn10_set_hdr_multiplier,
1251bb76ff1Sjsg 	.verify_allow_pstate_change_high = dcn10_verify_allow_pstate_change_high,
1261bb76ff1Sjsg 	.wait_for_blank_complete = dcn20_wait_for_blank_complete,
1271bb76ff1Sjsg 	.dccg_init = dcn20_dccg_init,
1281bb76ff1Sjsg 	.set_blend_lut = dcn20_set_blend_lut,
1291bb76ff1Sjsg 	.set_shaper_3dlut = dcn20_set_shaper_3dlut,
1301bb76ff1Sjsg };
1311bb76ff1Sjsg 
dcn201_hw_sequencer_construct(struct dc * dc)1321bb76ff1Sjsg void dcn201_hw_sequencer_construct(struct dc *dc)
1331bb76ff1Sjsg {
1341bb76ff1Sjsg 	dc->hwss = dcn201_funcs;
1351bb76ff1Sjsg 	dc->hwseq->funcs = dcn201_private_funcs;
1361bb76ff1Sjsg }
137