1c349dbc7Sjsg /*
25ca02815Sjsg  * Copyright 2016-2020 Advanced Micro Devices, Inc.
3c349dbc7Sjsg  *
4c349dbc7Sjsg  * Permission is hereby granted, free of charge, to any person obtaining a
5c349dbc7Sjsg  * copy of this software and associated documentation files (the "Software"),
6c349dbc7Sjsg  * to deal in the Software without restriction, including without limitation
7c349dbc7Sjsg  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8c349dbc7Sjsg  * and/or sell copies of the Software, and to permit persons to whom the
9c349dbc7Sjsg  * Software is furnished to do so, subject to the following conditions:
10c349dbc7Sjsg  *
11c349dbc7Sjsg  * The above copyright notice and this permission notice shall be included in
12c349dbc7Sjsg  * all copies or substantial portions of the Software.
13c349dbc7Sjsg  *
14c349dbc7Sjsg  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15c349dbc7Sjsg  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16c349dbc7Sjsg  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17c349dbc7Sjsg  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18c349dbc7Sjsg  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19c349dbc7Sjsg  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20c349dbc7Sjsg  * OTHER DEALINGS IN THE SOFTWARE.
21c349dbc7Sjsg  *
22c349dbc7Sjsg  * Authors: AMD
23c349dbc7Sjsg  *
24c349dbc7Sjsg  */
25c349dbc7Sjsg 
26c349dbc7Sjsg #include "dce110/dce110_hw_sequencer.h"
27c349dbc7Sjsg #include "dcn10/dcn10_hw_sequencer.h"
28c349dbc7Sjsg #include "dcn20/dcn20_hwseq.h"
29c349dbc7Sjsg #include "dcn21_hwseq.h"
30c349dbc7Sjsg 
311bb76ff1Sjsg #include "dcn21_init.h"
321bb76ff1Sjsg 
33c349dbc7Sjsg static const struct hw_sequencer_funcs dcn21_funcs = {
34c349dbc7Sjsg 	.program_gamut_remap = dcn10_program_gamut_remap,
35c349dbc7Sjsg 	.init_hw = dcn10_init_hw,
36ad8b1aafSjsg 	.power_down_on_boot = dcn10_power_down_on_boot,
37c349dbc7Sjsg 	.apply_ctx_to_hw = dce110_apply_ctx_to_hw,
38c349dbc7Sjsg 	.apply_ctx_for_surface = NULL,
39c349dbc7Sjsg 	.program_front_end_for_ctx = dcn20_program_front_end_for_ctx,
40ad8b1aafSjsg 	.wait_for_pending_cleared = dcn10_wait_for_pending_cleared,
41c349dbc7Sjsg 	.post_unlock_program_front_end = dcn20_post_unlock_program_front_end,
42c349dbc7Sjsg 	.update_plane_addr = dcn20_update_plane_addr,
43c349dbc7Sjsg 	.update_dchub = dcn10_update_dchub,
44c349dbc7Sjsg 	.update_pending_status = dcn10_update_pending_status,
45c349dbc7Sjsg 	.program_output_csc = dcn20_program_output_csc,
46c349dbc7Sjsg 	.enable_accelerated_mode = dce110_enable_accelerated_mode,
47c349dbc7Sjsg 	.enable_timing_synchronization = dcn10_enable_timing_synchronization,
48c349dbc7Sjsg 	.enable_per_frame_crtc_position_reset = dcn10_enable_per_frame_crtc_position_reset,
49c349dbc7Sjsg 	.update_info_frame = dce110_update_info_frame,
50c349dbc7Sjsg 	.send_immediate_sdp_message = dcn10_send_immediate_sdp_message,
51c349dbc7Sjsg 	.enable_stream = dcn20_enable_stream,
52c349dbc7Sjsg 	.disable_stream = dce110_disable_stream,
53c349dbc7Sjsg 	.unblank_stream = dcn20_unblank_stream,
54c349dbc7Sjsg 	.blank_stream = dce110_blank_stream,
55c349dbc7Sjsg 	.enable_audio_stream = dce110_enable_audio_stream,
56c349dbc7Sjsg 	.disable_audio_stream = dce110_disable_audio_stream,
57c349dbc7Sjsg 	.disable_plane = dcn20_disable_plane,
58c349dbc7Sjsg 	.pipe_control_lock = dcn20_pipe_control_lock,
59c349dbc7Sjsg 	.interdependent_update_lock = dcn10_lock_all_pipes,
60c349dbc7Sjsg 	.cursor_lock = dcn10_cursor_lock,
61c349dbc7Sjsg 	.prepare_bandwidth = dcn20_prepare_bandwidth,
62c349dbc7Sjsg 	.optimize_bandwidth = dcn20_optimize_bandwidth,
63c349dbc7Sjsg 	.update_bandwidth = dcn20_update_bandwidth,
64c349dbc7Sjsg 	.set_drr = dcn10_set_drr,
65c349dbc7Sjsg 	.get_position = dcn10_get_position,
66c349dbc7Sjsg 	.set_static_screen_control = dcn10_set_static_screen_control,
67c349dbc7Sjsg 	.setup_stereo = dcn10_setup_stereo,
68c349dbc7Sjsg 	.set_avmute = dce110_set_avmute,
69c349dbc7Sjsg 	.log_hw_state = dcn10_log_hw_state,
70c349dbc7Sjsg 	.get_hw_state = dcn10_get_hw_state,
71c349dbc7Sjsg 	.clear_status_bits = dcn10_clear_status_bits,
72c349dbc7Sjsg 	.wait_for_mpcc_disconnect = dcn10_wait_for_mpcc_disconnect,
73ad8b1aafSjsg 	.edp_backlight_control = dce110_edp_backlight_control,
74c349dbc7Sjsg 	.edp_power_control = dce110_edp_power_control,
75c349dbc7Sjsg 	.edp_wait_for_hpd_ready = dce110_edp_wait_for_hpd_ready,
76c349dbc7Sjsg 	.set_cursor_position = dcn10_set_cursor_position,
77c349dbc7Sjsg 	.set_cursor_attribute = dcn10_set_cursor_attribute,
78c349dbc7Sjsg 	.set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,
79c349dbc7Sjsg 	.setup_periodic_interrupt = dcn10_setup_periodic_interrupt,
80c349dbc7Sjsg 	.set_clock = dcn10_set_clock,
81c349dbc7Sjsg 	.get_clock = dcn10_get_clock,
82c349dbc7Sjsg 	.program_triplebuffer = dcn20_program_triple_buffer,
83c349dbc7Sjsg 	.enable_writeback = dcn20_enable_writeback,
84c349dbc7Sjsg 	.disable_writeback = dcn20_disable_writeback,
85c349dbc7Sjsg 	.dmdata_status_done = dcn20_dmdata_status_done,
86c349dbc7Sjsg 	.program_dmdata_engine = dcn20_program_dmdata_engine,
87c349dbc7Sjsg 	.set_dmdata_attributes = dcn20_set_dmdata_attributes,
88c349dbc7Sjsg 	.init_sys_ctx = dcn21_init_sys_ctx,
89c349dbc7Sjsg 	.init_vm_ctx = dcn20_init_vm_ctx,
90c349dbc7Sjsg 	.set_flip_control_gsl = dcn20_set_flip_control_gsl,
91c349dbc7Sjsg 	.optimize_pwr_state = dcn21_optimize_pwr_state,
92c349dbc7Sjsg 	.exit_optimized_pwr_state = dcn21_exit_optimized_pwr_state,
93c349dbc7Sjsg 	.get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
94c349dbc7Sjsg 	.calc_vupdate_position = dcn10_calc_vupdate_position,
95ad8b1aafSjsg 	.power_down = dce110_power_down,
96ad8b1aafSjsg 	.set_backlight_level = dcn21_set_backlight_level,
97ad8b1aafSjsg 	.set_abm_immediate_disable = dcn21_set_abm_immediate_disable,
98ad8b1aafSjsg 	.set_pipe = dcn21_set_pipe,
99ad8b1aafSjsg #ifndef TRIM_FSFT
100ad8b1aafSjsg 	.optimize_timing_for_fsft = dcn20_optimize_timing_for_fsft,
101ad8b1aafSjsg #endif
1021bb76ff1Sjsg 	.enable_lvds_link_output = dce110_enable_lvds_link_output,
1031bb76ff1Sjsg 	.enable_tmds_link_output = dce110_enable_tmds_link_output,
1041bb76ff1Sjsg 	.enable_dp_link_output = dce110_enable_dp_link_output,
1051bb76ff1Sjsg 	.disable_link_output = dce110_disable_link_output,
1065ca02815Sjsg 	.is_abm_supported = dcn21_is_abm_supported,
1075ca02815Sjsg 	.set_disp_pattern_generator = dcn20_set_disp_pattern_generator,
1085ca02815Sjsg 	.get_dcc_en_bits = dcn10_get_dcc_en_bits,
109*f005ef32Sjsg 	.update_visual_confirm_color = dcn10_update_visual_confirm_color,
110c349dbc7Sjsg };
111c349dbc7Sjsg 
112c349dbc7Sjsg static const struct hwseq_private_funcs dcn21_private_funcs = {
113c349dbc7Sjsg 	.init_pipes = dcn10_init_pipes,
114c349dbc7Sjsg 	.update_plane_addr = dcn20_update_plane_addr,
115c349dbc7Sjsg 	.plane_atomic_disconnect = dcn10_plane_atomic_disconnect,
116c349dbc7Sjsg 	.update_mpcc = dcn20_update_mpcc,
117c349dbc7Sjsg 	.set_input_transfer_func = dcn20_set_input_transfer_func,
118c349dbc7Sjsg 	.set_output_transfer_func = dcn20_set_output_transfer_func,
119c349dbc7Sjsg 	.power_down = dce110_power_down,
120c349dbc7Sjsg 	.enable_display_power_gating = dcn10_dummy_display_power_gating,
121c349dbc7Sjsg 	.blank_pixel_data = dcn20_blank_pixel_data,
122c349dbc7Sjsg 	.reset_hw_ctx_wrap = dcn20_reset_hw_ctx_wrap,
123c349dbc7Sjsg 	.enable_stream_timing = dcn20_enable_stream_timing,
124c349dbc7Sjsg 	.edp_backlight_control = dce110_edp_backlight_control,
125c349dbc7Sjsg 	.disable_stream_gating = dcn20_disable_stream_gating,
126c349dbc7Sjsg 	.enable_stream_gating = dcn20_enable_stream_gating,
127c349dbc7Sjsg 	.setup_vupdate_interrupt = dcn20_setup_vupdate_interrupt,
128c349dbc7Sjsg 	.did_underflow_occur = dcn10_did_underflow_occur,
129c349dbc7Sjsg 	.init_blank = dcn20_init_blank,
130c349dbc7Sjsg 	.disable_vga = dcn20_disable_vga,
131c349dbc7Sjsg 	.bios_golden_init = dcn10_bios_golden_init,
132c349dbc7Sjsg 	.plane_atomic_disable = dcn20_plane_atomic_disable,
133c349dbc7Sjsg 	.plane_atomic_power_down = dcn10_plane_atomic_power_down,
134c349dbc7Sjsg 	.enable_power_gating_plane = dcn20_enable_power_gating_plane,
135c349dbc7Sjsg 	.dpp_pg_control = dcn20_dpp_pg_control,
136c349dbc7Sjsg 	.hubp_pg_control = dcn20_hubp_pg_control,
137c349dbc7Sjsg 	.update_odm = dcn20_update_odm,
138c349dbc7Sjsg 	.dsc_pg_control = dcn20_dsc_pg_control,
139c349dbc7Sjsg 	.set_hdr_multiplier = dcn10_set_hdr_multiplier,
140c349dbc7Sjsg 	.verify_allow_pstate_change_high = dcn10_verify_allow_pstate_change_high,
141c349dbc7Sjsg 	.s0i3_golden_init_wa = dcn21_s0i3_golden_init_wa,
142c349dbc7Sjsg 	.wait_for_blank_complete = dcn20_wait_for_blank_complete,
143c349dbc7Sjsg 	.dccg_init = dcn20_dccg_init,
144c349dbc7Sjsg 	.set_blend_lut = dcn20_set_blend_lut,
145c349dbc7Sjsg 	.set_shaper_3dlut = dcn20_set_shaper_3dlut,
146c349dbc7Sjsg 	.PLAT_58856_wa = dcn21_PLAT_58856_wa,
147c349dbc7Sjsg };
148c349dbc7Sjsg 
dcn21_hw_sequencer_construct(struct dc * dc)149c349dbc7Sjsg void dcn21_hw_sequencer_construct(struct dc *dc)
150c349dbc7Sjsg {
151c349dbc7Sjsg 	dc->hwss = dcn21_funcs;
152c349dbc7Sjsg 	dc->hwseq->funcs = dcn21_private_funcs;
153c349dbc7Sjsg 
154c349dbc7Sjsg }
155