11bb76ff1Sjsg // SPDX-License-Identifier: MIT
21bb76ff1Sjsg /*
31bb76ff1Sjsg * Copyright 2022 Advanced Micro Devices, Inc.
41bb76ff1Sjsg *
51bb76ff1Sjsg * Permission is hereby granted, free of charge, to any person obtaining a
61bb76ff1Sjsg * copy of this software and associated documentation files (the "Software"),
71bb76ff1Sjsg * to deal in the Software without restriction, including without limitation
81bb76ff1Sjsg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
91bb76ff1Sjsg * and/or sell copies of the Software, and to permit persons to whom the
101bb76ff1Sjsg * Software is furnished to do so, subject to the following conditions:
111bb76ff1Sjsg *
121bb76ff1Sjsg * The above copyright notice and this permission notice shall be included in
131bb76ff1Sjsg * all copies or substantial portions of the Software.
141bb76ff1Sjsg *
151bb76ff1Sjsg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
161bb76ff1Sjsg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
171bb76ff1Sjsg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
181bb76ff1Sjsg * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
191bb76ff1Sjsg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
201bb76ff1Sjsg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
211bb76ff1Sjsg * OTHER DEALINGS IN THE SOFTWARE.
221bb76ff1Sjsg *
231bb76ff1Sjsg * Authors: AMD
241bb76ff1Sjsg *
251bb76ff1Sjsg */
261bb76ff1Sjsg
271bb76ff1Sjsg #include "dce110/dce110_hw_sequencer.h"
281bb76ff1Sjsg #include "dcn10/dcn10_hw_sequencer.h"
291bb76ff1Sjsg #include "dcn20/dcn20_hwseq.h"
301bb76ff1Sjsg #include "dcn21/dcn21_hwseq.h"
311bb76ff1Sjsg #include "dcn30/dcn30_hwseq.h"
321bb76ff1Sjsg #include "dcn301/dcn301_hwseq.h"
331bb76ff1Sjsg #include "dcn31/dcn31_hwseq.h"
341bb76ff1Sjsg #include "dcn314/dcn314_hwseq.h"
351bb76ff1Sjsg
361bb76ff1Sjsg #include "dcn314_init.h"
371bb76ff1Sjsg
381bb76ff1Sjsg static const struct hw_sequencer_funcs dcn314_funcs = {
391bb76ff1Sjsg .program_gamut_remap = dcn10_program_gamut_remap,
401bb76ff1Sjsg .init_hw = dcn31_init_hw,
411bb76ff1Sjsg .power_down_on_boot = dcn10_power_down_on_boot,
421bb76ff1Sjsg .apply_ctx_to_hw = dce110_apply_ctx_to_hw,
431bb76ff1Sjsg .apply_ctx_for_surface = NULL,
441bb76ff1Sjsg .program_front_end_for_ctx = dcn20_program_front_end_for_ctx,
451bb76ff1Sjsg .wait_for_pending_cleared = dcn10_wait_for_pending_cleared,
461bb76ff1Sjsg .post_unlock_program_front_end = dcn20_post_unlock_program_front_end,
471bb76ff1Sjsg .update_plane_addr = dcn20_update_plane_addr,
481bb76ff1Sjsg .update_dchub = dcn10_update_dchub,
491bb76ff1Sjsg .update_pending_status = dcn10_update_pending_status,
501bb76ff1Sjsg .program_output_csc = dcn20_program_output_csc,
511bb76ff1Sjsg .enable_accelerated_mode = dce110_enable_accelerated_mode,
521bb76ff1Sjsg .enable_timing_synchronization = dcn10_enable_timing_synchronization,
531bb76ff1Sjsg .enable_per_frame_crtc_position_reset = dcn10_enable_per_frame_crtc_position_reset,
541bb76ff1Sjsg .update_info_frame = dcn31_update_info_frame,
551bb76ff1Sjsg .send_immediate_sdp_message = dcn10_send_immediate_sdp_message,
561bb76ff1Sjsg .enable_stream = dcn20_enable_stream,
571bb76ff1Sjsg .disable_stream = dce110_disable_stream,
581bb76ff1Sjsg .unblank_stream = dcn20_unblank_stream,
591bb76ff1Sjsg .blank_stream = dce110_blank_stream,
601bb76ff1Sjsg .enable_audio_stream = dce110_enable_audio_stream,
611bb76ff1Sjsg .disable_audio_stream = dce110_disable_audio_stream,
621bb76ff1Sjsg .disable_plane = dcn20_disable_plane,
63*f005ef32Sjsg .disable_pixel_data = dcn20_disable_pixel_data,
641bb76ff1Sjsg .pipe_control_lock = dcn20_pipe_control_lock,
651bb76ff1Sjsg .interdependent_update_lock = dcn10_lock_all_pipes,
661bb76ff1Sjsg .cursor_lock = dcn10_cursor_lock,
671bb76ff1Sjsg .prepare_bandwidth = dcn20_prepare_bandwidth,
681bb76ff1Sjsg .optimize_bandwidth = dcn20_optimize_bandwidth,
691bb76ff1Sjsg .update_bandwidth = dcn20_update_bandwidth,
701bb76ff1Sjsg .set_drr = dcn10_set_drr,
711bb76ff1Sjsg .get_position = dcn10_get_position,
72*f005ef32Sjsg .set_static_screen_control = dcn30_set_static_screen_control,
731bb76ff1Sjsg .setup_stereo = dcn10_setup_stereo,
741bb76ff1Sjsg .set_avmute = dcn30_set_avmute,
751bb76ff1Sjsg .log_hw_state = dcn10_log_hw_state,
761bb76ff1Sjsg .get_hw_state = dcn10_get_hw_state,
771bb76ff1Sjsg .clear_status_bits = dcn10_clear_status_bits,
781bb76ff1Sjsg .wait_for_mpcc_disconnect = dcn10_wait_for_mpcc_disconnect,
791bb76ff1Sjsg .edp_backlight_control = dce110_edp_backlight_control,
801bb76ff1Sjsg .edp_power_control = dce110_edp_power_control,
811bb76ff1Sjsg .edp_wait_for_T12 = dce110_edp_wait_for_T12,
821bb76ff1Sjsg .edp_wait_for_hpd_ready = dce110_edp_wait_for_hpd_ready,
831bb76ff1Sjsg .set_cursor_position = dcn10_set_cursor_position,
841bb76ff1Sjsg .set_cursor_attribute = dcn10_set_cursor_attribute,
851bb76ff1Sjsg .set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level,
861bb76ff1Sjsg .setup_periodic_interrupt = dcn10_setup_periodic_interrupt,
871bb76ff1Sjsg .set_clock = dcn10_set_clock,
881bb76ff1Sjsg .get_clock = dcn10_get_clock,
891bb76ff1Sjsg .program_triplebuffer = dcn20_program_triple_buffer,
901bb76ff1Sjsg .enable_writeback = dcn30_enable_writeback,
911bb76ff1Sjsg .disable_writeback = dcn30_disable_writeback,
921bb76ff1Sjsg .update_writeback = dcn30_update_writeback,
931bb76ff1Sjsg .mmhubbub_warmup = dcn30_mmhubbub_warmup,
941bb76ff1Sjsg .dmdata_status_done = dcn20_dmdata_status_done,
951bb76ff1Sjsg .program_dmdata_engine = dcn30_program_dmdata_engine,
961bb76ff1Sjsg .set_dmdata_attributes = dcn20_set_dmdata_attributes,
971bb76ff1Sjsg .init_sys_ctx = dcn31_init_sys_ctx,
981bb76ff1Sjsg .init_vm_ctx = dcn20_init_vm_ctx,
991bb76ff1Sjsg .set_flip_control_gsl = dcn20_set_flip_control_gsl,
1001bb76ff1Sjsg .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync,
1011bb76ff1Sjsg .calc_vupdate_position = dcn10_calc_vupdate_position,
1021bb76ff1Sjsg .power_down = dce110_power_down,
1031bb76ff1Sjsg .set_backlight_level = dcn21_set_backlight_level,
1041bb76ff1Sjsg .set_abm_immediate_disable = dcn21_set_abm_immediate_disable,
1051bb76ff1Sjsg .set_pipe = dcn21_set_pipe,
1061bb76ff1Sjsg .enable_lvds_link_output = dce110_enable_lvds_link_output,
1071bb76ff1Sjsg .enable_tmds_link_output = dce110_enable_tmds_link_output,
1081bb76ff1Sjsg .enable_dp_link_output = dce110_enable_dp_link_output,
109*f005ef32Sjsg .disable_link_output = dcn314_disable_link_output,
1101bb76ff1Sjsg .z10_restore = dcn31_z10_restore,
1111bb76ff1Sjsg .z10_save_init = dcn31_z10_save_init,
1121bb76ff1Sjsg .set_disp_pattern_generator = dcn30_set_disp_pattern_generator,
1131bb76ff1Sjsg .optimize_pwr_state = dcn21_optimize_pwr_state,
1141bb76ff1Sjsg .exit_optimized_pwr_state = dcn21_exit_optimized_pwr_state,
115*f005ef32Sjsg .update_visual_confirm_color = dcn10_update_visual_confirm_color,
1161bb76ff1Sjsg };
1171bb76ff1Sjsg
1181bb76ff1Sjsg static const struct hwseq_private_funcs dcn314_private_funcs = {
1191bb76ff1Sjsg .init_pipes = dcn10_init_pipes,
1201bb76ff1Sjsg .update_plane_addr = dcn20_update_plane_addr,
1211bb76ff1Sjsg .plane_atomic_disconnect = dcn10_plane_atomic_disconnect,
1221bb76ff1Sjsg .update_mpcc = dcn20_update_mpcc,
1231bb76ff1Sjsg .set_input_transfer_func = dcn30_set_input_transfer_func,
1241bb76ff1Sjsg .set_output_transfer_func = dcn30_set_output_transfer_func,
1251bb76ff1Sjsg .power_down = dce110_power_down,
1261bb76ff1Sjsg .enable_display_power_gating = dcn10_dummy_display_power_gating,
1271bb76ff1Sjsg .blank_pixel_data = dcn20_blank_pixel_data,
1281bb76ff1Sjsg .reset_hw_ctx_wrap = dcn31_reset_hw_ctx_wrap,
1291bb76ff1Sjsg .enable_stream_timing = dcn20_enable_stream_timing,
1301bb76ff1Sjsg .edp_backlight_control = dce110_edp_backlight_control,
1311bb76ff1Sjsg .disable_stream_gating = dcn20_disable_stream_gating,
1321bb76ff1Sjsg .enable_stream_gating = dcn20_enable_stream_gating,
1331bb76ff1Sjsg .setup_vupdate_interrupt = dcn20_setup_vupdate_interrupt,
1341bb76ff1Sjsg .did_underflow_occur = dcn10_did_underflow_occur,
1351bb76ff1Sjsg .init_blank = dcn20_init_blank,
1361bb76ff1Sjsg .disable_vga = dcn20_disable_vga,
1371bb76ff1Sjsg .bios_golden_init = dcn10_bios_golden_init,
1381bb76ff1Sjsg .plane_atomic_disable = dcn20_plane_atomic_disable,
1391bb76ff1Sjsg .plane_atomic_power_down = dcn10_plane_atomic_power_down,
1401bb76ff1Sjsg .enable_power_gating_plane = dcn314_enable_power_gating_plane,
1411bb36c75Sjsg .dpp_root_clock_control = dcn314_dpp_root_clock_control,
142*f005ef32Sjsg .hubp_pg_control = dcn31_hubp_pg_control,
1431bb76ff1Sjsg .program_all_writeback_pipes_in_tree = dcn30_program_all_writeback_pipes_in_tree,
1441bb76ff1Sjsg .update_odm = dcn314_update_odm,
1451bb76ff1Sjsg .dsc_pg_control = dcn314_dsc_pg_control,
1461bb76ff1Sjsg .set_hdr_multiplier = dcn10_set_hdr_multiplier,
1471bb76ff1Sjsg .verify_allow_pstate_change_high = dcn10_verify_allow_pstate_change_high,
1481bb76ff1Sjsg .wait_for_blank_complete = dcn20_wait_for_blank_complete,
1491bb76ff1Sjsg .dccg_init = dcn20_dccg_init,
1501bb76ff1Sjsg .set_blend_lut = dcn30_set_blend_lut,
1511bb76ff1Sjsg .set_shaper_3dlut = dcn20_set_shaper_3dlut,
1521bb76ff1Sjsg .setup_hpo_hw_control = dcn31_setup_hpo_hw_control,
1531bb76ff1Sjsg .calculate_dccg_k1_k2_values = dcn314_calculate_dccg_k1_k2_values,
1541bb76ff1Sjsg .set_pixels_per_cycle = dcn314_set_pixels_per_cycle,
155*f005ef32Sjsg .resync_fifo_dccg_dio = dcn314_resync_fifo_dccg_dio,
1561bb76ff1Sjsg };
1571bb76ff1Sjsg
dcn314_hw_sequencer_construct(struct dc * dc)1581bb76ff1Sjsg void dcn314_hw_sequencer_construct(struct dc *dc)
1591bb76ff1Sjsg {
1601bb76ff1Sjsg dc->hwss = dcn314_funcs;
1611bb76ff1Sjsg dc->hwseq->funcs = dcn314_private_funcs;
1621bb76ff1Sjsg
1631bb76ff1Sjsg }
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