1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DC_HW_SEQUENCER_H__ 27 #define __DC_HW_SEQUENCER_H__ 28 #include "dc_types.h" 29 #include "clock_source.h" 30 #include "inc/hw/timing_generator.h" 31 #include "inc/hw/opp.h" 32 #include "inc/hw/link_encoder.h" 33 #include "core_status.h" 34 35 enum vline_select { 36 VLINE0, 37 VLINE1 38 }; 39 40 struct pipe_ctx; 41 struct dc_state; 42 struct dc_stream_status; 43 struct dc_writeback_info; 44 struct dchub_init_data; 45 struct dc_static_screen_params; 46 struct resource_pool; 47 struct dc_phy_addr_space_config; 48 struct dc_virtual_addr_space_config; 49 struct dpp; 50 struct dce_hwseq; 51 52 struct hw_sequencer_funcs { 53 /* Embedded Display Related */ 54 void (*edp_power_control)(struct dc_link *link, bool enable); 55 void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up); 56 57 /* Pipe Programming Related */ 58 void (*init_hw)(struct dc *dc); 59 void (*enable_accelerated_mode)(struct dc *dc, 60 struct dc_state *context); 61 enum dc_status (*apply_ctx_to_hw)(struct dc *dc, 62 struct dc_state *context); 63 void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx); 64 void (*apply_ctx_for_surface)(struct dc *dc, 65 const struct dc_stream_state *stream, 66 int num_planes, struct dc_state *context); 67 void (*program_front_end_for_ctx)(struct dc *dc, 68 struct dc_state *context); 69 void (*post_unlock_program_front_end)(struct dc *dc, 70 struct dc_state *context); 71 void (*update_plane_addr)(const struct dc *dc, 72 struct pipe_ctx *pipe_ctx); 73 void (*update_dchub)(struct dce_hwseq *hws, 74 struct dchub_init_data *dh_data); 75 void (*wait_for_mpcc_disconnect)(struct dc *dc, 76 struct resource_pool *res_pool, 77 struct pipe_ctx *pipe_ctx); 78 void (*program_triplebuffer)(const struct dc *dc, 79 struct pipe_ctx *pipe_ctx, bool enableTripleBuffer); 80 void (*update_pending_status)(struct pipe_ctx *pipe_ctx); 81 82 /* Pipe Lock Related */ 83 void (*pipe_control_lock)(struct dc *dc, 84 struct pipe_ctx *pipe, bool lock); 85 void (*interdependent_update_lock)(struct dc *dc, 86 struct dc_state *context, bool lock); 87 void (*set_flip_control_gsl)(struct pipe_ctx *pipe_ctx, 88 bool flip_immediate); 89 void (*cursor_lock)(struct dc *dc, struct pipe_ctx *pipe, bool lock); 90 91 /* Timing Related */ 92 void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes, 93 struct crtc_position *position); 94 int (*get_vupdate_offset_from_vsync)(struct pipe_ctx *pipe_ctx); 95 void (*calc_vupdate_position)( 96 struct dc *dc, 97 struct pipe_ctx *pipe_ctx, 98 uint32_t *start_line, 99 uint32_t *end_line); 100 void (*enable_per_frame_crtc_position_reset)(struct dc *dc, 101 int group_size, struct pipe_ctx *grouped_pipes[]); 102 void (*enable_timing_synchronization)(struct dc *dc, 103 int group_index, int group_size, 104 struct pipe_ctx *grouped_pipes[]); 105 void (*setup_periodic_interrupt)(struct dc *dc, 106 struct pipe_ctx *pipe_ctx, 107 enum vline_select vline); 108 void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes, 109 unsigned int vmin, unsigned int vmax, 110 unsigned int vmid, unsigned int vmid_frame_number); 111 void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx, 112 int num_pipes, 113 const struct dc_static_screen_params *events); 114 115 /* Stream Related */ 116 void (*enable_stream)(struct pipe_ctx *pipe_ctx); 117 void (*disable_stream)(struct pipe_ctx *pipe_ctx); 118 void (*blank_stream)(struct pipe_ctx *pipe_ctx); 119 void (*unblank_stream)(struct pipe_ctx *pipe_ctx, 120 struct dc_link_settings *link_settings); 121 122 /* Bandwidth Related */ 123 void (*prepare_bandwidth)(struct dc *dc, struct dc_state *context); 124 bool (*update_bandwidth)(struct dc *dc, struct dc_state *context); 125 void (*optimize_bandwidth)(struct dc *dc, struct dc_state *context); 126 127 /* Infopacket Related */ 128 void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable); 129 void (*send_immediate_sdp_message)( 130 struct pipe_ctx *pipe_ctx, 131 const uint8_t *custom_sdp_message, 132 unsigned int sdp_message_size); 133 void (*update_info_frame)(struct pipe_ctx *pipe_ctx); 134 void (*set_dmdata_attributes)(struct pipe_ctx *pipe); 135 void (*program_dmdata_engine)(struct pipe_ctx *pipe_ctx); 136 bool (*dmdata_status_done)(struct pipe_ctx *pipe_ctx); 137 138 /* Cursor Related */ 139 void (*set_cursor_position)(struct pipe_ctx *pipe); 140 void (*set_cursor_attribute)(struct pipe_ctx *pipe); 141 void (*set_cursor_sdr_white_level)(struct pipe_ctx *pipe); 142 143 /* Colour Related */ 144 void (*program_gamut_remap)(struct pipe_ctx *pipe_ctx); 145 void (*program_output_csc)(struct dc *dc, struct pipe_ctx *pipe_ctx, 146 enum dc_color_space colorspace, 147 uint16_t *matrix, int opp_id); 148 149 /* VM Related */ 150 int (*init_sys_ctx)(struct dce_hwseq *hws, 151 struct dc *dc, 152 struct dc_phy_addr_space_config *pa_config); 153 void (*init_vm_ctx)(struct dce_hwseq *hws, 154 struct dc *dc, 155 struct dc_virtual_addr_space_config *va_config, 156 int vmid); 157 158 /* Writeback Related */ 159 void (*update_writeback)(struct dc *dc, 160 struct dc_writeback_info *wb_info, 161 struct dc_state *context); 162 void (*enable_writeback)(struct dc *dc, 163 struct dc_writeback_info *wb_info, 164 struct dc_state *context); 165 void (*disable_writeback)(struct dc *dc, 166 unsigned int dwb_pipe_inst); 167 168 bool (*mmhubbub_warmup)(struct dc *dc, 169 unsigned int num_dwb, 170 struct dc_writeback_info *wb_info); 171 172 /* Clock Related */ 173 enum dc_status (*set_clock)(struct dc *dc, 174 enum dc_clock_type clock_type, 175 uint32_t clk_khz, uint32_t stepping); 176 void (*get_clock)(struct dc *dc, enum dc_clock_type clock_type, 177 struct dc_clock_config *clock_cfg); 178 void (*optimize_pwr_state)(const struct dc *dc, 179 struct dc_state *context); 180 void (*exit_optimized_pwr_state)(const struct dc *dc, 181 struct dc_state *context); 182 183 /* Audio Related */ 184 void (*enable_audio_stream)(struct pipe_ctx *pipe_ctx); 185 void (*disable_audio_stream)(struct pipe_ctx *pipe_ctx); 186 187 /* Stereo 3D Related */ 188 void (*setup_stereo)(struct pipe_ctx *pipe_ctx, struct dc *dc); 189 190 /* HW State Logging Related */ 191 void (*log_hw_state)(struct dc *dc, struct dc_log_buffer_ctx *log_ctx); 192 void (*get_hw_state)(struct dc *dc, char *pBuf, 193 unsigned int bufSize, unsigned int mask); 194 void (*clear_status_bits)(struct dc *dc, unsigned int mask); 195 196 197 }; 198 199 void color_space_to_black_color( 200 const struct dc *dc, 201 enum dc_color_space colorspace, 202 struct tg_color *black_color); 203 204 bool hwss_wait_for_blank_complete( 205 struct timing_generator *tg); 206 207 const uint16_t *find_color_matrix( 208 enum dc_color_space color_space, 209 uint32_t *array_size); 210 211 #endif /* __DC_HW_SEQUENCER_H__ */ 212