1fb4d8502Sjsg /* 2fb4d8502Sjsg * Copyright (C) 2017 Advanced Micro Devices, Inc. 3fb4d8502Sjsg * 4fb4d8502Sjsg * Permission is hereby granted, free of charge, to any person obtaining a 5fb4d8502Sjsg * copy of this software and associated documentation files (the "Software"), 6fb4d8502Sjsg * to deal in the Software without restriction, including without limitation 7fb4d8502Sjsg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8fb4d8502Sjsg * and/or sell copies of the Software, and to permit persons to whom the 9fb4d8502Sjsg * Software is furnished to do so, subject to the following conditions: 10fb4d8502Sjsg * 11fb4d8502Sjsg * The above copyright notice and this permission notice shall be included 12fb4d8502Sjsg * in all copies or substantial portions of the Software. 13fb4d8502Sjsg * 14fb4d8502Sjsg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15fb4d8502Sjsg * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16fb4d8502Sjsg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17fb4d8502Sjsg * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 18fb4d8502Sjsg * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 19fb4d8502Sjsg * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 20fb4d8502Sjsg */ 21fb4d8502Sjsg #ifndef _gc_9_1_OFFSET_HEADER 22fb4d8502Sjsg #define _gc_9_1_OFFSET_HEADER 23fb4d8502Sjsg 24*ad8b1aafSjsg #define mmSQ_DEBUG_STS_GLOBAL 0x0309 25*ad8b1aafSjsg #define mmSQ_DEBUG_STS_GLOBAL_BASE_IDX 0 26*ad8b1aafSjsg #define mmSQ_DEBUG_STS_GLOBAL2 0x0310 27*ad8b1aafSjsg #define mmSQ_DEBUG_STS_GLOBAL2_BASE_IDX 0 28*ad8b1aafSjsg #define mmSQ_DEBUG_STS_GLOBAL3 0x0311 29*ad8b1aafSjsg #define mmSQ_DEBUG_STS_GLOBAL3_BASE_IDX 0 30fb4d8502Sjsg 31fb4d8502Sjsg // addressBlock: gc_grbmdec 32fb4d8502Sjsg // base address: 0x8000 33fb4d8502Sjsg #define mmGRBM_CNTL 0x0000 34fb4d8502Sjsg #define mmGRBM_CNTL_BASE_IDX 0 35fb4d8502Sjsg #define mmGRBM_SKEW_CNTL 0x0001 36fb4d8502Sjsg #define mmGRBM_SKEW_CNTL_BASE_IDX 0 37fb4d8502Sjsg #define mmGRBM_STATUS2 0x0002 38fb4d8502Sjsg #define mmGRBM_STATUS2_BASE_IDX 0 39fb4d8502Sjsg #define mmGRBM_PWR_CNTL 0x0003 40fb4d8502Sjsg #define mmGRBM_PWR_CNTL_BASE_IDX 0 41fb4d8502Sjsg #define mmGRBM_STATUS 0x0004 42fb4d8502Sjsg #define mmGRBM_STATUS_BASE_IDX 0 43fb4d8502Sjsg #define mmGRBM_STATUS_SE0 0x0005 44fb4d8502Sjsg #define mmGRBM_STATUS_SE0_BASE_IDX 0 45fb4d8502Sjsg #define mmGRBM_STATUS_SE1 0x0006 46fb4d8502Sjsg #define mmGRBM_STATUS_SE1_BASE_IDX 0 47fb4d8502Sjsg #define mmGRBM_SOFT_RESET 0x0008 48fb4d8502Sjsg #define mmGRBM_SOFT_RESET_BASE_IDX 0 49fb4d8502Sjsg #define mmGRBM_CGTT_CLK_CNTL 0x000b 50fb4d8502Sjsg #define mmGRBM_CGTT_CLK_CNTL_BASE_IDX 0 51fb4d8502Sjsg #define mmGRBM_GFX_CLKEN_CNTL 0x000c 52fb4d8502Sjsg #define mmGRBM_GFX_CLKEN_CNTL_BASE_IDX 0 53fb4d8502Sjsg #define mmGRBM_WAIT_IDLE_CLOCKS 0x000d 54fb4d8502Sjsg #define mmGRBM_WAIT_IDLE_CLOCKS_BASE_IDX 0 55fb4d8502Sjsg #define mmGRBM_STATUS_SE2 0x000e 56fb4d8502Sjsg #define mmGRBM_STATUS_SE2_BASE_IDX 0 57fb4d8502Sjsg #define mmGRBM_STATUS_SE3 0x000f 58fb4d8502Sjsg #define mmGRBM_STATUS_SE3_BASE_IDX 0 59fb4d8502Sjsg #define mmGRBM_READ_ERROR 0x0016 60fb4d8502Sjsg #define mmGRBM_READ_ERROR_BASE_IDX 0 61fb4d8502Sjsg #define mmGRBM_READ_ERROR2 0x0017 62fb4d8502Sjsg #define mmGRBM_READ_ERROR2_BASE_IDX 0 63fb4d8502Sjsg #define mmGRBM_INT_CNTL 0x0018 64fb4d8502Sjsg #define mmGRBM_INT_CNTL_BASE_IDX 0 65fb4d8502Sjsg #define mmGRBM_TRAP_OP 0x0019 66fb4d8502Sjsg #define mmGRBM_TRAP_OP_BASE_IDX 0 67fb4d8502Sjsg #define mmGRBM_TRAP_ADDR 0x001a 68fb4d8502Sjsg #define mmGRBM_TRAP_ADDR_BASE_IDX 0 69fb4d8502Sjsg #define mmGRBM_TRAP_ADDR_MSK 0x001b 70fb4d8502Sjsg #define mmGRBM_TRAP_ADDR_MSK_BASE_IDX 0 71fb4d8502Sjsg #define mmGRBM_TRAP_WD 0x001c 72fb4d8502Sjsg #define mmGRBM_TRAP_WD_BASE_IDX 0 73fb4d8502Sjsg #define mmGRBM_TRAP_WD_MSK 0x001d 74fb4d8502Sjsg #define mmGRBM_TRAP_WD_MSK_BASE_IDX 0 75fb4d8502Sjsg #define mmGRBM_DSM_BYPASS 0x001e 76fb4d8502Sjsg #define mmGRBM_DSM_BYPASS_BASE_IDX 0 77fb4d8502Sjsg #define mmGRBM_WRITE_ERROR 0x001f 78fb4d8502Sjsg #define mmGRBM_WRITE_ERROR_BASE_IDX 0 79fb4d8502Sjsg #define mmGRBM_IOV_ERROR 0x0020 80fb4d8502Sjsg #define mmGRBM_IOV_ERROR_BASE_IDX 0 81fb4d8502Sjsg #define mmGRBM_CHIP_REVISION 0x0021 82fb4d8502Sjsg #define mmGRBM_CHIP_REVISION_BASE_IDX 0 83fb4d8502Sjsg #define mmGRBM_GFX_CNTL 0x0022 84fb4d8502Sjsg #define mmGRBM_GFX_CNTL_BASE_IDX 0 85fb4d8502Sjsg #define mmGRBM_RSMU_CFG 0x0023 86fb4d8502Sjsg #define mmGRBM_RSMU_CFG_BASE_IDX 0 87fb4d8502Sjsg #define mmGRBM_IH_CREDIT 0x0024 88fb4d8502Sjsg #define mmGRBM_IH_CREDIT_BASE_IDX 0 89fb4d8502Sjsg #define mmGRBM_PWR_CNTL2 0x0025 90fb4d8502Sjsg #define mmGRBM_PWR_CNTL2_BASE_IDX 0 91fb4d8502Sjsg #define mmGRBM_UTCL2_INVAL_RANGE_START 0x0026 92fb4d8502Sjsg #define mmGRBM_UTCL2_INVAL_RANGE_START_BASE_IDX 0 93fb4d8502Sjsg #define mmGRBM_UTCL2_INVAL_RANGE_END 0x0027 94fb4d8502Sjsg #define mmGRBM_UTCL2_INVAL_RANGE_END_BASE_IDX 0 95fb4d8502Sjsg #define mmGRBM_RSMU_READ_ERROR 0x0028 96fb4d8502Sjsg #define mmGRBM_RSMU_READ_ERROR_BASE_IDX 0 97fb4d8502Sjsg #define mmGRBM_CHICKEN_BITS 0x0029 98fb4d8502Sjsg #define mmGRBM_CHICKEN_BITS_BASE_IDX 0 99fb4d8502Sjsg #define mmGRBM_NOWHERE 0x003f 100fb4d8502Sjsg #define mmGRBM_NOWHERE_BASE_IDX 0 101fb4d8502Sjsg #define mmGRBM_SCRATCH_REG0 0x0040 102fb4d8502Sjsg #define mmGRBM_SCRATCH_REG0_BASE_IDX 0 103fb4d8502Sjsg #define mmGRBM_SCRATCH_REG1 0x0041 104fb4d8502Sjsg #define mmGRBM_SCRATCH_REG1_BASE_IDX 0 105fb4d8502Sjsg #define mmGRBM_SCRATCH_REG2 0x0042 106fb4d8502Sjsg #define mmGRBM_SCRATCH_REG2_BASE_IDX 0 107fb4d8502Sjsg #define mmGRBM_SCRATCH_REG3 0x0043 108fb4d8502Sjsg #define mmGRBM_SCRATCH_REG3_BASE_IDX 0 109fb4d8502Sjsg #define mmGRBM_SCRATCH_REG4 0x0044 110fb4d8502Sjsg #define mmGRBM_SCRATCH_REG4_BASE_IDX 0 111fb4d8502Sjsg #define mmGRBM_SCRATCH_REG5 0x0045 112fb4d8502Sjsg #define mmGRBM_SCRATCH_REG5_BASE_IDX 0 113fb4d8502Sjsg #define mmGRBM_SCRATCH_REG6 0x0046 114fb4d8502Sjsg #define mmGRBM_SCRATCH_REG6_BASE_IDX 0 115fb4d8502Sjsg #define mmGRBM_SCRATCH_REG7 0x0047 116fb4d8502Sjsg #define mmGRBM_SCRATCH_REG7_BASE_IDX 0 117fb4d8502Sjsg 118fb4d8502Sjsg 119fb4d8502Sjsg // addressBlock: gc_cpdec 120fb4d8502Sjsg // base address: 0x8200 121fb4d8502Sjsg #define mmCP_CPC_STATUS 0x0084 122fb4d8502Sjsg #define mmCP_CPC_STATUS_BASE_IDX 0 123fb4d8502Sjsg #define mmCP_CPC_BUSY_STAT 0x0085 124fb4d8502Sjsg #define mmCP_CPC_BUSY_STAT_BASE_IDX 0 125fb4d8502Sjsg #define mmCP_CPC_STALLED_STAT1 0x0086 126fb4d8502Sjsg #define mmCP_CPC_STALLED_STAT1_BASE_IDX 0 127fb4d8502Sjsg #define mmCP_CPF_STATUS 0x0087 128fb4d8502Sjsg #define mmCP_CPF_STATUS_BASE_IDX 0 129fb4d8502Sjsg #define mmCP_CPF_BUSY_STAT 0x0088 130fb4d8502Sjsg #define mmCP_CPF_BUSY_STAT_BASE_IDX 0 131fb4d8502Sjsg #define mmCP_CPF_STALLED_STAT1 0x0089 132fb4d8502Sjsg #define mmCP_CPF_STALLED_STAT1_BASE_IDX 0 133fb4d8502Sjsg #define mmCP_CPC_GRBM_FREE_COUNT 0x008b 134fb4d8502Sjsg #define mmCP_CPC_GRBM_FREE_COUNT_BASE_IDX 0 135fb4d8502Sjsg #define mmCP_MEC_CNTL 0x008d 136fb4d8502Sjsg #define mmCP_MEC_CNTL_BASE_IDX 0 137fb4d8502Sjsg #define mmCP_MEC_ME1_HEADER_DUMP 0x008e 138fb4d8502Sjsg #define mmCP_MEC_ME1_HEADER_DUMP_BASE_IDX 0 139fb4d8502Sjsg #define mmCP_MEC_ME2_HEADER_DUMP 0x008f 140fb4d8502Sjsg #define mmCP_MEC_ME2_HEADER_DUMP_BASE_IDX 0 141fb4d8502Sjsg #define mmCP_CPC_SCRATCH_INDEX 0x0090 142fb4d8502Sjsg #define mmCP_CPC_SCRATCH_INDEX_BASE_IDX 0 143fb4d8502Sjsg #define mmCP_CPC_SCRATCH_DATA 0x0091 144fb4d8502Sjsg #define mmCP_CPC_SCRATCH_DATA_BASE_IDX 0 145fb4d8502Sjsg #define mmCP_CPF_GRBM_FREE_COUNT 0x0092 146fb4d8502Sjsg #define mmCP_CPF_GRBM_FREE_COUNT_BASE_IDX 0 147fb4d8502Sjsg #define mmCP_CPC_HALT_HYST_COUNT 0x00a7 148fb4d8502Sjsg #define mmCP_CPC_HALT_HYST_COUNT_BASE_IDX 0 149fb4d8502Sjsg #define mmCP_PRT_LOD_STATS_CNTL0 0x00ad 150fb4d8502Sjsg #define mmCP_PRT_LOD_STATS_CNTL0_BASE_IDX 0 151fb4d8502Sjsg #define mmCP_PRT_LOD_STATS_CNTL1 0x00ae 152fb4d8502Sjsg #define mmCP_PRT_LOD_STATS_CNTL1_BASE_IDX 0 153fb4d8502Sjsg #define mmCP_PRT_LOD_STATS_CNTL2 0x00af 154fb4d8502Sjsg #define mmCP_PRT_LOD_STATS_CNTL2_BASE_IDX 0 155fb4d8502Sjsg #define mmCP_PRT_LOD_STATS_CNTL3 0x00b0 156fb4d8502Sjsg #define mmCP_PRT_LOD_STATS_CNTL3_BASE_IDX 0 157fb4d8502Sjsg #define mmCP_CE_COMPARE_COUNT 0x00c0 158fb4d8502Sjsg #define mmCP_CE_COMPARE_COUNT_BASE_IDX 0 159fb4d8502Sjsg #define mmCP_CE_DE_COUNT 0x00c1 160fb4d8502Sjsg #define mmCP_CE_DE_COUNT_BASE_IDX 0 161fb4d8502Sjsg #define mmCP_DE_CE_COUNT 0x00c2 162fb4d8502Sjsg #define mmCP_DE_CE_COUNT_BASE_IDX 0 163fb4d8502Sjsg #define mmCP_DE_LAST_INVAL_COUNT 0x00c3 164fb4d8502Sjsg #define mmCP_DE_LAST_INVAL_COUNT_BASE_IDX 0 165fb4d8502Sjsg #define mmCP_DE_DE_COUNT 0x00c4 166fb4d8502Sjsg #define mmCP_DE_DE_COUNT_BASE_IDX 0 167fb4d8502Sjsg #define mmCP_STALLED_STAT3 0x019c 168fb4d8502Sjsg #define mmCP_STALLED_STAT3_BASE_IDX 0 169fb4d8502Sjsg #define mmCP_STALLED_STAT1 0x019d 170fb4d8502Sjsg #define mmCP_STALLED_STAT1_BASE_IDX 0 171fb4d8502Sjsg #define mmCP_STALLED_STAT2 0x019e 172fb4d8502Sjsg #define mmCP_STALLED_STAT2_BASE_IDX 0 173fb4d8502Sjsg #define mmCP_BUSY_STAT 0x019f 174fb4d8502Sjsg #define mmCP_BUSY_STAT_BASE_IDX 0 175fb4d8502Sjsg #define mmCP_STAT 0x01a0 176fb4d8502Sjsg #define mmCP_STAT_BASE_IDX 0 177fb4d8502Sjsg #define mmCP_ME_HEADER_DUMP 0x01a1 178fb4d8502Sjsg #define mmCP_ME_HEADER_DUMP_BASE_IDX 0 179fb4d8502Sjsg #define mmCP_PFP_HEADER_DUMP 0x01a2 180fb4d8502Sjsg #define mmCP_PFP_HEADER_DUMP_BASE_IDX 0 181fb4d8502Sjsg #define mmCP_GRBM_FREE_COUNT 0x01a3 182fb4d8502Sjsg #define mmCP_GRBM_FREE_COUNT_BASE_IDX 0 183fb4d8502Sjsg #define mmCP_CE_HEADER_DUMP 0x01a4 184fb4d8502Sjsg #define mmCP_CE_HEADER_DUMP_BASE_IDX 0 185fb4d8502Sjsg #define mmCP_PFP_INSTR_PNTR 0x01a5 186fb4d8502Sjsg #define mmCP_PFP_INSTR_PNTR_BASE_IDX 0 187fb4d8502Sjsg #define mmCP_ME_INSTR_PNTR 0x01a6 188fb4d8502Sjsg #define mmCP_ME_INSTR_PNTR_BASE_IDX 0 189fb4d8502Sjsg #define mmCP_CE_INSTR_PNTR 0x01a7 190fb4d8502Sjsg #define mmCP_CE_INSTR_PNTR_BASE_IDX 0 191fb4d8502Sjsg #define mmCP_MEC1_INSTR_PNTR 0x01a8 192fb4d8502Sjsg #define mmCP_MEC1_INSTR_PNTR_BASE_IDX 0 193fb4d8502Sjsg #define mmCP_MEC2_INSTR_PNTR 0x01a9 194fb4d8502Sjsg #define mmCP_MEC2_INSTR_PNTR_BASE_IDX 0 195fb4d8502Sjsg #define mmCP_CSF_STAT 0x01b4 196fb4d8502Sjsg #define mmCP_CSF_STAT_BASE_IDX 0 197fb4d8502Sjsg #define mmCP_ME_CNTL 0x01b6 198fb4d8502Sjsg #define mmCP_ME_CNTL_BASE_IDX 0 199fb4d8502Sjsg #define mmCP_CNTX_STAT 0x01b8 200fb4d8502Sjsg #define mmCP_CNTX_STAT_BASE_IDX 0 201fb4d8502Sjsg #define mmCP_ME_PREEMPTION 0x01b9 202fb4d8502Sjsg #define mmCP_ME_PREEMPTION_BASE_IDX 0 203fb4d8502Sjsg #define mmCP_ROQ_THRESHOLDS 0x01bc 204fb4d8502Sjsg #define mmCP_ROQ_THRESHOLDS_BASE_IDX 0 205fb4d8502Sjsg #define mmCP_MEQ_STQ_THRESHOLD 0x01bd 206fb4d8502Sjsg #define mmCP_MEQ_STQ_THRESHOLD_BASE_IDX 0 207fb4d8502Sjsg #define mmCP_RB2_RPTR 0x01be 208fb4d8502Sjsg #define mmCP_RB2_RPTR_BASE_IDX 0 209fb4d8502Sjsg #define mmCP_RB1_RPTR 0x01bf 210fb4d8502Sjsg #define mmCP_RB1_RPTR_BASE_IDX 0 211fb4d8502Sjsg #define mmCP_RB0_RPTR 0x01c0 212fb4d8502Sjsg #define mmCP_RB0_RPTR_BASE_IDX 0 213fb4d8502Sjsg #define mmCP_RB_RPTR 0x01c0 214fb4d8502Sjsg #define mmCP_RB_RPTR_BASE_IDX 0 215fb4d8502Sjsg #define mmCP_RB_WPTR_DELAY 0x01c1 216fb4d8502Sjsg #define mmCP_RB_WPTR_DELAY_BASE_IDX 0 217fb4d8502Sjsg #define mmCP_RB_WPTR_POLL_CNTL 0x01c2 218fb4d8502Sjsg #define mmCP_RB_WPTR_POLL_CNTL_BASE_IDX 0 219fb4d8502Sjsg #define mmCP_ROQ1_THRESHOLDS 0x01d5 220fb4d8502Sjsg #define mmCP_ROQ1_THRESHOLDS_BASE_IDX 0 221fb4d8502Sjsg #define mmCP_ROQ2_THRESHOLDS 0x01d6 222fb4d8502Sjsg #define mmCP_ROQ2_THRESHOLDS_BASE_IDX 0 223fb4d8502Sjsg #define mmCP_STQ_THRESHOLDS 0x01d7 224fb4d8502Sjsg #define mmCP_STQ_THRESHOLDS_BASE_IDX 0 225fb4d8502Sjsg #define mmCP_QUEUE_THRESHOLDS 0x01d8 226fb4d8502Sjsg #define mmCP_QUEUE_THRESHOLDS_BASE_IDX 0 227fb4d8502Sjsg #define mmCP_MEQ_THRESHOLDS 0x01d9 228fb4d8502Sjsg #define mmCP_MEQ_THRESHOLDS_BASE_IDX 0 229fb4d8502Sjsg #define mmCP_ROQ_AVAIL 0x01da 230fb4d8502Sjsg #define mmCP_ROQ_AVAIL_BASE_IDX 0 231fb4d8502Sjsg #define mmCP_STQ_AVAIL 0x01db 232fb4d8502Sjsg #define mmCP_STQ_AVAIL_BASE_IDX 0 233fb4d8502Sjsg #define mmCP_ROQ2_AVAIL 0x01dc 234fb4d8502Sjsg #define mmCP_ROQ2_AVAIL_BASE_IDX 0 235fb4d8502Sjsg #define mmCP_MEQ_AVAIL 0x01dd 236fb4d8502Sjsg #define mmCP_MEQ_AVAIL_BASE_IDX 0 237fb4d8502Sjsg #define mmCP_CMD_INDEX 0x01de 238fb4d8502Sjsg #define mmCP_CMD_INDEX_BASE_IDX 0 239fb4d8502Sjsg #define mmCP_CMD_DATA 0x01df 240fb4d8502Sjsg #define mmCP_CMD_DATA_BASE_IDX 0 241fb4d8502Sjsg #define mmCP_ROQ_RB_STAT 0x01e0 242fb4d8502Sjsg #define mmCP_ROQ_RB_STAT_BASE_IDX 0 243fb4d8502Sjsg #define mmCP_ROQ_IB1_STAT 0x01e1 244fb4d8502Sjsg #define mmCP_ROQ_IB1_STAT_BASE_IDX 0 245fb4d8502Sjsg #define mmCP_ROQ_IB2_STAT 0x01e2 246fb4d8502Sjsg #define mmCP_ROQ_IB2_STAT_BASE_IDX 0 247fb4d8502Sjsg #define mmCP_STQ_STAT 0x01e3 248fb4d8502Sjsg #define mmCP_STQ_STAT_BASE_IDX 0 249fb4d8502Sjsg #define mmCP_STQ_WR_STAT 0x01e4 250fb4d8502Sjsg #define mmCP_STQ_WR_STAT_BASE_IDX 0 251fb4d8502Sjsg #define mmCP_MEQ_STAT 0x01e5 252fb4d8502Sjsg #define mmCP_MEQ_STAT_BASE_IDX 0 253fb4d8502Sjsg #define mmCP_CEQ1_AVAIL 0x01e6 254fb4d8502Sjsg #define mmCP_CEQ1_AVAIL_BASE_IDX 0 255fb4d8502Sjsg #define mmCP_CEQ2_AVAIL 0x01e7 256fb4d8502Sjsg #define mmCP_CEQ2_AVAIL_BASE_IDX 0 257fb4d8502Sjsg #define mmCP_CE_ROQ_RB_STAT 0x01e8 258fb4d8502Sjsg #define mmCP_CE_ROQ_RB_STAT_BASE_IDX 0 259fb4d8502Sjsg #define mmCP_CE_ROQ_IB1_STAT 0x01e9 260fb4d8502Sjsg #define mmCP_CE_ROQ_IB1_STAT_BASE_IDX 0 261fb4d8502Sjsg #define mmCP_CE_ROQ_IB2_STAT 0x01ea 262fb4d8502Sjsg #define mmCP_CE_ROQ_IB2_STAT_BASE_IDX 0 263fb4d8502Sjsg 264fb4d8502Sjsg 265fb4d8502Sjsg // addressBlock: gc_padec 266fb4d8502Sjsg // base address: 0x8800 267fb4d8502Sjsg #define mmVGT_VTX_VECT_EJECT_REG 0x022c 268fb4d8502Sjsg #define mmVGT_VTX_VECT_EJECT_REG_BASE_IDX 0 269fb4d8502Sjsg #define mmVGT_DMA_DATA_FIFO_DEPTH 0x022d 270fb4d8502Sjsg #define mmVGT_DMA_DATA_FIFO_DEPTH_BASE_IDX 0 271fb4d8502Sjsg #define mmVGT_DMA_REQ_FIFO_DEPTH 0x022e 272fb4d8502Sjsg #define mmVGT_DMA_REQ_FIFO_DEPTH_BASE_IDX 0 273fb4d8502Sjsg #define mmVGT_DRAW_INIT_FIFO_DEPTH 0x022f 274fb4d8502Sjsg #define mmVGT_DRAW_INIT_FIFO_DEPTH_BASE_IDX 0 275fb4d8502Sjsg #define mmVGT_LAST_COPY_STATE 0x0230 276fb4d8502Sjsg #define mmVGT_LAST_COPY_STATE_BASE_IDX 0 277fb4d8502Sjsg #define mmVGT_CACHE_INVALIDATION 0x0231 278fb4d8502Sjsg #define mmVGT_CACHE_INVALIDATION_BASE_IDX 0 279fb4d8502Sjsg #define mmVGT_STRMOUT_DELAY 0x0233 280fb4d8502Sjsg #define mmVGT_STRMOUT_DELAY_BASE_IDX 0 281fb4d8502Sjsg #define mmVGT_FIFO_DEPTHS 0x0234 282fb4d8502Sjsg #define mmVGT_FIFO_DEPTHS_BASE_IDX 0 283fb4d8502Sjsg #define mmVGT_GS_VERTEX_REUSE 0x0235 284fb4d8502Sjsg #define mmVGT_GS_VERTEX_REUSE_BASE_IDX 0 285fb4d8502Sjsg #define mmVGT_MC_LAT_CNTL 0x0236 286fb4d8502Sjsg #define mmVGT_MC_LAT_CNTL_BASE_IDX 0 287fb4d8502Sjsg #define mmIA_CNTL_STATUS 0x0237 288fb4d8502Sjsg #define mmIA_CNTL_STATUS_BASE_IDX 0 289fb4d8502Sjsg #define mmVGT_CNTL_STATUS 0x023c 290fb4d8502Sjsg #define mmVGT_CNTL_STATUS_BASE_IDX 0 291fb4d8502Sjsg #define mmWD_CNTL_STATUS 0x023f 292fb4d8502Sjsg #define mmWD_CNTL_STATUS_BASE_IDX 0 293fb4d8502Sjsg #define mmCC_GC_PRIM_CONFIG 0x0240 294fb4d8502Sjsg #define mmCC_GC_PRIM_CONFIG_BASE_IDX 0 295fb4d8502Sjsg #define mmGC_USER_PRIM_CONFIG 0x0241 296fb4d8502Sjsg #define mmGC_USER_PRIM_CONFIG_BASE_IDX 0 297fb4d8502Sjsg #define mmWD_QOS 0x0242 298fb4d8502Sjsg #define mmWD_QOS_BASE_IDX 0 299fb4d8502Sjsg #define mmWD_UTCL1_CNTL 0x0243 300fb4d8502Sjsg #define mmWD_UTCL1_CNTL_BASE_IDX 0 301fb4d8502Sjsg #define mmWD_UTCL1_STATUS 0x0244 302fb4d8502Sjsg #define mmWD_UTCL1_STATUS_BASE_IDX 0 303fb4d8502Sjsg #define mmIA_UTCL1_CNTL 0x0246 304fb4d8502Sjsg #define mmIA_UTCL1_CNTL_BASE_IDX 0 305fb4d8502Sjsg #define mmIA_UTCL1_STATUS 0x0247 306fb4d8502Sjsg #define mmIA_UTCL1_STATUS_BASE_IDX 0 307fb4d8502Sjsg #define mmVGT_SYS_CONFIG 0x0263 308fb4d8502Sjsg #define mmVGT_SYS_CONFIG_BASE_IDX 0 309fb4d8502Sjsg #define mmVGT_VS_MAX_WAVE_ID 0x0268 310fb4d8502Sjsg #define mmVGT_VS_MAX_WAVE_ID_BASE_IDX 0 311fb4d8502Sjsg #define mmVGT_GS_MAX_WAVE_ID 0x0269 312fb4d8502Sjsg #define mmVGT_GS_MAX_WAVE_ID_BASE_IDX 0 313fb4d8502Sjsg #define mmGFX_PIPE_CONTROL 0x026d 314fb4d8502Sjsg #define mmGFX_PIPE_CONTROL_BASE_IDX 0 315fb4d8502Sjsg #define mmCC_GC_SHADER_ARRAY_CONFIG 0x026f 316fb4d8502Sjsg #define mmCC_GC_SHADER_ARRAY_CONFIG_BASE_IDX 0 317fb4d8502Sjsg #define mmGC_USER_SHADER_ARRAY_CONFIG 0x0270 318fb4d8502Sjsg #define mmGC_USER_SHADER_ARRAY_CONFIG_BASE_IDX 0 319fb4d8502Sjsg #define mmVGT_DMA_PRIMITIVE_TYPE 0x0271 320fb4d8502Sjsg #define mmVGT_DMA_PRIMITIVE_TYPE_BASE_IDX 0 321fb4d8502Sjsg #define mmVGT_DMA_CONTROL 0x0272 322fb4d8502Sjsg #define mmVGT_DMA_CONTROL_BASE_IDX 0 323fb4d8502Sjsg #define mmVGT_DMA_LS_HS_CONFIG 0x0273 324fb4d8502Sjsg #define mmVGT_DMA_LS_HS_CONFIG_BASE_IDX 0 325fb4d8502Sjsg #define mmWD_BUF_RESOURCE_1 0x0276 326fb4d8502Sjsg #define mmWD_BUF_RESOURCE_1_BASE_IDX 0 327fb4d8502Sjsg #define mmWD_BUF_RESOURCE_2 0x0277 328fb4d8502Sjsg #define mmWD_BUF_RESOURCE_2_BASE_IDX 0 329fb4d8502Sjsg #define mmPA_CL_CNTL_STATUS 0x0284 330fb4d8502Sjsg #define mmPA_CL_CNTL_STATUS_BASE_IDX 0 331fb4d8502Sjsg #define mmPA_CL_ENHANCE 0x0285 332fb4d8502Sjsg #define mmPA_CL_ENHANCE_BASE_IDX 0 333fb4d8502Sjsg #define mmPA_SU_CNTL_STATUS 0x0294 334fb4d8502Sjsg #define mmPA_SU_CNTL_STATUS_BASE_IDX 0 335fb4d8502Sjsg #define mmPA_SC_FIFO_DEPTH_CNTL 0x0295 336fb4d8502Sjsg #define mmPA_SC_FIFO_DEPTH_CNTL_BASE_IDX 0 337fb4d8502Sjsg #define mmPA_SC_P3D_TRAP_SCREEN_HV_LOCK 0x02c0 338fb4d8502Sjsg #define mmPA_SC_P3D_TRAP_SCREEN_HV_LOCK_BASE_IDX 0 339fb4d8502Sjsg #define mmPA_SC_HP3D_TRAP_SCREEN_HV_LOCK 0x02c1 340fb4d8502Sjsg #define mmPA_SC_HP3D_TRAP_SCREEN_HV_LOCK_BASE_IDX 0 341fb4d8502Sjsg #define mmPA_SC_TRAP_SCREEN_HV_LOCK 0x02c2 342fb4d8502Sjsg #define mmPA_SC_TRAP_SCREEN_HV_LOCK_BASE_IDX 0 343fb4d8502Sjsg #define mmPA_SC_FORCE_EOV_MAX_CNTS 0x02c9 344fb4d8502Sjsg #define mmPA_SC_FORCE_EOV_MAX_CNTS_BASE_IDX 0 345fb4d8502Sjsg #define mmPA_SC_BINNER_EVENT_CNTL_0 0x02cc 346fb4d8502Sjsg #define mmPA_SC_BINNER_EVENT_CNTL_0_BASE_IDX 0 347fb4d8502Sjsg #define mmPA_SC_BINNER_EVENT_CNTL_1 0x02cd 348fb4d8502Sjsg #define mmPA_SC_BINNER_EVENT_CNTL_1_BASE_IDX 0 349fb4d8502Sjsg #define mmPA_SC_BINNER_EVENT_CNTL_2 0x02ce 350fb4d8502Sjsg #define mmPA_SC_BINNER_EVENT_CNTL_2_BASE_IDX 0 351fb4d8502Sjsg #define mmPA_SC_BINNER_EVENT_CNTL_3 0x02cf 352fb4d8502Sjsg #define mmPA_SC_BINNER_EVENT_CNTL_3_BASE_IDX 0 353fb4d8502Sjsg #define mmPA_SC_BINNER_TIMEOUT_COUNTER 0x02d0 354fb4d8502Sjsg #define mmPA_SC_BINNER_TIMEOUT_COUNTER_BASE_IDX 0 355fb4d8502Sjsg #define mmPA_SC_BINNER_PERF_CNTL_0 0x02d1 356fb4d8502Sjsg #define mmPA_SC_BINNER_PERF_CNTL_0_BASE_IDX 0 357fb4d8502Sjsg #define mmPA_SC_BINNER_PERF_CNTL_1 0x02d2 358fb4d8502Sjsg #define mmPA_SC_BINNER_PERF_CNTL_1_BASE_IDX 0 359fb4d8502Sjsg #define mmPA_SC_BINNER_PERF_CNTL_2 0x02d3 360fb4d8502Sjsg #define mmPA_SC_BINNER_PERF_CNTL_2_BASE_IDX 0 361fb4d8502Sjsg #define mmPA_SC_BINNER_PERF_CNTL_3 0x02d4 362fb4d8502Sjsg #define mmPA_SC_BINNER_PERF_CNTL_3_BASE_IDX 0 363fb4d8502Sjsg #define mmPA_SC_FIFO_SIZE 0x02f3 364fb4d8502Sjsg #define mmPA_SC_FIFO_SIZE_BASE_IDX 0 365fb4d8502Sjsg #define mmPA_SC_IF_FIFO_SIZE 0x02f5 366fb4d8502Sjsg #define mmPA_SC_IF_FIFO_SIZE_BASE_IDX 0 367fb4d8502Sjsg #define mmPA_SC_PKR_WAVE_TABLE_CNTL 0x02f8 368fb4d8502Sjsg #define mmPA_SC_PKR_WAVE_TABLE_CNTL_BASE_IDX 0 369fb4d8502Sjsg #define mmPA_UTCL1_CNTL1 0x02f9 370fb4d8502Sjsg #define mmPA_UTCL1_CNTL1_BASE_IDX 0 371fb4d8502Sjsg #define mmPA_UTCL1_CNTL2 0x02fa 372fb4d8502Sjsg #define mmPA_UTCL1_CNTL2_BASE_IDX 0 373fb4d8502Sjsg #define mmPA_SIDEBAND_REQUEST_DELAYS 0x02fb 374fb4d8502Sjsg #define mmPA_SIDEBAND_REQUEST_DELAYS_BASE_IDX 0 375fb4d8502Sjsg #define mmPA_SC_ENHANCE 0x02fc 376fb4d8502Sjsg #define mmPA_SC_ENHANCE_BASE_IDX 0 377fb4d8502Sjsg #define mmPA_SC_ENHANCE_1 0x02fd 378fb4d8502Sjsg #define mmPA_SC_ENHANCE_1_BASE_IDX 0 379fb4d8502Sjsg #define mmPA_SC_DSM_CNTL 0x02fe 380fb4d8502Sjsg #define mmPA_SC_DSM_CNTL_BASE_IDX 0 381fb4d8502Sjsg #define mmPA_SC_TILE_STEERING_CREST_OVERRIDE 0x02ff 382fb4d8502Sjsg #define mmPA_SC_TILE_STEERING_CREST_OVERRIDE_BASE_IDX 0 383fb4d8502Sjsg 384fb4d8502Sjsg 385fb4d8502Sjsg // addressBlock: gc_sqdec 386fb4d8502Sjsg // base address: 0x8c00 387fb4d8502Sjsg #define mmSQ_CONFIG 0x0300 388fb4d8502Sjsg #define mmSQ_CONFIG_BASE_IDX 0 389fb4d8502Sjsg #define mmSQC_CONFIG 0x0301 390fb4d8502Sjsg #define mmSQC_CONFIG_BASE_IDX 0 391fb4d8502Sjsg #define mmLDS_CONFIG 0x0302 392fb4d8502Sjsg #define mmLDS_CONFIG_BASE_IDX 0 393fb4d8502Sjsg #define mmSQ_RANDOM_WAVE_PRI 0x0303 394fb4d8502Sjsg #define mmSQ_RANDOM_WAVE_PRI_BASE_IDX 0 395fb4d8502Sjsg #define mmSQ_REG_CREDITS 0x0304 396fb4d8502Sjsg #define mmSQ_REG_CREDITS_BASE_IDX 0 397fb4d8502Sjsg #define mmSQ_FIFO_SIZES 0x0305 398fb4d8502Sjsg #define mmSQ_FIFO_SIZES_BASE_IDX 0 399fb4d8502Sjsg #define mmSQ_DSM_CNTL 0x0306 400fb4d8502Sjsg #define mmSQ_DSM_CNTL_BASE_IDX 0 401fb4d8502Sjsg #define mmSQ_DSM_CNTL2 0x0307 402fb4d8502Sjsg #define mmSQ_DSM_CNTL2_BASE_IDX 0 403fb4d8502Sjsg #define mmSQ_RUNTIME_CONFIG 0x0308 404fb4d8502Sjsg #define mmSQ_RUNTIME_CONFIG_BASE_IDX 0 405fb4d8502Sjsg #define mmSH_MEM_BASES 0x030a 406fb4d8502Sjsg #define mmSH_MEM_BASES_BASE_IDX 0 407fb4d8502Sjsg #define mmSH_MEM_CONFIG 0x030d 408fb4d8502Sjsg #define mmSH_MEM_CONFIG_BASE_IDX 0 409fb4d8502Sjsg #define mmCC_GC_SHADER_RATE_CONFIG 0x0312 410fb4d8502Sjsg #define mmCC_GC_SHADER_RATE_CONFIG_BASE_IDX 0 411fb4d8502Sjsg #define mmGC_USER_SHADER_RATE_CONFIG 0x0313 412fb4d8502Sjsg #define mmGC_USER_SHADER_RATE_CONFIG_BASE_IDX 0 413fb4d8502Sjsg #define mmSQ_INTERRUPT_AUTO_MASK 0x0314 414fb4d8502Sjsg #define mmSQ_INTERRUPT_AUTO_MASK_BASE_IDX 0 415fb4d8502Sjsg #define mmSQ_INTERRUPT_MSG_CTRL 0x0315 416fb4d8502Sjsg #define mmSQ_INTERRUPT_MSG_CTRL_BASE_IDX 0 417fb4d8502Sjsg #define mmSQ_UTCL1_CNTL1 0x0317 418fb4d8502Sjsg #define mmSQ_UTCL1_CNTL1_BASE_IDX 0 419fb4d8502Sjsg #define mmSQ_UTCL1_CNTL2 0x0318 420fb4d8502Sjsg #define mmSQ_UTCL1_CNTL2_BASE_IDX 0 421fb4d8502Sjsg #define mmSQ_UTCL1_STATUS 0x0319 422fb4d8502Sjsg #define mmSQ_UTCL1_STATUS_BASE_IDX 0 423fb4d8502Sjsg #define mmSQ_SHADER_TBA_LO 0x031c 424fb4d8502Sjsg #define mmSQ_SHADER_TBA_LO_BASE_IDX 0 425fb4d8502Sjsg #define mmSQ_SHADER_TBA_HI 0x031d 426fb4d8502Sjsg #define mmSQ_SHADER_TBA_HI_BASE_IDX 0 427fb4d8502Sjsg #define mmSQ_SHADER_TMA_LO 0x031e 428fb4d8502Sjsg #define mmSQ_SHADER_TMA_LO_BASE_IDX 0 429fb4d8502Sjsg #define mmSQ_SHADER_TMA_HI 0x031f 430fb4d8502Sjsg #define mmSQ_SHADER_TMA_HI_BASE_IDX 0 431fb4d8502Sjsg #define mmSQC_DSM_CNTL 0x0320 432fb4d8502Sjsg #define mmSQC_DSM_CNTL_BASE_IDX 0 433fb4d8502Sjsg #define mmSQC_DSM_CNTLA 0x0321 434fb4d8502Sjsg #define mmSQC_DSM_CNTLA_BASE_IDX 0 435fb4d8502Sjsg #define mmSQC_DSM_CNTLB 0x0322 436fb4d8502Sjsg #define mmSQC_DSM_CNTLB_BASE_IDX 0 437fb4d8502Sjsg #define mmSQC_DSM_CNTL2 0x0325 438fb4d8502Sjsg #define mmSQC_DSM_CNTL2_BASE_IDX 0 439fb4d8502Sjsg #define mmSQC_DSM_CNTL2A 0x0326 440fb4d8502Sjsg #define mmSQC_DSM_CNTL2A_BASE_IDX 0 441fb4d8502Sjsg #define mmSQC_DSM_CNTL2B 0x0327 442fb4d8502Sjsg #define mmSQC_DSM_CNTL2B_BASE_IDX 0 443fb4d8502Sjsg #define mmSQC_EDC_FUE_CNTL 0x032b 444fb4d8502Sjsg #define mmSQC_EDC_FUE_CNTL_BASE_IDX 0 445fb4d8502Sjsg #define mmSQC_EDC_CNT2 0x032c 446fb4d8502Sjsg #define mmSQC_EDC_CNT2_BASE_IDX 0 447fb4d8502Sjsg #define mmSQC_EDC_CNT3 0x032d 448fb4d8502Sjsg #define mmSQC_EDC_CNT3_BASE_IDX 0 449fb4d8502Sjsg #define mmSQ_REG_TIMESTAMP 0x0374 450fb4d8502Sjsg #define mmSQ_REG_TIMESTAMP_BASE_IDX 0 451fb4d8502Sjsg #define mmSQ_CMD_TIMESTAMP 0x0375 452fb4d8502Sjsg #define mmSQ_CMD_TIMESTAMP_BASE_IDX 0 453fb4d8502Sjsg #define mmSQ_IND_INDEX 0x0378 454fb4d8502Sjsg #define mmSQ_IND_INDEX_BASE_IDX 0 455fb4d8502Sjsg #define mmSQ_IND_DATA 0x0379 456fb4d8502Sjsg #define mmSQ_IND_DATA_BASE_IDX 0 457fb4d8502Sjsg #define mmSQ_CMD 0x037b 458fb4d8502Sjsg #define mmSQ_CMD_BASE_IDX 0 459fb4d8502Sjsg #define mmSQ_TIME_HI 0x037c 460fb4d8502Sjsg #define mmSQ_TIME_HI_BASE_IDX 0 461fb4d8502Sjsg #define mmSQ_TIME_LO 0x037d 462fb4d8502Sjsg #define mmSQ_TIME_LO_BASE_IDX 0 463fb4d8502Sjsg #define mmSQ_DS_0 0x037f 464fb4d8502Sjsg #define mmSQ_DS_0_BASE_IDX 0 465fb4d8502Sjsg #define mmSQ_DS_1 0x037f 466fb4d8502Sjsg #define mmSQ_DS_1_BASE_IDX 0 467fb4d8502Sjsg #define mmSQ_EXP_0 0x037f 468fb4d8502Sjsg #define mmSQ_EXP_0_BASE_IDX 0 469fb4d8502Sjsg #define mmSQ_EXP_1 0x037f 470fb4d8502Sjsg #define mmSQ_EXP_1_BASE_IDX 0 471fb4d8502Sjsg #define mmSQ_FLAT_0 0x037f 472fb4d8502Sjsg #define mmSQ_FLAT_0_BASE_IDX 0 473fb4d8502Sjsg #define mmSQ_FLAT_1 0x037f 474fb4d8502Sjsg #define mmSQ_FLAT_1_BASE_IDX 0 475fb4d8502Sjsg #define mmSQ_GLBL_0 0x037f 476fb4d8502Sjsg #define mmSQ_GLBL_0_BASE_IDX 0 477fb4d8502Sjsg #define mmSQ_GLBL_1 0x037f 478fb4d8502Sjsg #define mmSQ_GLBL_1_BASE_IDX 0 479fb4d8502Sjsg #define mmSQ_INST 0x037f 480fb4d8502Sjsg #define mmSQ_INST_BASE_IDX 0 481fb4d8502Sjsg #define mmSQ_MIMG_0 0x037f 482fb4d8502Sjsg #define mmSQ_MIMG_0_BASE_IDX 0 483fb4d8502Sjsg #define mmSQ_MIMG_1 0x037f 484fb4d8502Sjsg #define mmSQ_MIMG_1_BASE_IDX 0 485fb4d8502Sjsg #define mmSQ_MTBUF_0 0x037f 486fb4d8502Sjsg #define mmSQ_MTBUF_0_BASE_IDX 0 487fb4d8502Sjsg #define mmSQ_MTBUF_1 0x037f 488fb4d8502Sjsg #define mmSQ_MTBUF_1_BASE_IDX 0 489fb4d8502Sjsg #define mmSQ_MUBUF_0 0x037f 490fb4d8502Sjsg #define mmSQ_MUBUF_0_BASE_IDX 0 491fb4d8502Sjsg #define mmSQ_MUBUF_1 0x037f 492fb4d8502Sjsg #define mmSQ_MUBUF_1_BASE_IDX 0 493fb4d8502Sjsg #define mmSQ_SCRATCH_0 0x037f 494fb4d8502Sjsg #define mmSQ_SCRATCH_0_BASE_IDX 0 495fb4d8502Sjsg #define mmSQ_SCRATCH_1 0x037f 496fb4d8502Sjsg #define mmSQ_SCRATCH_1_BASE_IDX 0 497fb4d8502Sjsg #define mmSQ_SMEM_0 0x037f 498fb4d8502Sjsg #define mmSQ_SMEM_0_BASE_IDX 0 499fb4d8502Sjsg #define mmSQ_SMEM_1 0x037f 500fb4d8502Sjsg #define mmSQ_SMEM_1_BASE_IDX 0 501fb4d8502Sjsg #define mmSQ_SOP1 0x037f 502fb4d8502Sjsg #define mmSQ_SOP1_BASE_IDX 0 503fb4d8502Sjsg #define mmSQ_SOP2 0x037f 504fb4d8502Sjsg #define mmSQ_SOP2_BASE_IDX 0 505fb4d8502Sjsg #define mmSQ_SOPC 0x037f 506fb4d8502Sjsg #define mmSQ_SOPC_BASE_IDX 0 507fb4d8502Sjsg #define mmSQ_SOPK 0x037f 508fb4d8502Sjsg #define mmSQ_SOPK_BASE_IDX 0 509fb4d8502Sjsg #define mmSQ_SOPP 0x037f 510fb4d8502Sjsg #define mmSQ_SOPP_BASE_IDX 0 511fb4d8502Sjsg #define mmSQ_VINTRP 0x037f 512fb4d8502Sjsg #define mmSQ_VINTRP_BASE_IDX 0 513fb4d8502Sjsg #define mmSQ_VOP1 0x037f 514fb4d8502Sjsg #define mmSQ_VOP1_BASE_IDX 0 515fb4d8502Sjsg #define mmSQ_VOP2 0x037f 516fb4d8502Sjsg #define mmSQ_VOP2_BASE_IDX 0 517fb4d8502Sjsg #define mmSQ_VOP3P_0 0x037f 518fb4d8502Sjsg #define mmSQ_VOP3P_0_BASE_IDX 0 519fb4d8502Sjsg #define mmSQ_VOP3P_1 0x037f 520fb4d8502Sjsg #define mmSQ_VOP3P_1_BASE_IDX 0 521fb4d8502Sjsg #define mmSQ_VOP3_0 0x037f 522fb4d8502Sjsg #define mmSQ_VOP3_0_BASE_IDX 0 523fb4d8502Sjsg #define mmSQ_VOP3_0_SDST_ENC 0x037f 524fb4d8502Sjsg #define mmSQ_VOP3_0_SDST_ENC_BASE_IDX 0 525fb4d8502Sjsg #define mmSQ_VOP3_1 0x037f 526fb4d8502Sjsg #define mmSQ_VOP3_1_BASE_IDX 0 527fb4d8502Sjsg #define mmSQ_VOPC 0x037f 528fb4d8502Sjsg #define mmSQ_VOPC_BASE_IDX 0 529fb4d8502Sjsg #define mmSQ_VOP_DPP 0x037f 530fb4d8502Sjsg #define mmSQ_VOP_DPP_BASE_IDX 0 531fb4d8502Sjsg #define mmSQ_VOP_SDWA 0x037f 532fb4d8502Sjsg #define mmSQ_VOP_SDWA_BASE_IDX 0 533fb4d8502Sjsg #define mmSQ_VOP_SDWA_SDST_ENC 0x037f 534fb4d8502Sjsg #define mmSQ_VOP_SDWA_SDST_ENC_BASE_IDX 0 535fb4d8502Sjsg #define mmSQ_LB_CTR_CTRL 0x0398 536fb4d8502Sjsg #define mmSQ_LB_CTR_CTRL_BASE_IDX 0 537fb4d8502Sjsg #define mmSQ_LB_DATA0 0x0399 538fb4d8502Sjsg #define mmSQ_LB_DATA0_BASE_IDX 0 539fb4d8502Sjsg #define mmSQ_LB_DATA1 0x039a 540fb4d8502Sjsg #define mmSQ_LB_DATA1_BASE_IDX 0 541fb4d8502Sjsg #define mmSQ_LB_DATA2 0x039b 542fb4d8502Sjsg #define mmSQ_LB_DATA2_BASE_IDX 0 543fb4d8502Sjsg #define mmSQ_LB_DATA3 0x039c 544fb4d8502Sjsg #define mmSQ_LB_DATA3_BASE_IDX 0 545fb4d8502Sjsg #define mmSQ_LB_CTR_SEL 0x039d 546fb4d8502Sjsg #define mmSQ_LB_CTR_SEL_BASE_IDX 0 547fb4d8502Sjsg #define mmSQ_LB_CTR0_CU 0x039e 548fb4d8502Sjsg #define mmSQ_LB_CTR0_CU_BASE_IDX 0 549fb4d8502Sjsg #define mmSQ_LB_CTR1_CU 0x039f 550fb4d8502Sjsg #define mmSQ_LB_CTR1_CU_BASE_IDX 0 551fb4d8502Sjsg #define mmSQ_LB_CTR2_CU 0x03a0 552fb4d8502Sjsg #define mmSQ_LB_CTR2_CU_BASE_IDX 0 553fb4d8502Sjsg #define mmSQ_LB_CTR3_CU 0x03a1 554fb4d8502Sjsg #define mmSQ_LB_CTR3_CU_BASE_IDX 0 555fb4d8502Sjsg #define mmSQC_EDC_CNT 0x03a2 556fb4d8502Sjsg #define mmSQC_EDC_CNT_BASE_IDX 0 557fb4d8502Sjsg #define mmSQ_EDC_SEC_CNT 0x03a3 558fb4d8502Sjsg #define mmSQ_EDC_SEC_CNT_BASE_IDX 0 559fb4d8502Sjsg #define mmSQ_EDC_DED_CNT 0x03a4 560fb4d8502Sjsg #define mmSQ_EDC_DED_CNT_BASE_IDX 0 561fb4d8502Sjsg #define mmSQ_EDC_INFO 0x03a5 562fb4d8502Sjsg #define mmSQ_EDC_INFO_BASE_IDX 0 563fb4d8502Sjsg #define mmSQ_EDC_CNT 0x03a6 564fb4d8502Sjsg #define mmSQ_EDC_CNT_BASE_IDX 0 565fb4d8502Sjsg #define mmSQ_EDC_FUE_CNTL 0x03a7 566fb4d8502Sjsg #define mmSQ_EDC_FUE_CNTL_BASE_IDX 0 567fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_CMN 0x03b0 568fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_CMN_BASE_IDX 0 569fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_EVENT 0x03b0 570fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_EVENT_BASE_IDX 0 571fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_INST 0x03b0 572fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_INST_BASE_IDX 0 573fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_INST_PC_1_OF_2 0x03b0 574fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_INST_PC_1_OF_2_BASE_IDX 0 575fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_INST_USERDATA_1_OF_2 0x03b0 576fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_INST_USERDATA_1_OF_2_BASE_IDX 0 577fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_ISSUE 0x03b0 578fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_ISSUE_BASE_IDX 0 579fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_MISC 0x03b0 580fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_MISC_BASE_IDX 0 581fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_PERF_1_OF_2 0x03b0 582fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_PERF_1_OF_2_BASE_IDX 0 583fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_REG_1_OF_2 0x03b0 584fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_REG_1_OF_2_BASE_IDX 0 585fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_REG_2_OF_2 0x03b0 586fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_REG_2_OF_2_BASE_IDX 0 587fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_REG_CS_1_OF_2 0x03b0 588fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_REG_CS_1_OF_2_BASE_IDX 0 589fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_REG_CS_2_OF_2 0x03b0 590fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_REG_CS_2_OF_2_BASE_IDX 0 591fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_TIMESTAMP_1_OF_2 0x03b0 592fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_TIMESTAMP_1_OF_2_BASE_IDX 0 593fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_WAVE 0x03b0 594fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_WAVE_BASE_IDX 0 595fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_WAVE_START 0x03b0 596fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_WAVE_START_BASE_IDX 0 597fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_INST_PC_2_OF_2 0x03b1 598fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_INST_PC_2_OF_2_BASE_IDX 0 599fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_INST_USERDATA_2_OF_2 0x03b1 600fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_INST_USERDATA_2_OF_2_BASE_IDX 0 601fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_PERF_2_OF_2 0x03b1 602fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_PERF_2_OF_2_BASE_IDX 0 603fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_TIMESTAMP_2_OF_2 0x03b1 604fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_TIMESTAMP_2_OF_2_BASE_IDX 0 605fb4d8502Sjsg #define mmSQ_WREXEC_EXEC_HI 0x03b1 606fb4d8502Sjsg #define mmSQ_WREXEC_EXEC_HI_BASE_IDX 0 607fb4d8502Sjsg #define mmSQ_WREXEC_EXEC_LO 0x03b1 608fb4d8502Sjsg #define mmSQ_WREXEC_EXEC_LO_BASE_IDX 0 609fb4d8502Sjsg #define mmSQ_BUF_RSRC_WORD0 0x03c0 610fb4d8502Sjsg #define mmSQ_BUF_RSRC_WORD0_BASE_IDX 0 611fb4d8502Sjsg #define mmSQ_BUF_RSRC_WORD1 0x03c1 612fb4d8502Sjsg #define mmSQ_BUF_RSRC_WORD1_BASE_IDX 0 613fb4d8502Sjsg #define mmSQ_BUF_RSRC_WORD2 0x03c2 614fb4d8502Sjsg #define mmSQ_BUF_RSRC_WORD2_BASE_IDX 0 615fb4d8502Sjsg #define mmSQ_BUF_RSRC_WORD3 0x03c3 616fb4d8502Sjsg #define mmSQ_BUF_RSRC_WORD3_BASE_IDX 0 617fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD0 0x03c4 618fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD0_BASE_IDX 0 619fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD1 0x03c5 620fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD1_BASE_IDX 0 621fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD2 0x03c6 622fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD2_BASE_IDX 0 623fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD3 0x03c7 624fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD3_BASE_IDX 0 625fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD4 0x03c8 626fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD4_BASE_IDX 0 627fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD5 0x03c9 628fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD5_BASE_IDX 0 629fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD6 0x03ca 630fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD6_BASE_IDX 0 631fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD7 0x03cb 632fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD7_BASE_IDX 0 633fb4d8502Sjsg #define mmSQ_IMG_SAMP_WORD0 0x03cc 634fb4d8502Sjsg #define mmSQ_IMG_SAMP_WORD0_BASE_IDX 0 635fb4d8502Sjsg #define mmSQ_IMG_SAMP_WORD1 0x03cd 636fb4d8502Sjsg #define mmSQ_IMG_SAMP_WORD1_BASE_IDX 0 637fb4d8502Sjsg #define mmSQ_IMG_SAMP_WORD2 0x03ce 638fb4d8502Sjsg #define mmSQ_IMG_SAMP_WORD2_BASE_IDX 0 639fb4d8502Sjsg #define mmSQ_IMG_SAMP_WORD3 0x03cf 640fb4d8502Sjsg #define mmSQ_IMG_SAMP_WORD3_BASE_IDX 0 641fb4d8502Sjsg #define mmSQ_FLAT_SCRATCH_WORD0 0x03d0 642fb4d8502Sjsg #define mmSQ_FLAT_SCRATCH_WORD0_BASE_IDX 0 643fb4d8502Sjsg #define mmSQ_FLAT_SCRATCH_WORD1 0x03d1 644fb4d8502Sjsg #define mmSQ_FLAT_SCRATCH_WORD1_BASE_IDX 0 645fb4d8502Sjsg #define mmSQ_M0_GPR_IDX_WORD 0x03d2 646fb4d8502Sjsg #define mmSQ_M0_GPR_IDX_WORD_BASE_IDX 0 647fb4d8502Sjsg #define mmSQC_ICACHE_UTCL1_CNTL1 0x03d3 648fb4d8502Sjsg #define mmSQC_ICACHE_UTCL1_CNTL1_BASE_IDX 0 649fb4d8502Sjsg #define mmSQC_ICACHE_UTCL1_CNTL2 0x03d4 650fb4d8502Sjsg #define mmSQC_ICACHE_UTCL1_CNTL2_BASE_IDX 0 651fb4d8502Sjsg #define mmSQC_DCACHE_UTCL1_CNTL1 0x03d5 652fb4d8502Sjsg #define mmSQC_DCACHE_UTCL1_CNTL1_BASE_IDX 0 653fb4d8502Sjsg #define mmSQC_DCACHE_UTCL1_CNTL2 0x03d6 654fb4d8502Sjsg #define mmSQC_DCACHE_UTCL1_CNTL2_BASE_IDX 0 655fb4d8502Sjsg #define mmSQC_ICACHE_UTCL1_STATUS 0x03d7 656fb4d8502Sjsg #define mmSQC_ICACHE_UTCL1_STATUS_BASE_IDX 0 657fb4d8502Sjsg #define mmSQC_DCACHE_UTCL1_STATUS 0x03d8 658fb4d8502Sjsg #define mmSQC_DCACHE_UTCL1_STATUS_BASE_IDX 0 659fb4d8502Sjsg 660fb4d8502Sjsg 661fb4d8502Sjsg // addressBlock: gc_shsdec 662fb4d8502Sjsg // base address: 0x9000 663fb4d8502Sjsg #define mmSX_DEBUG_1 0x0419 664fb4d8502Sjsg #define mmSX_DEBUG_1_BASE_IDX 0 665fb4d8502Sjsg #define mmSPI_PS_MAX_WAVE_ID 0x043a 666fb4d8502Sjsg #define mmSPI_PS_MAX_WAVE_ID_BASE_IDX 0 667fb4d8502Sjsg #define mmSPI_START_PHASE 0x043b 668fb4d8502Sjsg #define mmSPI_START_PHASE_BASE_IDX 0 669fb4d8502Sjsg #define mmSPI_GFX_CNTL 0x043c 670fb4d8502Sjsg #define mmSPI_GFX_CNTL_BASE_IDX 0 671fb4d8502Sjsg #define mmSPI_DSM_CNTL 0x0443 672fb4d8502Sjsg #define mmSPI_DSM_CNTL_BASE_IDX 0 673fb4d8502Sjsg #define mmSPI_DSM_CNTL2 0x0444 674fb4d8502Sjsg #define mmSPI_DSM_CNTL2_BASE_IDX 0 675fb4d8502Sjsg #define mmSPI_EDC_CNT 0x0445 676fb4d8502Sjsg #define mmSPI_EDC_CNT_BASE_IDX 0 677fb4d8502Sjsg #define mmSPI_CONFIG_PS_CU_EN 0x0452 678fb4d8502Sjsg #define mmSPI_CONFIG_PS_CU_EN_BASE_IDX 0 679fb4d8502Sjsg #define mmSPI_WF_LIFETIME_CNTL 0x04aa 680fb4d8502Sjsg #define mmSPI_WF_LIFETIME_CNTL_BASE_IDX 0 681fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_0 0x04ab 682fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_0_BASE_IDX 0 683fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_1 0x04ac 684fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_1_BASE_IDX 0 685fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_2 0x04ad 686fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_2_BASE_IDX 0 687fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_3 0x04ae 688fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_3_BASE_IDX 0 689fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_4 0x04af 690fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_4_BASE_IDX 0 691fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_5 0x04b0 692fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_5_BASE_IDX 0 693fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_6 0x04b1 694fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_6_BASE_IDX 0 695fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_7 0x04b2 696fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_7_BASE_IDX 0 697fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_8 0x04b3 698fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_8_BASE_IDX 0 699fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_9 0x04b4 700fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_9_BASE_IDX 0 701fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_0 0x04b5 702fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_0_BASE_IDX 0 703fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_1 0x04b6 704fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_1_BASE_IDX 0 705fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_2 0x04b7 706fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_2_BASE_IDX 0 707fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_3 0x04b8 708fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_3_BASE_IDX 0 709fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_4 0x04b9 710fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_4_BASE_IDX 0 711fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_5 0x04ba 712fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_5_BASE_IDX 0 713fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_6 0x04bb 714fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_6_BASE_IDX 0 715fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_7 0x04bc 716fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_7_BASE_IDX 0 717fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_8 0x04bd 718fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_8_BASE_IDX 0 719fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_9 0x04be 720fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_9_BASE_IDX 0 721fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_10 0x04bf 722fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_10_BASE_IDX 0 723fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_11 0x04c0 724fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_11_BASE_IDX 0 725fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_12 0x04c1 726fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_12_BASE_IDX 0 727fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_13 0x04c2 728fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_13_BASE_IDX 0 729fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_14 0x04c3 730fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_14_BASE_IDX 0 731fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_15 0x04c4 732fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_15_BASE_IDX 0 733fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_16 0x04c5 734fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_16_BASE_IDX 0 735fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_17 0x04c6 736fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_17_BASE_IDX 0 737fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_18 0x04c7 738fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_18_BASE_IDX 0 739fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_19 0x04c8 740fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_19_BASE_IDX 0 741fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_20 0x04c9 742fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_20_BASE_IDX 0 743fb4d8502Sjsg #define mmSPI_LB_CTR_CTRL 0x04d4 744fb4d8502Sjsg #define mmSPI_LB_CTR_CTRL_BASE_IDX 0 745fb4d8502Sjsg #define mmSPI_LB_CU_MASK 0x04d5 746fb4d8502Sjsg #define mmSPI_LB_CU_MASK_BASE_IDX 0 747fb4d8502Sjsg #define mmSPI_LB_DATA_REG 0x04d6 748fb4d8502Sjsg #define mmSPI_LB_DATA_REG_BASE_IDX 0 749fb4d8502Sjsg #define mmSPI_PG_ENABLE_STATIC_CU_MASK 0x04d7 750fb4d8502Sjsg #define mmSPI_PG_ENABLE_STATIC_CU_MASK_BASE_IDX 0 751fb4d8502Sjsg #define mmSPI_GDS_CREDITS 0x04d8 752fb4d8502Sjsg #define mmSPI_GDS_CREDITS_BASE_IDX 0 753fb4d8502Sjsg #define mmSPI_SX_EXPORT_BUFFER_SIZES 0x04d9 754fb4d8502Sjsg #define mmSPI_SX_EXPORT_BUFFER_SIZES_BASE_IDX 0 755fb4d8502Sjsg #define mmSPI_SX_SCOREBOARD_BUFFER_SIZES 0x04da 756fb4d8502Sjsg #define mmSPI_SX_SCOREBOARD_BUFFER_SIZES_BASE_IDX 0 757fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_STATUS 0x04db 758fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_STATUS_BASE_IDX 0 759fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_0 0x04dc 760fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_0_BASE_IDX 0 761fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_1 0x04dd 762fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_1_BASE_IDX 0 763fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_2 0x04de 764fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_2_BASE_IDX 0 765fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_3 0x04df 766fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_3_BASE_IDX 0 767fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_4 0x04e0 768fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_4_BASE_IDX 0 769fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_5 0x04e1 770fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_5_BASE_IDX 0 771fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_6 0x04e2 772fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_6_BASE_IDX 0 773fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_7 0x04e3 774fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_7_BASE_IDX 0 775fb4d8502Sjsg #define mmSPI_LB_DATA_WAVES 0x04e4 776fb4d8502Sjsg #define mmSPI_LB_DATA_WAVES_BASE_IDX 0 777fb4d8502Sjsg #define mmSPI_LB_DATA_PERCU_WAVE_HSGS 0x04e5 778fb4d8502Sjsg #define mmSPI_LB_DATA_PERCU_WAVE_HSGS_BASE_IDX 0 779fb4d8502Sjsg #define mmSPI_LB_DATA_PERCU_WAVE_VSPS 0x04e6 780fb4d8502Sjsg #define mmSPI_LB_DATA_PERCU_WAVE_VSPS_BASE_IDX 0 781fb4d8502Sjsg #define mmSPI_LB_DATA_PERCU_WAVE_CS 0x04e7 782fb4d8502Sjsg #define mmSPI_LB_DATA_PERCU_WAVE_CS_BASE_IDX 0 783fb4d8502Sjsg #define mmSPI_P0_TRAP_SCREEN_PSBA_LO 0x04ec 784fb4d8502Sjsg #define mmSPI_P0_TRAP_SCREEN_PSBA_LO_BASE_IDX 0 785fb4d8502Sjsg #define mmSPI_P0_TRAP_SCREEN_PSBA_HI 0x04ed 786fb4d8502Sjsg #define mmSPI_P0_TRAP_SCREEN_PSBA_HI_BASE_IDX 0 787fb4d8502Sjsg #define mmSPI_P0_TRAP_SCREEN_PSMA_LO 0x04ee 788fb4d8502Sjsg #define mmSPI_P0_TRAP_SCREEN_PSMA_LO_BASE_IDX 0 789fb4d8502Sjsg #define mmSPI_P0_TRAP_SCREEN_PSMA_HI 0x04ef 790fb4d8502Sjsg #define mmSPI_P0_TRAP_SCREEN_PSMA_HI_BASE_IDX 0 791fb4d8502Sjsg #define mmSPI_P0_TRAP_SCREEN_GPR_MIN 0x04f0 792fb4d8502Sjsg #define mmSPI_P0_TRAP_SCREEN_GPR_MIN_BASE_IDX 0 793fb4d8502Sjsg #define mmSPI_P1_TRAP_SCREEN_PSBA_LO 0x04f1 794fb4d8502Sjsg #define mmSPI_P1_TRAP_SCREEN_PSBA_LO_BASE_IDX 0 795fb4d8502Sjsg #define mmSPI_P1_TRAP_SCREEN_PSBA_HI 0x04f2 796fb4d8502Sjsg #define mmSPI_P1_TRAP_SCREEN_PSBA_HI_BASE_IDX 0 797fb4d8502Sjsg #define mmSPI_P1_TRAP_SCREEN_PSMA_LO 0x04f3 798fb4d8502Sjsg #define mmSPI_P1_TRAP_SCREEN_PSMA_LO_BASE_IDX 0 799fb4d8502Sjsg #define mmSPI_P1_TRAP_SCREEN_PSMA_HI 0x04f4 800fb4d8502Sjsg #define mmSPI_P1_TRAP_SCREEN_PSMA_HI_BASE_IDX 0 801fb4d8502Sjsg #define mmSPI_P1_TRAP_SCREEN_GPR_MIN 0x04f5 802fb4d8502Sjsg #define mmSPI_P1_TRAP_SCREEN_GPR_MIN_BASE_IDX 0 803fb4d8502Sjsg 804fb4d8502Sjsg 805fb4d8502Sjsg // addressBlock: gc_tpdec 806fb4d8502Sjsg // base address: 0x9400 807fb4d8502Sjsg #define mmTD_CNTL 0x0525 808fb4d8502Sjsg #define mmTD_CNTL_BASE_IDX 0 809fb4d8502Sjsg #define mmTD_STATUS 0x0526 810fb4d8502Sjsg #define mmTD_STATUS_BASE_IDX 0 811fb4d8502Sjsg #define mmTD_DSM_CNTL 0x052f 812fb4d8502Sjsg #define mmTD_DSM_CNTL_BASE_IDX 0 813fb4d8502Sjsg #define mmTD_DSM_CNTL2 0x0530 814fb4d8502Sjsg #define mmTD_DSM_CNTL2_BASE_IDX 0 815fb4d8502Sjsg #define mmTD_SCRATCH 0x0533 816fb4d8502Sjsg #define mmTD_SCRATCH_BASE_IDX 0 817fb4d8502Sjsg #define mmTA_CNTL 0x0541 818fb4d8502Sjsg #define mmTA_CNTL_BASE_IDX 0 819fb4d8502Sjsg #define mmTA_CNTL_AUX 0x0542 820fb4d8502Sjsg #define mmTA_CNTL_AUX_BASE_IDX 0 821fb4d8502Sjsg #define mmTA_RESERVED_010C 0x0543 822fb4d8502Sjsg #define mmTA_RESERVED_010C_BASE_IDX 0 823fb4d8502Sjsg #define mmTA_STATUS 0x0548 824fb4d8502Sjsg #define mmTA_STATUS_BASE_IDX 0 825fb4d8502Sjsg #define mmTA_SCRATCH 0x0564 826fb4d8502Sjsg #define mmTA_SCRATCH_BASE_IDX 0 827fb4d8502Sjsg 828fb4d8502Sjsg 829fb4d8502Sjsg // addressBlock: gc_gdsdec 830fb4d8502Sjsg // base address: 0x9700 831fb4d8502Sjsg #define mmGDS_CONFIG 0x05c0 832fb4d8502Sjsg #define mmGDS_CONFIG_BASE_IDX 0 833fb4d8502Sjsg #define mmGDS_CNTL_STATUS 0x05c1 834fb4d8502Sjsg #define mmGDS_CNTL_STATUS_BASE_IDX 0 835fb4d8502Sjsg #define mmGDS_ENHANCE2 0x05c2 836fb4d8502Sjsg #define mmGDS_ENHANCE2_BASE_IDX 0 837fb4d8502Sjsg #define mmGDS_PROTECTION_FAULT 0x05c3 838fb4d8502Sjsg #define mmGDS_PROTECTION_FAULT_BASE_IDX 0 839fb4d8502Sjsg #define mmGDS_VM_PROTECTION_FAULT 0x05c4 840fb4d8502Sjsg #define mmGDS_VM_PROTECTION_FAULT_BASE_IDX 0 841fb4d8502Sjsg #define mmGDS_EDC_CNT 0x05c5 842fb4d8502Sjsg #define mmGDS_EDC_CNT_BASE_IDX 0 843fb4d8502Sjsg #define mmGDS_EDC_GRBM_CNT 0x05c6 844fb4d8502Sjsg #define mmGDS_EDC_GRBM_CNT_BASE_IDX 0 845fb4d8502Sjsg #define mmGDS_EDC_OA_DED 0x05c7 846fb4d8502Sjsg #define mmGDS_EDC_OA_DED_BASE_IDX 0 847fb4d8502Sjsg #define mmGDS_DSM_CNTL 0x05ca 848fb4d8502Sjsg #define mmGDS_DSM_CNTL_BASE_IDX 0 849fb4d8502Sjsg #define mmGDS_EDC_OA_PHY_CNT 0x05cb 850fb4d8502Sjsg #define mmGDS_EDC_OA_PHY_CNT_BASE_IDX 0 851fb4d8502Sjsg #define mmGDS_EDC_OA_PIPE_CNT 0x05cc 852fb4d8502Sjsg #define mmGDS_EDC_OA_PIPE_CNT_BASE_IDX 0 853fb4d8502Sjsg #define mmGDS_DSM_CNTL2 0x05cd 854fb4d8502Sjsg #define mmGDS_DSM_CNTL2_BASE_IDX 0 855fb4d8502Sjsg #define mmGDS_WD_GDS_CSB 0x05ce 856fb4d8502Sjsg #define mmGDS_WD_GDS_CSB_BASE_IDX 0 857fb4d8502Sjsg 858fb4d8502Sjsg 859fb4d8502Sjsg // addressBlock: gc_rbdec 860fb4d8502Sjsg // base address: 0x9800 861fb4d8502Sjsg #define mmDB_DEBUG 0x060c 862fb4d8502Sjsg #define mmDB_DEBUG_BASE_IDX 0 863fb4d8502Sjsg #define mmDB_DEBUG2 0x060d 864fb4d8502Sjsg #define mmDB_DEBUG2_BASE_IDX 0 865fb4d8502Sjsg #define mmDB_DEBUG3 0x060e 866fb4d8502Sjsg #define mmDB_DEBUG3_BASE_IDX 0 867fb4d8502Sjsg #define mmDB_DEBUG4 0x060f 868fb4d8502Sjsg #define mmDB_DEBUG4_BASE_IDX 0 869fb4d8502Sjsg #define mmDB_CREDIT_LIMIT 0x0614 870fb4d8502Sjsg #define mmDB_CREDIT_LIMIT_BASE_IDX 0 871fb4d8502Sjsg #define mmDB_WATERMARKS 0x0615 872fb4d8502Sjsg #define mmDB_WATERMARKS_BASE_IDX 0 873fb4d8502Sjsg #define mmDB_SUBTILE_CONTROL 0x0616 874fb4d8502Sjsg #define mmDB_SUBTILE_CONTROL_BASE_IDX 0 875fb4d8502Sjsg #define mmDB_FREE_CACHELINES 0x0617 876fb4d8502Sjsg #define mmDB_FREE_CACHELINES_BASE_IDX 0 877fb4d8502Sjsg #define mmDB_FIFO_DEPTH1 0x0618 878fb4d8502Sjsg #define mmDB_FIFO_DEPTH1_BASE_IDX 0 879fb4d8502Sjsg #define mmDB_FIFO_DEPTH2 0x0619 880fb4d8502Sjsg #define mmDB_FIFO_DEPTH2_BASE_IDX 0 881fb4d8502Sjsg #define mmDB_EXCEPTION_CONTROL 0x061a 882fb4d8502Sjsg #define mmDB_EXCEPTION_CONTROL_BASE_IDX 0 883fb4d8502Sjsg #define mmDB_RING_CONTROL 0x061b 884fb4d8502Sjsg #define mmDB_RING_CONTROL_BASE_IDX 0 885fb4d8502Sjsg #define mmDB_MEM_ARB_WATERMARKS 0x061c 886fb4d8502Sjsg #define mmDB_MEM_ARB_WATERMARKS_BASE_IDX 0 887fb4d8502Sjsg #define mmDB_RMI_CACHE_POLICY 0x061e 888fb4d8502Sjsg #define mmDB_RMI_CACHE_POLICY_BASE_IDX 0 889fb4d8502Sjsg #define mmDB_DFSM_CONFIG 0x0630 890fb4d8502Sjsg #define mmDB_DFSM_CONFIG_BASE_IDX 0 891fb4d8502Sjsg #define mmDB_DFSM_WATERMARK 0x0631 892fb4d8502Sjsg #define mmDB_DFSM_WATERMARK_BASE_IDX 0 893fb4d8502Sjsg #define mmDB_DFSM_TILES_IN_FLIGHT 0x0632 894fb4d8502Sjsg #define mmDB_DFSM_TILES_IN_FLIGHT_BASE_IDX 0 895fb4d8502Sjsg #define mmDB_DFSM_PRIMS_IN_FLIGHT 0x0633 896fb4d8502Sjsg #define mmDB_DFSM_PRIMS_IN_FLIGHT_BASE_IDX 0 897fb4d8502Sjsg #define mmDB_DFSM_WATCHDOG 0x0634 898fb4d8502Sjsg #define mmDB_DFSM_WATCHDOG_BASE_IDX 0 899fb4d8502Sjsg #define mmDB_DFSM_FLUSH_ENABLE 0x0635 900fb4d8502Sjsg #define mmDB_DFSM_FLUSH_ENABLE_BASE_IDX 0 901fb4d8502Sjsg #define mmDB_DFSM_FLUSH_AUX_EVENT 0x0636 902fb4d8502Sjsg #define mmDB_DFSM_FLUSH_AUX_EVENT_BASE_IDX 0 903fb4d8502Sjsg #define mmCC_RB_REDUNDANCY 0x063c 904fb4d8502Sjsg #define mmCC_RB_REDUNDANCY_BASE_IDX 0 905fb4d8502Sjsg #define mmCC_RB_BACKEND_DISABLE 0x063d 906fb4d8502Sjsg #define mmCC_RB_BACKEND_DISABLE_BASE_IDX 0 907fb4d8502Sjsg #define mmGB_ADDR_CONFIG 0x063e 908fb4d8502Sjsg #define mmGB_ADDR_CONFIG_BASE_IDX 0 909fb4d8502Sjsg #define mmGB_BACKEND_MAP 0x063f 910fb4d8502Sjsg #define mmGB_BACKEND_MAP_BASE_IDX 0 911fb4d8502Sjsg #define mmGB_GPU_ID 0x0640 912fb4d8502Sjsg #define mmGB_GPU_ID_BASE_IDX 0 913fb4d8502Sjsg #define mmCC_RB_DAISY_CHAIN 0x0641 914fb4d8502Sjsg #define mmCC_RB_DAISY_CHAIN_BASE_IDX 0 915fb4d8502Sjsg #define mmGB_ADDR_CONFIG_READ 0x0642 916fb4d8502Sjsg #define mmGB_ADDR_CONFIG_READ_BASE_IDX 0 917fb4d8502Sjsg #define mmGB_TILE_MODE0 0x0644 918fb4d8502Sjsg #define mmGB_TILE_MODE0_BASE_IDX 0 919fb4d8502Sjsg #define mmGB_TILE_MODE1 0x0645 920fb4d8502Sjsg #define mmGB_TILE_MODE1_BASE_IDX 0 921fb4d8502Sjsg #define mmGB_TILE_MODE2 0x0646 922fb4d8502Sjsg #define mmGB_TILE_MODE2_BASE_IDX 0 923fb4d8502Sjsg #define mmGB_TILE_MODE3 0x0647 924fb4d8502Sjsg #define mmGB_TILE_MODE3_BASE_IDX 0 925fb4d8502Sjsg #define mmGB_TILE_MODE4 0x0648 926fb4d8502Sjsg #define mmGB_TILE_MODE4_BASE_IDX 0 927fb4d8502Sjsg #define mmGB_TILE_MODE5 0x0649 928fb4d8502Sjsg #define mmGB_TILE_MODE5_BASE_IDX 0 929fb4d8502Sjsg #define mmGB_TILE_MODE6 0x064a 930fb4d8502Sjsg #define mmGB_TILE_MODE6_BASE_IDX 0 931fb4d8502Sjsg #define mmGB_TILE_MODE7 0x064b 932fb4d8502Sjsg #define mmGB_TILE_MODE7_BASE_IDX 0 933fb4d8502Sjsg #define mmGB_TILE_MODE8 0x064c 934fb4d8502Sjsg #define mmGB_TILE_MODE8_BASE_IDX 0 935fb4d8502Sjsg #define mmGB_TILE_MODE9 0x064d 936fb4d8502Sjsg #define mmGB_TILE_MODE9_BASE_IDX 0 937fb4d8502Sjsg #define mmGB_TILE_MODE10 0x064e 938fb4d8502Sjsg #define mmGB_TILE_MODE10_BASE_IDX 0 939fb4d8502Sjsg #define mmGB_TILE_MODE11 0x064f 940fb4d8502Sjsg #define mmGB_TILE_MODE11_BASE_IDX 0 941fb4d8502Sjsg #define mmGB_TILE_MODE12 0x0650 942fb4d8502Sjsg #define mmGB_TILE_MODE12_BASE_IDX 0 943fb4d8502Sjsg #define mmGB_TILE_MODE13 0x0651 944fb4d8502Sjsg #define mmGB_TILE_MODE13_BASE_IDX 0 945fb4d8502Sjsg #define mmGB_TILE_MODE14 0x0652 946fb4d8502Sjsg #define mmGB_TILE_MODE14_BASE_IDX 0 947fb4d8502Sjsg #define mmGB_TILE_MODE15 0x0653 948fb4d8502Sjsg #define mmGB_TILE_MODE15_BASE_IDX 0 949fb4d8502Sjsg #define mmGB_TILE_MODE16 0x0654 950fb4d8502Sjsg #define mmGB_TILE_MODE16_BASE_IDX 0 951fb4d8502Sjsg #define mmGB_TILE_MODE17 0x0655 952fb4d8502Sjsg #define mmGB_TILE_MODE17_BASE_IDX 0 953fb4d8502Sjsg #define mmGB_TILE_MODE18 0x0656 954fb4d8502Sjsg #define mmGB_TILE_MODE18_BASE_IDX 0 955fb4d8502Sjsg #define mmGB_TILE_MODE19 0x0657 956fb4d8502Sjsg #define mmGB_TILE_MODE19_BASE_IDX 0 957fb4d8502Sjsg #define mmGB_TILE_MODE20 0x0658 958fb4d8502Sjsg #define mmGB_TILE_MODE20_BASE_IDX 0 959fb4d8502Sjsg #define mmGB_TILE_MODE21 0x0659 960fb4d8502Sjsg #define mmGB_TILE_MODE21_BASE_IDX 0 961fb4d8502Sjsg #define mmGB_TILE_MODE22 0x065a 962fb4d8502Sjsg #define mmGB_TILE_MODE22_BASE_IDX 0 963fb4d8502Sjsg #define mmGB_TILE_MODE23 0x065b 964fb4d8502Sjsg #define mmGB_TILE_MODE23_BASE_IDX 0 965fb4d8502Sjsg #define mmGB_TILE_MODE24 0x065c 966fb4d8502Sjsg #define mmGB_TILE_MODE24_BASE_IDX 0 967fb4d8502Sjsg #define mmGB_TILE_MODE25 0x065d 968fb4d8502Sjsg #define mmGB_TILE_MODE25_BASE_IDX 0 969fb4d8502Sjsg #define mmGB_TILE_MODE26 0x065e 970fb4d8502Sjsg #define mmGB_TILE_MODE26_BASE_IDX 0 971fb4d8502Sjsg #define mmGB_TILE_MODE27 0x065f 972fb4d8502Sjsg #define mmGB_TILE_MODE27_BASE_IDX 0 973fb4d8502Sjsg #define mmGB_TILE_MODE28 0x0660 974fb4d8502Sjsg #define mmGB_TILE_MODE28_BASE_IDX 0 975fb4d8502Sjsg #define mmGB_TILE_MODE29 0x0661 976fb4d8502Sjsg #define mmGB_TILE_MODE29_BASE_IDX 0 977fb4d8502Sjsg #define mmGB_TILE_MODE30 0x0662 978fb4d8502Sjsg #define mmGB_TILE_MODE30_BASE_IDX 0 979fb4d8502Sjsg #define mmGB_TILE_MODE31 0x0663 980fb4d8502Sjsg #define mmGB_TILE_MODE31_BASE_IDX 0 981fb4d8502Sjsg #define mmGB_MACROTILE_MODE0 0x0664 982fb4d8502Sjsg #define mmGB_MACROTILE_MODE0_BASE_IDX 0 983fb4d8502Sjsg #define mmGB_MACROTILE_MODE1 0x0665 984fb4d8502Sjsg #define mmGB_MACROTILE_MODE1_BASE_IDX 0 985fb4d8502Sjsg #define mmGB_MACROTILE_MODE2 0x0666 986fb4d8502Sjsg #define mmGB_MACROTILE_MODE2_BASE_IDX 0 987fb4d8502Sjsg #define mmGB_MACROTILE_MODE3 0x0667 988fb4d8502Sjsg #define mmGB_MACROTILE_MODE3_BASE_IDX 0 989fb4d8502Sjsg #define mmGB_MACROTILE_MODE4 0x0668 990fb4d8502Sjsg #define mmGB_MACROTILE_MODE4_BASE_IDX 0 991fb4d8502Sjsg #define mmGB_MACROTILE_MODE5 0x0669 992fb4d8502Sjsg #define mmGB_MACROTILE_MODE5_BASE_IDX 0 993fb4d8502Sjsg #define mmGB_MACROTILE_MODE6 0x066a 994fb4d8502Sjsg #define mmGB_MACROTILE_MODE6_BASE_IDX 0 995fb4d8502Sjsg #define mmGB_MACROTILE_MODE7 0x066b 996fb4d8502Sjsg #define mmGB_MACROTILE_MODE7_BASE_IDX 0 997fb4d8502Sjsg #define mmGB_MACROTILE_MODE8 0x066c 998fb4d8502Sjsg #define mmGB_MACROTILE_MODE8_BASE_IDX 0 999fb4d8502Sjsg #define mmGB_MACROTILE_MODE9 0x066d 1000fb4d8502Sjsg #define mmGB_MACROTILE_MODE9_BASE_IDX 0 1001fb4d8502Sjsg #define mmGB_MACROTILE_MODE10 0x066e 1002fb4d8502Sjsg #define mmGB_MACROTILE_MODE10_BASE_IDX 0 1003fb4d8502Sjsg #define mmGB_MACROTILE_MODE11 0x066f 1004fb4d8502Sjsg #define mmGB_MACROTILE_MODE11_BASE_IDX 0 1005fb4d8502Sjsg #define mmGB_MACROTILE_MODE12 0x0670 1006fb4d8502Sjsg #define mmGB_MACROTILE_MODE12_BASE_IDX 0 1007fb4d8502Sjsg #define mmGB_MACROTILE_MODE13 0x0671 1008fb4d8502Sjsg #define mmGB_MACROTILE_MODE13_BASE_IDX 0 1009fb4d8502Sjsg #define mmGB_MACROTILE_MODE14 0x0672 1010fb4d8502Sjsg #define mmGB_MACROTILE_MODE14_BASE_IDX 0 1011fb4d8502Sjsg #define mmGB_MACROTILE_MODE15 0x0673 1012fb4d8502Sjsg #define mmGB_MACROTILE_MODE15_BASE_IDX 0 1013fb4d8502Sjsg #define mmCB_HW_CONTROL 0x0680 1014fb4d8502Sjsg #define mmCB_HW_CONTROL_BASE_IDX 0 1015fb4d8502Sjsg #define mmCB_HW_CONTROL_1 0x0681 1016fb4d8502Sjsg #define mmCB_HW_CONTROL_1_BASE_IDX 0 1017fb4d8502Sjsg #define mmCB_HW_CONTROL_2 0x0682 1018fb4d8502Sjsg #define mmCB_HW_CONTROL_2_BASE_IDX 0 1019fb4d8502Sjsg #define mmCB_HW_CONTROL_3 0x0683 1020fb4d8502Sjsg #define mmCB_HW_CONTROL_3_BASE_IDX 0 1021fb4d8502Sjsg #define mmCB_HW_MEM_ARBITER_RD 0x0686 1022fb4d8502Sjsg #define mmCB_HW_MEM_ARBITER_RD_BASE_IDX 0 1023fb4d8502Sjsg #define mmCB_HW_MEM_ARBITER_WR 0x0687 1024fb4d8502Sjsg #define mmCB_HW_MEM_ARBITER_WR_BASE_IDX 0 1025fb4d8502Sjsg #define mmCB_DCC_CONFIG 0x0688 1026fb4d8502Sjsg #define mmCB_DCC_CONFIG_BASE_IDX 0 1027fb4d8502Sjsg #define mmGC_USER_RB_REDUNDANCY 0x06de 1028fb4d8502Sjsg #define mmGC_USER_RB_REDUNDANCY_BASE_IDX 0 1029fb4d8502Sjsg #define mmGC_USER_RB_BACKEND_DISABLE 0x06df 1030fb4d8502Sjsg #define mmGC_USER_RB_BACKEND_DISABLE_BASE_IDX 0 1031fb4d8502Sjsg 1032fb4d8502Sjsg 1033fb4d8502Sjsg // addressBlock: gc_ea_gceadec2 1034fb4d8502Sjsg // base address: 0x9c00 1035fb4d8502Sjsg #define mmGCEA_EDC_CNT 0x0701 1036fb4d8502Sjsg #define mmGCEA_EDC_CNT_BASE_IDX 0 1037fb4d8502Sjsg #define mmGCEA_EDC_CNT2 0x0702 1038fb4d8502Sjsg #define mmGCEA_EDC_CNT2_BASE_IDX 0 1039fb4d8502Sjsg #define mmGCEA_DSM_CNTL 0x0703 1040fb4d8502Sjsg #define mmGCEA_DSM_CNTL_BASE_IDX 0 1041fb4d8502Sjsg #define mmGCEA_DSM_CNTLA 0x0704 1042fb4d8502Sjsg #define mmGCEA_DSM_CNTLA_BASE_IDX 0 1043fb4d8502Sjsg #define mmGCEA_DSM_CNTLB 0x0705 1044fb4d8502Sjsg #define mmGCEA_DSM_CNTLB_BASE_IDX 0 1045fb4d8502Sjsg #define mmGCEA_DSM_CNTL2 0x0706 1046fb4d8502Sjsg #define mmGCEA_DSM_CNTL2_BASE_IDX 0 1047fb4d8502Sjsg #define mmGCEA_DSM_CNTL2A 0x0707 1048fb4d8502Sjsg #define mmGCEA_DSM_CNTL2A_BASE_IDX 0 1049fb4d8502Sjsg #define mmGCEA_DSM_CNTL2B 0x0708 1050fb4d8502Sjsg #define mmGCEA_DSM_CNTL2B_BASE_IDX 0 1051fb4d8502Sjsg #define mmGCEA_TCC_XBR_CREDITS 0x0709 1052fb4d8502Sjsg #define mmGCEA_TCC_XBR_CREDITS_BASE_IDX 0 1053fb4d8502Sjsg #define mmGCEA_TCC_XBR_MAXBURST 0x070a 1054fb4d8502Sjsg #define mmGCEA_TCC_XBR_MAXBURST_BASE_IDX 0 1055fb4d8502Sjsg #define mmGCEA_PROBE_CNTL 0x070b 1056fb4d8502Sjsg #define mmGCEA_PROBE_CNTL_BASE_IDX 0 1057fb4d8502Sjsg #define mmGCEA_PROBE_MAP 0x070c 1058fb4d8502Sjsg #define mmGCEA_PROBE_MAP_BASE_IDX 0 1059fb4d8502Sjsg #define mmGCEA_ERR_STATUS 0x070d 1060fb4d8502Sjsg #define mmGCEA_ERR_STATUS_BASE_IDX 0 1061fb4d8502Sjsg #define mmGCEA_MISC2 0x070e 1062fb4d8502Sjsg #define mmGCEA_MISC2_BASE_IDX 0 1063fb4d8502Sjsg #define mmGCEA_SDP_BACKDOOR_CMDCREDITS0 0x070f 1064fb4d8502Sjsg #define mmGCEA_SDP_BACKDOOR_CMDCREDITS0_BASE_IDX 0 1065fb4d8502Sjsg #define mmGCEA_SDP_BACKDOOR_CMDCREDITS1 0x0710 1066fb4d8502Sjsg #define mmGCEA_SDP_BACKDOOR_CMDCREDITS1_BASE_IDX 0 1067fb4d8502Sjsg #define mmGCEA_SDP_BACKDOOR_DATACREDITS0 0x0711 1068fb4d8502Sjsg #define mmGCEA_SDP_BACKDOOR_DATACREDITS0_BASE_IDX 0 1069fb4d8502Sjsg #define mmGCEA_SDP_BACKDOOR_DATACREDITS1 0x0712 1070fb4d8502Sjsg #define mmGCEA_SDP_BACKDOOR_DATACREDITS1_BASE_IDX 0 1071fb4d8502Sjsg #define mmGCEA_SDP_BACKDOOR_MISCCREDITS 0x0713 1072fb4d8502Sjsg #define mmGCEA_SDP_BACKDOOR_MISCCREDITS_BASE_IDX 0 1073fb4d8502Sjsg #define mmGCEA_SDP_ENABLE 0x0714 1074fb4d8502Sjsg #define mmGCEA_SDP_ENABLE_BASE_IDX 0 1075fb4d8502Sjsg 1076fb4d8502Sjsg 1077fb4d8502Sjsg // addressBlock: gc_rmi_rmidec 1078fb4d8502Sjsg // base address: 0x9e00 1079fb4d8502Sjsg #define mmRMI_GENERAL_CNTL 0x0780 1080fb4d8502Sjsg #define mmRMI_GENERAL_CNTL_BASE_IDX 0 1081fb4d8502Sjsg #define mmRMI_GENERAL_CNTL1 0x0781 1082fb4d8502Sjsg #define mmRMI_GENERAL_CNTL1_BASE_IDX 0 1083fb4d8502Sjsg #define mmRMI_GENERAL_STATUS 0x0782 1084fb4d8502Sjsg #define mmRMI_GENERAL_STATUS_BASE_IDX 0 1085fb4d8502Sjsg #define mmRMI_SUBBLOCK_STATUS0 0x0783 1086fb4d8502Sjsg #define mmRMI_SUBBLOCK_STATUS0_BASE_IDX 0 1087fb4d8502Sjsg #define mmRMI_SUBBLOCK_STATUS1 0x0784 1088fb4d8502Sjsg #define mmRMI_SUBBLOCK_STATUS1_BASE_IDX 0 1089fb4d8502Sjsg #define mmRMI_SUBBLOCK_STATUS2 0x0785 1090fb4d8502Sjsg #define mmRMI_SUBBLOCK_STATUS2_BASE_IDX 0 1091fb4d8502Sjsg #define mmRMI_SUBBLOCK_STATUS3 0x0786 1092fb4d8502Sjsg #define mmRMI_SUBBLOCK_STATUS3_BASE_IDX 0 1093fb4d8502Sjsg #define mmRMI_XBAR_CONFIG 0x0787 1094fb4d8502Sjsg #define mmRMI_XBAR_CONFIG_BASE_IDX 0 1095fb4d8502Sjsg #define mmRMI_PROBE_POP_LOGIC_CNTL 0x0788 1096fb4d8502Sjsg #define mmRMI_PROBE_POP_LOGIC_CNTL_BASE_IDX 0 1097fb4d8502Sjsg #define mmRMI_UTC_XNACK_N_MISC_CNTL 0x0789 1098fb4d8502Sjsg #define mmRMI_UTC_XNACK_N_MISC_CNTL_BASE_IDX 0 1099fb4d8502Sjsg #define mmRMI_DEMUX_CNTL 0x078a 1100fb4d8502Sjsg #define mmRMI_DEMUX_CNTL_BASE_IDX 0 1101fb4d8502Sjsg #define mmRMI_UTCL1_CNTL1 0x078b 1102fb4d8502Sjsg #define mmRMI_UTCL1_CNTL1_BASE_IDX 0 1103fb4d8502Sjsg #define mmRMI_UTCL1_CNTL2 0x078c 1104fb4d8502Sjsg #define mmRMI_UTCL1_CNTL2_BASE_IDX 0 1105fb4d8502Sjsg #define mmRMI_UTC_UNIT_CONFIG 0x078d 1106fb4d8502Sjsg #define mmRMI_UTC_UNIT_CONFIG_BASE_IDX 0 1107fb4d8502Sjsg #define mmRMI_TCIW_FORMATTER0_CNTL 0x078e 1108fb4d8502Sjsg #define mmRMI_TCIW_FORMATTER0_CNTL_BASE_IDX 0 1109fb4d8502Sjsg #define mmRMI_TCIW_FORMATTER1_CNTL 0x078f 1110fb4d8502Sjsg #define mmRMI_TCIW_FORMATTER1_CNTL_BASE_IDX 0 1111fb4d8502Sjsg #define mmRMI_SCOREBOARD_CNTL 0x0790 1112fb4d8502Sjsg #define mmRMI_SCOREBOARD_CNTL_BASE_IDX 0 1113fb4d8502Sjsg #define mmRMI_SCOREBOARD_STATUS0 0x0791 1114fb4d8502Sjsg #define mmRMI_SCOREBOARD_STATUS0_BASE_IDX 0 1115fb4d8502Sjsg #define mmRMI_SCOREBOARD_STATUS1 0x0792 1116fb4d8502Sjsg #define mmRMI_SCOREBOARD_STATUS1_BASE_IDX 0 1117fb4d8502Sjsg #define mmRMI_SCOREBOARD_STATUS2 0x0793 1118fb4d8502Sjsg #define mmRMI_SCOREBOARD_STATUS2_BASE_IDX 0 1119fb4d8502Sjsg #define mmRMI_XBAR_ARBITER_CONFIG 0x0794 1120fb4d8502Sjsg #define mmRMI_XBAR_ARBITER_CONFIG_BASE_IDX 0 1121fb4d8502Sjsg #define mmRMI_XBAR_ARBITER_CONFIG_1 0x0795 1122fb4d8502Sjsg #define mmRMI_XBAR_ARBITER_CONFIG_1_BASE_IDX 0 1123fb4d8502Sjsg #define mmRMI_CLOCK_CNTRL 0x0796 1124fb4d8502Sjsg #define mmRMI_CLOCK_CNTRL_BASE_IDX 0 1125fb4d8502Sjsg #define mmRMI_UTCL1_STATUS 0x0797 1126fb4d8502Sjsg #define mmRMI_UTCL1_STATUS_BASE_IDX 0 1127fb4d8502Sjsg #define mmRMI_SPARE 0x079e 1128fb4d8502Sjsg #define mmRMI_SPARE_BASE_IDX 0 1129fb4d8502Sjsg #define mmRMI_SPARE_1 0x079f 1130fb4d8502Sjsg #define mmRMI_SPARE_1_BASE_IDX 0 1131fb4d8502Sjsg #define mmRMI_SPARE_2 0x07a0 1132fb4d8502Sjsg #define mmRMI_SPARE_2_BASE_IDX 0 1133fb4d8502Sjsg 1134fb4d8502Sjsg 1135fb4d8502Sjsg // addressBlock: gc_dbgu_gfx_dbgudec 1136fb4d8502Sjsg // base address: 0x9f00 1137fb4d8502Sjsg #define mmport_a_addr 0x07c0 1138fb4d8502Sjsg #define mmport_a_addr_BASE_IDX 0 1139fb4d8502Sjsg #define mmport_a_data_lo 0x07c1 1140fb4d8502Sjsg #define mmport_a_data_lo_BASE_IDX 0 1141fb4d8502Sjsg #define mmport_a_data_hi 0x07c2 1142fb4d8502Sjsg #define mmport_a_data_hi_BASE_IDX 0 1143fb4d8502Sjsg #define mmport_b_addr 0x07c3 1144fb4d8502Sjsg #define mmport_b_addr_BASE_IDX 0 1145fb4d8502Sjsg #define mmport_b_data_lo 0x07c4 1146fb4d8502Sjsg #define mmport_b_data_lo_BASE_IDX 0 1147fb4d8502Sjsg #define mmport_b_data_hi 0x07c5 1148fb4d8502Sjsg #define mmport_b_data_hi_BASE_IDX 0 1149fb4d8502Sjsg #define mmport_c_addr 0x07c6 1150fb4d8502Sjsg #define mmport_c_addr_BASE_IDX 0 1151fb4d8502Sjsg #define mmport_c_data_lo 0x07c7 1152fb4d8502Sjsg #define mmport_c_data_lo_BASE_IDX 0 1153fb4d8502Sjsg #define mmport_c_data_hi 0x07c8 1154fb4d8502Sjsg #define mmport_c_data_hi_BASE_IDX 0 1155fb4d8502Sjsg #define mmport_d_addr 0x07c9 1156fb4d8502Sjsg #define mmport_d_addr_BASE_IDX 0 1157fb4d8502Sjsg #define mmport_d_data_lo 0x07ca 1158fb4d8502Sjsg #define mmport_d_data_lo_BASE_IDX 0 1159fb4d8502Sjsg #define mmport_d_data_hi 0x07cb 1160fb4d8502Sjsg #define mmport_d_data_hi_BASE_IDX 0 1161fb4d8502Sjsg 1162fb4d8502Sjsg 1163fb4d8502Sjsg // addressBlock: gc_utcl2_atcl2dec 1164fb4d8502Sjsg // base address: 0xa000 1165fb4d8502Sjsg #define mmATC_L2_CNTL 0x0800 1166fb4d8502Sjsg #define mmATC_L2_CNTL_BASE_IDX 0 1167fb4d8502Sjsg #define mmATC_L2_CNTL2 0x0801 1168fb4d8502Sjsg #define mmATC_L2_CNTL2_BASE_IDX 0 1169fb4d8502Sjsg #define mmATC_L2_CACHE_DATA0 0x0804 1170fb4d8502Sjsg #define mmATC_L2_CACHE_DATA0_BASE_IDX 0 1171fb4d8502Sjsg #define mmATC_L2_CACHE_DATA1 0x0805 1172fb4d8502Sjsg #define mmATC_L2_CACHE_DATA1_BASE_IDX 0 1173fb4d8502Sjsg #define mmATC_L2_CACHE_DATA2 0x0806 1174fb4d8502Sjsg #define mmATC_L2_CACHE_DATA2_BASE_IDX 0 1175fb4d8502Sjsg #define mmATC_L2_CNTL3 0x0807 1176fb4d8502Sjsg #define mmATC_L2_CNTL3_BASE_IDX 0 1177fb4d8502Sjsg #define mmATC_L2_STATUS 0x0808 1178fb4d8502Sjsg #define mmATC_L2_STATUS_BASE_IDX 0 1179fb4d8502Sjsg #define mmATC_L2_STATUS2 0x0809 1180fb4d8502Sjsg #define mmATC_L2_STATUS2_BASE_IDX 0 1181fb4d8502Sjsg #define mmATC_L2_MISC_CG 0x080a 1182fb4d8502Sjsg #define mmATC_L2_MISC_CG_BASE_IDX 0 1183fb4d8502Sjsg #define mmATC_L2_MEM_POWER_LS 0x080b 1184fb4d8502Sjsg #define mmATC_L2_MEM_POWER_LS_BASE_IDX 0 1185fb4d8502Sjsg #define mmATC_L2_CGTT_CLK_CTRL 0x080c 1186fb4d8502Sjsg #define mmATC_L2_CGTT_CLK_CTRL_BASE_IDX 0 1187fb4d8502Sjsg 1188fb4d8502Sjsg 1189fb4d8502Sjsg // addressBlock: gc_utcl2_vml2pfdec 1190fb4d8502Sjsg // base address: 0xa100 1191fb4d8502Sjsg #define mmVM_L2_CNTL 0x0840 1192fb4d8502Sjsg #define mmVM_L2_CNTL_BASE_IDX 0 1193fb4d8502Sjsg #define mmVM_L2_CNTL2 0x0841 1194fb4d8502Sjsg #define mmVM_L2_CNTL2_BASE_IDX 0 1195fb4d8502Sjsg #define mmVM_L2_CNTL3 0x0842 1196fb4d8502Sjsg #define mmVM_L2_CNTL3_BASE_IDX 0 1197fb4d8502Sjsg #define mmVM_L2_STATUS 0x0843 1198fb4d8502Sjsg #define mmVM_L2_STATUS_BASE_IDX 0 1199fb4d8502Sjsg #define mmVM_DUMMY_PAGE_FAULT_CNTL 0x0844 1200fb4d8502Sjsg #define mmVM_DUMMY_PAGE_FAULT_CNTL_BASE_IDX 0 1201fb4d8502Sjsg #define mmVM_DUMMY_PAGE_FAULT_ADDR_LO32 0x0845 1202fb4d8502Sjsg #define mmVM_DUMMY_PAGE_FAULT_ADDR_LO32_BASE_IDX 0 1203fb4d8502Sjsg #define mmVM_DUMMY_PAGE_FAULT_ADDR_HI32 0x0846 1204fb4d8502Sjsg #define mmVM_DUMMY_PAGE_FAULT_ADDR_HI32_BASE_IDX 0 1205fb4d8502Sjsg #define mmVM_L2_PROTECTION_FAULT_CNTL 0x0847 1206fb4d8502Sjsg #define mmVM_L2_PROTECTION_FAULT_CNTL_BASE_IDX 0 1207fb4d8502Sjsg #define mmVM_L2_PROTECTION_FAULT_CNTL2 0x0848 1208fb4d8502Sjsg #define mmVM_L2_PROTECTION_FAULT_CNTL2_BASE_IDX 0 1209fb4d8502Sjsg #define mmVM_L2_PROTECTION_FAULT_MM_CNTL3 0x0849 1210fb4d8502Sjsg #define mmVM_L2_PROTECTION_FAULT_MM_CNTL3_BASE_IDX 0 1211fb4d8502Sjsg #define mmVM_L2_PROTECTION_FAULT_MM_CNTL4 0x084a 1212fb4d8502Sjsg #define mmVM_L2_PROTECTION_FAULT_MM_CNTL4_BASE_IDX 0 1213fb4d8502Sjsg #define mmVM_L2_PROTECTION_FAULT_STATUS 0x084b 1214fb4d8502Sjsg #define mmVM_L2_PROTECTION_FAULT_STATUS_BASE_IDX 0 1215fb4d8502Sjsg #define mmVM_L2_PROTECTION_FAULT_ADDR_LO32 0x084c 1216fb4d8502Sjsg #define mmVM_L2_PROTECTION_FAULT_ADDR_LO32_BASE_IDX 0 1217fb4d8502Sjsg #define mmVM_L2_PROTECTION_FAULT_ADDR_HI32 0x084d 1218fb4d8502Sjsg #define mmVM_L2_PROTECTION_FAULT_ADDR_HI32_BASE_IDX 0 1219fb4d8502Sjsg #define mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32 0x084e 1220fb4d8502Sjsg #define mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32_BASE_IDX 0 1221fb4d8502Sjsg #define mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32 0x084f 1222fb4d8502Sjsg #define mmVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32_BASE_IDX 0 1223fb4d8502Sjsg #define mmVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32 0x0851 1224fb4d8502Sjsg #define mmVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_LO32_BASE_IDX 0 1225fb4d8502Sjsg #define mmVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32 0x0852 1226fb4d8502Sjsg #define mmVM_L2_CONTEXT1_IDENTITY_APERTURE_LOW_ADDR_HI32_BASE_IDX 0 1227fb4d8502Sjsg #define mmVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32 0x0853 1228fb4d8502Sjsg #define mmVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_LO32_BASE_IDX 0 1229fb4d8502Sjsg #define mmVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32 0x0854 1230fb4d8502Sjsg #define mmVM_L2_CONTEXT1_IDENTITY_APERTURE_HIGH_ADDR_HI32_BASE_IDX 0 1231fb4d8502Sjsg #define mmVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32 0x0855 1232fb4d8502Sjsg #define mmVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_LO32_BASE_IDX 0 1233fb4d8502Sjsg #define mmVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32 0x0856 1234fb4d8502Sjsg #define mmVM_L2_CONTEXT_IDENTITY_PHYSICAL_OFFSET_HI32_BASE_IDX 0 1235fb4d8502Sjsg #define mmVM_L2_CNTL4 0x0857 1236fb4d8502Sjsg #define mmVM_L2_CNTL4_BASE_IDX 0 1237fb4d8502Sjsg #define mmVM_L2_MM_GROUP_RT_CLASSES 0x0858 1238fb4d8502Sjsg #define mmVM_L2_MM_GROUP_RT_CLASSES_BASE_IDX 0 1239fb4d8502Sjsg #define mmVM_L2_BANK_SELECT_RESERVED_CID 0x0859 1240fb4d8502Sjsg #define mmVM_L2_BANK_SELECT_RESERVED_CID_BASE_IDX 0 1241fb4d8502Sjsg #define mmVM_L2_BANK_SELECT_RESERVED_CID2 0x085a 1242fb4d8502Sjsg #define mmVM_L2_BANK_SELECT_RESERVED_CID2_BASE_IDX 0 1243fb4d8502Sjsg #define mmVM_L2_CACHE_PARITY_CNTL 0x085b 1244fb4d8502Sjsg #define mmVM_L2_CACHE_PARITY_CNTL_BASE_IDX 0 1245fb4d8502Sjsg #define mmVM_L2_CGTT_CLK_CTRL 0x085e 1246fb4d8502Sjsg #define mmVM_L2_CGTT_CLK_CTRL_BASE_IDX 0 1247fb4d8502Sjsg 1248fb4d8502Sjsg 1249fb4d8502Sjsg // addressBlock: gc_utcl2_vml2vcdec 1250fb4d8502Sjsg // base address: 0xa200 1251fb4d8502Sjsg #define mmVM_CONTEXT0_CNTL 0x0880 1252fb4d8502Sjsg #define mmVM_CONTEXT0_CNTL_BASE_IDX 0 1253fb4d8502Sjsg #define mmVM_CONTEXT1_CNTL 0x0881 1254fb4d8502Sjsg #define mmVM_CONTEXT1_CNTL_BASE_IDX 0 1255fb4d8502Sjsg #define mmVM_CONTEXT2_CNTL 0x0882 1256fb4d8502Sjsg #define mmVM_CONTEXT2_CNTL_BASE_IDX 0 1257fb4d8502Sjsg #define mmVM_CONTEXT3_CNTL 0x0883 1258fb4d8502Sjsg #define mmVM_CONTEXT3_CNTL_BASE_IDX 0 1259fb4d8502Sjsg #define mmVM_CONTEXT4_CNTL 0x0884 1260fb4d8502Sjsg #define mmVM_CONTEXT4_CNTL_BASE_IDX 0 1261fb4d8502Sjsg #define mmVM_CONTEXT5_CNTL 0x0885 1262fb4d8502Sjsg #define mmVM_CONTEXT5_CNTL_BASE_IDX 0 1263fb4d8502Sjsg #define mmVM_CONTEXT6_CNTL 0x0886 1264fb4d8502Sjsg #define mmVM_CONTEXT6_CNTL_BASE_IDX 0 1265fb4d8502Sjsg #define mmVM_CONTEXT7_CNTL 0x0887 1266fb4d8502Sjsg #define mmVM_CONTEXT7_CNTL_BASE_IDX 0 1267fb4d8502Sjsg #define mmVM_CONTEXT8_CNTL 0x0888 1268fb4d8502Sjsg #define mmVM_CONTEXT8_CNTL_BASE_IDX 0 1269fb4d8502Sjsg #define mmVM_CONTEXT9_CNTL 0x0889 1270fb4d8502Sjsg #define mmVM_CONTEXT9_CNTL_BASE_IDX 0 1271fb4d8502Sjsg #define mmVM_CONTEXT10_CNTL 0x088a 1272fb4d8502Sjsg #define mmVM_CONTEXT10_CNTL_BASE_IDX 0 1273fb4d8502Sjsg #define mmVM_CONTEXT11_CNTL 0x088b 1274fb4d8502Sjsg #define mmVM_CONTEXT11_CNTL_BASE_IDX 0 1275fb4d8502Sjsg #define mmVM_CONTEXT12_CNTL 0x088c 1276fb4d8502Sjsg #define mmVM_CONTEXT12_CNTL_BASE_IDX 0 1277fb4d8502Sjsg #define mmVM_CONTEXT13_CNTL 0x088d 1278fb4d8502Sjsg #define mmVM_CONTEXT13_CNTL_BASE_IDX 0 1279fb4d8502Sjsg #define mmVM_CONTEXT14_CNTL 0x088e 1280fb4d8502Sjsg #define mmVM_CONTEXT14_CNTL_BASE_IDX 0 1281fb4d8502Sjsg #define mmVM_CONTEXT15_CNTL 0x088f 1282fb4d8502Sjsg #define mmVM_CONTEXT15_CNTL_BASE_IDX 0 1283fb4d8502Sjsg #define mmVM_CONTEXTS_DISABLE 0x0890 1284fb4d8502Sjsg #define mmVM_CONTEXTS_DISABLE_BASE_IDX 0 1285fb4d8502Sjsg #define mmVM_INVALIDATE_ENG0_SEM 0x0891 1286fb4d8502Sjsg #define mmVM_INVALIDATE_ENG0_SEM_BASE_IDX 0 1287fb4d8502Sjsg #define mmVM_INVALIDATE_ENG1_SEM 0x0892 1288fb4d8502Sjsg #define mmVM_INVALIDATE_ENG1_SEM_BASE_IDX 0 1289fb4d8502Sjsg #define mmVM_INVALIDATE_ENG2_SEM 0x0893 1290fb4d8502Sjsg #define mmVM_INVALIDATE_ENG2_SEM_BASE_IDX 0 1291fb4d8502Sjsg #define mmVM_INVALIDATE_ENG3_SEM 0x0894 1292fb4d8502Sjsg #define mmVM_INVALIDATE_ENG3_SEM_BASE_IDX 0 1293fb4d8502Sjsg #define mmVM_INVALIDATE_ENG4_SEM 0x0895 1294fb4d8502Sjsg #define mmVM_INVALIDATE_ENG4_SEM_BASE_IDX 0 1295fb4d8502Sjsg #define mmVM_INVALIDATE_ENG5_SEM 0x0896 1296fb4d8502Sjsg #define mmVM_INVALIDATE_ENG5_SEM_BASE_IDX 0 1297fb4d8502Sjsg #define mmVM_INVALIDATE_ENG6_SEM 0x0897 1298fb4d8502Sjsg #define mmVM_INVALIDATE_ENG6_SEM_BASE_IDX 0 1299fb4d8502Sjsg #define mmVM_INVALIDATE_ENG7_SEM 0x0898 1300fb4d8502Sjsg #define mmVM_INVALIDATE_ENG7_SEM_BASE_IDX 0 1301fb4d8502Sjsg #define mmVM_INVALIDATE_ENG8_SEM 0x0899 1302fb4d8502Sjsg #define mmVM_INVALIDATE_ENG8_SEM_BASE_IDX 0 1303fb4d8502Sjsg #define mmVM_INVALIDATE_ENG9_SEM 0x089a 1304fb4d8502Sjsg #define mmVM_INVALIDATE_ENG9_SEM_BASE_IDX 0 1305fb4d8502Sjsg #define mmVM_INVALIDATE_ENG10_SEM 0x089b 1306fb4d8502Sjsg #define mmVM_INVALIDATE_ENG10_SEM_BASE_IDX 0 1307fb4d8502Sjsg #define mmVM_INVALIDATE_ENG11_SEM 0x089c 1308fb4d8502Sjsg #define mmVM_INVALIDATE_ENG11_SEM_BASE_IDX 0 1309fb4d8502Sjsg #define mmVM_INVALIDATE_ENG12_SEM 0x089d 1310fb4d8502Sjsg #define mmVM_INVALIDATE_ENG12_SEM_BASE_IDX 0 1311fb4d8502Sjsg #define mmVM_INVALIDATE_ENG13_SEM 0x089e 1312fb4d8502Sjsg #define mmVM_INVALIDATE_ENG13_SEM_BASE_IDX 0 1313fb4d8502Sjsg #define mmVM_INVALIDATE_ENG14_SEM 0x089f 1314fb4d8502Sjsg #define mmVM_INVALIDATE_ENG14_SEM_BASE_IDX 0 1315fb4d8502Sjsg #define mmVM_INVALIDATE_ENG15_SEM 0x08a0 1316fb4d8502Sjsg #define mmVM_INVALIDATE_ENG15_SEM_BASE_IDX 0 1317fb4d8502Sjsg #define mmVM_INVALIDATE_ENG16_SEM 0x08a1 1318fb4d8502Sjsg #define mmVM_INVALIDATE_ENG16_SEM_BASE_IDX 0 1319fb4d8502Sjsg #define mmVM_INVALIDATE_ENG17_SEM 0x08a2 1320fb4d8502Sjsg #define mmVM_INVALIDATE_ENG17_SEM_BASE_IDX 0 1321fb4d8502Sjsg #define mmVM_INVALIDATE_ENG0_REQ 0x08a3 1322fb4d8502Sjsg #define mmVM_INVALIDATE_ENG0_REQ_BASE_IDX 0 1323fb4d8502Sjsg #define mmVM_INVALIDATE_ENG1_REQ 0x08a4 1324fb4d8502Sjsg #define mmVM_INVALIDATE_ENG1_REQ_BASE_IDX 0 1325fb4d8502Sjsg #define mmVM_INVALIDATE_ENG2_REQ 0x08a5 1326fb4d8502Sjsg #define mmVM_INVALIDATE_ENG2_REQ_BASE_IDX 0 1327fb4d8502Sjsg #define mmVM_INVALIDATE_ENG3_REQ 0x08a6 1328fb4d8502Sjsg #define mmVM_INVALIDATE_ENG3_REQ_BASE_IDX 0 1329fb4d8502Sjsg #define mmVM_INVALIDATE_ENG4_REQ 0x08a7 1330fb4d8502Sjsg #define mmVM_INVALIDATE_ENG4_REQ_BASE_IDX 0 1331fb4d8502Sjsg #define mmVM_INVALIDATE_ENG5_REQ 0x08a8 1332fb4d8502Sjsg #define mmVM_INVALIDATE_ENG5_REQ_BASE_IDX 0 1333fb4d8502Sjsg #define mmVM_INVALIDATE_ENG6_REQ 0x08a9 1334fb4d8502Sjsg #define mmVM_INVALIDATE_ENG6_REQ_BASE_IDX 0 1335fb4d8502Sjsg #define mmVM_INVALIDATE_ENG7_REQ 0x08aa 1336fb4d8502Sjsg #define mmVM_INVALIDATE_ENG7_REQ_BASE_IDX 0 1337fb4d8502Sjsg #define mmVM_INVALIDATE_ENG8_REQ 0x08ab 1338fb4d8502Sjsg #define mmVM_INVALIDATE_ENG8_REQ_BASE_IDX 0 1339fb4d8502Sjsg #define mmVM_INVALIDATE_ENG9_REQ 0x08ac 1340fb4d8502Sjsg #define mmVM_INVALIDATE_ENG9_REQ_BASE_IDX 0 1341fb4d8502Sjsg #define mmVM_INVALIDATE_ENG10_REQ 0x08ad 1342fb4d8502Sjsg #define mmVM_INVALIDATE_ENG10_REQ_BASE_IDX 0 1343fb4d8502Sjsg #define mmVM_INVALIDATE_ENG11_REQ 0x08ae 1344fb4d8502Sjsg #define mmVM_INVALIDATE_ENG11_REQ_BASE_IDX 0 1345fb4d8502Sjsg #define mmVM_INVALIDATE_ENG12_REQ 0x08af 1346fb4d8502Sjsg #define mmVM_INVALIDATE_ENG12_REQ_BASE_IDX 0 1347fb4d8502Sjsg #define mmVM_INVALIDATE_ENG13_REQ 0x08b0 1348fb4d8502Sjsg #define mmVM_INVALIDATE_ENG13_REQ_BASE_IDX 0 1349fb4d8502Sjsg #define mmVM_INVALIDATE_ENG14_REQ 0x08b1 1350fb4d8502Sjsg #define mmVM_INVALIDATE_ENG14_REQ_BASE_IDX 0 1351fb4d8502Sjsg #define mmVM_INVALIDATE_ENG15_REQ 0x08b2 1352fb4d8502Sjsg #define mmVM_INVALIDATE_ENG15_REQ_BASE_IDX 0 1353fb4d8502Sjsg #define mmVM_INVALIDATE_ENG16_REQ 0x08b3 1354fb4d8502Sjsg #define mmVM_INVALIDATE_ENG16_REQ_BASE_IDX 0 1355fb4d8502Sjsg #define mmVM_INVALIDATE_ENG17_REQ 0x08b4 1356fb4d8502Sjsg #define mmVM_INVALIDATE_ENG17_REQ_BASE_IDX 0 1357fb4d8502Sjsg #define mmVM_INVALIDATE_ENG0_ACK 0x08b5 1358fb4d8502Sjsg #define mmVM_INVALIDATE_ENG0_ACK_BASE_IDX 0 1359fb4d8502Sjsg #define mmVM_INVALIDATE_ENG1_ACK 0x08b6 1360fb4d8502Sjsg #define mmVM_INVALIDATE_ENG1_ACK_BASE_IDX 0 1361fb4d8502Sjsg #define mmVM_INVALIDATE_ENG2_ACK 0x08b7 1362fb4d8502Sjsg #define mmVM_INVALIDATE_ENG2_ACK_BASE_IDX 0 1363fb4d8502Sjsg #define mmVM_INVALIDATE_ENG3_ACK 0x08b8 1364fb4d8502Sjsg #define mmVM_INVALIDATE_ENG3_ACK_BASE_IDX 0 1365fb4d8502Sjsg #define mmVM_INVALIDATE_ENG4_ACK 0x08b9 1366fb4d8502Sjsg #define mmVM_INVALIDATE_ENG4_ACK_BASE_IDX 0 1367fb4d8502Sjsg #define mmVM_INVALIDATE_ENG5_ACK 0x08ba 1368fb4d8502Sjsg #define mmVM_INVALIDATE_ENG5_ACK_BASE_IDX 0 1369fb4d8502Sjsg #define mmVM_INVALIDATE_ENG6_ACK 0x08bb 1370fb4d8502Sjsg #define mmVM_INVALIDATE_ENG6_ACK_BASE_IDX 0 1371fb4d8502Sjsg #define mmVM_INVALIDATE_ENG7_ACK 0x08bc 1372fb4d8502Sjsg #define mmVM_INVALIDATE_ENG7_ACK_BASE_IDX 0 1373fb4d8502Sjsg #define mmVM_INVALIDATE_ENG8_ACK 0x08bd 1374fb4d8502Sjsg #define mmVM_INVALIDATE_ENG8_ACK_BASE_IDX 0 1375fb4d8502Sjsg #define mmVM_INVALIDATE_ENG9_ACK 0x08be 1376fb4d8502Sjsg #define mmVM_INVALIDATE_ENG9_ACK_BASE_IDX 0 1377fb4d8502Sjsg #define mmVM_INVALIDATE_ENG10_ACK 0x08bf 1378fb4d8502Sjsg #define mmVM_INVALIDATE_ENG10_ACK_BASE_IDX 0 1379fb4d8502Sjsg #define mmVM_INVALIDATE_ENG11_ACK 0x08c0 1380fb4d8502Sjsg #define mmVM_INVALIDATE_ENG11_ACK_BASE_IDX 0 1381fb4d8502Sjsg #define mmVM_INVALIDATE_ENG12_ACK 0x08c1 1382fb4d8502Sjsg #define mmVM_INVALIDATE_ENG12_ACK_BASE_IDX 0 1383fb4d8502Sjsg #define mmVM_INVALIDATE_ENG13_ACK 0x08c2 1384fb4d8502Sjsg #define mmVM_INVALIDATE_ENG13_ACK_BASE_IDX 0 1385fb4d8502Sjsg #define mmVM_INVALIDATE_ENG14_ACK 0x08c3 1386fb4d8502Sjsg #define mmVM_INVALIDATE_ENG14_ACK_BASE_IDX 0 1387fb4d8502Sjsg #define mmVM_INVALIDATE_ENG15_ACK 0x08c4 1388fb4d8502Sjsg #define mmVM_INVALIDATE_ENG15_ACK_BASE_IDX 0 1389fb4d8502Sjsg #define mmVM_INVALIDATE_ENG16_ACK 0x08c5 1390fb4d8502Sjsg #define mmVM_INVALIDATE_ENG16_ACK_BASE_IDX 0 1391fb4d8502Sjsg #define mmVM_INVALIDATE_ENG17_ACK 0x08c6 1392fb4d8502Sjsg #define mmVM_INVALIDATE_ENG17_ACK_BASE_IDX 0 1393fb4d8502Sjsg #define mmVM_INVALIDATE_ENG0_ADDR_RANGE_LO32 0x08c7 1394fb4d8502Sjsg #define mmVM_INVALIDATE_ENG0_ADDR_RANGE_LO32_BASE_IDX 0 1395fb4d8502Sjsg #define mmVM_INVALIDATE_ENG0_ADDR_RANGE_HI32 0x08c8 1396fb4d8502Sjsg #define mmVM_INVALIDATE_ENG0_ADDR_RANGE_HI32_BASE_IDX 0 1397fb4d8502Sjsg #define mmVM_INVALIDATE_ENG1_ADDR_RANGE_LO32 0x08c9 1398fb4d8502Sjsg #define mmVM_INVALIDATE_ENG1_ADDR_RANGE_LO32_BASE_IDX 0 1399fb4d8502Sjsg #define mmVM_INVALIDATE_ENG1_ADDR_RANGE_HI32 0x08ca 1400fb4d8502Sjsg #define mmVM_INVALIDATE_ENG1_ADDR_RANGE_HI32_BASE_IDX 0 1401fb4d8502Sjsg #define mmVM_INVALIDATE_ENG2_ADDR_RANGE_LO32 0x08cb 1402fb4d8502Sjsg #define mmVM_INVALIDATE_ENG2_ADDR_RANGE_LO32_BASE_IDX 0 1403fb4d8502Sjsg #define mmVM_INVALIDATE_ENG2_ADDR_RANGE_HI32 0x08cc 1404fb4d8502Sjsg #define mmVM_INVALIDATE_ENG2_ADDR_RANGE_HI32_BASE_IDX 0 1405fb4d8502Sjsg #define mmVM_INVALIDATE_ENG3_ADDR_RANGE_LO32 0x08cd 1406fb4d8502Sjsg #define mmVM_INVALIDATE_ENG3_ADDR_RANGE_LO32_BASE_IDX 0 1407fb4d8502Sjsg #define mmVM_INVALIDATE_ENG3_ADDR_RANGE_HI32 0x08ce 1408fb4d8502Sjsg #define mmVM_INVALIDATE_ENG3_ADDR_RANGE_HI32_BASE_IDX 0 1409fb4d8502Sjsg #define mmVM_INVALIDATE_ENG4_ADDR_RANGE_LO32 0x08cf 1410fb4d8502Sjsg #define mmVM_INVALIDATE_ENG4_ADDR_RANGE_LO32_BASE_IDX 0 1411fb4d8502Sjsg #define mmVM_INVALIDATE_ENG4_ADDR_RANGE_HI32 0x08d0 1412fb4d8502Sjsg #define mmVM_INVALIDATE_ENG4_ADDR_RANGE_HI32_BASE_IDX 0 1413fb4d8502Sjsg #define mmVM_INVALIDATE_ENG5_ADDR_RANGE_LO32 0x08d1 1414fb4d8502Sjsg #define mmVM_INVALIDATE_ENG5_ADDR_RANGE_LO32_BASE_IDX 0 1415fb4d8502Sjsg #define mmVM_INVALIDATE_ENG5_ADDR_RANGE_HI32 0x08d2 1416fb4d8502Sjsg #define mmVM_INVALIDATE_ENG5_ADDR_RANGE_HI32_BASE_IDX 0 1417fb4d8502Sjsg #define mmVM_INVALIDATE_ENG6_ADDR_RANGE_LO32 0x08d3 1418fb4d8502Sjsg #define mmVM_INVALIDATE_ENG6_ADDR_RANGE_LO32_BASE_IDX 0 1419fb4d8502Sjsg #define mmVM_INVALIDATE_ENG6_ADDR_RANGE_HI32 0x08d4 1420fb4d8502Sjsg #define mmVM_INVALIDATE_ENG6_ADDR_RANGE_HI32_BASE_IDX 0 1421fb4d8502Sjsg #define mmVM_INVALIDATE_ENG7_ADDR_RANGE_LO32 0x08d5 1422fb4d8502Sjsg #define mmVM_INVALIDATE_ENG7_ADDR_RANGE_LO32_BASE_IDX 0 1423fb4d8502Sjsg #define mmVM_INVALIDATE_ENG7_ADDR_RANGE_HI32 0x08d6 1424fb4d8502Sjsg #define mmVM_INVALIDATE_ENG7_ADDR_RANGE_HI32_BASE_IDX 0 1425fb4d8502Sjsg #define mmVM_INVALIDATE_ENG8_ADDR_RANGE_LO32 0x08d7 1426fb4d8502Sjsg #define mmVM_INVALIDATE_ENG8_ADDR_RANGE_LO32_BASE_IDX 0 1427fb4d8502Sjsg #define mmVM_INVALIDATE_ENG8_ADDR_RANGE_HI32 0x08d8 1428fb4d8502Sjsg #define mmVM_INVALIDATE_ENG8_ADDR_RANGE_HI32_BASE_IDX 0 1429fb4d8502Sjsg #define mmVM_INVALIDATE_ENG9_ADDR_RANGE_LO32 0x08d9 1430fb4d8502Sjsg #define mmVM_INVALIDATE_ENG9_ADDR_RANGE_LO32_BASE_IDX 0 1431fb4d8502Sjsg #define mmVM_INVALIDATE_ENG9_ADDR_RANGE_HI32 0x08da 1432fb4d8502Sjsg #define mmVM_INVALIDATE_ENG9_ADDR_RANGE_HI32_BASE_IDX 0 1433fb4d8502Sjsg #define mmVM_INVALIDATE_ENG10_ADDR_RANGE_LO32 0x08db 1434fb4d8502Sjsg #define mmVM_INVALIDATE_ENG10_ADDR_RANGE_LO32_BASE_IDX 0 1435fb4d8502Sjsg #define mmVM_INVALIDATE_ENG10_ADDR_RANGE_HI32 0x08dc 1436fb4d8502Sjsg #define mmVM_INVALIDATE_ENG10_ADDR_RANGE_HI32_BASE_IDX 0 1437fb4d8502Sjsg #define mmVM_INVALIDATE_ENG11_ADDR_RANGE_LO32 0x08dd 1438fb4d8502Sjsg #define mmVM_INVALIDATE_ENG11_ADDR_RANGE_LO32_BASE_IDX 0 1439fb4d8502Sjsg #define mmVM_INVALIDATE_ENG11_ADDR_RANGE_HI32 0x08de 1440fb4d8502Sjsg #define mmVM_INVALIDATE_ENG11_ADDR_RANGE_HI32_BASE_IDX 0 1441fb4d8502Sjsg #define mmVM_INVALIDATE_ENG12_ADDR_RANGE_LO32 0x08df 1442fb4d8502Sjsg #define mmVM_INVALIDATE_ENG12_ADDR_RANGE_LO32_BASE_IDX 0 1443fb4d8502Sjsg #define mmVM_INVALIDATE_ENG12_ADDR_RANGE_HI32 0x08e0 1444fb4d8502Sjsg #define mmVM_INVALIDATE_ENG12_ADDR_RANGE_HI32_BASE_IDX 0 1445fb4d8502Sjsg #define mmVM_INVALIDATE_ENG13_ADDR_RANGE_LO32 0x08e1 1446fb4d8502Sjsg #define mmVM_INVALIDATE_ENG13_ADDR_RANGE_LO32_BASE_IDX 0 1447fb4d8502Sjsg #define mmVM_INVALIDATE_ENG13_ADDR_RANGE_HI32 0x08e2 1448fb4d8502Sjsg #define mmVM_INVALIDATE_ENG13_ADDR_RANGE_HI32_BASE_IDX 0 1449fb4d8502Sjsg #define mmVM_INVALIDATE_ENG14_ADDR_RANGE_LO32 0x08e3 1450fb4d8502Sjsg #define mmVM_INVALIDATE_ENG14_ADDR_RANGE_LO32_BASE_IDX 0 1451fb4d8502Sjsg #define mmVM_INVALIDATE_ENG14_ADDR_RANGE_HI32 0x08e4 1452fb4d8502Sjsg #define mmVM_INVALIDATE_ENG14_ADDR_RANGE_HI32_BASE_IDX 0 1453fb4d8502Sjsg #define mmVM_INVALIDATE_ENG15_ADDR_RANGE_LO32 0x08e5 1454fb4d8502Sjsg #define mmVM_INVALIDATE_ENG15_ADDR_RANGE_LO32_BASE_IDX 0 1455fb4d8502Sjsg #define mmVM_INVALIDATE_ENG15_ADDR_RANGE_HI32 0x08e6 1456fb4d8502Sjsg #define mmVM_INVALIDATE_ENG15_ADDR_RANGE_HI32_BASE_IDX 0 1457fb4d8502Sjsg #define mmVM_INVALIDATE_ENG16_ADDR_RANGE_LO32 0x08e7 1458fb4d8502Sjsg #define mmVM_INVALIDATE_ENG16_ADDR_RANGE_LO32_BASE_IDX 0 1459fb4d8502Sjsg #define mmVM_INVALIDATE_ENG16_ADDR_RANGE_HI32 0x08e8 1460fb4d8502Sjsg #define mmVM_INVALIDATE_ENG16_ADDR_RANGE_HI32_BASE_IDX 0 1461fb4d8502Sjsg #define mmVM_INVALIDATE_ENG17_ADDR_RANGE_LO32 0x08e9 1462fb4d8502Sjsg #define mmVM_INVALIDATE_ENG17_ADDR_RANGE_LO32_BASE_IDX 0 1463fb4d8502Sjsg #define mmVM_INVALIDATE_ENG17_ADDR_RANGE_HI32 0x08ea 1464fb4d8502Sjsg #define mmVM_INVALIDATE_ENG17_ADDR_RANGE_HI32_BASE_IDX 0 1465fb4d8502Sjsg #define mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32 0x08eb 1466fb4d8502Sjsg #define mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX 0 1467fb4d8502Sjsg #define mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32 0x08ec 1468fb4d8502Sjsg #define mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX 0 1469fb4d8502Sjsg #define mmVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_LO32 0x08ed 1470fb4d8502Sjsg #define mmVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX 0 1471fb4d8502Sjsg #define mmVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_HI32 0x08ee 1472fb4d8502Sjsg #define mmVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX 0 1473fb4d8502Sjsg #define mmVM_CONTEXT2_PAGE_TABLE_BASE_ADDR_LO32 0x08ef 1474fb4d8502Sjsg #define mmVM_CONTEXT2_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX 0 1475fb4d8502Sjsg #define mmVM_CONTEXT2_PAGE_TABLE_BASE_ADDR_HI32 0x08f0 1476fb4d8502Sjsg #define mmVM_CONTEXT2_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX 0 1477fb4d8502Sjsg #define mmVM_CONTEXT3_PAGE_TABLE_BASE_ADDR_LO32 0x08f1 1478fb4d8502Sjsg #define mmVM_CONTEXT3_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX 0 1479fb4d8502Sjsg #define mmVM_CONTEXT3_PAGE_TABLE_BASE_ADDR_HI32 0x08f2 1480fb4d8502Sjsg #define mmVM_CONTEXT3_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX 0 1481fb4d8502Sjsg #define mmVM_CONTEXT4_PAGE_TABLE_BASE_ADDR_LO32 0x08f3 1482fb4d8502Sjsg #define mmVM_CONTEXT4_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX 0 1483fb4d8502Sjsg #define mmVM_CONTEXT4_PAGE_TABLE_BASE_ADDR_HI32 0x08f4 1484fb4d8502Sjsg #define mmVM_CONTEXT4_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX 0 1485fb4d8502Sjsg #define mmVM_CONTEXT5_PAGE_TABLE_BASE_ADDR_LO32 0x08f5 1486fb4d8502Sjsg #define mmVM_CONTEXT5_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX 0 1487fb4d8502Sjsg #define mmVM_CONTEXT5_PAGE_TABLE_BASE_ADDR_HI32 0x08f6 1488fb4d8502Sjsg #define mmVM_CONTEXT5_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX 0 1489fb4d8502Sjsg #define mmVM_CONTEXT6_PAGE_TABLE_BASE_ADDR_LO32 0x08f7 1490fb4d8502Sjsg #define mmVM_CONTEXT6_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX 0 1491fb4d8502Sjsg #define mmVM_CONTEXT6_PAGE_TABLE_BASE_ADDR_HI32 0x08f8 1492fb4d8502Sjsg #define mmVM_CONTEXT6_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX 0 1493fb4d8502Sjsg #define mmVM_CONTEXT7_PAGE_TABLE_BASE_ADDR_LO32 0x08f9 1494fb4d8502Sjsg #define mmVM_CONTEXT7_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX 0 1495fb4d8502Sjsg #define mmVM_CONTEXT7_PAGE_TABLE_BASE_ADDR_HI32 0x08fa 1496fb4d8502Sjsg #define mmVM_CONTEXT7_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX 0 1497fb4d8502Sjsg #define mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR_LO32 0x08fb 1498fb4d8502Sjsg #define mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX 0 1499fb4d8502Sjsg #define mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR_HI32 0x08fc 1500fb4d8502Sjsg #define mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX 0 1501fb4d8502Sjsg #define mmVM_CONTEXT9_PAGE_TABLE_BASE_ADDR_LO32 0x08fd 1502fb4d8502Sjsg #define mmVM_CONTEXT9_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX 0 1503fb4d8502Sjsg #define mmVM_CONTEXT9_PAGE_TABLE_BASE_ADDR_HI32 0x08fe 1504fb4d8502Sjsg #define mmVM_CONTEXT9_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX 0 1505fb4d8502Sjsg #define mmVM_CONTEXT10_PAGE_TABLE_BASE_ADDR_LO32 0x08ff 1506fb4d8502Sjsg #define mmVM_CONTEXT10_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX 0 1507fb4d8502Sjsg #define mmVM_CONTEXT10_PAGE_TABLE_BASE_ADDR_HI32 0x0900 1508fb4d8502Sjsg #define mmVM_CONTEXT10_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX 0 1509fb4d8502Sjsg #define mmVM_CONTEXT11_PAGE_TABLE_BASE_ADDR_LO32 0x0901 1510fb4d8502Sjsg #define mmVM_CONTEXT11_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX 0 1511fb4d8502Sjsg #define mmVM_CONTEXT11_PAGE_TABLE_BASE_ADDR_HI32 0x0902 1512fb4d8502Sjsg #define mmVM_CONTEXT11_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX 0 1513fb4d8502Sjsg #define mmVM_CONTEXT12_PAGE_TABLE_BASE_ADDR_LO32 0x0903 1514fb4d8502Sjsg #define mmVM_CONTEXT12_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX 0 1515fb4d8502Sjsg #define mmVM_CONTEXT12_PAGE_TABLE_BASE_ADDR_HI32 0x0904 1516fb4d8502Sjsg #define mmVM_CONTEXT12_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX 0 1517fb4d8502Sjsg #define mmVM_CONTEXT13_PAGE_TABLE_BASE_ADDR_LO32 0x0905 1518fb4d8502Sjsg #define mmVM_CONTEXT13_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX 0 1519fb4d8502Sjsg #define mmVM_CONTEXT13_PAGE_TABLE_BASE_ADDR_HI32 0x0906 1520fb4d8502Sjsg #define mmVM_CONTEXT13_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX 0 1521fb4d8502Sjsg #define mmVM_CONTEXT14_PAGE_TABLE_BASE_ADDR_LO32 0x0907 1522fb4d8502Sjsg #define mmVM_CONTEXT14_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX 0 1523fb4d8502Sjsg #define mmVM_CONTEXT14_PAGE_TABLE_BASE_ADDR_HI32 0x0908 1524fb4d8502Sjsg #define mmVM_CONTEXT14_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX 0 1525fb4d8502Sjsg #define mmVM_CONTEXT15_PAGE_TABLE_BASE_ADDR_LO32 0x0909 1526fb4d8502Sjsg #define mmVM_CONTEXT15_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX 0 1527fb4d8502Sjsg #define mmVM_CONTEXT15_PAGE_TABLE_BASE_ADDR_HI32 0x090a 1528fb4d8502Sjsg #define mmVM_CONTEXT15_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX 0 1529fb4d8502Sjsg #define mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32 0x090b 1530fb4d8502Sjsg #define mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32_BASE_IDX 0 1531fb4d8502Sjsg #define mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32 0x090c 1532fb4d8502Sjsg #define mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32_BASE_IDX 0 1533fb4d8502Sjsg #define mmVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32 0x090d 1534fb4d8502Sjsg #define mmVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32_BASE_IDX 0 1535fb4d8502Sjsg #define mmVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32 0x090e 1536fb4d8502Sjsg #define mmVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32_BASE_IDX 0 1537fb4d8502Sjsg #define mmVM_CONTEXT2_PAGE_TABLE_START_ADDR_LO32 0x090f 1538fb4d8502Sjsg #define mmVM_CONTEXT2_PAGE_TABLE_START_ADDR_LO32_BASE_IDX 0 1539fb4d8502Sjsg #define mmVM_CONTEXT2_PAGE_TABLE_START_ADDR_HI32 0x0910 1540fb4d8502Sjsg #define mmVM_CONTEXT2_PAGE_TABLE_START_ADDR_HI32_BASE_IDX 0 1541fb4d8502Sjsg #define mmVM_CONTEXT3_PAGE_TABLE_START_ADDR_LO32 0x0911 1542fb4d8502Sjsg #define mmVM_CONTEXT3_PAGE_TABLE_START_ADDR_LO32_BASE_IDX 0 1543fb4d8502Sjsg #define mmVM_CONTEXT3_PAGE_TABLE_START_ADDR_HI32 0x0912 1544fb4d8502Sjsg #define mmVM_CONTEXT3_PAGE_TABLE_START_ADDR_HI32_BASE_IDX 0 1545fb4d8502Sjsg #define mmVM_CONTEXT4_PAGE_TABLE_START_ADDR_LO32 0x0913 1546fb4d8502Sjsg #define mmVM_CONTEXT4_PAGE_TABLE_START_ADDR_LO32_BASE_IDX 0 1547fb4d8502Sjsg #define mmVM_CONTEXT4_PAGE_TABLE_START_ADDR_HI32 0x0914 1548fb4d8502Sjsg #define mmVM_CONTEXT4_PAGE_TABLE_START_ADDR_HI32_BASE_IDX 0 1549fb4d8502Sjsg #define mmVM_CONTEXT5_PAGE_TABLE_START_ADDR_LO32 0x0915 1550fb4d8502Sjsg #define mmVM_CONTEXT5_PAGE_TABLE_START_ADDR_LO32_BASE_IDX 0 1551fb4d8502Sjsg #define mmVM_CONTEXT5_PAGE_TABLE_START_ADDR_HI32 0x0916 1552fb4d8502Sjsg #define mmVM_CONTEXT5_PAGE_TABLE_START_ADDR_HI32_BASE_IDX 0 1553fb4d8502Sjsg #define mmVM_CONTEXT6_PAGE_TABLE_START_ADDR_LO32 0x0917 1554fb4d8502Sjsg #define mmVM_CONTEXT6_PAGE_TABLE_START_ADDR_LO32_BASE_IDX 0 1555fb4d8502Sjsg #define mmVM_CONTEXT6_PAGE_TABLE_START_ADDR_HI32 0x0918 1556fb4d8502Sjsg #define mmVM_CONTEXT6_PAGE_TABLE_START_ADDR_HI32_BASE_IDX 0 1557fb4d8502Sjsg #define mmVM_CONTEXT7_PAGE_TABLE_START_ADDR_LO32 0x0919 1558fb4d8502Sjsg #define mmVM_CONTEXT7_PAGE_TABLE_START_ADDR_LO32_BASE_IDX 0 1559fb4d8502Sjsg #define mmVM_CONTEXT7_PAGE_TABLE_START_ADDR_HI32 0x091a 1560fb4d8502Sjsg #define mmVM_CONTEXT7_PAGE_TABLE_START_ADDR_HI32_BASE_IDX 0 1561fb4d8502Sjsg #define mmVM_CONTEXT8_PAGE_TABLE_START_ADDR_LO32 0x091b 1562fb4d8502Sjsg #define mmVM_CONTEXT8_PAGE_TABLE_START_ADDR_LO32_BASE_IDX 0 1563fb4d8502Sjsg #define mmVM_CONTEXT8_PAGE_TABLE_START_ADDR_HI32 0x091c 1564fb4d8502Sjsg #define mmVM_CONTEXT8_PAGE_TABLE_START_ADDR_HI32_BASE_IDX 0 1565fb4d8502Sjsg #define mmVM_CONTEXT9_PAGE_TABLE_START_ADDR_LO32 0x091d 1566fb4d8502Sjsg #define mmVM_CONTEXT9_PAGE_TABLE_START_ADDR_LO32_BASE_IDX 0 1567fb4d8502Sjsg #define mmVM_CONTEXT9_PAGE_TABLE_START_ADDR_HI32 0x091e 1568fb4d8502Sjsg #define mmVM_CONTEXT9_PAGE_TABLE_START_ADDR_HI32_BASE_IDX 0 1569fb4d8502Sjsg #define mmVM_CONTEXT10_PAGE_TABLE_START_ADDR_LO32 0x091f 1570fb4d8502Sjsg #define mmVM_CONTEXT10_PAGE_TABLE_START_ADDR_LO32_BASE_IDX 0 1571fb4d8502Sjsg #define mmVM_CONTEXT10_PAGE_TABLE_START_ADDR_HI32 0x0920 1572fb4d8502Sjsg #define mmVM_CONTEXT10_PAGE_TABLE_START_ADDR_HI32_BASE_IDX 0 1573fb4d8502Sjsg #define mmVM_CONTEXT11_PAGE_TABLE_START_ADDR_LO32 0x0921 1574fb4d8502Sjsg #define mmVM_CONTEXT11_PAGE_TABLE_START_ADDR_LO32_BASE_IDX 0 1575fb4d8502Sjsg #define mmVM_CONTEXT11_PAGE_TABLE_START_ADDR_HI32 0x0922 1576fb4d8502Sjsg #define mmVM_CONTEXT11_PAGE_TABLE_START_ADDR_HI32_BASE_IDX 0 1577fb4d8502Sjsg #define mmVM_CONTEXT12_PAGE_TABLE_START_ADDR_LO32 0x0923 1578fb4d8502Sjsg #define mmVM_CONTEXT12_PAGE_TABLE_START_ADDR_LO32_BASE_IDX 0 1579fb4d8502Sjsg #define mmVM_CONTEXT12_PAGE_TABLE_START_ADDR_HI32 0x0924 1580fb4d8502Sjsg #define mmVM_CONTEXT12_PAGE_TABLE_START_ADDR_HI32_BASE_IDX 0 1581fb4d8502Sjsg #define mmVM_CONTEXT13_PAGE_TABLE_START_ADDR_LO32 0x0925 1582fb4d8502Sjsg #define mmVM_CONTEXT13_PAGE_TABLE_START_ADDR_LO32_BASE_IDX 0 1583fb4d8502Sjsg #define mmVM_CONTEXT13_PAGE_TABLE_START_ADDR_HI32 0x0926 1584fb4d8502Sjsg #define mmVM_CONTEXT13_PAGE_TABLE_START_ADDR_HI32_BASE_IDX 0 1585fb4d8502Sjsg #define mmVM_CONTEXT14_PAGE_TABLE_START_ADDR_LO32 0x0927 1586fb4d8502Sjsg #define mmVM_CONTEXT14_PAGE_TABLE_START_ADDR_LO32_BASE_IDX 0 1587fb4d8502Sjsg #define mmVM_CONTEXT14_PAGE_TABLE_START_ADDR_HI32 0x0928 1588fb4d8502Sjsg #define mmVM_CONTEXT14_PAGE_TABLE_START_ADDR_HI32_BASE_IDX 0 1589fb4d8502Sjsg #define mmVM_CONTEXT15_PAGE_TABLE_START_ADDR_LO32 0x0929 1590fb4d8502Sjsg #define mmVM_CONTEXT15_PAGE_TABLE_START_ADDR_LO32_BASE_IDX 0 1591fb4d8502Sjsg #define mmVM_CONTEXT15_PAGE_TABLE_START_ADDR_HI32 0x092a 1592fb4d8502Sjsg #define mmVM_CONTEXT15_PAGE_TABLE_START_ADDR_HI32_BASE_IDX 0 1593fb4d8502Sjsg #define mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32 0x092b 1594fb4d8502Sjsg #define mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32_BASE_IDX 0 1595fb4d8502Sjsg #define mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32 0x092c 1596fb4d8502Sjsg #define mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32_BASE_IDX 0 1597fb4d8502Sjsg #define mmVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32 0x092d 1598fb4d8502Sjsg #define mmVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32_BASE_IDX 0 1599fb4d8502Sjsg #define mmVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32 0x092e 1600fb4d8502Sjsg #define mmVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32_BASE_IDX 0 1601fb4d8502Sjsg #define mmVM_CONTEXT2_PAGE_TABLE_END_ADDR_LO32 0x092f 1602fb4d8502Sjsg #define mmVM_CONTEXT2_PAGE_TABLE_END_ADDR_LO32_BASE_IDX 0 1603fb4d8502Sjsg #define mmVM_CONTEXT2_PAGE_TABLE_END_ADDR_HI32 0x0930 1604fb4d8502Sjsg #define mmVM_CONTEXT2_PAGE_TABLE_END_ADDR_HI32_BASE_IDX 0 1605fb4d8502Sjsg #define mmVM_CONTEXT3_PAGE_TABLE_END_ADDR_LO32 0x0931 1606fb4d8502Sjsg #define mmVM_CONTEXT3_PAGE_TABLE_END_ADDR_LO32_BASE_IDX 0 1607fb4d8502Sjsg #define mmVM_CONTEXT3_PAGE_TABLE_END_ADDR_HI32 0x0932 1608fb4d8502Sjsg #define mmVM_CONTEXT3_PAGE_TABLE_END_ADDR_HI32_BASE_IDX 0 1609fb4d8502Sjsg #define mmVM_CONTEXT4_PAGE_TABLE_END_ADDR_LO32 0x0933 1610fb4d8502Sjsg #define mmVM_CONTEXT4_PAGE_TABLE_END_ADDR_LO32_BASE_IDX 0 1611fb4d8502Sjsg #define mmVM_CONTEXT4_PAGE_TABLE_END_ADDR_HI32 0x0934 1612fb4d8502Sjsg #define mmVM_CONTEXT4_PAGE_TABLE_END_ADDR_HI32_BASE_IDX 0 1613fb4d8502Sjsg #define mmVM_CONTEXT5_PAGE_TABLE_END_ADDR_LO32 0x0935 1614fb4d8502Sjsg #define mmVM_CONTEXT5_PAGE_TABLE_END_ADDR_LO32_BASE_IDX 0 1615fb4d8502Sjsg #define mmVM_CONTEXT5_PAGE_TABLE_END_ADDR_HI32 0x0936 1616fb4d8502Sjsg #define mmVM_CONTEXT5_PAGE_TABLE_END_ADDR_HI32_BASE_IDX 0 1617fb4d8502Sjsg #define mmVM_CONTEXT6_PAGE_TABLE_END_ADDR_LO32 0x0937 1618fb4d8502Sjsg #define mmVM_CONTEXT6_PAGE_TABLE_END_ADDR_LO32_BASE_IDX 0 1619fb4d8502Sjsg #define mmVM_CONTEXT6_PAGE_TABLE_END_ADDR_HI32 0x0938 1620fb4d8502Sjsg #define mmVM_CONTEXT6_PAGE_TABLE_END_ADDR_HI32_BASE_IDX 0 1621fb4d8502Sjsg #define mmVM_CONTEXT7_PAGE_TABLE_END_ADDR_LO32 0x0939 1622fb4d8502Sjsg #define mmVM_CONTEXT7_PAGE_TABLE_END_ADDR_LO32_BASE_IDX 0 1623fb4d8502Sjsg #define mmVM_CONTEXT7_PAGE_TABLE_END_ADDR_HI32 0x093a 1624fb4d8502Sjsg #define mmVM_CONTEXT7_PAGE_TABLE_END_ADDR_HI32_BASE_IDX 0 1625fb4d8502Sjsg #define mmVM_CONTEXT8_PAGE_TABLE_END_ADDR_LO32 0x093b 1626fb4d8502Sjsg #define mmVM_CONTEXT8_PAGE_TABLE_END_ADDR_LO32_BASE_IDX 0 1627fb4d8502Sjsg #define mmVM_CONTEXT8_PAGE_TABLE_END_ADDR_HI32 0x093c 1628fb4d8502Sjsg #define mmVM_CONTEXT8_PAGE_TABLE_END_ADDR_HI32_BASE_IDX 0 1629fb4d8502Sjsg #define mmVM_CONTEXT9_PAGE_TABLE_END_ADDR_LO32 0x093d 1630fb4d8502Sjsg #define mmVM_CONTEXT9_PAGE_TABLE_END_ADDR_LO32_BASE_IDX 0 1631fb4d8502Sjsg #define mmVM_CONTEXT9_PAGE_TABLE_END_ADDR_HI32 0x093e 1632fb4d8502Sjsg #define mmVM_CONTEXT9_PAGE_TABLE_END_ADDR_HI32_BASE_IDX 0 1633fb4d8502Sjsg #define mmVM_CONTEXT10_PAGE_TABLE_END_ADDR_LO32 0x093f 1634fb4d8502Sjsg #define mmVM_CONTEXT10_PAGE_TABLE_END_ADDR_LO32_BASE_IDX 0 1635fb4d8502Sjsg #define mmVM_CONTEXT10_PAGE_TABLE_END_ADDR_HI32 0x0940 1636fb4d8502Sjsg #define mmVM_CONTEXT10_PAGE_TABLE_END_ADDR_HI32_BASE_IDX 0 1637fb4d8502Sjsg #define mmVM_CONTEXT11_PAGE_TABLE_END_ADDR_LO32 0x0941 1638fb4d8502Sjsg #define mmVM_CONTEXT11_PAGE_TABLE_END_ADDR_LO32_BASE_IDX 0 1639fb4d8502Sjsg #define mmVM_CONTEXT11_PAGE_TABLE_END_ADDR_HI32 0x0942 1640fb4d8502Sjsg #define mmVM_CONTEXT11_PAGE_TABLE_END_ADDR_HI32_BASE_IDX 0 1641fb4d8502Sjsg #define mmVM_CONTEXT12_PAGE_TABLE_END_ADDR_LO32 0x0943 1642fb4d8502Sjsg #define mmVM_CONTEXT12_PAGE_TABLE_END_ADDR_LO32_BASE_IDX 0 1643fb4d8502Sjsg #define mmVM_CONTEXT12_PAGE_TABLE_END_ADDR_HI32 0x0944 1644fb4d8502Sjsg #define mmVM_CONTEXT12_PAGE_TABLE_END_ADDR_HI32_BASE_IDX 0 1645fb4d8502Sjsg #define mmVM_CONTEXT13_PAGE_TABLE_END_ADDR_LO32 0x0945 1646fb4d8502Sjsg #define mmVM_CONTEXT13_PAGE_TABLE_END_ADDR_LO32_BASE_IDX 0 1647fb4d8502Sjsg #define mmVM_CONTEXT13_PAGE_TABLE_END_ADDR_HI32 0x0946 1648fb4d8502Sjsg #define mmVM_CONTEXT13_PAGE_TABLE_END_ADDR_HI32_BASE_IDX 0 1649fb4d8502Sjsg #define mmVM_CONTEXT14_PAGE_TABLE_END_ADDR_LO32 0x0947 1650fb4d8502Sjsg #define mmVM_CONTEXT14_PAGE_TABLE_END_ADDR_LO32_BASE_IDX 0 1651fb4d8502Sjsg #define mmVM_CONTEXT14_PAGE_TABLE_END_ADDR_HI32 0x0948 1652fb4d8502Sjsg #define mmVM_CONTEXT14_PAGE_TABLE_END_ADDR_HI32_BASE_IDX 0 1653fb4d8502Sjsg #define mmVM_CONTEXT15_PAGE_TABLE_END_ADDR_LO32 0x0949 1654fb4d8502Sjsg #define mmVM_CONTEXT15_PAGE_TABLE_END_ADDR_LO32_BASE_IDX 0 1655fb4d8502Sjsg #define mmVM_CONTEXT15_PAGE_TABLE_END_ADDR_HI32 0x094a 1656fb4d8502Sjsg #define mmVM_CONTEXT15_PAGE_TABLE_END_ADDR_HI32_BASE_IDX 0 1657fb4d8502Sjsg 1658fb4d8502Sjsg 1659fb4d8502Sjsg // addressBlock: gc_utcl2_vmsharedpfdec 1660fb4d8502Sjsg // base address: 0xa590 1661fb4d8502Sjsg #define mmMC_VM_NB_MMIOBASE 0x0964 1662fb4d8502Sjsg #define mmMC_VM_NB_MMIOBASE_BASE_IDX 0 1663fb4d8502Sjsg #define mmMC_VM_NB_MMIOLIMIT 0x0965 1664fb4d8502Sjsg #define mmMC_VM_NB_MMIOLIMIT_BASE_IDX 0 1665fb4d8502Sjsg #define mmMC_VM_NB_PCI_CTRL 0x0966 1666fb4d8502Sjsg #define mmMC_VM_NB_PCI_CTRL_BASE_IDX 0 1667fb4d8502Sjsg #define mmMC_VM_NB_PCI_ARB 0x0967 1668fb4d8502Sjsg #define mmMC_VM_NB_PCI_ARB_BASE_IDX 0 1669fb4d8502Sjsg #define mmMC_VM_NB_TOP_OF_DRAM_SLOT1 0x0968 1670fb4d8502Sjsg #define mmMC_VM_NB_TOP_OF_DRAM_SLOT1_BASE_IDX 0 1671fb4d8502Sjsg #define mmMC_VM_NB_LOWER_TOP_OF_DRAM2 0x0969 1672fb4d8502Sjsg #define mmMC_VM_NB_LOWER_TOP_OF_DRAM2_BASE_IDX 0 1673fb4d8502Sjsg #define mmMC_VM_NB_UPPER_TOP_OF_DRAM2 0x096a 1674fb4d8502Sjsg #define mmMC_VM_NB_UPPER_TOP_OF_DRAM2_BASE_IDX 0 1675fb4d8502Sjsg #define mmMC_VM_FB_OFFSET 0x096b 1676fb4d8502Sjsg #define mmMC_VM_FB_OFFSET_BASE_IDX 0 1677fb4d8502Sjsg #define mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB 0x096c 1678fb4d8502Sjsg #define mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB_BASE_IDX 0 1679fb4d8502Sjsg #define mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB 0x096d 1680fb4d8502Sjsg #define mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB_BASE_IDX 0 1681fb4d8502Sjsg #define mmMC_VM_STEERING 0x096e 1682fb4d8502Sjsg #define mmMC_VM_STEERING_BASE_IDX 0 1683fb4d8502Sjsg #define mmMC_SHARED_VIRT_RESET_REQ 0x096f 1684fb4d8502Sjsg #define mmMC_SHARED_VIRT_RESET_REQ_BASE_IDX 0 1685fb4d8502Sjsg #define mmMC_MEM_POWER_LS 0x0970 1686fb4d8502Sjsg #define mmMC_MEM_POWER_LS_BASE_IDX 0 1687fb4d8502Sjsg #define mmMC_VM_CACHEABLE_DRAM_ADDRESS_START 0x0971 1688fb4d8502Sjsg #define mmMC_VM_CACHEABLE_DRAM_ADDRESS_START_BASE_IDX 0 1689fb4d8502Sjsg #define mmMC_VM_CACHEABLE_DRAM_ADDRESS_END 0x0972 1690fb4d8502Sjsg #define mmMC_VM_CACHEABLE_DRAM_ADDRESS_END_BASE_IDX 0 1691fb4d8502Sjsg #define mmMC_VM_APT_CNTL 0x0973 1692fb4d8502Sjsg #define mmMC_VM_APT_CNTL_BASE_IDX 0 1693fb4d8502Sjsg #define mmMC_VM_LOCAL_HBM_ADDRESS_START 0x0974 1694fb4d8502Sjsg #define mmMC_VM_LOCAL_HBM_ADDRESS_START_BASE_IDX 0 1695fb4d8502Sjsg #define mmMC_VM_LOCAL_HBM_ADDRESS_END 0x0975 1696fb4d8502Sjsg #define mmMC_VM_LOCAL_HBM_ADDRESS_END_BASE_IDX 0 1697fb4d8502Sjsg #define mmMC_VM_LOCAL_HBM_ADDRESS_LOCK_CNTL 0x0976 1698fb4d8502Sjsg #define mmMC_VM_LOCAL_HBM_ADDRESS_LOCK_CNTL_BASE_IDX 0 1699fb4d8502Sjsg 1700fb4d8502Sjsg 1701fb4d8502Sjsg // addressBlock: gc_utcl2_vmsharedvcdec 1702fb4d8502Sjsg // base address: 0xa600 1703fb4d8502Sjsg #define mmMC_VM_FB_LOCATION_BASE 0x0980 1704fb4d8502Sjsg #define mmMC_VM_FB_LOCATION_BASE_BASE_IDX 0 1705fb4d8502Sjsg #define mmMC_VM_FB_LOCATION_TOP 0x0981 1706fb4d8502Sjsg #define mmMC_VM_FB_LOCATION_TOP_BASE_IDX 0 1707fb4d8502Sjsg #define mmMC_VM_AGP_TOP 0x0982 1708fb4d8502Sjsg #define mmMC_VM_AGP_TOP_BASE_IDX 0 1709fb4d8502Sjsg #define mmMC_VM_AGP_BOT 0x0983 1710fb4d8502Sjsg #define mmMC_VM_AGP_BOT_BASE_IDX 0 1711fb4d8502Sjsg #define mmMC_VM_AGP_BASE 0x0984 1712fb4d8502Sjsg #define mmMC_VM_AGP_BASE_BASE_IDX 0 1713fb4d8502Sjsg #define mmMC_VM_SYSTEM_APERTURE_LOW_ADDR 0x0985 1714fb4d8502Sjsg #define mmMC_VM_SYSTEM_APERTURE_LOW_ADDR_BASE_IDX 0 1715fb4d8502Sjsg #define mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x0986 1716fb4d8502Sjsg #define mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR_BASE_IDX 0 1717fb4d8502Sjsg #define mmMC_VM_MX_L1_TLB_CNTL 0x0987 1718fb4d8502Sjsg #define mmMC_VM_MX_L1_TLB_CNTL_BASE_IDX 0 1719fb4d8502Sjsg 1720fb4d8502Sjsg 1721fb4d8502Sjsg // addressBlock: gc_ea_gceadec 1722fb4d8502Sjsg // base address: 0xa800 1723fb4d8502Sjsg #define mmGCEA_DRAM_RD_CLI2GRP_MAP0 0x0a00 1724fb4d8502Sjsg #define mmGCEA_DRAM_RD_CLI2GRP_MAP0_BASE_IDX 0 1725fb4d8502Sjsg #define mmGCEA_DRAM_RD_CLI2GRP_MAP1 0x0a01 1726fb4d8502Sjsg #define mmGCEA_DRAM_RD_CLI2GRP_MAP1_BASE_IDX 0 1727fb4d8502Sjsg #define mmGCEA_DRAM_WR_CLI2GRP_MAP0 0x0a02 1728fb4d8502Sjsg #define mmGCEA_DRAM_WR_CLI2GRP_MAP0_BASE_IDX 0 1729fb4d8502Sjsg #define mmGCEA_DRAM_WR_CLI2GRP_MAP1 0x0a03 1730fb4d8502Sjsg #define mmGCEA_DRAM_WR_CLI2GRP_MAP1_BASE_IDX 0 1731fb4d8502Sjsg #define mmGCEA_DRAM_RD_GRP2VC_MAP 0x0a04 1732fb4d8502Sjsg #define mmGCEA_DRAM_RD_GRP2VC_MAP_BASE_IDX 0 1733fb4d8502Sjsg #define mmGCEA_DRAM_WR_GRP2VC_MAP 0x0a05 1734fb4d8502Sjsg #define mmGCEA_DRAM_WR_GRP2VC_MAP_BASE_IDX 0 1735fb4d8502Sjsg #define mmGCEA_DRAM_RD_LAZY 0x0a06 1736fb4d8502Sjsg #define mmGCEA_DRAM_RD_LAZY_BASE_IDX 0 1737fb4d8502Sjsg #define mmGCEA_DRAM_WR_LAZY 0x0a07 1738fb4d8502Sjsg #define mmGCEA_DRAM_WR_LAZY_BASE_IDX 0 1739fb4d8502Sjsg #define mmGCEA_DRAM_RD_CAM_CNTL 0x0a08 1740fb4d8502Sjsg #define mmGCEA_DRAM_RD_CAM_CNTL_BASE_IDX 0 1741fb4d8502Sjsg #define mmGCEA_DRAM_WR_CAM_CNTL 0x0a09 1742fb4d8502Sjsg #define mmGCEA_DRAM_WR_CAM_CNTL_BASE_IDX 0 1743fb4d8502Sjsg #define mmGCEA_DRAM_PAGE_BURST 0x0a0a 1744fb4d8502Sjsg #define mmGCEA_DRAM_PAGE_BURST_BASE_IDX 0 1745fb4d8502Sjsg #define mmGCEA_DRAM_RD_PRI_AGE 0x0a0b 1746fb4d8502Sjsg #define mmGCEA_DRAM_RD_PRI_AGE_BASE_IDX 0 1747fb4d8502Sjsg #define mmGCEA_DRAM_WR_PRI_AGE 0x0a0c 1748fb4d8502Sjsg #define mmGCEA_DRAM_WR_PRI_AGE_BASE_IDX 0 1749fb4d8502Sjsg #define mmGCEA_DRAM_RD_PRI_QUEUING 0x0a0d 1750fb4d8502Sjsg #define mmGCEA_DRAM_RD_PRI_QUEUING_BASE_IDX 0 1751fb4d8502Sjsg #define mmGCEA_DRAM_WR_PRI_QUEUING 0x0a0e 1752fb4d8502Sjsg #define mmGCEA_DRAM_WR_PRI_QUEUING_BASE_IDX 0 1753fb4d8502Sjsg #define mmGCEA_DRAM_RD_PRI_FIXED 0x0a0f 1754fb4d8502Sjsg #define mmGCEA_DRAM_RD_PRI_FIXED_BASE_IDX 0 1755fb4d8502Sjsg #define mmGCEA_DRAM_WR_PRI_FIXED 0x0a10 1756fb4d8502Sjsg #define mmGCEA_DRAM_WR_PRI_FIXED_BASE_IDX 0 1757fb4d8502Sjsg #define mmGCEA_DRAM_RD_PRI_URGENCY 0x0a11 1758fb4d8502Sjsg #define mmGCEA_DRAM_RD_PRI_URGENCY_BASE_IDX 0 1759fb4d8502Sjsg #define mmGCEA_DRAM_WR_PRI_URGENCY 0x0a12 1760fb4d8502Sjsg #define mmGCEA_DRAM_WR_PRI_URGENCY_BASE_IDX 0 1761fb4d8502Sjsg #define mmGCEA_DRAM_RD_PRI_QUANT_PRI1 0x0a13 1762fb4d8502Sjsg #define mmGCEA_DRAM_RD_PRI_QUANT_PRI1_BASE_IDX 0 1763fb4d8502Sjsg #define mmGCEA_DRAM_RD_PRI_QUANT_PRI2 0x0a14 1764fb4d8502Sjsg #define mmGCEA_DRAM_RD_PRI_QUANT_PRI2_BASE_IDX 0 1765fb4d8502Sjsg #define mmGCEA_DRAM_RD_PRI_QUANT_PRI3 0x0a15 1766fb4d8502Sjsg #define mmGCEA_DRAM_RD_PRI_QUANT_PRI3_BASE_IDX 0 1767fb4d8502Sjsg #define mmGCEA_DRAM_WR_PRI_QUANT_PRI1 0x0a16 1768fb4d8502Sjsg #define mmGCEA_DRAM_WR_PRI_QUANT_PRI1_BASE_IDX 0 1769fb4d8502Sjsg #define mmGCEA_DRAM_WR_PRI_QUANT_PRI2 0x0a17 1770fb4d8502Sjsg #define mmGCEA_DRAM_WR_PRI_QUANT_PRI2_BASE_IDX 0 1771fb4d8502Sjsg #define mmGCEA_DRAM_WR_PRI_QUANT_PRI3 0x0a18 1772fb4d8502Sjsg #define mmGCEA_DRAM_WR_PRI_QUANT_PRI3_BASE_IDX 0 1773fb4d8502Sjsg #define mmGCEA_ADDRNORM_BASE_ADDR0 0x0a32 1774fb4d8502Sjsg #define mmGCEA_ADDRNORM_BASE_ADDR0_BASE_IDX 0 1775fb4d8502Sjsg #define mmGCEA_ADDRNORM_LIMIT_ADDR0 0x0a33 1776fb4d8502Sjsg #define mmGCEA_ADDRNORM_LIMIT_ADDR0_BASE_IDX 0 1777fb4d8502Sjsg #define mmGCEA_ADDRNORM_BASE_ADDR1 0x0a34 1778fb4d8502Sjsg #define mmGCEA_ADDRNORM_BASE_ADDR1_BASE_IDX 0 1779fb4d8502Sjsg #define mmGCEA_ADDRNORM_LIMIT_ADDR1 0x0a35 1780fb4d8502Sjsg #define mmGCEA_ADDRNORM_LIMIT_ADDR1_BASE_IDX 0 1781fb4d8502Sjsg #define mmGCEA_ADDRNORM_OFFSET_ADDR1 0x0a36 1782fb4d8502Sjsg #define mmGCEA_ADDRNORM_OFFSET_ADDR1_BASE_IDX 0 1783fb4d8502Sjsg #define mmGCEA_ADDRNORM_HOLE_CNTL 0x0a41 1784fb4d8502Sjsg #define mmGCEA_ADDRNORM_HOLE_CNTL_BASE_IDX 0 1785fb4d8502Sjsg #define mmGCEA_ADDRDEC_BANK_CFG 0x0a42 1786fb4d8502Sjsg #define mmGCEA_ADDRDEC_BANK_CFG_BASE_IDX 0 1787fb4d8502Sjsg #define mmGCEA_ADDRDEC_MISC_CFG 0x0a43 1788fb4d8502Sjsg #define mmGCEA_ADDRDEC_MISC_CFG_BASE_IDX 0 1789fb4d8502Sjsg #define mmGCEA_ADDRDECDRAM_ADDR_HASH_BANK0 0x0a44 1790fb4d8502Sjsg #define mmGCEA_ADDRDECDRAM_ADDR_HASH_BANK0_BASE_IDX 0 1791fb4d8502Sjsg #define mmGCEA_ADDRDECDRAM_ADDR_HASH_BANK1 0x0a45 1792fb4d8502Sjsg #define mmGCEA_ADDRDECDRAM_ADDR_HASH_BANK1_BASE_IDX 0 1793fb4d8502Sjsg #define mmGCEA_ADDRDECDRAM_ADDR_HASH_BANK2 0x0a46 1794fb4d8502Sjsg #define mmGCEA_ADDRDECDRAM_ADDR_HASH_BANK2_BASE_IDX 0 1795fb4d8502Sjsg #define mmGCEA_ADDRDECDRAM_ADDR_HASH_BANK3 0x0a47 1796fb4d8502Sjsg #define mmGCEA_ADDRDECDRAM_ADDR_HASH_BANK3_BASE_IDX 0 1797fb4d8502Sjsg #define mmGCEA_ADDRDECDRAM_ADDR_HASH_BANK4 0x0a48 1798fb4d8502Sjsg #define mmGCEA_ADDRDECDRAM_ADDR_HASH_BANK4_BASE_IDX 0 1799fb4d8502Sjsg #define mmGCEA_ADDRDECDRAM_ADDR_HASH_PC 0x0a49 1800fb4d8502Sjsg #define mmGCEA_ADDRDECDRAM_ADDR_HASH_PC_BASE_IDX 0 1801fb4d8502Sjsg #define mmGCEA_ADDRDECDRAM_ADDR_HASH_PC2 0x0a4a 1802fb4d8502Sjsg #define mmGCEA_ADDRDECDRAM_ADDR_HASH_PC2_BASE_IDX 0 1803fb4d8502Sjsg #define mmGCEA_ADDRDECDRAM_ADDR_HASH_CS0 0x0a4b 1804fb4d8502Sjsg #define mmGCEA_ADDRDECDRAM_ADDR_HASH_CS0_BASE_IDX 0 1805fb4d8502Sjsg #define mmGCEA_ADDRDECDRAM_ADDR_HASH_CS1 0x0a4c 1806fb4d8502Sjsg #define mmGCEA_ADDRDECDRAM_ADDR_HASH_CS1_BASE_IDX 0 1807fb4d8502Sjsg #define mmGCEA_ADDRDECDRAM_HARVEST_ENABLE 0x0a4d 1808fb4d8502Sjsg #define mmGCEA_ADDRDECDRAM_HARVEST_ENABLE_BASE_IDX 0 1809fb4d8502Sjsg #define mmGCEA_ADDRDEC0_BASE_ADDR_CS0 0x0a58 1810fb4d8502Sjsg #define mmGCEA_ADDRDEC0_BASE_ADDR_CS0_BASE_IDX 0 1811fb4d8502Sjsg #define mmGCEA_ADDRDEC0_BASE_ADDR_CS1 0x0a59 1812fb4d8502Sjsg #define mmGCEA_ADDRDEC0_BASE_ADDR_CS1_BASE_IDX 0 1813fb4d8502Sjsg #define mmGCEA_ADDRDEC0_BASE_ADDR_CS2 0x0a5a 1814fb4d8502Sjsg #define mmGCEA_ADDRDEC0_BASE_ADDR_CS2_BASE_IDX 0 1815fb4d8502Sjsg #define mmGCEA_ADDRDEC0_BASE_ADDR_CS3 0x0a5b 1816fb4d8502Sjsg #define mmGCEA_ADDRDEC0_BASE_ADDR_CS3_BASE_IDX 0 1817fb4d8502Sjsg #define mmGCEA_ADDRDEC0_BASE_ADDR_SECCS0 0x0a5c 1818fb4d8502Sjsg #define mmGCEA_ADDRDEC0_BASE_ADDR_SECCS0_BASE_IDX 0 1819fb4d8502Sjsg #define mmGCEA_ADDRDEC0_BASE_ADDR_SECCS1 0x0a5d 1820fb4d8502Sjsg #define mmGCEA_ADDRDEC0_BASE_ADDR_SECCS1_BASE_IDX 0 1821fb4d8502Sjsg #define mmGCEA_ADDRDEC0_BASE_ADDR_SECCS2 0x0a5e 1822fb4d8502Sjsg #define mmGCEA_ADDRDEC0_BASE_ADDR_SECCS2_BASE_IDX 0 1823fb4d8502Sjsg #define mmGCEA_ADDRDEC0_BASE_ADDR_SECCS3 0x0a5f 1824fb4d8502Sjsg #define mmGCEA_ADDRDEC0_BASE_ADDR_SECCS3_BASE_IDX 0 1825fb4d8502Sjsg #define mmGCEA_ADDRDEC0_ADDR_MASK_CS01 0x0a60 1826fb4d8502Sjsg #define mmGCEA_ADDRDEC0_ADDR_MASK_CS01_BASE_IDX 0 1827fb4d8502Sjsg #define mmGCEA_ADDRDEC0_ADDR_MASK_CS23 0x0a61 1828fb4d8502Sjsg #define mmGCEA_ADDRDEC0_ADDR_MASK_CS23_BASE_IDX 0 1829fb4d8502Sjsg #define mmGCEA_ADDRDEC0_ADDR_MASK_SECCS01 0x0a62 1830fb4d8502Sjsg #define mmGCEA_ADDRDEC0_ADDR_MASK_SECCS01_BASE_IDX 0 1831fb4d8502Sjsg #define mmGCEA_ADDRDEC0_ADDR_MASK_SECCS23 0x0a63 1832fb4d8502Sjsg #define mmGCEA_ADDRDEC0_ADDR_MASK_SECCS23_BASE_IDX 0 1833fb4d8502Sjsg #define mmGCEA_ADDRDEC0_ADDR_CFG_CS01 0x0a64 1834fb4d8502Sjsg #define mmGCEA_ADDRDEC0_ADDR_CFG_CS01_BASE_IDX 0 1835fb4d8502Sjsg #define mmGCEA_ADDRDEC0_ADDR_CFG_CS23 0x0a65 1836fb4d8502Sjsg #define mmGCEA_ADDRDEC0_ADDR_CFG_CS23_BASE_IDX 0 1837fb4d8502Sjsg #define mmGCEA_ADDRDEC0_ADDR_SEL_CS01 0x0a66 1838fb4d8502Sjsg #define mmGCEA_ADDRDEC0_ADDR_SEL_CS01_BASE_IDX 0 1839fb4d8502Sjsg #define mmGCEA_ADDRDEC0_ADDR_SEL_CS23 0x0a67 1840fb4d8502Sjsg #define mmGCEA_ADDRDEC0_ADDR_SEL_CS23_BASE_IDX 0 1841fb4d8502Sjsg #define mmGCEA_ADDRDEC0_COL_SEL_LO_CS01 0x0a68 1842fb4d8502Sjsg #define mmGCEA_ADDRDEC0_COL_SEL_LO_CS01_BASE_IDX 0 1843fb4d8502Sjsg #define mmGCEA_ADDRDEC0_COL_SEL_LO_CS23 0x0a69 1844fb4d8502Sjsg #define mmGCEA_ADDRDEC0_COL_SEL_LO_CS23_BASE_IDX 0 1845fb4d8502Sjsg #define mmGCEA_ADDRDEC0_COL_SEL_HI_CS01 0x0a6a 1846fb4d8502Sjsg #define mmGCEA_ADDRDEC0_COL_SEL_HI_CS01_BASE_IDX 0 1847fb4d8502Sjsg #define mmGCEA_ADDRDEC0_COL_SEL_HI_CS23 0x0a6b 1848fb4d8502Sjsg #define mmGCEA_ADDRDEC0_COL_SEL_HI_CS23_BASE_IDX 0 1849fb4d8502Sjsg #define mmGCEA_ADDRDEC0_RM_SEL_CS01 0x0a6c 1850fb4d8502Sjsg #define mmGCEA_ADDRDEC0_RM_SEL_CS01_BASE_IDX 0 1851fb4d8502Sjsg #define mmGCEA_ADDRDEC0_RM_SEL_CS23 0x0a6d 1852fb4d8502Sjsg #define mmGCEA_ADDRDEC0_RM_SEL_CS23_BASE_IDX 0 1853fb4d8502Sjsg #define mmGCEA_ADDRDEC0_RM_SEL_SECCS01 0x0a6e 1854fb4d8502Sjsg #define mmGCEA_ADDRDEC0_RM_SEL_SECCS01_BASE_IDX 0 1855fb4d8502Sjsg #define mmGCEA_ADDRDEC0_RM_SEL_SECCS23 0x0a6f 1856fb4d8502Sjsg #define mmGCEA_ADDRDEC0_RM_SEL_SECCS23_BASE_IDX 0 1857fb4d8502Sjsg #define mmGCEA_ADDRDEC1_BASE_ADDR_CS0 0x0a70 1858fb4d8502Sjsg #define mmGCEA_ADDRDEC1_BASE_ADDR_CS0_BASE_IDX 0 1859fb4d8502Sjsg #define mmGCEA_ADDRDEC1_BASE_ADDR_CS1 0x0a71 1860fb4d8502Sjsg #define mmGCEA_ADDRDEC1_BASE_ADDR_CS1_BASE_IDX 0 1861fb4d8502Sjsg #define mmGCEA_ADDRDEC1_BASE_ADDR_CS2 0x0a72 1862fb4d8502Sjsg #define mmGCEA_ADDRDEC1_BASE_ADDR_CS2_BASE_IDX 0 1863fb4d8502Sjsg #define mmGCEA_ADDRDEC1_BASE_ADDR_CS3 0x0a73 1864fb4d8502Sjsg #define mmGCEA_ADDRDEC1_BASE_ADDR_CS3_BASE_IDX 0 1865fb4d8502Sjsg #define mmGCEA_ADDRDEC1_BASE_ADDR_SECCS0 0x0a74 1866fb4d8502Sjsg #define mmGCEA_ADDRDEC1_BASE_ADDR_SECCS0_BASE_IDX 0 1867fb4d8502Sjsg #define mmGCEA_ADDRDEC1_BASE_ADDR_SECCS1 0x0a75 1868fb4d8502Sjsg #define mmGCEA_ADDRDEC1_BASE_ADDR_SECCS1_BASE_IDX 0 1869fb4d8502Sjsg #define mmGCEA_ADDRDEC1_BASE_ADDR_SECCS2 0x0a76 1870fb4d8502Sjsg #define mmGCEA_ADDRDEC1_BASE_ADDR_SECCS2_BASE_IDX 0 1871fb4d8502Sjsg #define mmGCEA_ADDRDEC1_BASE_ADDR_SECCS3 0x0a77 1872fb4d8502Sjsg #define mmGCEA_ADDRDEC1_BASE_ADDR_SECCS3_BASE_IDX 0 1873fb4d8502Sjsg #define mmGCEA_ADDRDEC1_ADDR_MASK_CS01 0x0a78 1874fb4d8502Sjsg #define mmGCEA_ADDRDEC1_ADDR_MASK_CS01_BASE_IDX 0 1875fb4d8502Sjsg #define mmGCEA_ADDRDEC1_ADDR_MASK_CS23 0x0a79 1876fb4d8502Sjsg #define mmGCEA_ADDRDEC1_ADDR_MASK_CS23_BASE_IDX 0 1877fb4d8502Sjsg #define mmGCEA_ADDRDEC1_ADDR_MASK_SECCS01 0x0a7a 1878fb4d8502Sjsg #define mmGCEA_ADDRDEC1_ADDR_MASK_SECCS01_BASE_IDX 0 1879fb4d8502Sjsg #define mmGCEA_ADDRDEC1_ADDR_MASK_SECCS23 0x0a7b 1880fb4d8502Sjsg #define mmGCEA_ADDRDEC1_ADDR_MASK_SECCS23_BASE_IDX 0 1881fb4d8502Sjsg #define mmGCEA_ADDRDEC1_ADDR_CFG_CS01 0x0a7c 1882fb4d8502Sjsg #define mmGCEA_ADDRDEC1_ADDR_CFG_CS01_BASE_IDX 0 1883fb4d8502Sjsg #define mmGCEA_ADDRDEC1_ADDR_CFG_CS23 0x0a7d 1884fb4d8502Sjsg #define mmGCEA_ADDRDEC1_ADDR_CFG_CS23_BASE_IDX 0 1885fb4d8502Sjsg #define mmGCEA_ADDRDEC1_ADDR_SEL_CS01 0x0a7e 1886fb4d8502Sjsg #define mmGCEA_ADDRDEC1_ADDR_SEL_CS01_BASE_IDX 0 1887fb4d8502Sjsg #define mmGCEA_ADDRDEC1_ADDR_SEL_CS23 0x0a7f 1888fb4d8502Sjsg #define mmGCEA_ADDRDEC1_ADDR_SEL_CS23_BASE_IDX 0 1889fb4d8502Sjsg #define mmGCEA_ADDRDEC1_COL_SEL_LO_CS01 0x0a80 1890fb4d8502Sjsg #define mmGCEA_ADDRDEC1_COL_SEL_LO_CS01_BASE_IDX 0 1891fb4d8502Sjsg #define mmGCEA_ADDRDEC1_COL_SEL_LO_CS23 0x0a81 1892fb4d8502Sjsg #define mmGCEA_ADDRDEC1_COL_SEL_LO_CS23_BASE_IDX 0 1893fb4d8502Sjsg #define mmGCEA_ADDRDEC1_COL_SEL_HI_CS01 0x0a82 1894fb4d8502Sjsg #define mmGCEA_ADDRDEC1_COL_SEL_HI_CS01_BASE_IDX 0 1895fb4d8502Sjsg #define mmGCEA_ADDRDEC1_COL_SEL_HI_CS23 0x0a83 1896fb4d8502Sjsg #define mmGCEA_ADDRDEC1_COL_SEL_HI_CS23_BASE_IDX 0 1897fb4d8502Sjsg #define mmGCEA_ADDRDEC1_RM_SEL_CS01 0x0a84 1898fb4d8502Sjsg #define mmGCEA_ADDRDEC1_RM_SEL_CS01_BASE_IDX 0 1899fb4d8502Sjsg #define mmGCEA_ADDRDEC1_RM_SEL_CS23 0x0a85 1900fb4d8502Sjsg #define mmGCEA_ADDRDEC1_RM_SEL_CS23_BASE_IDX 0 1901fb4d8502Sjsg #define mmGCEA_ADDRDEC1_RM_SEL_SECCS01 0x0a86 1902fb4d8502Sjsg #define mmGCEA_ADDRDEC1_RM_SEL_SECCS01_BASE_IDX 0 1903fb4d8502Sjsg #define mmGCEA_ADDRDEC1_RM_SEL_SECCS23 0x0a87 1904fb4d8502Sjsg #define mmGCEA_ADDRDEC1_RM_SEL_SECCS23_BASE_IDX 0 1905fb4d8502Sjsg #define mmGCEA_IO_RD_CLI2GRP_MAP0 0x0ad0 1906fb4d8502Sjsg #define mmGCEA_IO_RD_CLI2GRP_MAP0_BASE_IDX 0 1907fb4d8502Sjsg #define mmGCEA_IO_RD_CLI2GRP_MAP1 0x0ad1 1908fb4d8502Sjsg #define mmGCEA_IO_RD_CLI2GRP_MAP1_BASE_IDX 0 1909fb4d8502Sjsg #define mmGCEA_IO_WR_CLI2GRP_MAP0 0x0ad2 1910fb4d8502Sjsg #define mmGCEA_IO_WR_CLI2GRP_MAP0_BASE_IDX 0 1911fb4d8502Sjsg #define mmGCEA_IO_WR_CLI2GRP_MAP1 0x0ad3 1912fb4d8502Sjsg #define mmGCEA_IO_WR_CLI2GRP_MAP1_BASE_IDX 0 1913fb4d8502Sjsg #define mmGCEA_IO_RD_COMBINE_FLUSH 0x0ad4 1914fb4d8502Sjsg #define mmGCEA_IO_RD_COMBINE_FLUSH_BASE_IDX 0 1915fb4d8502Sjsg #define mmGCEA_IO_WR_COMBINE_FLUSH 0x0ad5 1916fb4d8502Sjsg #define mmGCEA_IO_WR_COMBINE_FLUSH_BASE_IDX 0 1917fb4d8502Sjsg #define mmGCEA_IO_GROUP_BURST 0x0ad6 1918fb4d8502Sjsg #define mmGCEA_IO_GROUP_BURST_BASE_IDX 0 1919fb4d8502Sjsg #define mmGCEA_IO_RD_PRI_AGE 0x0ad7 1920fb4d8502Sjsg #define mmGCEA_IO_RD_PRI_AGE_BASE_IDX 0 1921fb4d8502Sjsg #define mmGCEA_IO_WR_PRI_AGE 0x0ad8 1922fb4d8502Sjsg #define mmGCEA_IO_WR_PRI_AGE_BASE_IDX 0 1923fb4d8502Sjsg #define mmGCEA_IO_RD_PRI_QUEUING 0x0ad9 1924fb4d8502Sjsg #define mmGCEA_IO_RD_PRI_QUEUING_BASE_IDX 0 1925fb4d8502Sjsg #define mmGCEA_IO_WR_PRI_QUEUING 0x0ada 1926fb4d8502Sjsg #define mmGCEA_IO_WR_PRI_QUEUING_BASE_IDX 0 1927fb4d8502Sjsg #define mmGCEA_IO_RD_PRI_FIXED 0x0adb 1928fb4d8502Sjsg #define mmGCEA_IO_RD_PRI_FIXED_BASE_IDX 0 1929fb4d8502Sjsg #define mmGCEA_IO_WR_PRI_FIXED 0x0adc 1930fb4d8502Sjsg #define mmGCEA_IO_WR_PRI_FIXED_BASE_IDX 0 1931fb4d8502Sjsg #define mmGCEA_IO_RD_PRI_URGENCY 0x0add 1932fb4d8502Sjsg #define mmGCEA_IO_RD_PRI_URGENCY_BASE_IDX 0 1933fb4d8502Sjsg #define mmGCEA_IO_WR_PRI_URGENCY 0x0ade 1934fb4d8502Sjsg #define mmGCEA_IO_WR_PRI_URGENCY_BASE_IDX 0 1935fb4d8502Sjsg #define mmGCEA_IO_RD_PRI_URGENCY_MASK 0x0adf 1936fb4d8502Sjsg #define mmGCEA_IO_RD_PRI_URGENCY_MASK_BASE_IDX 0 1937fb4d8502Sjsg #define mmGCEA_IO_WR_PRI_URGENCY_MASK 0x0ae0 1938fb4d8502Sjsg #define mmGCEA_IO_WR_PRI_URGENCY_MASK_BASE_IDX 0 1939fb4d8502Sjsg #define mmGCEA_IO_RD_PRI_QUANT_PRI1 0x0ae1 1940fb4d8502Sjsg #define mmGCEA_IO_RD_PRI_QUANT_PRI1_BASE_IDX 0 1941fb4d8502Sjsg #define mmGCEA_IO_RD_PRI_QUANT_PRI2 0x0ae2 1942fb4d8502Sjsg #define mmGCEA_IO_RD_PRI_QUANT_PRI2_BASE_IDX 0 1943fb4d8502Sjsg #define mmGCEA_IO_RD_PRI_QUANT_PRI3 0x0ae3 1944fb4d8502Sjsg #define mmGCEA_IO_RD_PRI_QUANT_PRI3_BASE_IDX 0 1945fb4d8502Sjsg #define mmGCEA_IO_WR_PRI_QUANT_PRI1 0x0ae4 1946fb4d8502Sjsg #define mmGCEA_IO_WR_PRI_QUANT_PRI1_BASE_IDX 0 1947fb4d8502Sjsg #define mmGCEA_IO_WR_PRI_QUANT_PRI2 0x0ae5 1948fb4d8502Sjsg #define mmGCEA_IO_WR_PRI_QUANT_PRI2_BASE_IDX 0 1949fb4d8502Sjsg #define mmGCEA_IO_WR_PRI_QUANT_PRI3 0x0ae6 1950fb4d8502Sjsg #define mmGCEA_IO_WR_PRI_QUANT_PRI3_BASE_IDX 0 1951fb4d8502Sjsg #define mmGCEA_SDP_ARB_DRAM 0x0ae7 1952fb4d8502Sjsg #define mmGCEA_SDP_ARB_DRAM_BASE_IDX 0 1953fb4d8502Sjsg #define mmGCEA_SDP_ARB_FINAL 0x0ae9 1954fb4d8502Sjsg #define mmGCEA_SDP_ARB_FINAL_BASE_IDX 0 1955fb4d8502Sjsg #define mmGCEA_SDP_DRAM_PRIORITY 0x0aea 1956fb4d8502Sjsg #define mmGCEA_SDP_DRAM_PRIORITY_BASE_IDX 0 1957fb4d8502Sjsg #define mmGCEA_SDP_IO_PRIORITY 0x0aec 1958fb4d8502Sjsg #define mmGCEA_SDP_IO_PRIORITY_BASE_IDX 0 1959fb4d8502Sjsg #define mmGCEA_SDP_CREDITS 0x0aed 1960fb4d8502Sjsg #define mmGCEA_SDP_CREDITS_BASE_IDX 0 1961fb4d8502Sjsg #define mmGCEA_SDP_TAG_RESERVE0 0x0aee 1962fb4d8502Sjsg #define mmGCEA_SDP_TAG_RESERVE0_BASE_IDX 0 1963fb4d8502Sjsg #define mmGCEA_SDP_TAG_RESERVE1 0x0aef 1964fb4d8502Sjsg #define mmGCEA_SDP_TAG_RESERVE1_BASE_IDX 0 1965fb4d8502Sjsg #define mmGCEA_SDP_VCC_RESERVE0 0x0af0 1966fb4d8502Sjsg #define mmGCEA_SDP_VCC_RESERVE0_BASE_IDX 0 1967fb4d8502Sjsg #define mmGCEA_SDP_VCC_RESERVE1 0x0af1 1968fb4d8502Sjsg #define mmGCEA_SDP_VCC_RESERVE1_BASE_IDX 0 1969fb4d8502Sjsg #define mmGCEA_SDP_VCD_RESERVE0 0x0af2 1970fb4d8502Sjsg #define mmGCEA_SDP_VCD_RESERVE0_BASE_IDX 0 1971fb4d8502Sjsg #define mmGCEA_SDP_VCD_RESERVE1 0x0af3 1972fb4d8502Sjsg #define mmGCEA_SDP_VCD_RESERVE1_BASE_IDX 0 1973fb4d8502Sjsg #define mmGCEA_SDP_REQ_CNTL 0x0af4 1974fb4d8502Sjsg #define mmGCEA_SDP_REQ_CNTL_BASE_IDX 0 1975fb4d8502Sjsg #define mmGCEA_MISC 0x0af5 1976fb4d8502Sjsg #define mmGCEA_MISC_BASE_IDX 0 1977fb4d8502Sjsg #define mmGCEA_LATENCY_SAMPLING 0x0af6 1978fb4d8502Sjsg #define mmGCEA_LATENCY_SAMPLING_BASE_IDX 0 1979fb4d8502Sjsg #define mmGCEA_PERFCOUNTER_LO 0x0af7 1980fb4d8502Sjsg #define mmGCEA_PERFCOUNTER_LO_BASE_IDX 0 1981fb4d8502Sjsg #define mmGCEA_PERFCOUNTER_HI 0x0af8 1982fb4d8502Sjsg #define mmGCEA_PERFCOUNTER_HI_BASE_IDX 0 1983fb4d8502Sjsg #define mmGCEA_PERFCOUNTER0_CFG 0x0af9 1984fb4d8502Sjsg #define mmGCEA_PERFCOUNTER0_CFG_BASE_IDX 0 1985fb4d8502Sjsg #define mmGCEA_PERFCOUNTER1_CFG 0x0afa 1986fb4d8502Sjsg #define mmGCEA_PERFCOUNTER1_CFG_BASE_IDX 0 1987fb4d8502Sjsg #define mmGCEA_PERFCOUNTER_RSLT_CNTL 0x0afb 1988fb4d8502Sjsg #define mmGCEA_PERFCOUNTER_RSLT_CNTL_BASE_IDX 0 1989fb4d8502Sjsg 1990fb4d8502Sjsg 1991fb4d8502Sjsg // addressBlock: gc_tcdec 1992fb4d8502Sjsg // base address: 0xac00 1993fb4d8502Sjsg #define mmTCP_INVALIDATE 0x0b00 1994fb4d8502Sjsg #define mmTCP_INVALIDATE_BASE_IDX 0 1995fb4d8502Sjsg #define mmTCP_STATUS 0x0b01 1996fb4d8502Sjsg #define mmTCP_STATUS_BASE_IDX 0 1997fb4d8502Sjsg #define mmTCP_CNTL 0x0b02 1998fb4d8502Sjsg #define mmTCP_CNTL_BASE_IDX 0 1999fb4d8502Sjsg #define mmTCP_CHAN_STEER_LO 0x0b03 2000fb4d8502Sjsg #define mmTCP_CHAN_STEER_LO_BASE_IDX 0 2001fb4d8502Sjsg #define mmTCP_CHAN_STEER_HI 0x0b04 2002fb4d8502Sjsg #define mmTCP_CHAN_STEER_HI_BASE_IDX 0 2003fb4d8502Sjsg #define mmTCP_ADDR_CONFIG 0x0b05 2004fb4d8502Sjsg #define mmTCP_ADDR_CONFIG_BASE_IDX 0 2005fb4d8502Sjsg #define mmTCP_CREDIT 0x0b06 2006fb4d8502Sjsg #define mmTCP_CREDIT_BASE_IDX 0 2007fb4d8502Sjsg #define mmTCP_BUFFER_ADDR_HASH_CNTL 0x0b16 2008fb4d8502Sjsg #define mmTCP_BUFFER_ADDR_HASH_CNTL_BASE_IDX 0 2009fb4d8502Sjsg #define mmTCP_EDC_CNT 0x0b17 2010fb4d8502Sjsg #define mmTCP_EDC_CNT_BASE_IDX 0 2011fb4d8502Sjsg #define mmTC_CFG_L1_LOAD_POLICY0 0x0b1a 2012fb4d8502Sjsg #define mmTC_CFG_L1_LOAD_POLICY0_BASE_IDX 0 2013fb4d8502Sjsg #define mmTC_CFG_L1_LOAD_POLICY1 0x0b1b 2014fb4d8502Sjsg #define mmTC_CFG_L1_LOAD_POLICY1_BASE_IDX 0 2015fb4d8502Sjsg #define mmTC_CFG_L1_STORE_POLICY 0x0b1c 2016fb4d8502Sjsg #define mmTC_CFG_L1_STORE_POLICY_BASE_IDX 0 2017fb4d8502Sjsg #define mmTC_CFG_L2_LOAD_POLICY0 0x0b1d 2018fb4d8502Sjsg #define mmTC_CFG_L2_LOAD_POLICY0_BASE_IDX 0 2019fb4d8502Sjsg #define mmTC_CFG_L2_LOAD_POLICY1 0x0b1e 2020fb4d8502Sjsg #define mmTC_CFG_L2_LOAD_POLICY1_BASE_IDX 0 2021fb4d8502Sjsg #define mmTC_CFG_L2_STORE_POLICY0 0x0b1f 2022fb4d8502Sjsg #define mmTC_CFG_L2_STORE_POLICY0_BASE_IDX 0 2023fb4d8502Sjsg #define mmTC_CFG_L2_STORE_POLICY1 0x0b20 2024fb4d8502Sjsg #define mmTC_CFG_L2_STORE_POLICY1_BASE_IDX 0 2025fb4d8502Sjsg #define mmTC_CFG_L2_ATOMIC_POLICY 0x0b21 2026fb4d8502Sjsg #define mmTC_CFG_L2_ATOMIC_POLICY_BASE_IDX 0 2027fb4d8502Sjsg #define mmTC_CFG_L1_VOLATILE 0x0b22 2028fb4d8502Sjsg #define mmTC_CFG_L1_VOLATILE_BASE_IDX 0 2029fb4d8502Sjsg #define mmTC_CFG_L2_VOLATILE 0x0b23 2030fb4d8502Sjsg #define mmTC_CFG_L2_VOLATILE_BASE_IDX 0 2031fb4d8502Sjsg #define mmTCI_STATUS 0x0b61 2032fb4d8502Sjsg #define mmTCI_STATUS_BASE_IDX 0 2033fb4d8502Sjsg #define mmTCI_CNTL_1 0x0b62 2034fb4d8502Sjsg #define mmTCI_CNTL_1_BASE_IDX 0 2035fb4d8502Sjsg #define mmTCI_CNTL_2 0x0b63 2036fb4d8502Sjsg #define mmTCI_CNTL_2_BASE_IDX 0 2037fb4d8502Sjsg #define mmTCC_CTRL 0x0b80 2038fb4d8502Sjsg #define mmTCC_CTRL_BASE_IDX 0 2039fb4d8502Sjsg #define mmTCC_CTRL2 0x0b81 2040fb4d8502Sjsg #define mmTCC_CTRL2_BASE_IDX 0 2041fb4d8502Sjsg #define mmTCC_EDC_CNT 0x0b82 2042fb4d8502Sjsg #define mmTCC_EDC_CNT_BASE_IDX 0 2043fb4d8502Sjsg #define mmTCC_EDC_CNT2 0x0b83 2044fb4d8502Sjsg #define mmTCC_EDC_CNT2_BASE_IDX 0 2045fb4d8502Sjsg #define mmTCC_REDUNDANCY 0x0b84 2046fb4d8502Sjsg #define mmTCC_REDUNDANCY_BASE_IDX 0 2047fb4d8502Sjsg #define mmTCC_EXE_DISABLE 0x0b85 2048fb4d8502Sjsg #define mmTCC_EXE_DISABLE_BASE_IDX 0 2049fb4d8502Sjsg #define mmTCC_DSM_CNTL 0x0b86 2050fb4d8502Sjsg #define mmTCC_DSM_CNTL_BASE_IDX 0 2051fb4d8502Sjsg #define mmTCC_DSM_CNTLA 0x0b87 2052fb4d8502Sjsg #define mmTCC_DSM_CNTLA_BASE_IDX 0 2053fb4d8502Sjsg #define mmTCC_DSM_CNTL2 0x0b88 2054fb4d8502Sjsg #define mmTCC_DSM_CNTL2_BASE_IDX 0 2055fb4d8502Sjsg #define mmTCC_DSM_CNTL2A 0x0b89 2056fb4d8502Sjsg #define mmTCC_DSM_CNTL2A_BASE_IDX 0 2057fb4d8502Sjsg #define mmTCC_DSM_CNTL2B 0x0b8a 2058fb4d8502Sjsg #define mmTCC_DSM_CNTL2B_BASE_IDX 0 2059fb4d8502Sjsg #define mmTCC_WBINVL2 0x0b8b 2060fb4d8502Sjsg #define mmTCC_WBINVL2_BASE_IDX 0 2061fb4d8502Sjsg #define mmTCC_SOFT_RESET 0x0b8c 2062fb4d8502Sjsg #define mmTCC_SOFT_RESET_BASE_IDX 0 2063fb4d8502Sjsg #define mmTCA_CTRL 0x0bc0 2064fb4d8502Sjsg #define mmTCA_CTRL_BASE_IDX 0 2065fb4d8502Sjsg #define mmTCA_BURST_MASK 0x0bc1 2066fb4d8502Sjsg #define mmTCA_BURST_MASK_BASE_IDX 0 2067fb4d8502Sjsg #define mmTCA_BURST_CTRL 0x0bc2 2068fb4d8502Sjsg #define mmTCA_BURST_CTRL_BASE_IDX 0 2069fb4d8502Sjsg #define mmTCA_DSM_CNTL 0x0bc3 2070fb4d8502Sjsg #define mmTCA_DSM_CNTL_BASE_IDX 0 2071fb4d8502Sjsg #define mmTCA_DSM_CNTL2 0x0bc4 2072fb4d8502Sjsg #define mmTCA_DSM_CNTL2_BASE_IDX 0 2073fb4d8502Sjsg #define mmTCA_EDC_CNT 0x0bc5 2074fb4d8502Sjsg #define mmTCA_EDC_CNT_BASE_IDX 0 2075fb4d8502Sjsg 2076fb4d8502Sjsg 2077fb4d8502Sjsg // addressBlock: gc_shdec 2078fb4d8502Sjsg // base address: 0xb000 2079fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC3_PS 0x0c07 2080fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC3_PS_BASE_IDX 0 2081fb4d8502Sjsg #define mmSPI_SHADER_PGM_LO_PS 0x0c08 2082fb4d8502Sjsg #define mmSPI_SHADER_PGM_LO_PS_BASE_IDX 0 2083fb4d8502Sjsg #define mmSPI_SHADER_PGM_HI_PS 0x0c09 2084fb4d8502Sjsg #define mmSPI_SHADER_PGM_HI_PS_BASE_IDX 0 2085fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC1_PS 0x0c0a 2086fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC1_PS_BASE_IDX 0 2087fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC2_PS 0x0c0b 2088fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC2_PS_BASE_IDX 0 2089fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_0 0x0c0c 2090fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_0_BASE_IDX 0 2091fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_1 0x0c0d 2092fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_1_BASE_IDX 0 2093fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_2 0x0c0e 2094fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_2_BASE_IDX 0 2095fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_3 0x0c0f 2096fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_3_BASE_IDX 0 2097fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_4 0x0c10 2098fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_4_BASE_IDX 0 2099fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_5 0x0c11 2100fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_5_BASE_IDX 0 2101fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_6 0x0c12 2102fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_6_BASE_IDX 0 2103fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_7 0x0c13 2104fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_7_BASE_IDX 0 2105fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_8 0x0c14 2106fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_8_BASE_IDX 0 2107fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_9 0x0c15 2108fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_9_BASE_IDX 0 2109fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_10 0x0c16 2110fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_10_BASE_IDX 0 2111fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_11 0x0c17 2112fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_11_BASE_IDX 0 2113fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_12 0x0c18 2114fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_12_BASE_IDX 0 2115fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_13 0x0c19 2116fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_13_BASE_IDX 0 2117fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_14 0x0c1a 2118fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_14_BASE_IDX 0 2119fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_15 0x0c1b 2120fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_15_BASE_IDX 0 2121fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_16 0x0c1c 2122fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_16_BASE_IDX 0 2123fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_17 0x0c1d 2124fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_17_BASE_IDX 0 2125fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_18 0x0c1e 2126fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_18_BASE_IDX 0 2127fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_19 0x0c1f 2128fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_19_BASE_IDX 0 2129fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_20 0x0c20 2130fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_20_BASE_IDX 0 2131fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_21 0x0c21 2132fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_21_BASE_IDX 0 2133fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_22 0x0c22 2134fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_22_BASE_IDX 0 2135fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_23 0x0c23 2136fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_23_BASE_IDX 0 2137fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_24 0x0c24 2138fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_24_BASE_IDX 0 2139fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_25 0x0c25 2140fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_25_BASE_IDX 0 2141fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_26 0x0c26 2142fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_26_BASE_IDX 0 2143fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_27 0x0c27 2144fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_27_BASE_IDX 0 2145fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_28 0x0c28 2146fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_28_BASE_IDX 0 2147fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_29 0x0c29 2148fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_29_BASE_IDX 0 2149fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_30 0x0c2a 2150fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_30_BASE_IDX 0 2151fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_31 0x0c2b 2152fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_31_BASE_IDX 0 2153fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC3_VS 0x0c46 2154fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC3_VS_BASE_IDX 0 2155fb4d8502Sjsg #define mmSPI_SHADER_LATE_ALLOC_VS 0x0c47 2156fb4d8502Sjsg #define mmSPI_SHADER_LATE_ALLOC_VS_BASE_IDX 0 2157fb4d8502Sjsg #define mmSPI_SHADER_PGM_LO_VS 0x0c48 2158fb4d8502Sjsg #define mmSPI_SHADER_PGM_LO_VS_BASE_IDX 0 2159fb4d8502Sjsg #define mmSPI_SHADER_PGM_HI_VS 0x0c49 2160fb4d8502Sjsg #define mmSPI_SHADER_PGM_HI_VS_BASE_IDX 0 2161fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC1_VS 0x0c4a 2162fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC1_VS_BASE_IDX 0 2163fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC2_VS 0x0c4b 2164fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC2_VS_BASE_IDX 0 2165fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_0 0x0c4c 2166fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_0_BASE_IDX 0 2167fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_1 0x0c4d 2168fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_1_BASE_IDX 0 2169fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_2 0x0c4e 2170fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_2_BASE_IDX 0 2171fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_3 0x0c4f 2172fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_3_BASE_IDX 0 2173fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_4 0x0c50 2174fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_4_BASE_IDX 0 2175fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_5 0x0c51 2176fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_5_BASE_IDX 0 2177fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_6 0x0c52 2178fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_6_BASE_IDX 0 2179fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_7 0x0c53 2180fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_7_BASE_IDX 0 2181fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_8 0x0c54 2182fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_8_BASE_IDX 0 2183fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_9 0x0c55 2184fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_9_BASE_IDX 0 2185fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_10 0x0c56 2186fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_10_BASE_IDX 0 2187fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_11 0x0c57 2188fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_11_BASE_IDX 0 2189fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_12 0x0c58 2190fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_12_BASE_IDX 0 2191fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_13 0x0c59 2192fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_13_BASE_IDX 0 2193fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_14 0x0c5a 2194fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_14_BASE_IDX 0 2195fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_15 0x0c5b 2196fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_15_BASE_IDX 0 2197fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_16 0x0c5c 2198fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_16_BASE_IDX 0 2199fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_17 0x0c5d 2200fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_17_BASE_IDX 0 2201fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_18 0x0c5e 2202fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_18_BASE_IDX 0 2203fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_19 0x0c5f 2204fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_19_BASE_IDX 0 2205fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_20 0x0c60 2206fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_20_BASE_IDX 0 2207fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_21 0x0c61 2208fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_21_BASE_IDX 0 2209fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_22 0x0c62 2210fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_22_BASE_IDX 0 2211fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_23 0x0c63 2212fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_23_BASE_IDX 0 2213fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_24 0x0c64 2214fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_24_BASE_IDX 0 2215fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_25 0x0c65 2216fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_25_BASE_IDX 0 2217fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_26 0x0c66 2218fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_26_BASE_IDX 0 2219fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_27 0x0c67 2220fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_27_BASE_IDX 0 2221fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_28 0x0c68 2222fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_28_BASE_IDX 0 2223fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_29 0x0c69 2224fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_29_BASE_IDX 0 2225fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_30 0x0c6a 2226fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_30_BASE_IDX 0 2227fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_31 0x0c6b 2228fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_31_BASE_IDX 0 2229fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC2_GS_VS 0x0c7c 2230fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC2_GS_VS_BASE_IDX 0 2231fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC4_GS 0x0c81 2232fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC4_GS_BASE_IDX 0 2233fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ADDR_LO_GS 0x0c82 2234fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ADDR_LO_GS_BASE_IDX 0 2235fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ADDR_HI_GS 0x0c83 2236fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ADDR_HI_GS_BASE_IDX 0 2237fb4d8502Sjsg #define mmSPI_SHADER_PGM_LO_ES 0x0c84 2238fb4d8502Sjsg #define mmSPI_SHADER_PGM_LO_ES_BASE_IDX 0 2239fb4d8502Sjsg #define mmSPI_SHADER_PGM_HI_ES 0x0c85 2240fb4d8502Sjsg #define mmSPI_SHADER_PGM_HI_ES_BASE_IDX 0 2241fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC3_GS 0x0c87 2242fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC3_GS_BASE_IDX 0 2243fb4d8502Sjsg #define mmSPI_SHADER_PGM_LO_GS 0x0c88 2244fb4d8502Sjsg #define mmSPI_SHADER_PGM_LO_GS_BASE_IDX 0 2245fb4d8502Sjsg #define mmSPI_SHADER_PGM_HI_GS 0x0c89 2246fb4d8502Sjsg #define mmSPI_SHADER_PGM_HI_GS_BASE_IDX 0 2247fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC1_GS 0x0c8a 2248fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC1_GS_BASE_IDX 0 2249fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC2_GS 0x0c8b 2250fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC2_GS_BASE_IDX 0 2251fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_0 0x0ccc 2252fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_0_BASE_IDX 0 2253fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_1 0x0ccd 2254fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_1_BASE_IDX 0 2255fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_2 0x0cce 2256fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_2_BASE_IDX 0 2257fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_3 0x0ccf 2258fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_3_BASE_IDX 0 2259fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_4 0x0cd0 2260fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_4_BASE_IDX 0 2261fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_5 0x0cd1 2262fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_5_BASE_IDX 0 2263fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_6 0x0cd2 2264fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_6_BASE_IDX 0 2265fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_7 0x0cd3 2266fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_7_BASE_IDX 0 2267fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_8 0x0cd4 2268fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_8_BASE_IDX 0 2269fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_9 0x0cd5 2270fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_9_BASE_IDX 0 2271fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_10 0x0cd6 2272fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_10_BASE_IDX 0 2273fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_11 0x0cd7 2274fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_11_BASE_IDX 0 2275fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_12 0x0cd8 2276fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_12_BASE_IDX 0 2277fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_13 0x0cd9 2278fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_13_BASE_IDX 0 2279fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_14 0x0cda 2280fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_14_BASE_IDX 0 2281fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_15 0x0cdb 2282fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_15_BASE_IDX 0 2283fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_16 0x0cdc 2284fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_16_BASE_IDX 0 2285fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_17 0x0cdd 2286fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_17_BASE_IDX 0 2287fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_18 0x0cde 2288fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_18_BASE_IDX 0 2289fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_19 0x0cdf 2290fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_19_BASE_IDX 0 2291fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_20 0x0ce0 2292fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_20_BASE_IDX 0 2293fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_21 0x0ce1 2294fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_21_BASE_IDX 0 2295fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_22 0x0ce2 2296fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_22_BASE_IDX 0 2297fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_23 0x0ce3 2298fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_23_BASE_IDX 0 2299fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_24 0x0ce4 2300fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_24_BASE_IDX 0 2301fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_25 0x0ce5 2302fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_25_BASE_IDX 0 2303fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_26 0x0ce6 2304fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_26_BASE_IDX 0 2305fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_27 0x0ce7 2306fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_27_BASE_IDX 0 2307fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_28 0x0ce8 2308fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_28_BASE_IDX 0 2309fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_29 0x0ce9 2310fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_29_BASE_IDX 0 2311fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_30 0x0cea 2312fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_30_BASE_IDX 0 2313fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_31 0x0ceb 2314fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_31_BASE_IDX 0 2315fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC4_HS 0x0d01 2316fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC4_HS_BASE_IDX 0 2317fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ADDR_LO_HS 0x0d02 2318fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ADDR_LO_HS_BASE_IDX 0 2319fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ADDR_HI_HS 0x0d03 2320fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ADDR_HI_HS_BASE_IDX 0 2321fb4d8502Sjsg #define mmSPI_SHADER_PGM_LO_LS 0x0d04 2322fb4d8502Sjsg #define mmSPI_SHADER_PGM_LO_LS_BASE_IDX 0 2323fb4d8502Sjsg #define mmSPI_SHADER_PGM_HI_LS 0x0d05 2324fb4d8502Sjsg #define mmSPI_SHADER_PGM_HI_LS_BASE_IDX 0 2325fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC3_HS 0x0d07 2326fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC3_HS_BASE_IDX 0 2327fb4d8502Sjsg #define mmSPI_SHADER_PGM_LO_HS 0x0d08 2328fb4d8502Sjsg #define mmSPI_SHADER_PGM_LO_HS_BASE_IDX 0 2329fb4d8502Sjsg #define mmSPI_SHADER_PGM_HI_HS 0x0d09 2330fb4d8502Sjsg #define mmSPI_SHADER_PGM_HI_HS_BASE_IDX 0 2331fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC1_HS 0x0d0a 2332fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC1_HS_BASE_IDX 0 2333fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC2_HS 0x0d0b 2334fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC2_HS_BASE_IDX 0 2335fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_0 0x0d0c 2336fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_0_BASE_IDX 0 2337fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_1 0x0d0d 2338fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_1_BASE_IDX 0 2339fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_2 0x0d0e 2340fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_2_BASE_IDX 0 2341fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_3 0x0d0f 2342fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_3_BASE_IDX 0 2343fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_4 0x0d10 2344fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_4_BASE_IDX 0 2345fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_5 0x0d11 2346fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_5_BASE_IDX 0 2347fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_6 0x0d12 2348fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_6_BASE_IDX 0 2349fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_7 0x0d13 2350fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_7_BASE_IDX 0 2351fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_8 0x0d14 2352fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_8_BASE_IDX 0 2353fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_9 0x0d15 2354fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_9_BASE_IDX 0 2355fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_10 0x0d16 2356fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_10_BASE_IDX 0 2357fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_11 0x0d17 2358fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_11_BASE_IDX 0 2359fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_12 0x0d18 2360fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_12_BASE_IDX 0 2361fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_13 0x0d19 2362fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_13_BASE_IDX 0 2363fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_14 0x0d1a 2364fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_14_BASE_IDX 0 2365fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_15 0x0d1b 2366fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_15_BASE_IDX 0 2367fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_16 0x0d1c 2368fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_16_BASE_IDX 0 2369fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_17 0x0d1d 2370fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_17_BASE_IDX 0 2371fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_18 0x0d1e 2372fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_18_BASE_IDX 0 2373fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_19 0x0d1f 2374fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_19_BASE_IDX 0 2375fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_20 0x0d20 2376fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_20_BASE_IDX 0 2377fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_21 0x0d21 2378fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_21_BASE_IDX 0 2379fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_22 0x0d22 2380fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_22_BASE_IDX 0 2381fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_23 0x0d23 2382fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_23_BASE_IDX 0 2383fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_24 0x0d24 2384fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_24_BASE_IDX 0 2385fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_25 0x0d25 2386fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_25_BASE_IDX 0 2387fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_26 0x0d26 2388fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_26_BASE_IDX 0 2389fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_27 0x0d27 2390fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_27_BASE_IDX 0 2391fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_28 0x0d28 2392fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_28_BASE_IDX 0 2393fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_29 0x0d29 2394fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_29_BASE_IDX 0 2395fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_30 0x0d2a 2396fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_30_BASE_IDX 0 2397fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_31 0x0d2b 2398fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_31_BASE_IDX 0 2399fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_0 0x0d4c 2400fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_0_BASE_IDX 0 2401fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_1 0x0d4d 2402fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_1_BASE_IDX 0 2403fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_2 0x0d4e 2404fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_2_BASE_IDX 0 2405fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_3 0x0d4f 2406fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_3_BASE_IDX 0 2407fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_4 0x0d50 2408fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_4_BASE_IDX 0 2409fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_5 0x0d51 2410fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_5_BASE_IDX 0 2411fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_6 0x0d52 2412fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_6_BASE_IDX 0 2413fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_7 0x0d53 2414fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_7_BASE_IDX 0 2415fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_8 0x0d54 2416fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_8_BASE_IDX 0 2417fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_9 0x0d55 2418fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_9_BASE_IDX 0 2419fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_10 0x0d56 2420fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_10_BASE_IDX 0 2421fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_11 0x0d57 2422fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_11_BASE_IDX 0 2423fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_12 0x0d58 2424fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_12_BASE_IDX 0 2425fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_13 0x0d59 2426fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_13_BASE_IDX 0 2427fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_14 0x0d5a 2428fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_14_BASE_IDX 0 2429fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_15 0x0d5b 2430fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_15_BASE_IDX 0 2431fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_16 0x0d5c 2432fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_16_BASE_IDX 0 2433fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_17 0x0d5d 2434fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_17_BASE_IDX 0 2435fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_18 0x0d5e 2436fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_18_BASE_IDX 0 2437fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_19 0x0d5f 2438fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_19_BASE_IDX 0 2439fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_20 0x0d60 2440fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_20_BASE_IDX 0 2441fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_21 0x0d61 2442fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_21_BASE_IDX 0 2443fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_22 0x0d62 2444fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_22_BASE_IDX 0 2445fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_23 0x0d63 2446fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_23_BASE_IDX 0 2447fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_24 0x0d64 2448fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_24_BASE_IDX 0 2449fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_25 0x0d65 2450fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_25_BASE_IDX 0 2451fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_26 0x0d66 2452fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_26_BASE_IDX 0 2453fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_27 0x0d67 2454fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_27_BASE_IDX 0 2455fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_28 0x0d68 2456fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_28_BASE_IDX 0 2457fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_29 0x0d69 2458fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_29_BASE_IDX 0 2459fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_30 0x0d6a 2460fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_30_BASE_IDX 0 2461fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_31 0x0d6b 2462fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_COMMON_31_BASE_IDX 0 2463fb4d8502Sjsg #define mmCOMPUTE_DISPATCH_INITIATOR 0x0e00 2464fb4d8502Sjsg #define mmCOMPUTE_DISPATCH_INITIATOR_BASE_IDX 0 2465fb4d8502Sjsg #define mmCOMPUTE_DIM_X 0x0e01 2466fb4d8502Sjsg #define mmCOMPUTE_DIM_X_BASE_IDX 0 2467fb4d8502Sjsg #define mmCOMPUTE_DIM_Y 0x0e02 2468fb4d8502Sjsg #define mmCOMPUTE_DIM_Y_BASE_IDX 0 2469fb4d8502Sjsg #define mmCOMPUTE_DIM_Z 0x0e03 2470fb4d8502Sjsg #define mmCOMPUTE_DIM_Z_BASE_IDX 0 2471fb4d8502Sjsg #define mmCOMPUTE_START_X 0x0e04 2472fb4d8502Sjsg #define mmCOMPUTE_START_X_BASE_IDX 0 2473fb4d8502Sjsg #define mmCOMPUTE_START_Y 0x0e05 2474fb4d8502Sjsg #define mmCOMPUTE_START_Y_BASE_IDX 0 2475fb4d8502Sjsg #define mmCOMPUTE_START_Z 0x0e06 2476fb4d8502Sjsg #define mmCOMPUTE_START_Z_BASE_IDX 0 2477fb4d8502Sjsg #define mmCOMPUTE_NUM_THREAD_X 0x0e07 2478fb4d8502Sjsg #define mmCOMPUTE_NUM_THREAD_X_BASE_IDX 0 2479fb4d8502Sjsg #define mmCOMPUTE_NUM_THREAD_Y 0x0e08 2480fb4d8502Sjsg #define mmCOMPUTE_NUM_THREAD_Y_BASE_IDX 0 2481fb4d8502Sjsg #define mmCOMPUTE_NUM_THREAD_Z 0x0e09 2482fb4d8502Sjsg #define mmCOMPUTE_NUM_THREAD_Z_BASE_IDX 0 2483fb4d8502Sjsg #define mmCOMPUTE_PIPELINESTAT_ENABLE 0x0e0a 2484fb4d8502Sjsg #define mmCOMPUTE_PIPELINESTAT_ENABLE_BASE_IDX 0 2485fb4d8502Sjsg #define mmCOMPUTE_PERFCOUNT_ENABLE 0x0e0b 2486fb4d8502Sjsg #define mmCOMPUTE_PERFCOUNT_ENABLE_BASE_IDX 0 2487fb4d8502Sjsg #define mmCOMPUTE_PGM_LO 0x0e0c 2488fb4d8502Sjsg #define mmCOMPUTE_PGM_LO_BASE_IDX 0 2489fb4d8502Sjsg #define mmCOMPUTE_PGM_HI 0x0e0d 2490fb4d8502Sjsg #define mmCOMPUTE_PGM_HI_BASE_IDX 0 2491fb4d8502Sjsg #define mmCOMPUTE_DISPATCH_PKT_ADDR_LO 0x0e0e 2492fb4d8502Sjsg #define mmCOMPUTE_DISPATCH_PKT_ADDR_LO_BASE_IDX 0 2493fb4d8502Sjsg #define mmCOMPUTE_DISPATCH_PKT_ADDR_HI 0x0e0f 2494fb4d8502Sjsg #define mmCOMPUTE_DISPATCH_PKT_ADDR_HI_BASE_IDX 0 2495fb4d8502Sjsg #define mmCOMPUTE_DISPATCH_SCRATCH_BASE_LO 0x0e10 2496fb4d8502Sjsg #define mmCOMPUTE_DISPATCH_SCRATCH_BASE_LO_BASE_IDX 0 2497fb4d8502Sjsg #define mmCOMPUTE_DISPATCH_SCRATCH_BASE_HI 0x0e11 2498fb4d8502Sjsg #define mmCOMPUTE_DISPATCH_SCRATCH_BASE_HI_BASE_IDX 0 2499fb4d8502Sjsg #define mmCOMPUTE_PGM_RSRC1 0x0e12 2500fb4d8502Sjsg #define mmCOMPUTE_PGM_RSRC1_BASE_IDX 0 2501fb4d8502Sjsg #define mmCOMPUTE_PGM_RSRC2 0x0e13 2502fb4d8502Sjsg #define mmCOMPUTE_PGM_RSRC2_BASE_IDX 0 2503fb4d8502Sjsg #define mmCOMPUTE_VMID 0x0e14 2504fb4d8502Sjsg #define mmCOMPUTE_VMID_BASE_IDX 0 2505fb4d8502Sjsg #define mmCOMPUTE_RESOURCE_LIMITS 0x0e15 2506fb4d8502Sjsg #define mmCOMPUTE_RESOURCE_LIMITS_BASE_IDX 0 2507fb4d8502Sjsg #define mmCOMPUTE_STATIC_THREAD_MGMT_SE0 0x0e16 2508fb4d8502Sjsg #define mmCOMPUTE_STATIC_THREAD_MGMT_SE0_BASE_IDX 0 2509fb4d8502Sjsg #define mmCOMPUTE_STATIC_THREAD_MGMT_SE1 0x0e17 2510fb4d8502Sjsg #define mmCOMPUTE_STATIC_THREAD_MGMT_SE1_BASE_IDX 0 2511fb4d8502Sjsg #define mmCOMPUTE_TMPRING_SIZE 0x0e18 2512fb4d8502Sjsg #define mmCOMPUTE_TMPRING_SIZE_BASE_IDX 0 2513fb4d8502Sjsg #define mmCOMPUTE_STATIC_THREAD_MGMT_SE2 0x0e19 2514fb4d8502Sjsg #define mmCOMPUTE_STATIC_THREAD_MGMT_SE2_BASE_IDX 0 2515fb4d8502Sjsg #define mmCOMPUTE_STATIC_THREAD_MGMT_SE3 0x0e1a 2516fb4d8502Sjsg #define mmCOMPUTE_STATIC_THREAD_MGMT_SE3_BASE_IDX 0 2517fb4d8502Sjsg #define mmCOMPUTE_RESTART_X 0x0e1b 2518fb4d8502Sjsg #define mmCOMPUTE_RESTART_X_BASE_IDX 0 2519fb4d8502Sjsg #define mmCOMPUTE_RESTART_Y 0x0e1c 2520fb4d8502Sjsg #define mmCOMPUTE_RESTART_Y_BASE_IDX 0 2521fb4d8502Sjsg #define mmCOMPUTE_RESTART_Z 0x0e1d 2522fb4d8502Sjsg #define mmCOMPUTE_RESTART_Z_BASE_IDX 0 2523fb4d8502Sjsg #define mmCOMPUTE_THREAD_TRACE_ENABLE 0x0e1e 2524fb4d8502Sjsg #define mmCOMPUTE_THREAD_TRACE_ENABLE_BASE_IDX 0 2525fb4d8502Sjsg #define mmCOMPUTE_MISC_RESERVED 0x0e1f 2526fb4d8502Sjsg #define mmCOMPUTE_MISC_RESERVED_BASE_IDX 0 2527fb4d8502Sjsg #define mmCOMPUTE_DISPATCH_ID 0x0e20 2528fb4d8502Sjsg #define mmCOMPUTE_DISPATCH_ID_BASE_IDX 0 2529fb4d8502Sjsg #define mmCOMPUTE_THREADGROUP_ID 0x0e21 2530fb4d8502Sjsg #define mmCOMPUTE_THREADGROUP_ID_BASE_IDX 0 2531fb4d8502Sjsg #define mmCOMPUTE_RELAUNCH 0x0e22 2532fb4d8502Sjsg #define mmCOMPUTE_RELAUNCH_BASE_IDX 0 2533fb4d8502Sjsg #define mmCOMPUTE_WAVE_RESTORE_ADDR_LO 0x0e23 2534fb4d8502Sjsg #define mmCOMPUTE_WAVE_RESTORE_ADDR_LO_BASE_IDX 0 2535fb4d8502Sjsg #define mmCOMPUTE_WAVE_RESTORE_ADDR_HI 0x0e24 2536fb4d8502Sjsg #define mmCOMPUTE_WAVE_RESTORE_ADDR_HI_BASE_IDX 0 2537fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_0 0x0e40 2538fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_0_BASE_IDX 0 2539fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_1 0x0e41 2540fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_1_BASE_IDX 0 2541fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_2 0x0e42 2542fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_2_BASE_IDX 0 2543fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_3 0x0e43 2544fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_3_BASE_IDX 0 2545fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_4 0x0e44 2546fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_4_BASE_IDX 0 2547fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_5 0x0e45 2548fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_5_BASE_IDX 0 2549fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_6 0x0e46 2550fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_6_BASE_IDX 0 2551fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_7 0x0e47 2552fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_7_BASE_IDX 0 2553fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_8 0x0e48 2554fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_8_BASE_IDX 0 2555fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_9 0x0e49 2556fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_9_BASE_IDX 0 2557fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_10 0x0e4a 2558fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_10_BASE_IDX 0 2559fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_11 0x0e4b 2560fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_11_BASE_IDX 0 2561fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_12 0x0e4c 2562fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_12_BASE_IDX 0 2563fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_13 0x0e4d 2564fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_13_BASE_IDX 0 2565fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_14 0x0e4e 2566fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_14_BASE_IDX 0 2567fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_15 0x0e4f 2568fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_15_BASE_IDX 0 2569fb4d8502Sjsg #define mmCOMPUTE_NOWHERE 0x0e7f 2570fb4d8502Sjsg #define mmCOMPUTE_NOWHERE_BASE_IDX 0 2571fb4d8502Sjsg 2572fb4d8502Sjsg 2573fb4d8502Sjsg // addressBlock: gc_cppdec 2574fb4d8502Sjsg // base address: 0xc080 2575fb4d8502Sjsg #define mmCP_DFY_CNTL 0x1020 2576fb4d8502Sjsg #define mmCP_DFY_CNTL_BASE_IDX 0 2577fb4d8502Sjsg #define mmCP_DFY_STAT 0x1021 2578fb4d8502Sjsg #define mmCP_DFY_STAT_BASE_IDX 0 2579fb4d8502Sjsg #define mmCP_DFY_ADDR_HI 0x1022 2580fb4d8502Sjsg #define mmCP_DFY_ADDR_HI_BASE_IDX 0 2581fb4d8502Sjsg #define mmCP_DFY_ADDR_LO 0x1023 2582fb4d8502Sjsg #define mmCP_DFY_ADDR_LO_BASE_IDX 0 2583fb4d8502Sjsg #define mmCP_DFY_DATA_0 0x1024 2584fb4d8502Sjsg #define mmCP_DFY_DATA_0_BASE_IDX 0 2585fb4d8502Sjsg #define mmCP_DFY_DATA_1 0x1025 2586fb4d8502Sjsg #define mmCP_DFY_DATA_1_BASE_IDX 0 2587fb4d8502Sjsg #define mmCP_DFY_DATA_2 0x1026 2588fb4d8502Sjsg #define mmCP_DFY_DATA_2_BASE_IDX 0 2589fb4d8502Sjsg #define mmCP_DFY_DATA_3 0x1027 2590fb4d8502Sjsg #define mmCP_DFY_DATA_3_BASE_IDX 0 2591fb4d8502Sjsg #define mmCP_DFY_DATA_4 0x1028 2592fb4d8502Sjsg #define mmCP_DFY_DATA_4_BASE_IDX 0 2593fb4d8502Sjsg #define mmCP_DFY_DATA_5 0x1029 2594fb4d8502Sjsg #define mmCP_DFY_DATA_5_BASE_IDX 0 2595fb4d8502Sjsg #define mmCP_DFY_DATA_6 0x102a 2596fb4d8502Sjsg #define mmCP_DFY_DATA_6_BASE_IDX 0 2597fb4d8502Sjsg #define mmCP_DFY_DATA_7 0x102b 2598fb4d8502Sjsg #define mmCP_DFY_DATA_7_BASE_IDX 0 2599fb4d8502Sjsg #define mmCP_DFY_DATA_8 0x102c 2600fb4d8502Sjsg #define mmCP_DFY_DATA_8_BASE_IDX 0 2601fb4d8502Sjsg #define mmCP_DFY_DATA_9 0x102d 2602fb4d8502Sjsg #define mmCP_DFY_DATA_9_BASE_IDX 0 2603fb4d8502Sjsg #define mmCP_DFY_DATA_10 0x102e 2604fb4d8502Sjsg #define mmCP_DFY_DATA_10_BASE_IDX 0 2605fb4d8502Sjsg #define mmCP_DFY_DATA_11 0x102f 2606fb4d8502Sjsg #define mmCP_DFY_DATA_11_BASE_IDX 0 2607fb4d8502Sjsg #define mmCP_DFY_DATA_12 0x1030 2608fb4d8502Sjsg #define mmCP_DFY_DATA_12_BASE_IDX 0 2609fb4d8502Sjsg #define mmCP_DFY_DATA_13 0x1031 2610fb4d8502Sjsg #define mmCP_DFY_DATA_13_BASE_IDX 0 2611fb4d8502Sjsg #define mmCP_DFY_DATA_14 0x1032 2612fb4d8502Sjsg #define mmCP_DFY_DATA_14_BASE_IDX 0 2613fb4d8502Sjsg #define mmCP_DFY_DATA_15 0x1033 2614fb4d8502Sjsg #define mmCP_DFY_DATA_15_BASE_IDX 0 2615fb4d8502Sjsg #define mmCP_DFY_CMD 0x1034 2616fb4d8502Sjsg #define mmCP_DFY_CMD_BASE_IDX 0 2617fb4d8502Sjsg #define mmCP_EOPQ_WAIT_TIME 0x1035 2618fb4d8502Sjsg #define mmCP_EOPQ_WAIT_TIME_BASE_IDX 0 2619fb4d8502Sjsg #define mmCP_CPC_MGCG_SYNC_CNTL 0x1036 2620fb4d8502Sjsg #define mmCP_CPC_MGCG_SYNC_CNTL_BASE_IDX 0 2621fb4d8502Sjsg #define mmCPC_INT_INFO 0x1037 2622fb4d8502Sjsg #define mmCPC_INT_INFO_BASE_IDX 0 2623fb4d8502Sjsg #define mmCP_VIRT_STATUS 0x1038 2624fb4d8502Sjsg #define mmCP_VIRT_STATUS_BASE_IDX 0 2625fb4d8502Sjsg #define mmCPC_INT_ADDR 0x1039 2626fb4d8502Sjsg #define mmCPC_INT_ADDR_BASE_IDX 0 2627fb4d8502Sjsg #define mmCPC_INT_PASID 0x103a 2628fb4d8502Sjsg #define mmCPC_INT_PASID_BASE_IDX 0 2629fb4d8502Sjsg #define mmCP_GFX_ERROR 0x103b 2630fb4d8502Sjsg #define mmCP_GFX_ERROR_BASE_IDX 0 2631fb4d8502Sjsg #define mmCPG_UTCL1_CNTL 0x103c 2632fb4d8502Sjsg #define mmCPG_UTCL1_CNTL_BASE_IDX 0 2633fb4d8502Sjsg #define mmCPC_UTCL1_CNTL 0x103d 2634fb4d8502Sjsg #define mmCPC_UTCL1_CNTL_BASE_IDX 0 2635fb4d8502Sjsg #define mmCPF_UTCL1_CNTL 0x103e 2636fb4d8502Sjsg #define mmCPF_UTCL1_CNTL_BASE_IDX 0 2637fb4d8502Sjsg #define mmCP_AQL_SMM_STATUS 0x103f 2638fb4d8502Sjsg #define mmCP_AQL_SMM_STATUS_BASE_IDX 0 2639fb4d8502Sjsg #define mmCP_RB0_BASE 0x1040 2640fb4d8502Sjsg #define mmCP_RB0_BASE_BASE_IDX 0 2641fb4d8502Sjsg #define mmCP_RB_BASE 0x1040 2642fb4d8502Sjsg #define mmCP_RB_BASE_BASE_IDX 0 2643fb4d8502Sjsg #define mmCP_RB0_CNTL 0x1041 2644fb4d8502Sjsg #define mmCP_RB0_CNTL_BASE_IDX 0 2645fb4d8502Sjsg #define mmCP_RB_CNTL 0x1041 2646fb4d8502Sjsg #define mmCP_RB_CNTL_BASE_IDX 0 2647fb4d8502Sjsg #define mmCP_RB_RPTR_WR 0x1042 2648fb4d8502Sjsg #define mmCP_RB_RPTR_WR_BASE_IDX 0 2649fb4d8502Sjsg #define mmCP_RB0_RPTR_ADDR 0x1043 2650fb4d8502Sjsg #define mmCP_RB0_RPTR_ADDR_BASE_IDX 0 2651fb4d8502Sjsg #define mmCP_RB_RPTR_ADDR 0x1043 2652fb4d8502Sjsg #define mmCP_RB_RPTR_ADDR_BASE_IDX 0 2653fb4d8502Sjsg #define mmCP_RB0_RPTR_ADDR_HI 0x1044 2654fb4d8502Sjsg #define mmCP_RB0_RPTR_ADDR_HI_BASE_IDX 0 2655fb4d8502Sjsg #define mmCP_RB_RPTR_ADDR_HI 0x1044 2656fb4d8502Sjsg #define mmCP_RB_RPTR_ADDR_HI_BASE_IDX 0 2657fb4d8502Sjsg #define mmCP_RB0_BUFSZ_MASK 0x1045 2658fb4d8502Sjsg #define mmCP_RB0_BUFSZ_MASK_BASE_IDX 0 2659fb4d8502Sjsg #define mmCP_RB_BUFSZ_MASK 0x1045 2660fb4d8502Sjsg #define mmCP_RB_BUFSZ_MASK_BASE_IDX 0 2661fb4d8502Sjsg #define mmCP_RB_WPTR_POLL_ADDR_LO 0x1046 2662fb4d8502Sjsg #define mmCP_RB_WPTR_POLL_ADDR_LO_BASE_IDX 0 2663fb4d8502Sjsg #define mmCP_RB_WPTR_POLL_ADDR_HI 0x1047 2664fb4d8502Sjsg #define mmCP_RB_WPTR_POLL_ADDR_HI_BASE_IDX 0 2665fb4d8502Sjsg #define mmGC_PRIV_MODE 0x1048 2666fb4d8502Sjsg #define mmGC_PRIV_MODE_BASE_IDX 0 2667fb4d8502Sjsg #define mmCP_INT_CNTL 0x1049 2668fb4d8502Sjsg #define mmCP_INT_CNTL_BASE_IDX 0 2669fb4d8502Sjsg #define mmCP_INT_STATUS 0x104a 2670fb4d8502Sjsg #define mmCP_INT_STATUS_BASE_IDX 0 2671fb4d8502Sjsg #define mmCP_DEVICE_ID 0x104b 2672fb4d8502Sjsg #define mmCP_DEVICE_ID_BASE_IDX 0 2673fb4d8502Sjsg #define mmCP_ME0_PIPE_PRIORITY_CNTS 0x104c 2674fb4d8502Sjsg #define mmCP_ME0_PIPE_PRIORITY_CNTS_BASE_IDX 0 2675fb4d8502Sjsg #define mmCP_RING_PRIORITY_CNTS 0x104c 2676fb4d8502Sjsg #define mmCP_RING_PRIORITY_CNTS_BASE_IDX 0 2677fb4d8502Sjsg #define mmCP_ME0_PIPE0_PRIORITY 0x104d 2678fb4d8502Sjsg #define mmCP_ME0_PIPE0_PRIORITY_BASE_IDX 0 2679fb4d8502Sjsg #define mmCP_RING0_PRIORITY 0x104d 2680fb4d8502Sjsg #define mmCP_RING0_PRIORITY_BASE_IDX 0 2681fb4d8502Sjsg #define mmCP_ME0_PIPE1_PRIORITY 0x104e 2682fb4d8502Sjsg #define mmCP_ME0_PIPE1_PRIORITY_BASE_IDX 0 2683fb4d8502Sjsg #define mmCP_RING1_PRIORITY 0x104e 2684fb4d8502Sjsg #define mmCP_RING1_PRIORITY_BASE_IDX 0 2685fb4d8502Sjsg #define mmCP_ME0_PIPE2_PRIORITY 0x104f 2686fb4d8502Sjsg #define mmCP_ME0_PIPE2_PRIORITY_BASE_IDX 0 2687fb4d8502Sjsg #define mmCP_RING2_PRIORITY 0x104f 2688fb4d8502Sjsg #define mmCP_RING2_PRIORITY_BASE_IDX 0 2689fb4d8502Sjsg #define mmCP_FATAL_ERROR 0x1050 2690fb4d8502Sjsg #define mmCP_FATAL_ERROR_BASE_IDX 0 2691fb4d8502Sjsg #define mmCP_RB_VMID 0x1051 2692fb4d8502Sjsg #define mmCP_RB_VMID_BASE_IDX 0 2693fb4d8502Sjsg #define mmCP_ME0_PIPE0_VMID 0x1052 2694fb4d8502Sjsg #define mmCP_ME0_PIPE0_VMID_BASE_IDX 0 2695fb4d8502Sjsg #define mmCP_ME0_PIPE1_VMID 0x1053 2696fb4d8502Sjsg #define mmCP_ME0_PIPE1_VMID_BASE_IDX 0 2697fb4d8502Sjsg #define mmCP_RB0_WPTR 0x1054 2698fb4d8502Sjsg #define mmCP_RB0_WPTR_BASE_IDX 0 2699fb4d8502Sjsg #define mmCP_RB_WPTR 0x1054 2700fb4d8502Sjsg #define mmCP_RB_WPTR_BASE_IDX 0 2701fb4d8502Sjsg #define mmCP_RB0_WPTR_HI 0x1055 2702fb4d8502Sjsg #define mmCP_RB0_WPTR_HI_BASE_IDX 0 2703fb4d8502Sjsg #define mmCP_RB_WPTR_HI 0x1055 2704fb4d8502Sjsg #define mmCP_RB_WPTR_HI_BASE_IDX 0 2705fb4d8502Sjsg #define mmCP_RB1_WPTR 0x1056 2706fb4d8502Sjsg #define mmCP_RB1_WPTR_BASE_IDX 0 2707fb4d8502Sjsg #define mmCP_RB1_WPTR_HI 0x1057 2708fb4d8502Sjsg #define mmCP_RB1_WPTR_HI_BASE_IDX 0 2709fb4d8502Sjsg #define mmCP_RB2_WPTR 0x1058 2710fb4d8502Sjsg #define mmCP_RB2_WPTR_BASE_IDX 0 2711fb4d8502Sjsg #define mmCP_RB_DOORBELL_CONTROL 0x1059 2712fb4d8502Sjsg #define mmCP_RB_DOORBELL_CONTROL_BASE_IDX 0 2713fb4d8502Sjsg #define mmCP_RB_DOORBELL_RANGE_LOWER 0x105a 2714fb4d8502Sjsg #define mmCP_RB_DOORBELL_RANGE_LOWER_BASE_IDX 0 2715fb4d8502Sjsg #define mmCP_RB_DOORBELL_RANGE_UPPER 0x105b 2716fb4d8502Sjsg #define mmCP_RB_DOORBELL_RANGE_UPPER_BASE_IDX 0 2717fb4d8502Sjsg #define mmCP_MEC_DOORBELL_RANGE_LOWER 0x105c 2718fb4d8502Sjsg #define mmCP_MEC_DOORBELL_RANGE_LOWER_BASE_IDX 0 2719fb4d8502Sjsg #define mmCP_MEC_DOORBELL_RANGE_UPPER 0x105d 2720fb4d8502Sjsg #define mmCP_MEC_DOORBELL_RANGE_UPPER_BASE_IDX 0 2721fb4d8502Sjsg #define mmCPG_UTCL1_ERROR 0x105e 2722fb4d8502Sjsg #define mmCPG_UTCL1_ERROR_BASE_IDX 0 2723fb4d8502Sjsg #define mmCPC_UTCL1_ERROR 0x105f 2724fb4d8502Sjsg #define mmCPC_UTCL1_ERROR_BASE_IDX 0 2725fb4d8502Sjsg #define mmCP_RB1_BASE 0x1060 2726fb4d8502Sjsg #define mmCP_RB1_BASE_BASE_IDX 0 2727fb4d8502Sjsg #define mmCP_RB1_CNTL 0x1061 2728fb4d8502Sjsg #define mmCP_RB1_CNTL_BASE_IDX 0 2729fb4d8502Sjsg #define mmCP_RB1_RPTR_ADDR 0x1062 2730fb4d8502Sjsg #define mmCP_RB1_RPTR_ADDR_BASE_IDX 0 2731fb4d8502Sjsg #define mmCP_RB1_RPTR_ADDR_HI 0x1063 2732fb4d8502Sjsg #define mmCP_RB1_RPTR_ADDR_HI_BASE_IDX 0 2733fb4d8502Sjsg #define mmCP_RB2_BASE 0x1065 2734fb4d8502Sjsg #define mmCP_RB2_BASE_BASE_IDX 0 2735fb4d8502Sjsg #define mmCP_RB2_CNTL 0x1066 2736fb4d8502Sjsg #define mmCP_RB2_CNTL_BASE_IDX 0 2737fb4d8502Sjsg #define mmCP_RB2_RPTR_ADDR 0x1067 2738fb4d8502Sjsg #define mmCP_RB2_RPTR_ADDR_BASE_IDX 0 2739fb4d8502Sjsg #define mmCP_RB2_RPTR_ADDR_HI 0x1068 2740fb4d8502Sjsg #define mmCP_RB2_RPTR_ADDR_HI_BASE_IDX 0 2741fb4d8502Sjsg #define mmCP_RB0_ACTIVE 0x1069 2742fb4d8502Sjsg #define mmCP_RB0_ACTIVE_BASE_IDX 0 2743fb4d8502Sjsg #define mmCP_RB_ACTIVE 0x1069 2744fb4d8502Sjsg #define mmCP_RB_ACTIVE_BASE_IDX 0 2745fb4d8502Sjsg #define mmCP_INT_CNTL_RING0 0x106a 2746fb4d8502Sjsg #define mmCP_INT_CNTL_RING0_BASE_IDX 0 2747fb4d8502Sjsg #define mmCP_INT_CNTL_RING1 0x106b 2748fb4d8502Sjsg #define mmCP_INT_CNTL_RING1_BASE_IDX 0 2749fb4d8502Sjsg #define mmCP_INT_CNTL_RING2 0x106c 2750fb4d8502Sjsg #define mmCP_INT_CNTL_RING2_BASE_IDX 0 2751fb4d8502Sjsg #define mmCP_INT_STATUS_RING0 0x106d 2752fb4d8502Sjsg #define mmCP_INT_STATUS_RING0_BASE_IDX 0 2753fb4d8502Sjsg #define mmCP_INT_STATUS_RING1 0x106e 2754fb4d8502Sjsg #define mmCP_INT_STATUS_RING1_BASE_IDX 0 2755fb4d8502Sjsg #define mmCP_INT_STATUS_RING2 0x106f 2756fb4d8502Sjsg #define mmCP_INT_STATUS_RING2_BASE_IDX 0 2757fb4d8502Sjsg #define mmCP_PWR_CNTL 0x1078 2758fb4d8502Sjsg #define mmCP_PWR_CNTL_BASE_IDX 0 2759fb4d8502Sjsg #define mmCP_MEM_SLP_CNTL 0x1079 2760fb4d8502Sjsg #define mmCP_MEM_SLP_CNTL_BASE_IDX 0 2761fb4d8502Sjsg #define mmCP_ECC_FIRSTOCCURRENCE 0x107a 2762fb4d8502Sjsg #define mmCP_ECC_FIRSTOCCURRENCE_BASE_IDX 0 2763fb4d8502Sjsg #define mmCP_ECC_FIRSTOCCURRENCE_RING0 0x107b 2764fb4d8502Sjsg #define mmCP_ECC_FIRSTOCCURRENCE_RING0_BASE_IDX 0 2765fb4d8502Sjsg #define mmCP_ECC_FIRSTOCCURRENCE_RING1 0x107c 2766fb4d8502Sjsg #define mmCP_ECC_FIRSTOCCURRENCE_RING1_BASE_IDX 0 2767fb4d8502Sjsg #define mmCP_ECC_FIRSTOCCURRENCE_RING2 0x107d 2768fb4d8502Sjsg #define mmCP_ECC_FIRSTOCCURRENCE_RING2_BASE_IDX 0 2769fb4d8502Sjsg #define mmGB_EDC_MODE 0x107e 2770fb4d8502Sjsg #define mmGB_EDC_MODE_BASE_IDX 0 2771fb4d8502Sjsg #define mmCP_PQ_WPTR_POLL_CNTL 0x1083 2772fb4d8502Sjsg #define mmCP_PQ_WPTR_POLL_CNTL_BASE_IDX 0 2773fb4d8502Sjsg #define mmCP_PQ_WPTR_POLL_CNTL1 0x1084 2774fb4d8502Sjsg #define mmCP_PQ_WPTR_POLL_CNTL1_BASE_IDX 0 2775fb4d8502Sjsg #define mmCP_ME1_PIPE0_INT_CNTL 0x1085 2776fb4d8502Sjsg #define mmCP_ME1_PIPE0_INT_CNTL_BASE_IDX 0 2777fb4d8502Sjsg #define mmCP_ME1_PIPE1_INT_CNTL 0x1086 2778fb4d8502Sjsg #define mmCP_ME1_PIPE1_INT_CNTL_BASE_IDX 0 2779fb4d8502Sjsg #define mmCP_ME1_PIPE2_INT_CNTL 0x1087 2780fb4d8502Sjsg #define mmCP_ME1_PIPE2_INT_CNTL_BASE_IDX 0 2781fb4d8502Sjsg #define mmCP_ME1_PIPE3_INT_CNTL 0x1088 2782fb4d8502Sjsg #define mmCP_ME1_PIPE3_INT_CNTL_BASE_IDX 0 2783fb4d8502Sjsg #define mmCP_ME2_PIPE0_INT_CNTL 0x1089 2784fb4d8502Sjsg #define mmCP_ME2_PIPE0_INT_CNTL_BASE_IDX 0 2785fb4d8502Sjsg #define mmCP_ME2_PIPE1_INT_CNTL 0x108a 2786fb4d8502Sjsg #define mmCP_ME2_PIPE1_INT_CNTL_BASE_IDX 0 2787fb4d8502Sjsg #define mmCP_ME2_PIPE2_INT_CNTL 0x108b 2788fb4d8502Sjsg #define mmCP_ME2_PIPE2_INT_CNTL_BASE_IDX 0 2789fb4d8502Sjsg #define mmCP_ME2_PIPE3_INT_CNTL 0x108c 2790fb4d8502Sjsg #define mmCP_ME2_PIPE3_INT_CNTL_BASE_IDX 0 2791fb4d8502Sjsg #define mmCP_ME1_PIPE0_INT_STATUS 0x108d 2792fb4d8502Sjsg #define mmCP_ME1_PIPE0_INT_STATUS_BASE_IDX 0 2793fb4d8502Sjsg #define mmCP_ME1_PIPE1_INT_STATUS 0x108e 2794fb4d8502Sjsg #define mmCP_ME1_PIPE1_INT_STATUS_BASE_IDX 0 2795fb4d8502Sjsg #define mmCP_ME1_PIPE2_INT_STATUS 0x108f 2796fb4d8502Sjsg #define mmCP_ME1_PIPE2_INT_STATUS_BASE_IDX 0 2797fb4d8502Sjsg #define mmCP_ME1_PIPE3_INT_STATUS 0x1090 2798fb4d8502Sjsg #define mmCP_ME1_PIPE3_INT_STATUS_BASE_IDX 0 2799fb4d8502Sjsg #define mmCP_ME2_PIPE0_INT_STATUS 0x1091 2800fb4d8502Sjsg #define mmCP_ME2_PIPE0_INT_STATUS_BASE_IDX 0 2801fb4d8502Sjsg #define mmCP_ME2_PIPE1_INT_STATUS 0x1092 2802fb4d8502Sjsg #define mmCP_ME2_PIPE1_INT_STATUS_BASE_IDX 0 2803fb4d8502Sjsg #define mmCP_ME2_PIPE2_INT_STATUS 0x1093 2804fb4d8502Sjsg #define mmCP_ME2_PIPE2_INT_STATUS_BASE_IDX 0 2805fb4d8502Sjsg #define mmCP_ME2_PIPE3_INT_STATUS 0x1094 2806fb4d8502Sjsg #define mmCP_ME2_PIPE3_INT_STATUS_BASE_IDX 0 2807fb4d8502Sjsg #define mmCC_GC_EDC_CONFIG 0x1098 2808fb4d8502Sjsg #define mmCC_GC_EDC_CONFIG_BASE_IDX 0 2809fb4d8502Sjsg #define mmCP_ME1_PIPE_PRIORITY_CNTS 0x1099 2810fb4d8502Sjsg #define mmCP_ME1_PIPE_PRIORITY_CNTS_BASE_IDX 0 2811fb4d8502Sjsg #define mmCP_ME1_PIPE0_PRIORITY 0x109a 2812fb4d8502Sjsg #define mmCP_ME1_PIPE0_PRIORITY_BASE_IDX 0 2813fb4d8502Sjsg #define mmCP_ME1_PIPE1_PRIORITY 0x109b 2814fb4d8502Sjsg #define mmCP_ME1_PIPE1_PRIORITY_BASE_IDX 0 2815fb4d8502Sjsg #define mmCP_ME1_PIPE2_PRIORITY 0x109c 2816fb4d8502Sjsg #define mmCP_ME1_PIPE2_PRIORITY_BASE_IDX 0 2817fb4d8502Sjsg #define mmCP_ME1_PIPE3_PRIORITY 0x109d 2818fb4d8502Sjsg #define mmCP_ME1_PIPE3_PRIORITY_BASE_IDX 0 2819fb4d8502Sjsg #define mmCP_ME2_PIPE_PRIORITY_CNTS 0x109e 2820fb4d8502Sjsg #define mmCP_ME2_PIPE_PRIORITY_CNTS_BASE_IDX 0 2821fb4d8502Sjsg #define mmCP_ME2_PIPE0_PRIORITY 0x109f 2822fb4d8502Sjsg #define mmCP_ME2_PIPE0_PRIORITY_BASE_IDX 0 2823fb4d8502Sjsg #define mmCP_ME2_PIPE1_PRIORITY 0x10a0 2824fb4d8502Sjsg #define mmCP_ME2_PIPE1_PRIORITY_BASE_IDX 0 2825fb4d8502Sjsg #define mmCP_ME2_PIPE2_PRIORITY 0x10a1 2826fb4d8502Sjsg #define mmCP_ME2_PIPE2_PRIORITY_BASE_IDX 0 2827fb4d8502Sjsg #define mmCP_ME2_PIPE3_PRIORITY 0x10a2 2828fb4d8502Sjsg #define mmCP_ME2_PIPE3_PRIORITY_BASE_IDX 0 2829fb4d8502Sjsg #define mmCP_CE_PRGRM_CNTR_START 0x10a3 2830fb4d8502Sjsg #define mmCP_CE_PRGRM_CNTR_START_BASE_IDX 0 2831fb4d8502Sjsg #define mmCP_PFP_PRGRM_CNTR_START 0x10a4 2832fb4d8502Sjsg #define mmCP_PFP_PRGRM_CNTR_START_BASE_IDX 0 2833fb4d8502Sjsg #define mmCP_ME_PRGRM_CNTR_START 0x10a5 2834fb4d8502Sjsg #define mmCP_ME_PRGRM_CNTR_START_BASE_IDX 0 2835fb4d8502Sjsg #define mmCP_MEC1_PRGRM_CNTR_START 0x10a6 2836fb4d8502Sjsg #define mmCP_MEC1_PRGRM_CNTR_START_BASE_IDX 0 2837fb4d8502Sjsg #define mmCP_MEC2_PRGRM_CNTR_START 0x10a7 2838fb4d8502Sjsg #define mmCP_MEC2_PRGRM_CNTR_START_BASE_IDX 0 2839fb4d8502Sjsg #define mmCP_CE_INTR_ROUTINE_START 0x10a8 2840fb4d8502Sjsg #define mmCP_CE_INTR_ROUTINE_START_BASE_IDX 0 2841fb4d8502Sjsg #define mmCP_PFP_INTR_ROUTINE_START 0x10a9 2842fb4d8502Sjsg #define mmCP_PFP_INTR_ROUTINE_START_BASE_IDX 0 2843fb4d8502Sjsg #define mmCP_ME_INTR_ROUTINE_START 0x10aa 2844fb4d8502Sjsg #define mmCP_ME_INTR_ROUTINE_START_BASE_IDX 0 2845fb4d8502Sjsg #define mmCP_MEC1_INTR_ROUTINE_START 0x10ab 2846fb4d8502Sjsg #define mmCP_MEC1_INTR_ROUTINE_START_BASE_IDX 0 2847fb4d8502Sjsg #define mmCP_MEC2_INTR_ROUTINE_START 0x10ac 2848fb4d8502Sjsg #define mmCP_MEC2_INTR_ROUTINE_START_BASE_IDX 0 2849fb4d8502Sjsg #define mmCP_CONTEXT_CNTL 0x10ad 2850fb4d8502Sjsg #define mmCP_CONTEXT_CNTL_BASE_IDX 0 2851fb4d8502Sjsg #define mmCP_MAX_CONTEXT 0x10ae 2852fb4d8502Sjsg #define mmCP_MAX_CONTEXT_BASE_IDX 0 2853fb4d8502Sjsg #define mmCP_IQ_WAIT_TIME1 0x10af 2854fb4d8502Sjsg #define mmCP_IQ_WAIT_TIME1_BASE_IDX 0 2855fb4d8502Sjsg #define mmCP_IQ_WAIT_TIME2 0x10b0 2856fb4d8502Sjsg #define mmCP_IQ_WAIT_TIME2_BASE_IDX 0 2857fb4d8502Sjsg #define mmCP_RB0_BASE_HI 0x10b1 2858fb4d8502Sjsg #define mmCP_RB0_BASE_HI_BASE_IDX 0 2859fb4d8502Sjsg #define mmCP_RB1_BASE_HI 0x10b2 2860fb4d8502Sjsg #define mmCP_RB1_BASE_HI_BASE_IDX 0 2861fb4d8502Sjsg #define mmCP_VMID_RESET 0x10b3 2862fb4d8502Sjsg #define mmCP_VMID_RESET_BASE_IDX 0 2863fb4d8502Sjsg #define mmCPC_INT_CNTL 0x10b4 2864fb4d8502Sjsg #define mmCPC_INT_CNTL_BASE_IDX 0 2865fb4d8502Sjsg #define mmCPC_INT_STATUS 0x10b5 2866fb4d8502Sjsg #define mmCPC_INT_STATUS_BASE_IDX 0 2867fb4d8502Sjsg #define mmCP_VMID_PREEMPT 0x10b6 2868fb4d8502Sjsg #define mmCP_VMID_PREEMPT_BASE_IDX 0 2869fb4d8502Sjsg #define mmCPC_INT_CNTX_ID 0x10b7 2870fb4d8502Sjsg #define mmCPC_INT_CNTX_ID_BASE_IDX 0 2871fb4d8502Sjsg #define mmCP_PQ_STATUS 0x10b8 2872fb4d8502Sjsg #define mmCP_PQ_STATUS_BASE_IDX 0 2873fb4d8502Sjsg #define mmCP_CPC_IC_BASE_LO 0x10b9 2874fb4d8502Sjsg #define mmCP_CPC_IC_BASE_LO_BASE_IDX 0 2875fb4d8502Sjsg #define mmCP_CPC_IC_BASE_HI 0x10ba 2876fb4d8502Sjsg #define mmCP_CPC_IC_BASE_HI_BASE_IDX 0 2877fb4d8502Sjsg #define mmCP_CPC_IC_BASE_CNTL 0x10bb 2878fb4d8502Sjsg #define mmCP_CPC_IC_BASE_CNTL_BASE_IDX 0 2879fb4d8502Sjsg #define mmCP_CPC_IC_OP_CNTL 0x10bc 2880fb4d8502Sjsg #define mmCP_CPC_IC_OP_CNTL_BASE_IDX 0 2881fb4d8502Sjsg #define mmCP_MEC1_F32_INT_DIS 0x10bd 2882fb4d8502Sjsg #define mmCP_MEC1_F32_INT_DIS_BASE_IDX 0 2883fb4d8502Sjsg #define mmCP_MEC2_F32_INT_DIS 0x10be 2884fb4d8502Sjsg #define mmCP_MEC2_F32_INT_DIS_BASE_IDX 0 2885fb4d8502Sjsg #define mmCP_VMID_STATUS 0x10bf 2886fb4d8502Sjsg #define mmCP_VMID_STATUS_BASE_IDX 0 2887fb4d8502Sjsg 2888fb4d8502Sjsg 2889fb4d8502Sjsg // addressBlock: gc_cppdec2 2890fb4d8502Sjsg // base address: 0xc600 2891fb4d8502Sjsg #define mmCP_RB_DOORBELL_CONTROL_SCH_0 0x1180 2892fb4d8502Sjsg #define mmCP_RB_DOORBELL_CONTROL_SCH_0_BASE_IDX 0 2893fb4d8502Sjsg #define mmCP_RB_DOORBELL_CONTROL_SCH_1 0x1181 2894fb4d8502Sjsg #define mmCP_RB_DOORBELL_CONTROL_SCH_1_BASE_IDX 0 2895fb4d8502Sjsg #define mmCP_RB_DOORBELL_CONTROL_SCH_2 0x1182 2896fb4d8502Sjsg #define mmCP_RB_DOORBELL_CONTROL_SCH_2_BASE_IDX 0 2897fb4d8502Sjsg #define mmCP_RB_DOORBELL_CONTROL_SCH_3 0x1183 2898fb4d8502Sjsg #define mmCP_RB_DOORBELL_CONTROL_SCH_3_BASE_IDX 0 2899fb4d8502Sjsg #define mmCP_RB_DOORBELL_CONTROL_SCH_4 0x1184 2900fb4d8502Sjsg #define mmCP_RB_DOORBELL_CONTROL_SCH_4_BASE_IDX 0 2901fb4d8502Sjsg #define mmCP_RB_DOORBELL_CONTROL_SCH_5 0x1185 2902fb4d8502Sjsg #define mmCP_RB_DOORBELL_CONTROL_SCH_5_BASE_IDX 0 2903fb4d8502Sjsg #define mmCP_RB_DOORBELL_CONTROL_SCH_6 0x1186 2904fb4d8502Sjsg #define mmCP_RB_DOORBELL_CONTROL_SCH_6_BASE_IDX 0 2905fb4d8502Sjsg #define mmCP_RB_DOORBELL_CONTROL_SCH_7 0x1187 2906fb4d8502Sjsg #define mmCP_RB_DOORBELL_CONTROL_SCH_7_BASE_IDX 0 2907fb4d8502Sjsg #define mmCP_RB_DOORBELL_CLEAR 0x1188 2908fb4d8502Sjsg #define mmCP_RB_DOORBELL_CLEAR_BASE_IDX 0 2909fb4d8502Sjsg #define mmCP_GFX_MQD_CONTROL 0x11a0 2910fb4d8502Sjsg #define mmCP_GFX_MQD_CONTROL_BASE_IDX 0 2911fb4d8502Sjsg #define mmCP_GFX_MQD_BASE_ADDR 0x11a1 2912fb4d8502Sjsg #define mmCP_GFX_MQD_BASE_ADDR_BASE_IDX 0 2913fb4d8502Sjsg #define mmCP_GFX_MQD_BASE_ADDR_HI 0x11a2 2914fb4d8502Sjsg #define mmCP_GFX_MQD_BASE_ADDR_HI_BASE_IDX 0 2915fb4d8502Sjsg #define mmCP_RB_STATUS 0x11a3 2916fb4d8502Sjsg #define mmCP_RB_STATUS_BASE_IDX 0 2917fb4d8502Sjsg #define mmCPG_UTCL1_STATUS 0x11b4 2918fb4d8502Sjsg #define mmCPG_UTCL1_STATUS_BASE_IDX 0 2919fb4d8502Sjsg #define mmCPC_UTCL1_STATUS 0x11b5 2920fb4d8502Sjsg #define mmCPC_UTCL1_STATUS_BASE_IDX 0 2921fb4d8502Sjsg #define mmCPF_UTCL1_STATUS 0x11b6 2922fb4d8502Sjsg #define mmCPF_UTCL1_STATUS_BASE_IDX 0 2923fb4d8502Sjsg #define mmCP_SD_CNTL 0x11b7 2924fb4d8502Sjsg #define mmCP_SD_CNTL_BASE_IDX 0 2925fb4d8502Sjsg #define mmCP_SOFT_RESET_CNTL 0x11b9 2926fb4d8502Sjsg #define mmCP_SOFT_RESET_CNTL_BASE_IDX 0 2927fb4d8502Sjsg #define mmCP_CPC_GFX_CNTL 0x11ba 2928fb4d8502Sjsg #define mmCP_CPC_GFX_CNTL_BASE_IDX 0 2929fb4d8502Sjsg 2930fb4d8502Sjsg 2931fb4d8502Sjsg // addressBlock: gc_spipdec 2932fb4d8502Sjsg // base address: 0xc700 2933fb4d8502Sjsg #define mmSPI_ARB_PRIORITY 0x11c0 2934fb4d8502Sjsg #define mmSPI_ARB_PRIORITY_BASE_IDX 0 2935fb4d8502Sjsg #define mmSPI_ARB_CYCLES_0 0x11c1 2936fb4d8502Sjsg #define mmSPI_ARB_CYCLES_0_BASE_IDX 0 2937fb4d8502Sjsg #define mmSPI_ARB_CYCLES_1 0x11c2 2938fb4d8502Sjsg #define mmSPI_ARB_CYCLES_1_BASE_IDX 0 2939fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_GFX 0x11c7 2940fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_GFX_BASE_IDX 0 2941fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_HP3D 0x11c8 2942fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_HP3D_BASE_IDX 0 2943fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS0 0x11c9 2944fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS0_BASE_IDX 0 2945fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS1 0x11ca 2946fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS1_BASE_IDX 0 2947fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS2 0x11cb 2948fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS2_BASE_IDX 0 2949fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS3 0x11cc 2950fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS3_BASE_IDX 0 2951fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS4 0x11cd 2952fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS4_BASE_IDX 0 2953fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS5 0x11ce 2954fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS5_BASE_IDX 0 2955fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS6 0x11cf 2956fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS6_BASE_IDX 0 2957fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS7 0x11d0 2958fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS7_BASE_IDX 0 2959fb4d8502Sjsg #define mmSPI_COMPUTE_QUEUE_RESET 0x11db 2960fb4d8502Sjsg #define mmSPI_COMPUTE_QUEUE_RESET_BASE_IDX 0 2961fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_0 0x11dc 2962fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_0_BASE_IDX 0 2963fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_1 0x11dd 2964fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_1_BASE_IDX 0 2965fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_2 0x11de 2966fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_2_BASE_IDX 0 2967fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_3 0x11df 2968fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_3_BASE_IDX 0 2969fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_4 0x11e0 2970fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_4_BASE_IDX 0 2971fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_5 0x11e1 2972fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_5_BASE_IDX 0 2973fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_6 0x11e2 2974fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_6_BASE_IDX 0 2975fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_7 0x11e3 2976fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_7_BASE_IDX 0 2977fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_8 0x11e4 2978fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_8_BASE_IDX 0 2979fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_9 0x11e5 2980fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_9_BASE_IDX 0 2981fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_0 0x11e6 2982fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_0_BASE_IDX 0 2983fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_1 0x11e7 2984fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_1_BASE_IDX 0 2985fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_2 0x11e8 2986fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_2_BASE_IDX 0 2987fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_3 0x11e9 2988fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_3_BASE_IDX 0 2989fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_4 0x11ea 2990fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_4_BASE_IDX 0 2991fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_5 0x11eb 2992fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_5_BASE_IDX 0 2993fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_6 0x11ec 2994fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_6_BASE_IDX 0 2995fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_7 0x11ed 2996fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_7_BASE_IDX 0 2997fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_8 0x11ee 2998fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_8_BASE_IDX 0 2999fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_9 0x11ef 3000fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_9_BASE_IDX 0 3001fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_10 0x11f0 3002fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_10_BASE_IDX 0 3003fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_11 0x11f1 3004fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_11_BASE_IDX 0 3005fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_10 0x11f2 3006fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_10_BASE_IDX 0 3007fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_11 0x11f3 3008fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_11_BASE_IDX 0 3009fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_12 0x11f4 3010fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_12_BASE_IDX 0 3011fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_13 0x11f5 3012fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_13_BASE_IDX 0 3013fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_14 0x11f6 3014fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_14_BASE_IDX 0 3015fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_15 0x11f7 3016fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_15_BASE_IDX 0 3017fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_12 0x11f8 3018fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_12_BASE_IDX 0 3019fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_13 0x11f9 3020fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_13_BASE_IDX 0 3021fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_14 0x11fa 3022fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_14_BASE_IDX 0 3023fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_15 0x11fb 3024fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_15_BASE_IDX 0 3025fb4d8502Sjsg #define mmSPI_COMPUTE_WF_CTX_SAVE 0x11fc 3026fb4d8502Sjsg #define mmSPI_COMPUTE_WF_CTX_SAVE_BASE_IDX 0 3027fb4d8502Sjsg #define mmSPI_ARB_CNTL_0 0x11fd 3028fb4d8502Sjsg #define mmSPI_ARB_CNTL_0_BASE_IDX 0 3029fb4d8502Sjsg 3030fb4d8502Sjsg 3031fb4d8502Sjsg // addressBlock: gc_cpphqddec 3032fb4d8502Sjsg // base address: 0xc800 3033fb4d8502Sjsg #define mmCP_HQD_GFX_CONTROL 0x123e 3034fb4d8502Sjsg #define mmCP_HQD_GFX_CONTROL_BASE_IDX 0 3035fb4d8502Sjsg #define mmCP_HQD_GFX_STATUS 0x123f 3036fb4d8502Sjsg #define mmCP_HQD_GFX_STATUS_BASE_IDX 0 3037fb4d8502Sjsg #define mmCP_HPD_ROQ_OFFSETS 0x1240 3038fb4d8502Sjsg #define mmCP_HPD_ROQ_OFFSETS_BASE_IDX 0 3039fb4d8502Sjsg #define mmCP_HPD_STATUS0 0x1241 3040fb4d8502Sjsg #define mmCP_HPD_STATUS0_BASE_IDX 0 3041fb4d8502Sjsg #define mmCP_HPD_UTCL1_CNTL 0x1242 3042fb4d8502Sjsg #define mmCP_HPD_UTCL1_CNTL_BASE_IDX 0 3043fb4d8502Sjsg #define mmCP_HPD_UTCL1_ERROR 0x1243 3044fb4d8502Sjsg #define mmCP_HPD_UTCL1_ERROR_BASE_IDX 0 3045fb4d8502Sjsg #define mmCP_HPD_UTCL1_ERROR_ADDR 0x1244 3046fb4d8502Sjsg #define mmCP_HPD_UTCL1_ERROR_ADDR_BASE_IDX 0 3047fb4d8502Sjsg #define mmCP_MQD_BASE_ADDR 0x1245 3048fb4d8502Sjsg #define mmCP_MQD_BASE_ADDR_BASE_IDX 0 3049fb4d8502Sjsg #define mmCP_MQD_BASE_ADDR_HI 0x1246 3050fb4d8502Sjsg #define mmCP_MQD_BASE_ADDR_HI_BASE_IDX 0 3051fb4d8502Sjsg #define mmCP_HQD_ACTIVE 0x1247 3052fb4d8502Sjsg #define mmCP_HQD_ACTIVE_BASE_IDX 0 3053fb4d8502Sjsg #define mmCP_HQD_VMID 0x1248 3054fb4d8502Sjsg #define mmCP_HQD_VMID_BASE_IDX 0 3055fb4d8502Sjsg #define mmCP_HQD_PERSISTENT_STATE 0x1249 3056fb4d8502Sjsg #define mmCP_HQD_PERSISTENT_STATE_BASE_IDX 0 3057fb4d8502Sjsg #define mmCP_HQD_PIPE_PRIORITY 0x124a 3058fb4d8502Sjsg #define mmCP_HQD_PIPE_PRIORITY_BASE_IDX 0 3059fb4d8502Sjsg #define mmCP_HQD_QUEUE_PRIORITY 0x124b 3060fb4d8502Sjsg #define mmCP_HQD_QUEUE_PRIORITY_BASE_IDX 0 3061fb4d8502Sjsg #define mmCP_HQD_QUANTUM 0x124c 3062fb4d8502Sjsg #define mmCP_HQD_QUANTUM_BASE_IDX 0 3063fb4d8502Sjsg #define mmCP_HQD_PQ_BASE 0x124d 3064fb4d8502Sjsg #define mmCP_HQD_PQ_BASE_BASE_IDX 0 3065fb4d8502Sjsg #define mmCP_HQD_PQ_BASE_HI 0x124e 3066fb4d8502Sjsg #define mmCP_HQD_PQ_BASE_HI_BASE_IDX 0 3067fb4d8502Sjsg #define mmCP_HQD_PQ_RPTR 0x124f 3068fb4d8502Sjsg #define mmCP_HQD_PQ_RPTR_BASE_IDX 0 3069fb4d8502Sjsg #define mmCP_HQD_PQ_RPTR_REPORT_ADDR 0x1250 3070fb4d8502Sjsg #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_BASE_IDX 0 3071fb4d8502Sjsg #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI 0x1251 3072fb4d8502Sjsg #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI_BASE_IDX 0 3073fb4d8502Sjsg #define mmCP_HQD_PQ_WPTR_POLL_ADDR 0x1252 3074fb4d8502Sjsg #define mmCP_HQD_PQ_WPTR_POLL_ADDR_BASE_IDX 0 3075fb4d8502Sjsg #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x1253 3076fb4d8502Sjsg #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI_BASE_IDX 0 3077fb4d8502Sjsg #define mmCP_HQD_PQ_DOORBELL_CONTROL 0x1254 3078fb4d8502Sjsg #define mmCP_HQD_PQ_DOORBELL_CONTROL_BASE_IDX 0 3079fb4d8502Sjsg #define mmCP_HQD_PQ_CONTROL 0x1256 3080fb4d8502Sjsg #define mmCP_HQD_PQ_CONTROL_BASE_IDX 0 3081fb4d8502Sjsg #define mmCP_HQD_IB_BASE_ADDR 0x1257 3082fb4d8502Sjsg #define mmCP_HQD_IB_BASE_ADDR_BASE_IDX 0 3083fb4d8502Sjsg #define mmCP_HQD_IB_BASE_ADDR_HI 0x1258 3084fb4d8502Sjsg #define mmCP_HQD_IB_BASE_ADDR_HI_BASE_IDX 0 3085fb4d8502Sjsg #define mmCP_HQD_IB_RPTR 0x1259 3086fb4d8502Sjsg #define mmCP_HQD_IB_RPTR_BASE_IDX 0 3087fb4d8502Sjsg #define mmCP_HQD_IB_CONTROL 0x125a 3088fb4d8502Sjsg #define mmCP_HQD_IB_CONTROL_BASE_IDX 0 3089fb4d8502Sjsg #define mmCP_HQD_IQ_TIMER 0x125b 3090fb4d8502Sjsg #define mmCP_HQD_IQ_TIMER_BASE_IDX 0 3091fb4d8502Sjsg #define mmCP_HQD_IQ_RPTR 0x125c 3092fb4d8502Sjsg #define mmCP_HQD_IQ_RPTR_BASE_IDX 0 3093fb4d8502Sjsg #define mmCP_HQD_DEQUEUE_REQUEST 0x125d 3094fb4d8502Sjsg #define mmCP_HQD_DEQUEUE_REQUEST_BASE_IDX 0 3095fb4d8502Sjsg #define mmCP_HQD_DMA_OFFLOAD 0x125e 3096fb4d8502Sjsg #define mmCP_HQD_DMA_OFFLOAD_BASE_IDX 0 3097fb4d8502Sjsg #define mmCP_HQD_OFFLOAD 0x125e 3098fb4d8502Sjsg #define mmCP_HQD_OFFLOAD_BASE_IDX 0 3099fb4d8502Sjsg #define mmCP_HQD_SEMA_CMD 0x125f 3100fb4d8502Sjsg #define mmCP_HQD_SEMA_CMD_BASE_IDX 0 3101fb4d8502Sjsg #define mmCP_HQD_MSG_TYPE 0x1260 3102fb4d8502Sjsg #define mmCP_HQD_MSG_TYPE_BASE_IDX 0 3103fb4d8502Sjsg #define mmCP_HQD_ATOMIC0_PREOP_LO 0x1261 3104fb4d8502Sjsg #define mmCP_HQD_ATOMIC0_PREOP_LO_BASE_IDX 0 3105fb4d8502Sjsg #define mmCP_HQD_ATOMIC0_PREOP_HI 0x1262 3106fb4d8502Sjsg #define mmCP_HQD_ATOMIC0_PREOP_HI_BASE_IDX 0 3107fb4d8502Sjsg #define mmCP_HQD_ATOMIC1_PREOP_LO 0x1263 3108fb4d8502Sjsg #define mmCP_HQD_ATOMIC1_PREOP_LO_BASE_IDX 0 3109fb4d8502Sjsg #define mmCP_HQD_ATOMIC1_PREOP_HI 0x1264 3110fb4d8502Sjsg #define mmCP_HQD_ATOMIC1_PREOP_HI_BASE_IDX 0 3111fb4d8502Sjsg #define mmCP_HQD_HQ_SCHEDULER0 0x1265 3112fb4d8502Sjsg #define mmCP_HQD_HQ_SCHEDULER0_BASE_IDX 0 3113fb4d8502Sjsg #define mmCP_HQD_HQ_STATUS0 0x1265 3114fb4d8502Sjsg #define mmCP_HQD_HQ_STATUS0_BASE_IDX 0 3115fb4d8502Sjsg #define mmCP_HQD_HQ_CONTROL0 0x1266 3116fb4d8502Sjsg #define mmCP_HQD_HQ_CONTROL0_BASE_IDX 0 3117fb4d8502Sjsg #define mmCP_HQD_HQ_SCHEDULER1 0x1266 3118fb4d8502Sjsg #define mmCP_HQD_HQ_SCHEDULER1_BASE_IDX 0 3119fb4d8502Sjsg #define mmCP_MQD_CONTROL 0x1267 3120fb4d8502Sjsg #define mmCP_MQD_CONTROL_BASE_IDX 0 3121fb4d8502Sjsg #define mmCP_HQD_HQ_STATUS1 0x1268 3122fb4d8502Sjsg #define mmCP_HQD_HQ_STATUS1_BASE_IDX 0 3123fb4d8502Sjsg #define mmCP_HQD_HQ_CONTROL1 0x1269 3124fb4d8502Sjsg #define mmCP_HQD_HQ_CONTROL1_BASE_IDX 0 3125fb4d8502Sjsg #define mmCP_HQD_EOP_BASE_ADDR 0x126a 3126fb4d8502Sjsg #define mmCP_HQD_EOP_BASE_ADDR_BASE_IDX 0 3127fb4d8502Sjsg #define mmCP_HQD_EOP_BASE_ADDR_HI 0x126b 3128fb4d8502Sjsg #define mmCP_HQD_EOP_BASE_ADDR_HI_BASE_IDX 0 3129fb4d8502Sjsg #define mmCP_HQD_EOP_CONTROL 0x126c 3130fb4d8502Sjsg #define mmCP_HQD_EOP_CONTROL_BASE_IDX 0 3131fb4d8502Sjsg #define mmCP_HQD_EOP_RPTR 0x126d 3132fb4d8502Sjsg #define mmCP_HQD_EOP_RPTR_BASE_IDX 0 3133fb4d8502Sjsg #define mmCP_HQD_EOP_WPTR 0x126e 3134fb4d8502Sjsg #define mmCP_HQD_EOP_WPTR_BASE_IDX 0 3135fb4d8502Sjsg #define mmCP_HQD_EOP_EVENTS 0x126f 3136fb4d8502Sjsg #define mmCP_HQD_EOP_EVENTS_BASE_IDX 0 3137fb4d8502Sjsg #define mmCP_HQD_CTX_SAVE_BASE_ADDR_LO 0x1270 3138fb4d8502Sjsg #define mmCP_HQD_CTX_SAVE_BASE_ADDR_LO_BASE_IDX 0 3139fb4d8502Sjsg #define mmCP_HQD_CTX_SAVE_BASE_ADDR_HI 0x1271 3140fb4d8502Sjsg #define mmCP_HQD_CTX_SAVE_BASE_ADDR_HI_BASE_IDX 0 3141fb4d8502Sjsg #define mmCP_HQD_CTX_SAVE_CONTROL 0x1272 3142fb4d8502Sjsg #define mmCP_HQD_CTX_SAVE_CONTROL_BASE_IDX 0 3143fb4d8502Sjsg #define mmCP_HQD_CNTL_STACK_OFFSET 0x1273 3144fb4d8502Sjsg #define mmCP_HQD_CNTL_STACK_OFFSET_BASE_IDX 0 3145fb4d8502Sjsg #define mmCP_HQD_CNTL_STACK_SIZE 0x1274 3146fb4d8502Sjsg #define mmCP_HQD_CNTL_STACK_SIZE_BASE_IDX 0 3147fb4d8502Sjsg #define mmCP_HQD_WG_STATE_OFFSET 0x1275 3148fb4d8502Sjsg #define mmCP_HQD_WG_STATE_OFFSET_BASE_IDX 0 3149fb4d8502Sjsg #define mmCP_HQD_CTX_SAVE_SIZE 0x1276 3150fb4d8502Sjsg #define mmCP_HQD_CTX_SAVE_SIZE_BASE_IDX 0 3151fb4d8502Sjsg #define mmCP_HQD_GDS_RESOURCE_STATE 0x1277 3152fb4d8502Sjsg #define mmCP_HQD_GDS_RESOURCE_STATE_BASE_IDX 0 3153fb4d8502Sjsg #define mmCP_HQD_ERROR 0x1278 3154fb4d8502Sjsg #define mmCP_HQD_ERROR_BASE_IDX 0 3155fb4d8502Sjsg #define mmCP_HQD_EOP_WPTR_MEM 0x1279 3156fb4d8502Sjsg #define mmCP_HQD_EOP_WPTR_MEM_BASE_IDX 0 3157fb4d8502Sjsg #define mmCP_HQD_AQL_CONTROL 0x127a 3158fb4d8502Sjsg #define mmCP_HQD_AQL_CONTROL_BASE_IDX 0 3159fb4d8502Sjsg #define mmCP_HQD_PQ_WPTR_LO 0x127b 3160fb4d8502Sjsg #define mmCP_HQD_PQ_WPTR_LO_BASE_IDX 0 3161fb4d8502Sjsg #define mmCP_HQD_PQ_WPTR_HI 0x127c 3162fb4d8502Sjsg #define mmCP_HQD_PQ_WPTR_HI_BASE_IDX 0 3163fb4d8502Sjsg 3164fb4d8502Sjsg 3165fb4d8502Sjsg // addressBlock: gc_didtdec 3166fb4d8502Sjsg // base address: 0xca00 3167fb4d8502Sjsg #define mmDIDT_IND_INDEX 0x1280 3168fb4d8502Sjsg #define mmDIDT_IND_INDEX_BASE_IDX 0 3169fb4d8502Sjsg #define mmDIDT_IND_DATA 0x1281 3170fb4d8502Sjsg #define mmDIDT_IND_DATA_BASE_IDX 0 3171fb4d8502Sjsg 3172fb4d8502Sjsg 3173fb4d8502Sjsg // addressBlock: gc_gccacdec 3174fb4d8502Sjsg // base address: 0xca10 3175fb4d8502Sjsg #define mmGC_CAC_CTRL_1 0x1284 3176fb4d8502Sjsg #define mmGC_CAC_CTRL_1_BASE_IDX 0 3177fb4d8502Sjsg #define mmGC_CAC_CTRL_2 0x1285 3178fb4d8502Sjsg #define mmGC_CAC_CTRL_2_BASE_IDX 0 3179fb4d8502Sjsg #define mmGC_CAC_CGTT_CLK_CTRL 0x1286 3180fb4d8502Sjsg #define mmGC_CAC_CGTT_CLK_CTRL_BASE_IDX 0 3181fb4d8502Sjsg #define mmGC_CAC_AGGR_LOWER 0x1287 3182fb4d8502Sjsg #define mmGC_CAC_AGGR_LOWER_BASE_IDX 0 3183fb4d8502Sjsg #define mmGC_CAC_AGGR_UPPER 0x1288 3184fb4d8502Sjsg #define mmGC_CAC_AGGR_UPPER_BASE_IDX 0 3185fb4d8502Sjsg #define mmGC_CAC_PG_AGGR_LOWER 0x128b 3186fb4d8502Sjsg #define mmGC_CAC_PG_AGGR_LOWER_BASE_IDX 0 3187fb4d8502Sjsg #define mmGC_CAC_PG_AGGR_UPPER 0x128c 3188fb4d8502Sjsg #define mmGC_CAC_PG_AGGR_UPPER_BASE_IDX 0 3189fb4d8502Sjsg #define mmGC_CAC_SOFT_CTRL 0x128d 3190fb4d8502Sjsg #define mmGC_CAC_SOFT_CTRL_BASE_IDX 0 3191fb4d8502Sjsg #define mmGC_DIDT_CTRL0 0x128e 3192fb4d8502Sjsg #define mmGC_DIDT_CTRL0_BASE_IDX 0 3193fb4d8502Sjsg #define mmGC_DIDT_CTRL1 0x128f 3194fb4d8502Sjsg #define mmGC_DIDT_CTRL1_BASE_IDX 0 3195fb4d8502Sjsg #define mmGC_DIDT_CTRL2 0x1290 3196fb4d8502Sjsg #define mmGC_DIDT_CTRL2_BASE_IDX 0 3197fb4d8502Sjsg #define mmGC_DIDT_WEIGHT 0x1291 3198fb4d8502Sjsg #define mmGC_DIDT_WEIGHT_BASE_IDX 0 3199fb4d8502Sjsg #define mmGC_EDC_CTRL 0x1293 3200fb4d8502Sjsg #define mmGC_EDC_CTRL_BASE_IDX 0 3201fb4d8502Sjsg #define mmGC_EDC_THRESHOLD 0x1294 3202fb4d8502Sjsg #define mmGC_EDC_THRESHOLD_BASE_IDX 0 3203fb4d8502Sjsg #define mmGC_EDC_STATUS 0x1295 3204fb4d8502Sjsg #define mmGC_EDC_STATUS_BASE_IDX 0 3205fb4d8502Sjsg #define mmGC_EDC_OVERFLOW 0x1296 3206fb4d8502Sjsg #define mmGC_EDC_OVERFLOW_BASE_IDX 0 3207fb4d8502Sjsg #define mmGC_EDC_ROLLING_POWER_DELTA 0x1297 3208fb4d8502Sjsg #define mmGC_EDC_ROLLING_POWER_DELTA_BASE_IDX 0 3209fb4d8502Sjsg #define mmGC_DIDT_DROOP_CTRL 0x1298 3210fb4d8502Sjsg #define mmGC_DIDT_DROOP_CTRL_BASE_IDX 0 3211fb4d8502Sjsg #define mmGC_EDC_DROOP_CTRL 0x1299 3212fb4d8502Sjsg #define mmGC_EDC_DROOP_CTRL_BASE_IDX 0 3213fb4d8502Sjsg #define mmGC_CAC_IND_INDEX 0x129a 3214fb4d8502Sjsg #define mmGC_CAC_IND_INDEX_BASE_IDX 0 3215fb4d8502Sjsg #define mmGC_CAC_IND_DATA 0x129b 3216fb4d8502Sjsg #define mmGC_CAC_IND_DATA_BASE_IDX 0 3217fb4d8502Sjsg #define mmSE_CAC_CGTT_CLK_CTRL 0x129c 3218fb4d8502Sjsg #define mmSE_CAC_CGTT_CLK_CTRL_BASE_IDX 0 3219fb4d8502Sjsg #define mmSE_CAC_IND_INDEX 0x129d 3220fb4d8502Sjsg #define mmSE_CAC_IND_INDEX_BASE_IDX 0 3221fb4d8502Sjsg #define mmSE_CAC_IND_DATA 0x129e 3222fb4d8502Sjsg #define mmSE_CAC_IND_DATA_BASE_IDX 0 3223fb4d8502Sjsg 3224fb4d8502Sjsg 3225fb4d8502Sjsg // addressBlock: gc_tcpdec 3226fb4d8502Sjsg // base address: 0xca80 3227fb4d8502Sjsg #define mmTCP_WATCH0_ADDR_H 0x12a0 3228fb4d8502Sjsg #define mmTCP_WATCH0_ADDR_H_BASE_IDX 0 3229fb4d8502Sjsg #define mmTCP_WATCH0_ADDR_L 0x12a1 3230fb4d8502Sjsg #define mmTCP_WATCH0_ADDR_L_BASE_IDX 0 3231fb4d8502Sjsg #define mmTCP_WATCH0_CNTL 0x12a2 3232fb4d8502Sjsg #define mmTCP_WATCH0_CNTL_BASE_IDX 0 3233fb4d8502Sjsg #define mmTCP_WATCH1_ADDR_H 0x12a3 3234fb4d8502Sjsg #define mmTCP_WATCH1_ADDR_H_BASE_IDX 0 3235fb4d8502Sjsg #define mmTCP_WATCH1_ADDR_L 0x12a4 3236fb4d8502Sjsg #define mmTCP_WATCH1_ADDR_L_BASE_IDX 0 3237fb4d8502Sjsg #define mmTCP_WATCH1_CNTL 0x12a5 3238fb4d8502Sjsg #define mmTCP_WATCH1_CNTL_BASE_IDX 0 3239fb4d8502Sjsg #define mmTCP_WATCH2_ADDR_H 0x12a6 3240fb4d8502Sjsg #define mmTCP_WATCH2_ADDR_H_BASE_IDX 0 3241fb4d8502Sjsg #define mmTCP_WATCH2_ADDR_L 0x12a7 3242fb4d8502Sjsg #define mmTCP_WATCH2_ADDR_L_BASE_IDX 0 3243fb4d8502Sjsg #define mmTCP_WATCH2_CNTL 0x12a8 3244fb4d8502Sjsg #define mmTCP_WATCH2_CNTL_BASE_IDX 0 3245fb4d8502Sjsg #define mmTCP_WATCH3_ADDR_H 0x12a9 3246fb4d8502Sjsg #define mmTCP_WATCH3_ADDR_H_BASE_IDX 0 3247fb4d8502Sjsg #define mmTCP_WATCH3_ADDR_L 0x12aa 3248fb4d8502Sjsg #define mmTCP_WATCH3_ADDR_L_BASE_IDX 0 3249fb4d8502Sjsg #define mmTCP_WATCH3_CNTL 0x12ab 3250fb4d8502Sjsg #define mmTCP_WATCH3_CNTL_BASE_IDX 0 3251fb4d8502Sjsg #define mmTCP_GATCL1_CNTL 0x12b0 3252fb4d8502Sjsg #define mmTCP_GATCL1_CNTL_BASE_IDX 0 3253fb4d8502Sjsg #define mmTCP_ATC_EDC_GATCL1_CNT 0x12b1 3254fb4d8502Sjsg #define mmTCP_ATC_EDC_GATCL1_CNT_BASE_IDX 0 3255fb4d8502Sjsg #define mmTCP_GATCL1_DSM_CNTL 0x12b2 3256fb4d8502Sjsg #define mmTCP_GATCL1_DSM_CNTL_BASE_IDX 0 3257fb4d8502Sjsg #define mmTCP_CNTL2 0x12b4 3258fb4d8502Sjsg #define mmTCP_CNTL2_BASE_IDX 0 3259fb4d8502Sjsg #define mmTCP_UTCL1_CNTL1 0x12b5 3260fb4d8502Sjsg #define mmTCP_UTCL1_CNTL1_BASE_IDX 0 3261fb4d8502Sjsg #define mmTCP_UTCL1_CNTL2 0x12b6 3262fb4d8502Sjsg #define mmTCP_UTCL1_CNTL2_BASE_IDX 0 3263fb4d8502Sjsg #define mmTCP_UTCL1_STATUS 0x12b7 3264fb4d8502Sjsg #define mmTCP_UTCL1_STATUS_BASE_IDX 0 3265fb4d8502Sjsg #define mmTCP_PERFCOUNTER_FILTER 0x12b9 3266fb4d8502Sjsg #define mmTCP_PERFCOUNTER_FILTER_BASE_IDX 0 3267fb4d8502Sjsg #define mmTCP_PERFCOUNTER_FILTER_EN 0x12ba 3268fb4d8502Sjsg #define mmTCP_PERFCOUNTER_FILTER_EN_BASE_IDX 0 3269fb4d8502Sjsg 3270fb4d8502Sjsg 3271fb4d8502Sjsg // addressBlock: gc_gdspdec 3272fb4d8502Sjsg // base address: 0xcc00 3273fb4d8502Sjsg #define mmGDS_VMID0_BASE 0x1300 3274fb4d8502Sjsg #define mmGDS_VMID0_BASE_BASE_IDX 0 3275fb4d8502Sjsg #define mmGDS_VMID0_SIZE 0x1301 3276fb4d8502Sjsg #define mmGDS_VMID0_SIZE_BASE_IDX 0 3277fb4d8502Sjsg #define mmGDS_VMID1_BASE 0x1302 3278fb4d8502Sjsg #define mmGDS_VMID1_BASE_BASE_IDX 0 3279fb4d8502Sjsg #define mmGDS_VMID1_SIZE 0x1303 3280fb4d8502Sjsg #define mmGDS_VMID1_SIZE_BASE_IDX 0 3281fb4d8502Sjsg #define mmGDS_VMID2_BASE 0x1304 3282fb4d8502Sjsg #define mmGDS_VMID2_BASE_BASE_IDX 0 3283fb4d8502Sjsg #define mmGDS_VMID2_SIZE 0x1305 3284fb4d8502Sjsg #define mmGDS_VMID2_SIZE_BASE_IDX 0 3285fb4d8502Sjsg #define mmGDS_VMID3_BASE 0x1306 3286fb4d8502Sjsg #define mmGDS_VMID3_BASE_BASE_IDX 0 3287fb4d8502Sjsg #define mmGDS_VMID3_SIZE 0x1307 3288fb4d8502Sjsg #define mmGDS_VMID3_SIZE_BASE_IDX 0 3289fb4d8502Sjsg #define mmGDS_VMID4_BASE 0x1308 3290fb4d8502Sjsg #define mmGDS_VMID4_BASE_BASE_IDX 0 3291fb4d8502Sjsg #define mmGDS_VMID4_SIZE 0x1309 3292fb4d8502Sjsg #define mmGDS_VMID4_SIZE_BASE_IDX 0 3293fb4d8502Sjsg #define mmGDS_VMID5_BASE 0x130a 3294fb4d8502Sjsg #define mmGDS_VMID5_BASE_BASE_IDX 0 3295fb4d8502Sjsg #define mmGDS_VMID5_SIZE 0x130b 3296fb4d8502Sjsg #define mmGDS_VMID5_SIZE_BASE_IDX 0 3297fb4d8502Sjsg #define mmGDS_VMID6_BASE 0x130c 3298fb4d8502Sjsg #define mmGDS_VMID6_BASE_BASE_IDX 0 3299fb4d8502Sjsg #define mmGDS_VMID6_SIZE 0x130d 3300fb4d8502Sjsg #define mmGDS_VMID6_SIZE_BASE_IDX 0 3301fb4d8502Sjsg #define mmGDS_VMID7_BASE 0x130e 3302fb4d8502Sjsg #define mmGDS_VMID7_BASE_BASE_IDX 0 3303fb4d8502Sjsg #define mmGDS_VMID7_SIZE 0x130f 3304fb4d8502Sjsg #define mmGDS_VMID7_SIZE_BASE_IDX 0 3305fb4d8502Sjsg #define mmGDS_VMID8_BASE 0x1310 3306fb4d8502Sjsg #define mmGDS_VMID8_BASE_BASE_IDX 0 3307fb4d8502Sjsg #define mmGDS_VMID8_SIZE 0x1311 3308fb4d8502Sjsg #define mmGDS_VMID8_SIZE_BASE_IDX 0 3309fb4d8502Sjsg #define mmGDS_VMID9_BASE 0x1312 3310fb4d8502Sjsg #define mmGDS_VMID9_BASE_BASE_IDX 0 3311fb4d8502Sjsg #define mmGDS_VMID9_SIZE 0x1313 3312fb4d8502Sjsg #define mmGDS_VMID9_SIZE_BASE_IDX 0 3313fb4d8502Sjsg #define mmGDS_VMID10_BASE 0x1314 3314fb4d8502Sjsg #define mmGDS_VMID10_BASE_BASE_IDX 0 3315fb4d8502Sjsg #define mmGDS_VMID10_SIZE 0x1315 3316fb4d8502Sjsg #define mmGDS_VMID10_SIZE_BASE_IDX 0 3317fb4d8502Sjsg #define mmGDS_VMID11_BASE 0x1316 3318fb4d8502Sjsg #define mmGDS_VMID11_BASE_BASE_IDX 0 3319fb4d8502Sjsg #define mmGDS_VMID11_SIZE 0x1317 3320fb4d8502Sjsg #define mmGDS_VMID11_SIZE_BASE_IDX 0 3321fb4d8502Sjsg #define mmGDS_VMID12_BASE 0x1318 3322fb4d8502Sjsg #define mmGDS_VMID12_BASE_BASE_IDX 0 3323fb4d8502Sjsg #define mmGDS_VMID12_SIZE 0x1319 3324fb4d8502Sjsg #define mmGDS_VMID12_SIZE_BASE_IDX 0 3325fb4d8502Sjsg #define mmGDS_VMID13_BASE 0x131a 3326fb4d8502Sjsg #define mmGDS_VMID13_BASE_BASE_IDX 0 3327fb4d8502Sjsg #define mmGDS_VMID13_SIZE 0x131b 3328fb4d8502Sjsg #define mmGDS_VMID13_SIZE_BASE_IDX 0 3329fb4d8502Sjsg #define mmGDS_VMID14_BASE 0x131c 3330fb4d8502Sjsg #define mmGDS_VMID14_BASE_BASE_IDX 0 3331fb4d8502Sjsg #define mmGDS_VMID14_SIZE 0x131d 3332fb4d8502Sjsg #define mmGDS_VMID14_SIZE_BASE_IDX 0 3333fb4d8502Sjsg #define mmGDS_VMID15_BASE 0x131e 3334fb4d8502Sjsg #define mmGDS_VMID15_BASE_BASE_IDX 0 3335fb4d8502Sjsg #define mmGDS_VMID15_SIZE 0x131f 3336fb4d8502Sjsg #define mmGDS_VMID15_SIZE_BASE_IDX 0 3337fb4d8502Sjsg #define mmGDS_GWS_VMID0 0x1320 3338fb4d8502Sjsg #define mmGDS_GWS_VMID0_BASE_IDX 0 3339fb4d8502Sjsg #define mmGDS_GWS_VMID1 0x1321 3340fb4d8502Sjsg #define mmGDS_GWS_VMID1_BASE_IDX 0 3341fb4d8502Sjsg #define mmGDS_GWS_VMID2 0x1322 3342fb4d8502Sjsg #define mmGDS_GWS_VMID2_BASE_IDX 0 3343fb4d8502Sjsg #define mmGDS_GWS_VMID3 0x1323 3344fb4d8502Sjsg #define mmGDS_GWS_VMID3_BASE_IDX 0 3345fb4d8502Sjsg #define mmGDS_GWS_VMID4 0x1324 3346fb4d8502Sjsg #define mmGDS_GWS_VMID4_BASE_IDX 0 3347fb4d8502Sjsg #define mmGDS_GWS_VMID5 0x1325 3348fb4d8502Sjsg #define mmGDS_GWS_VMID5_BASE_IDX 0 3349fb4d8502Sjsg #define mmGDS_GWS_VMID6 0x1326 3350fb4d8502Sjsg #define mmGDS_GWS_VMID6_BASE_IDX 0 3351fb4d8502Sjsg #define mmGDS_GWS_VMID7 0x1327 3352fb4d8502Sjsg #define mmGDS_GWS_VMID7_BASE_IDX 0 3353fb4d8502Sjsg #define mmGDS_GWS_VMID8 0x1328 3354fb4d8502Sjsg #define mmGDS_GWS_VMID8_BASE_IDX 0 3355fb4d8502Sjsg #define mmGDS_GWS_VMID9 0x1329 3356fb4d8502Sjsg #define mmGDS_GWS_VMID9_BASE_IDX 0 3357fb4d8502Sjsg #define mmGDS_GWS_VMID10 0x132a 3358fb4d8502Sjsg #define mmGDS_GWS_VMID10_BASE_IDX 0 3359fb4d8502Sjsg #define mmGDS_GWS_VMID11 0x132b 3360fb4d8502Sjsg #define mmGDS_GWS_VMID11_BASE_IDX 0 3361fb4d8502Sjsg #define mmGDS_GWS_VMID12 0x132c 3362fb4d8502Sjsg #define mmGDS_GWS_VMID12_BASE_IDX 0 3363fb4d8502Sjsg #define mmGDS_GWS_VMID13 0x132d 3364fb4d8502Sjsg #define mmGDS_GWS_VMID13_BASE_IDX 0 3365fb4d8502Sjsg #define mmGDS_GWS_VMID14 0x132e 3366fb4d8502Sjsg #define mmGDS_GWS_VMID14_BASE_IDX 0 3367fb4d8502Sjsg #define mmGDS_GWS_VMID15 0x132f 3368fb4d8502Sjsg #define mmGDS_GWS_VMID15_BASE_IDX 0 3369fb4d8502Sjsg #define mmGDS_OA_VMID0 0x1330 3370fb4d8502Sjsg #define mmGDS_OA_VMID0_BASE_IDX 0 3371fb4d8502Sjsg #define mmGDS_OA_VMID1 0x1331 3372fb4d8502Sjsg #define mmGDS_OA_VMID1_BASE_IDX 0 3373fb4d8502Sjsg #define mmGDS_OA_VMID2 0x1332 3374fb4d8502Sjsg #define mmGDS_OA_VMID2_BASE_IDX 0 3375fb4d8502Sjsg #define mmGDS_OA_VMID3 0x1333 3376fb4d8502Sjsg #define mmGDS_OA_VMID3_BASE_IDX 0 3377fb4d8502Sjsg #define mmGDS_OA_VMID4 0x1334 3378fb4d8502Sjsg #define mmGDS_OA_VMID4_BASE_IDX 0 3379fb4d8502Sjsg #define mmGDS_OA_VMID5 0x1335 3380fb4d8502Sjsg #define mmGDS_OA_VMID5_BASE_IDX 0 3381fb4d8502Sjsg #define mmGDS_OA_VMID6 0x1336 3382fb4d8502Sjsg #define mmGDS_OA_VMID6_BASE_IDX 0 3383fb4d8502Sjsg #define mmGDS_OA_VMID7 0x1337 3384fb4d8502Sjsg #define mmGDS_OA_VMID7_BASE_IDX 0 3385fb4d8502Sjsg #define mmGDS_OA_VMID8 0x1338 3386fb4d8502Sjsg #define mmGDS_OA_VMID8_BASE_IDX 0 3387fb4d8502Sjsg #define mmGDS_OA_VMID9 0x1339 3388fb4d8502Sjsg #define mmGDS_OA_VMID9_BASE_IDX 0 3389fb4d8502Sjsg #define mmGDS_OA_VMID10 0x133a 3390fb4d8502Sjsg #define mmGDS_OA_VMID10_BASE_IDX 0 3391fb4d8502Sjsg #define mmGDS_OA_VMID11 0x133b 3392fb4d8502Sjsg #define mmGDS_OA_VMID11_BASE_IDX 0 3393fb4d8502Sjsg #define mmGDS_OA_VMID12 0x133c 3394fb4d8502Sjsg #define mmGDS_OA_VMID12_BASE_IDX 0 3395fb4d8502Sjsg #define mmGDS_OA_VMID13 0x133d 3396fb4d8502Sjsg #define mmGDS_OA_VMID13_BASE_IDX 0 3397fb4d8502Sjsg #define mmGDS_OA_VMID14 0x133e 3398fb4d8502Sjsg #define mmGDS_OA_VMID14_BASE_IDX 0 3399fb4d8502Sjsg #define mmGDS_OA_VMID15 0x133f 3400fb4d8502Sjsg #define mmGDS_OA_VMID15_BASE_IDX 0 3401fb4d8502Sjsg #define mmGDS_GWS_RESET0 0x1344 3402fb4d8502Sjsg #define mmGDS_GWS_RESET0_BASE_IDX 0 3403fb4d8502Sjsg #define mmGDS_GWS_RESET1 0x1345 3404fb4d8502Sjsg #define mmGDS_GWS_RESET1_BASE_IDX 0 3405fb4d8502Sjsg #define mmGDS_GWS_RESOURCE_RESET 0x1346 3406fb4d8502Sjsg #define mmGDS_GWS_RESOURCE_RESET_BASE_IDX 0 3407fb4d8502Sjsg #define mmGDS_COMPUTE_MAX_WAVE_ID 0x1348 3408fb4d8502Sjsg #define mmGDS_COMPUTE_MAX_WAVE_ID_BASE_IDX 0 3409fb4d8502Sjsg #define mmGDS_OA_RESET_MASK 0x1349 3410fb4d8502Sjsg #define mmGDS_OA_RESET_MASK_BASE_IDX 0 3411fb4d8502Sjsg #define mmGDS_OA_RESET 0x134a 3412fb4d8502Sjsg #define mmGDS_OA_RESET_BASE_IDX 0 3413fb4d8502Sjsg #define mmGDS_ENHANCE 0x134b 3414fb4d8502Sjsg #define mmGDS_ENHANCE_BASE_IDX 0 3415fb4d8502Sjsg #define mmGDS_OA_CGPG_RESTORE 0x134c 3416fb4d8502Sjsg #define mmGDS_OA_CGPG_RESTORE_BASE_IDX 0 3417fb4d8502Sjsg #define mmGDS_CS_CTXSW_STATUS 0x134d 3418fb4d8502Sjsg #define mmGDS_CS_CTXSW_STATUS_BASE_IDX 0 3419fb4d8502Sjsg #define mmGDS_CS_CTXSW_CNT0 0x134e 3420fb4d8502Sjsg #define mmGDS_CS_CTXSW_CNT0_BASE_IDX 0 3421fb4d8502Sjsg #define mmGDS_CS_CTXSW_CNT1 0x134f 3422fb4d8502Sjsg #define mmGDS_CS_CTXSW_CNT1_BASE_IDX 0 3423fb4d8502Sjsg #define mmGDS_CS_CTXSW_CNT2 0x1350 3424fb4d8502Sjsg #define mmGDS_CS_CTXSW_CNT2_BASE_IDX 0 3425fb4d8502Sjsg #define mmGDS_CS_CTXSW_CNT3 0x1351 3426fb4d8502Sjsg #define mmGDS_CS_CTXSW_CNT3_BASE_IDX 0 3427fb4d8502Sjsg #define mmGDS_GFX_CTXSW_STATUS 0x1352 3428fb4d8502Sjsg #define mmGDS_GFX_CTXSW_STATUS_BASE_IDX 0 3429fb4d8502Sjsg #define mmGDS_VS_CTXSW_CNT0 0x1353 3430fb4d8502Sjsg #define mmGDS_VS_CTXSW_CNT0_BASE_IDX 0 3431fb4d8502Sjsg #define mmGDS_VS_CTXSW_CNT1 0x1354 3432fb4d8502Sjsg #define mmGDS_VS_CTXSW_CNT1_BASE_IDX 0 3433fb4d8502Sjsg #define mmGDS_VS_CTXSW_CNT2 0x1355 3434fb4d8502Sjsg #define mmGDS_VS_CTXSW_CNT2_BASE_IDX 0 3435fb4d8502Sjsg #define mmGDS_VS_CTXSW_CNT3 0x1356 3436fb4d8502Sjsg #define mmGDS_VS_CTXSW_CNT3_BASE_IDX 0 3437fb4d8502Sjsg #define mmGDS_PS0_CTXSW_CNT0 0x1357 3438fb4d8502Sjsg #define mmGDS_PS0_CTXSW_CNT0_BASE_IDX 0 3439fb4d8502Sjsg #define mmGDS_PS0_CTXSW_CNT1 0x1358 3440fb4d8502Sjsg #define mmGDS_PS0_CTXSW_CNT1_BASE_IDX 0 3441fb4d8502Sjsg #define mmGDS_PS0_CTXSW_CNT2 0x1359 3442fb4d8502Sjsg #define mmGDS_PS0_CTXSW_CNT2_BASE_IDX 0 3443fb4d8502Sjsg #define mmGDS_PS0_CTXSW_CNT3 0x135a 3444fb4d8502Sjsg #define mmGDS_PS0_CTXSW_CNT3_BASE_IDX 0 3445fb4d8502Sjsg #define mmGDS_PS1_CTXSW_CNT0 0x135b 3446fb4d8502Sjsg #define mmGDS_PS1_CTXSW_CNT0_BASE_IDX 0 3447fb4d8502Sjsg #define mmGDS_PS1_CTXSW_CNT1 0x135c 3448fb4d8502Sjsg #define mmGDS_PS1_CTXSW_CNT1_BASE_IDX 0 3449fb4d8502Sjsg #define mmGDS_PS1_CTXSW_CNT2 0x135d 3450fb4d8502Sjsg #define mmGDS_PS1_CTXSW_CNT2_BASE_IDX 0 3451fb4d8502Sjsg #define mmGDS_PS1_CTXSW_CNT3 0x135e 3452fb4d8502Sjsg #define mmGDS_PS1_CTXSW_CNT3_BASE_IDX 0 3453fb4d8502Sjsg #define mmGDS_PS2_CTXSW_CNT0 0x135f 3454fb4d8502Sjsg #define mmGDS_PS2_CTXSW_CNT0_BASE_IDX 0 3455fb4d8502Sjsg #define mmGDS_PS2_CTXSW_CNT1 0x1360 3456fb4d8502Sjsg #define mmGDS_PS2_CTXSW_CNT1_BASE_IDX 0 3457fb4d8502Sjsg #define mmGDS_PS2_CTXSW_CNT2 0x1361 3458fb4d8502Sjsg #define mmGDS_PS2_CTXSW_CNT2_BASE_IDX 0 3459fb4d8502Sjsg #define mmGDS_PS2_CTXSW_CNT3 0x1362 3460fb4d8502Sjsg #define mmGDS_PS2_CTXSW_CNT3_BASE_IDX 0 3461fb4d8502Sjsg #define mmGDS_PS3_CTXSW_CNT0 0x1363 3462fb4d8502Sjsg #define mmGDS_PS3_CTXSW_CNT0_BASE_IDX 0 3463fb4d8502Sjsg #define mmGDS_PS3_CTXSW_CNT1 0x1364 3464fb4d8502Sjsg #define mmGDS_PS3_CTXSW_CNT1_BASE_IDX 0 3465fb4d8502Sjsg #define mmGDS_PS3_CTXSW_CNT2 0x1365 3466fb4d8502Sjsg #define mmGDS_PS3_CTXSW_CNT2_BASE_IDX 0 3467fb4d8502Sjsg #define mmGDS_PS3_CTXSW_CNT3 0x1366 3468fb4d8502Sjsg #define mmGDS_PS3_CTXSW_CNT3_BASE_IDX 0 3469fb4d8502Sjsg #define mmGDS_PS4_CTXSW_CNT0 0x1367 3470fb4d8502Sjsg #define mmGDS_PS4_CTXSW_CNT0_BASE_IDX 0 3471fb4d8502Sjsg #define mmGDS_PS4_CTXSW_CNT1 0x1368 3472fb4d8502Sjsg #define mmGDS_PS4_CTXSW_CNT1_BASE_IDX 0 3473fb4d8502Sjsg #define mmGDS_PS4_CTXSW_CNT2 0x1369 3474fb4d8502Sjsg #define mmGDS_PS4_CTXSW_CNT2_BASE_IDX 0 3475fb4d8502Sjsg #define mmGDS_PS4_CTXSW_CNT3 0x136a 3476fb4d8502Sjsg #define mmGDS_PS4_CTXSW_CNT3_BASE_IDX 0 3477fb4d8502Sjsg #define mmGDS_PS5_CTXSW_CNT0 0x136b 3478fb4d8502Sjsg #define mmGDS_PS5_CTXSW_CNT0_BASE_IDX 0 3479fb4d8502Sjsg #define mmGDS_PS5_CTXSW_CNT1 0x136c 3480fb4d8502Sjsg #define mmGDS_PS5_CTXSW_CNT1_BASE_IDX 0 3481fb4d8502Sjsg #define mmGDS_PS5_CTXSW_CNT2 0x136d 3482fb4d8502Sjsg #define mmGDS_PS5_CTXSW_CNT2_BASE_IDX 0 3483fb4d8502Sjsg #define mmGDS_PS5_CTXSW_CNT3 0x136e 3484fb4d8502Sjsg #define mmGDS_PS5_CTXSW_CNT3_BASE_IDX 0 3485fb4d8502Sjsg #define mmGDS_PS6_CTXSW_CNT0 0x136f 3486fb4d8502Sjsg #define mmGDS_PS6_CTXSW_CNT0_BASE_IDX 0 3487fb4d8502Sjsg #define mmGDS_PS6_CTXSW_CNT1 0x1370 3488fb4d8502Sjsg #define mmGDS_PS6_CTXSW_CNT1_BASE_IDX 0 3489fb4d8502Sjsg #define mmGDS_PS6_CTXSW_CNT2 0x1371 3490fb4d8502Sjsg #define mmGDS_PS6_CTXSW_CNT2_BASE_IDX 0 3491fb4d8502Sjsg #define mmGDS_PS6_CTXSW_CNT3 0x1372 3492fb4d8502Sjsg #define mmGDS_PS6_CTXSW_CNT3_BASE_IDX 0 3493fb4d8502Sjsg #define mmGDS_PS7_CTXSW_CNT0 0x1373 3494fb4d8502Sjsg #define mmGDS_PS7_CTXSW_CNT0_BASE_IDX 0 3495fb4d8502Sjsg #define mmGDS_PS7_CTXSW_CNT1 0x1374 3496fb4d8502Sjsg #define mmGDS_PS7_CTXSW_CNT1_BASE_IDX 0 3497fb4d8502Sjsg #define mmGDS_PS7_CTXSW_CNT2 0x1375 3498fb4d8502Sjsg #define mmGDS_PS7_CTXSW_CNT2_BASE_IDX 0 3499fb4d8502Sjsg #define mmGDS_PS7_CTXSW_CNT3 0x1376 3500fb4d8502Sjsg #define mmGDS_PS7_CTXSW_CNT3_BASE_IDX 0 3501fb4d8502Sjsg #define mmGDS_GS_CTXSW_CNT0 0x1377 3502fb4d8502Sjsg #define mmGDS_GS_CTXSW_CNT0_BASE_IDX 0 3503fb4d8502Sjsg #define mmGDS_GS_CTXSW_CNT1 0x1378 3504fb4d8502Sjsg #define mmGDS_GS_CTXSW_CNT1_BASE_IDX 0 3505fb4d8502Sjsg #define mmGDS_GS_CTXSW_CNT2 0x1379 3506fb4d8502Sjsg #define mmGDS_GS_CTXSW_CNT2_BASE_IDX 0 3507fb4d8502Sjsg #define mmGDS_GS_CTXSW_CNT3 0x137a 3508fb4d8502Sjsg #define mmGDS_GS_CTXSW_CNT3_BASE_IDX 0 3509fb4d8502Sjsg 3510fb4d8502Sjsg 3511fb4d8502Sjsg // addressBlock: gc_rasdec 3512fb4d8502Sjsg // base address: 0xce00 3513fb4d8502Sjsg #define mmRAS_SIGNATURE_CONTROL 0x1380 3514fb4d8502Sjsg #define mmRAS_SIGNATURE_CONTROL_BASE_IDX 0 3515fb4d8502Sjsg #define mmRAS_SIGNATURE_MASK 0x1381 3516fb4d8502Sjsg #define mmRAS_SIGNATURE_MASK_BASE_IDX 0 3517fb4d8502Sjsg #define mmRAS_SX_SIGNATURE0 0x1382 3518fb4d8502Sjsg #define mmRAS_SX_SIGNATURE0_BASE_IDX 0 3519fb4d8502Sjsg #define mmRAS_SX_SIGNATURE1 0x1383 3520fb4d8502Sjsg #define mmRAS_SX_SIGNATURE1_BASE_IDX 0 3521fb4d8502Sjsg #define mmRAS_SX_SIGNATURE2 0x1384 3522fb4d8502Sjsg #define mmRAS_SX_SIGNATURE2_BASE_IDX 0 3523fb4d8502Sjsg #define mmRAS_SX_SIGNATURE3 0x1385 3524fb4d8502Sjsg #define mmRAS_SX_SIGNATURE3_BASE_IDX 0 3525fb4d8502Sjsg #define mmRAS_DB_SIGNATURE0 0x138b 3526fb4d8502Sjsg #define mmRAS_DB_SIGNATURE0_BASE_IDX 0 3527fb4d8502Sjsg #define mmRAS_PA_SIGNATURE0 0x138c 3528fb4d8502Sjsg #define mmRAS_PA_SIGNATURE0_BASE_IDX 0 3529fb4d8502Sjsg #define mmRAS_VGT_SIGNATURE0 0x138d 3530fb4d8502Sjsg #define mmRAS_VGT_SIGNATURE0_BASE_IDX 0 3531fb4d8502Sjsg #define mmRAS_SQ_SIGNATURE0 0x138e 3532fb4d8502Sjsg #define mmRAS_SQ_SIGNATURE0_BASE_IDX 0 3533fb4d8502Sjsg #define mmRAS_SC_SIGNATURE0 0x138f 3534fb4d8502Sjsg #define mmRAS_SC_SIGNATURE0_BASE_IDX 0 3535fb4d8502Sjsg #define mmRAS_SC_SIGNATURE1 0x1390 3536fb4d8502Sjsg #define mmRAS_SC_SIGNATURE1_BASE_IDX 0 3537fb4d8502Sjsg #define mmRAS_SC_SIGNATURE2 0x1391 3538fb4d8502Sjsg #define mmRAS_SC_SIGNATURE2_BASE_IDX 0 3539fb4d8502Sjsg #define mmRAS_SC_SIGNATURE3 0x1392 3540fb4d8502Sjsg #define mmRAS_SC_SIGNATURE3_BASE_IDX 0 3541fb4d8502Sjsg #define mmRAS_SC_SIGNATURE4 0x1393 3542fb4d8502Sjsg #define mmRAS_SC_SIGNATURE4_BASE_IDX 0 3543fb4d8502Sjsg #define mmRAS_SC_SIGNATURE5 0x1394 3544fb4d8502Sjsg #define mmRAS_SC_SIGNATURE5_BASE_IDX 0 3545fb4d8502Sjsg #define mmRAS_SC_SIGNATURE6 0x1395 3546fb4d8502Sjsg #define mmRAS_SC_SIGNATURE6_BASE_IDX 0 3547fb4d8502Sjsg #define mmRAS_SC_SIGNATURE7 0x1396 3548fb4d8502Sjsg #define mmRAS_SC_SIGNATURE7_BASE_IDX 0 3549fb4d8502Sjsg #define mmRAS_IA_SIGNATURE0 0x1397 3550fb4d8502Sjsg #define mmRAS_IA_SIGNATURE0_BASE_IDX 0 3551fb4d8502Sjsg #define mmRAS_IA_SIGNATURE1 0x1398 3552fb4d8502Sjsg #define mmRAS_IA_SIGNATURE1_BASE_IDX 0 3553fb4d8502Sjsg #define mmRAS_SPI_SIGNATURE0 0x1399 3554fb4d8502Sjsg #define mmRAS_SPI_SIGNATURE0_BASE_IDX 0 3555fb4d8502Sjsg #define mmRAS_SPI_SIGNATURE1 0x139a 3556fb4d8502Sjsg #define mmRAS_SPI_SIGNATURE1_BASE_IDX 0 3557fb4d8502Sjsg #define mmRAS_TA_SIGNATURE0 0x139b 3558fb4d8502Sjsg #define mmRAS_TA_SIGNATURE0_BASE_IDX 0 3559fb4d8502Sjsg #define mmRAS_TD_SIGNATURE0 0x139c 3560fb4d8502Sjsg #define mmRAS_TD_SIGNATURE0_BASE_IDX 0 3561fb4d8502Sjsg #define mmRAS_CB_SIGNATURE0 0x139d 3562fb4d8502Sjsg #define mmRAS_CB_SIGNATURE0_BASE_IDX 0 3563fb4d8502Sjsg #define mmRAS_BCI_SIGNATURE0 0x139e 3564fb4d8502Sjsg #define mmRAS_BCI_SIGNATURE0_BASE_IDX 0 3565fb4d8502Sjsg #define mmRAS_BCI_SIGNATURE1 0x139f 3566fb4d8502Sjsg #define mmRAS_BCI_SIGNATURE1_BASE_IDX 0 3567fb4d8502Sjsg #define mmRAS_TA_SIGNATURE1 0x13a0 3568fb4d8502Sjsg #define mmRAS_TA_SIGNATURE1_BASE_IDX 0 3569fb4d8502Sjsg 3570fb4d8502Sjsg 3571fb4d8502Sjsg // addressBlock: gc_gfxdec0 3572fb4d8502Sjsg // base address: 0x28000 3573fb4d8502Sjsg #define mmDB_RENDER_CONTROL 0x0000 3574fb4d8502Sjsg #define mmDB_RENDER_CONTROL_BASE_IDX 1 3575fb4d8502Sjsg #define mmDB_COUNT_CONTROL 0x0001 3576fb4d8502Sjsg #define mmDB_COUNT_CONTROL_BASE_IDX 1 3577fb4d8502Sjsg #define mmDB_DEPTH_VIEW 0x0002 3578fb4d8502Sjsg #define mmDB_DEPTH_VIEW_BASE_IDX 1 3579fb4d8502Sjsg #define mmDB_RENDER_OVERRIDE 0x0003 3580fb4d8502Sjsg #define mmDB_RENDER_OVERRIDE_BASE_IDX 1 3581fb4d8502Sjsg #define mmDB_RENDER_OVERRIDE2 0x0004 3582fb4d8502Sjsg #define mmDB_RENDER_OVERRIDE2_BASE_IDX 1 3583fb4d8502Sjsg #define mmDB_HTILE_DATA_BASE 0x0005 3584fb4d8502Sjsg #define mmDB_HTILE_DATA_BASE_BASE_IDX 1 3585fb4d8502Sjsg #define mmDB_HTILE_DATA_BASE_HI 0x0006 3586fb4d8502Sjsg #define mmDB_HTILE_DATA_BASE_HI_BASE_IDX 1 3587fb4d8502Sjsg #define mmDB_DEPTH_SIZE 0x0007 3588fb4d8502Sjsg #define mmDB_DEPTH_SIZE_BASE_IDX 1 3589fb4d8502Sjsg #define mmDB_DEPTH_BOUNDS_MIN 0x0008 3590fb4d8502Sjsg #define mmDB_DEPTH_BOUNDS_MIN_BASE_IDX 1 3591fb4d8502Sjsg #define mmDB_DEPTH_BOUNDS_MAX 0x0009 3592fb4d8502Sjsg #define mmDB_DEPTH_BOUNDS_MAX_BASE_IDX 1 3593fb4d8502Sjsg #define mmDB_STENCIL_CLEAR 0x000a 3594fb4d8502Sjsg #define mmDB_STENCIL_CLEAR_BASE_IDX 1 3595fb4d8502Sjsg #define mmDB_DEPTH_CLEAR 0x000b 3596fb4d8502Sjsg #define mmDB_DEPTH_CLEAR_BASE_IDX 1 3597fb4d8502Sjsg #define mmPA_SC_SCREEN_SCISSOR_TL 0x000c 3598fb4d8502Sjsg #define mmPA_SC_SCREEN_SCISSOR_TL_BASE_IDX 1 3599fb4d8502Sjsg #define mmPA_SC_SCREEN_SCISSOR_BR 0x000d 3600fb4d8502Sjsg #define mmPA_SC_SCREEN_SCISSOR_BR_BASE_IDX 1 3601fb4d8502Sjsg #define mmDB_Z_INFO 0x000e 3602fb4d8502Sjsg #define mmDB_Z_INFO_BASE_IDX 1 3603fb4d8502Sjsg #define mmDB_STENCIL_INFO 0x000f 3604fb4d8502Sjsg #define mmDB_STENCIL_INFO_BASE_IDX 1 3605fb4d8502Sjsg #define mmDB_Z_READ_BASE 0x0010 3606fb4d8502Sjsg #define mmDB_Z_READ_BASE_BASE_IDX 1 3607fb4d8502Sjsg #define mmDB_Z_READ_BASE_HI 0x0011 3608fb4d8502Sjsg #define mmDB_Z_READ_BASE_HI_BASE_IDX 1 3609fb4d8502Sjsg #define mmDB_STENCIL_READ_BASE 0x0012 3610fb4d8502Sjsg #define mmDB_STENCIL_READ_BASE_BASE_IDX 1 3611fb4d8502Sjsg #define mmDB_STENCIL_READ_BASE_HI 0x0013 3612fb4d8502Sjsg #define mmDB_STENCIL_READ_BASE_HI_BASE_IDX 1 3613fb4d8502Sjsg #define mmDB_Z_WRITE_BASE 0x0014 3614fb4d8502Sjsg #define mmDB_Z_WRITE_BASE_BASE_IDX 1 3615fb4d8502Sjsg #define mmDB_Z_WRITE_BASE_HI 0x0015 3616fb4d8502Sjsg #define mmDB_Z_WRITE_BASE_HI_BASE_IDX 1 3617fb4d8502Sjsg #define mmDB_STENCIL_WRITE_BASE 0x0016 3618fb4d8502Sjsg #define mmDB_STENCIL_WRITE_BASE_BASE_IDX 1 3619fb4d8502Sjsg #define mmDB_STENCIL_WRITE_BASE_HI 0x0017 3620fb4d8502Sjsg #define mmDB_STENCIL_WRITE_BASE_HI_BASE_IDX 1 3621fb4d8502Sjsg #define mmDB_DFSM_CONTROL 0x0018 3622fb4d8502Sjsg #define mmDB_DFSM_CONTROL_BASE_IDX 1 3623fb4d8502Sjsg #define mmDB_Z_INFO2 0x001a 3624fb4d8502Sjsg #define mmDB_Z_INFO2_BASE_IDX 1 3625fb4d8502Sjsg #define mmDB_STENCIL_INFO2 0x001b 3626fb4d8502Sjsg #define mmDB_STENCIL_INFO2_BASE_IDX 1 3627fb4d8502Sjsg #define mmTA_BC_BASE_ADDR 0x0020 3628fb4d8502Sjsg #define mmTA_BC_BASE_ADDR_BASE_IDX 1 3629fb4d8502Sjsg #define mmTA_BC_BASE_ADDR_HI 0x0021 3630fb4d8502Sjsg #define mmTA_BC_BASE_ADDR_HI_BASE_IDX 1 3631fb4d8502Sjsg #define mmCOHER_DEST_BASE_HI_0 0x007a 3632fb4d8502Sjsg #define mmCOHER_DEST_BASE_HI_0_BASE_IDX 1 3633fb4d8502Sjsg #define mmCOHER_DEST_BASE_HI_1 0x007b 3634fb4d8502Sjsg #define mmCOHER_DEST_BASE_HI_1_BASE_IDX 1 3635fb4d8502Sjsg #define mmCOHER_DEST_BASE_HI_2 0x007c 3636fb4d8502Sjsg #define mmCOHER_DEST_BASE_HI_2_BASE_IDX 1 3637fb4d8502Sjsg #define mmCOHER_DEST_BASE_HI_3 0x007d 3638fb4d8502Sjsg #define mmCOHER_DEST_BASE_HI_3_BASE_IDX 1 3639fb4d8502Sjsg #define mmCOHER_DEST_BASE_2 0x007e 3640fb4d8502Sjsg #define mmCOHER_DEST_BASE_2_BASE_IDX 1 3641fb4d8502Sjsg #define mmCOHER_DEST_BASE_3 0x007f 3642fb4d8502Sjsg #define mmCOHER_DEST_BASE_3_BASE_IDX 1 3643fb4d8502Sjsg #define mmPA_SC_WINDOW_OFFSET 0x0080 3644fb4d8502Sjsg #define mmPA_SC_WINDOW_OFFSET_BASE_IDX 1 3645fb4d8502Sjsg #define mmPA_SC_WINDOW_SCISSOR_TL 0x0081 3646fb4d8502Sjsg #define mmPA_SC_WINDOW_SCISSOR_TL_BASE_IDX 1 3647fb4d8502Sjsg #define mmPA_SC_WINDOW_SCISSOR_BR 0x0082 3648fb4d8502Sjsg #define mmPA_SC_WINDOW_SCISSOR_BR_BASE_IDX 1 3649fb4d8502Sjsg #define mmPA_SC_CLIPRECT_RULE 0x0083 3650fb4d8502Sjsg #define mmPA_SC_CLIPRECT_RULE_BASE_IDX 1 3651fb4d8502Sjsg #define mmPA_SC_CLIPRECT_0_TL 0x0084 3652fb4d8502Sjsg #define mmPA_SC_CLIPRECT_0_TL_BASE_IDX 1 3653fb4d8502Sjsg #define mmPA_SC_CLIPRECT_0_BR 0x0085 3654fb4d8502Sjsg #define mmPA_SC_CLIPRECT_0_BR_BASE_IDX 1 3655fb4d8502Sjsg #define mmPA_SC_CLIPRECT_1_TL 0x0086 3656fb4d8502Sjsg #define mmPA_SC_CLIPRECT_1_TL_BASE_IDX 1 3657fb4d8502Sjsg #define mmPA_SC_CLIPRECT_1_BR 0x0087 3658fb4d8502Sjsg #define mmPA_SC_CLIPRECT_1_BR_BASE_IDX 1 3659fb4d8502Sjsg #define mmPA_SC_CLIPRECT_2_TL 0x0088 3660fb4d8502Sjsg #define mmPA_SC_CLIPRECT_2_TL_BASE_IDX 1 3661fb4d8502Sjsg #define mmPA_SC_CLIPRECT_2_BR 0x0089 3662fb4d8502Sjsg #define mmPA_SC_CLIPRECT_2_BR_BASE_IDX 1 3663fb4d8502Sjsg #define mmPA_SC_CLIPRECT_3_TL 0x008a 3664fb4d8502Sjsg #define mmPA_SC_CLIPRECT_3_TL_BASE_IDX 1 3665fb4d8502Sjsg #define mmPA_SC_CLIPRECT_3_BR 0x008b 3666fb4d8502Sjsg #define mmPA_SC_CLIPRECT_3_BR_BASE_IDX 1 3667fb4d8502Sjsg #define mmPA_SC_EDGERULE 0x008c 3668fb4d8502Sjsg #define mmPA_SC_EDGERULE_BASE_IDX 1 3669fb4d8502Sjsg #define mmPA_SU_HARDWARE_SCREEN_OFFSET 0x008d 3670fb4d8502Sjsg #define mmPA_SU_HARDWARE_SCREEN_OFFSET_BASE_IDX 1 3671fb4d8502Sjsg #define mmCB_TARGET_MASK 0x008e 3672fb4d8502Sjsg #define mmCB_TARGET_MASK_BASE_IDX 1 3673fb4d8502Sjsg #define mmCB_SHADER_MASK 0x008f 3674fb4d8502Sjsg #define mmCB_SHADER_MASK_BASE_IDX 1 3675fb4d8502Sjsg #define mmPA_SC_GENERIC_SCISSOR_TL 0x0090 3676fb4d8502Sjsg #define mmPA_SC_GENERIC_SCISSOR_TL_BASE_IDX 1 3677fb4d8502Sjsg #define mmPA_SC_GENERIC_SCISSOR_BR 0x0091 3678fb4d8502Sjsg #define mmPA_SC_GENERIC_SCISSOR_BR_BASE_IDX 1 3679fb4d8502Sjsg #define mmCOHER_DEST_BASE_0 0x0092 3680fb4d8502Sjsg #define mmCOHER_DEST_BASE_0_BASE_IDX 1 3681fb4d8502Sjsg #define mmCOHER_DEST_BASE_1 0x0093 3682fb4d8502Sjsg #define mmCOHER_DEST_BASE_1_BASE_IDX 1 3683fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_0_TL 0x0094 3684fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_0_TL_BASE_IDX 1 3685fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_0_BR 0x0095 3686fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_0_BR_BASE_IDX 1 3687fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_1_TL 0x0096 3688fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_1_TL_BASE_IDX 1 3689fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_1_BR 0x0097 3690fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_1_BR_BASE_IDX 1 3691fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_2_TL 0x0098 3692fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_2_TL_BASE_IDX 1 3693fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_2_BR 0x0099 3694fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_2_BR_BASE_IDX 1 3695fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_3_TL 0x009a 3696fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_3_TL_BASE_IDX 1 3697fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_3_BR 0x009b 3698fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_3_BR_BASE_IDX 1 3699fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_4_TL 0x009c 3700fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_4_TL_BASE_IDX 1 3701fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_4_BR 0x009d 3702fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_4_BR_BASE_IDX 1 3703fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_5_TL 0x009e 3704fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_5_TL_BASE_IDX 1 3705fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_5_BR 0x009f 3706fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_5_BR_BASE_IDX 1 3707fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_6_TL 0x00a0 3708fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_6_TL_BASE_IDX 1 3709fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_6_BR 0x00a1 3710fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_6_BR_BASE_IDX 1 3711fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_7_TL 0x00a2 3712fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_7_TL_BASE_IDX 1 3713fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_7_BR 0x00a3 3714fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_7_BR_BASE_IDX 1 3715fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_8_TL 0x00a4 3716fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_8_TL_BASE_IDX 1 3717fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_8_BR 0x00a5 3718fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_8_BR_BASE_IDX 1 3719fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_9_TL 0x00a6 3720fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_9_TL_BASE_IDX 1 3721fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_9_BR 0x00a7 3722fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_9_BR_BASE_IDX 1 3723fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_10_TL 0x00a8 3724fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_10_TL_BASE_IDX 1 3725fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_10_BR 0x00a9 3726fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_10_BR_BASE_IDX 1 3727fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_11_TL 0x00aa 3728fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_11_TL_BASE_IDX 1 3729fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_11_BR 0x00ab 3730fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_11_BR_BASE_IDX 1 3731fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_12_TL 0x00ac 3732fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_12_TL_BASE_IDX 1 3733fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_12_BR 0x00ad 3734fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_12_BR_BASE_IDX 1 3735fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_13_TL 0x00ae 3736fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_13_TL_BASE_IDX 1 3737fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_13_BR 0x00af 3738fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_13_BR_BASE_IDX 1 3739fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_14_TL 0x00b0 3740fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_14_TL_BASE_IDX 1 3741fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_14_BR 0x00b1 3742fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_14_BR_BASE_IDX 1 3743fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_15_TL 0x00b2 3744fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_15_TL_BASE_IDX 1 3745fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_15_BR 0x00b3 3746fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_15_BR_BASE_IDX 1 3747fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_0 0x00b4 3748fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_0_BASE_IDX 1 3749fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_0 0x00b5 3750fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_0_BASE_IDX 1 3751fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_1 0x00b6 3752fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_1_BASE_IDX 1 3753fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_1 0x00b7 3754fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_1_BASE_IDX 1 3755fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_2 0x00b8 3756fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_2_BASE_IDX 1 3757fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_2 0x00b9 3758fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_2_BASE_IDX 1 3759fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_3 0x00ba 3760fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_3_BASE_IDX 1 3761fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_3 0x00bb 3762fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_3_BASE_IDX 1 3763fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_4 0x00bc 3764fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_4_BASE_IDX 1 3765fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_4 0x00bd 3766fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_4_BASE_IDX 1 3767fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_5 0x00be 3768fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_5_BASE_IDX 1 3769fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_5 0x00bf 3770fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_5_BASE_IDX 1 3771fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_6 0x00c0 3772fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_6_BASE_IDX 1 3773fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_6 0x00c1 3774fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_6_BASE_IDX 1 3775fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_7 0x00c2 3776fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_7_BASE_IDX 1 3777fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_7 0x00c3 3778fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_7_BASE_IDX 1 3779fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_8 0x00c4 3780fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_8_BASE_IDX 1 3781fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_8 0x00c5 3782fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_8_BASE_IDX 1 3783fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_9 0x00c6 3784fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_9_BASE_IDX 1 3785fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_9 0x00c7 3786fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_9_BASE_IDX 1 3787fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_10 0x00c8 3788fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_10_BASE_IDX 1 3789fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_10 0x00c9 3790fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_10_BASE_IDX 1 3791fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_11 0x00ca 3792fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_11_BASE_IDX 1 3793fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_11 0x00cb 3794fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_11_BASE_IDX 1 3795fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_12 0x00cc 3796fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_12_BASE_IDX 1 3797fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_12 0x00cd 3798fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_12_BASE_IDX 1 3799fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_13 0x00ce 3800fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_13_BASE_IDX 1 3801fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_13 0x00cf 3802fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_13_BASE_IDX 1 3803fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_14 0x00d0 3804fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_14_BASE_IDX 1 3805fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_14 0x00d1 3806fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_14_BASE_IDX 1 3807fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_15 0x00d2 3808fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_15_BASE_IDX 1 3809fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_15 0x00d3 3810fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_15_BASE_IDX 1 3811fb4d8502Sjsg #define mmPA_SC_RASTER_CONFIG 0x00d4 3812fb4d8502Sjsg #define mmPA_SC_RASTER_CONFIG_BASE_IDX 1 3813fb4d8502Sjsg #define mmPA_SC_RASTER_CONFIG_1 0x00d5 3814fb4d8502Sjsg #define mmPA_SC_RASTER_CONFIG_1_BASE_IDX 1 3815fb4d8502Sjsg #define mmPA_SC_SCREEN_EXTENT_CONTROL 0x00d6 3816fb4d8502Sjsg #define mmPA_SC_SCREEN_EXTENT_CONTROL_BASE_IDX 1 3817fb4d8502Sjsg #define mmPA_SC_TILE_STEERING_OVERRIDE 0x00d7 3818fb4d8502Sjsg #define mmPA_SC_TILE_STEERING_OVERRIDE_BASE_IDX 1 3819fb4d8502Sjsg #define mmCP_PERFMON_CNTX_CNTL 0x00d8 3820fb4d8502Sjsg #define mmCP_PERFMON_CNTX_CNTL_BASE_IDX 1 3821fb4d8502Sjsg #define mmCP_PIPEID 0x00d9 3822fb4d8502Sjsg #define mmCP_PIPEID_BASE_IDX 1 3823fb4d8502Sjsg #define mmCP_RINGID 0x00d9 3824fb4d8502Sjsg #define mmCP_RINGID_BASE_IDX 1 3825fb4d8502Sjsg #define mmCP_VMID 0x00da 3826fb4d8502Sjsg #define mmCP_VMID_BASE_IDX 1 3827fb4d8502Sjsg #define mmPA_SC_RIGHT_VERT_GRID 0x00e8 3828fb4d8502Sjsg #define mmPA_SC_RIGHT_VERT_GRID_BASE_IDX 1 3829fb4d8502Sjsg #define mmPA_SC_LEFT_VERT_GRID 0x00e9 3830fb4d8502Sjsg #define mmPA_SC_LEFT_VERT_GRID_BASE_IDX 1 3831fb4d8502Sjsg #define mmPA_SC_HORIZ_GRID 0x00ea 3832fb4d8502Sjsg #define mmPA_SC_HORIZ_GRID_BASE_IDX 1 3833fb4d8502Sjsg #define mmVGT_MULTI_PRIM_IB_RESET_INDX 0x0103 3834fb4d8502Sjsg #define mmVGT_MULTI_PRIM_IB_RESET_INDX_BASE_IDX 1 3835fb4d8502Sjsg #define mmCB_BLEND_RED 0x0105 3836fb4d8502Sjsg #define mmCB_BLEND_RED_BASE_IDX 1 3837fb4d8502Sjsg #define mmCB_BLEND_GREEN 0x0106 3838fb4d8502Sjsg #define mmCB_BLEND_GREEN_BASE_IDX 1 3839fb4d8502Sjsg #define mmCB_BLEND_BLUE 0x0107 3840fb4d8502Sjsg #define mmCB_BLEND_BLUE_BASE_IDX 1 3841fb4d8502Sjsg #define mmCB_BLEND_ALPHA 0x0108 3842fb4d8502Sjsg #define mmCB_BLEND_ALPHA_BASE_IDX 1 3843fb4d8502Sjsg #define mmCB_DCC_CONTROL 0x0109 3844fb4d8502Sjsg #define mmCB_DCC_CONTROL_BASE_IDX 1 3845fb4d8502Sjsg #define mmDB_STENCIL_CONTROL 0x010b 3846fb4d8502Sjsg #define mmDB_STENCIL_CONTROL_BASE_IDX 1 3847fb4d8502Sjsg #define mmDB_STENCILREFMASK 0x010c 3848fb4d8502Sjsg #define mmDB_STENCILREFMASK_BASE_IDX 1 3849fb4d8502Sjsg #define mmDB_STENCILREFMASK_BF 0x010d 3850fb4d8502Sjsg #define mmDB_STENCILREFMASK_BF_BASE_IDX 1 3851fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE 0x010f 3852fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_BASE_IDX 1 3853fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET 0x0110 3854fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_BASE_IDX 1 3855fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE 0x0111 3856fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_BASE_IDX 1 3857fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET 0x0112 3858fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_BASE_IDX 1 3859fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE 0x0113 3860fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_BASE_IDX 1 3861fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET 0x0114 3862fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_BASE_IDX 1 3863fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_1 0x0115 3864fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_1_BASE_IDX 1 3865fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_1 0x0116 3866fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_1_BASE_IDX 1 3867fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_1 0x0117 3868fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_1_BASE_IDX 1 3869fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_1 0x0118 3870fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_1_BASE_IDX 1 3871fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_1 0x0119 3872fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_1_BASE_IDX 1 3873fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_1 0x011a 3874fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_1_BASE_IDX 1 3875fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_2 0x011b 3876fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_2_BASE_IDX 1 3877fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_2 0x011c 3878fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_2_BASE_IDX 1 3879fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_2 0x011d 3880fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_2_BASE_IDX 1 3881fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_2 0x011e 3882fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_2_BASE_IDX 1 3883fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_2 0x011f 3884fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_2_BASE_IDX 1 3885fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_2 0x0120 3886fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_2_BASE_IDX 1 3887fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_3 0x0121 3888fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_3_BASE_IDX 1 3889fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_3 0x0122 3890fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_3_BASE_IDX 1 3891fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_3 0x0123 3892fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_3_BASE_IDX 1 3893fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_3 0x0124 3894fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_3_BASE_IDX 1 3895fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_3 0x0125 3896fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_3_BASE_IDX 1 3897fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_3 0x0126 3898fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_3_BASE_IDX 1 3899fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_4 0x0127 3900fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_4_BASE_IDX 1 3901fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_4 0x0128 3902fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_4_BASE_IDX 1 3903fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_4 0x0129 3904fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_4_BASE_IDX 1 3905fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_4 0x012a 3906fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_4_BASE_IDX 1 3907fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_4 0x012b 3908fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_4_BASE_IDX 1 3909fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_4 0x012c 3910fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_4_BASE_IDX 1 3911fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_5 0x012d 3912fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_5_BASE_IDX 1 3913fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_5 0x012e 3914fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_5_BASE_IDX 1 3915fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_5 0x012f 3916fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_5_BASE_IDX 1 3917fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_5 0x0130 3918fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_5_BASE_IDX 1 3919fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_5 0x0131 3920fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_5_BASE_IDX 1 3921fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_5 0x0132 3922fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_5_BASE_IDX 1 3923fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_6 0x0133 3924fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_6_BASE_IDX 1 3925fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_6 0x0134 3926fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_6_BASE_IDX 1 3927fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_6 0x0135 3928fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_6_BASE_IDX 1 3929fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_6 0x0136 3930fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_6_BASE_IDX 1 3931fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_6 0x0137 3932fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_6_BASE_IDX 1 3933fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_6 0x0138 3934fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_6_BASE_IDX 1 3935fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_7 0x0139 3936fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_7_BASE_IDX 1 3937fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_7 0x013a 3938fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_7_BASE_IDX 1 3939fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_7 0x013b 3940fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_7_BASE_IDX 1 3941fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_7 0x013c 3942fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_7_BASE_IDX 1 3943fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_7 0x013d 3944fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_7_BASE_IDX 1 3945fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_7 0x013e 3946fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_7_BASE_IDX 1 3947fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_8 0x013f 3948fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_8_BASE_IDX 1 3949fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_8 0x0140 3950fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_8_BASE_IDX 1 3951fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_8 0x0141 3952fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_8_BASE_IDX 1 3953fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_8 0x0142 3954fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_8_BASE_IDX 1 3955fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_8 0x0143 3956fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_8_BASE_IDX 1 3957fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_8 0x0144 3958fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_8_BASE_IDX 1 3959fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_9 0x0145 3960fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_9_BASE_IDX 1 3961fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_9 0x0146 3962fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_9_BASE_IDX 1 3963fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_9 0x0147 3964fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_9_BASE_IDX 1 3965fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_9 0x0148 3966fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_9_BASE_IDX 1 3967fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_9 0x0149 3968fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_9_BASE_IDX 1 3969fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_9 0x014a 3970fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_9_BASE_IDX 1 3971fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_10 0x014b 3972fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_10_BASE_IDX 1 3973fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_10 0x014c 3974fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_10_BASE_IDX 1 3975fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_10 0x014d 3976fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_10_BASE_IDX 1 3977fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_10 0x014e 3978fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_10_BASE_IDX 1 3979fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_10 0x014f 3980fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_10_BASE_IDX 1 3981fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_10 0x0150 3982fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_10_BASE_IDX 1 3983fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_11 0x0151 3984fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_11_BASE_IDX 1 3985fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_11 0x0152 3986fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_11_BASE_IDX 1 3987fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_11 0x0153 3988fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_11_BASE_IDX 1 3989fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_11 0x0154 3990fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_11_BASE_IDX 1 3991fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_11 0x0155 3992fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_11_BASE_IDX 1 3993fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_11 0x0156 3994fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_11_BASE_IDX 1 3995fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_12 0x0157 3996fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_12_BASE_IDX 1 3997fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_12 0x0158 3998fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_12_BASE_IDX 1 3999fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_12 0x0159 4000fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_12_BASE_IDX 1 4001fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_12 0x015a 4002fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_12_BASE_IDX 1 4003fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_12 0x015b 4004fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_12_BASE_IDX 1 4005fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_12 0x015c 4006fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_12_BASE_IDX 1 4007fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_13 0x015d 4008fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_13_BASE_IDX 1 4009fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_13 0x015e 4010fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_13_BASE_IDX 1 4011fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_13 0x015f 4012fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_13_BASE_IDX 1 4013fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_13 0x0160 4014fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_13_BASE_IDX 1 4015fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_13 0x0161 4016fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_13_BASE_IDX 1 4017fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_13 0x0162 4018fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_13_BASE_IDX 1 4019fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_14 0x0163 4020fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_14_BASE_IDX 1 4021fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_14 0x0164 4022fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_14_BASE_IDX 1 4023fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_14 0x0165 4024fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_14_BASE_IDX 1 4025fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_14 0x0166 4026fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_14_BASE_IDX 1 4027fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_14 0x0167 4028fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_14_BASE_IDX 1 4029fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_14 0x0168 4030fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_14_BASE_IDX 1 4031fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_15 0x0169 4032fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_15_BASE_IDX 1 4033fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_15 0x016a 4034fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_15_BASE_IDX 1 4035fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_15 0x016b 4036fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_15_BASE_IDX 1 4037fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_15 0x016c 4038fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_15_BASE_IDX 1 4039fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_15 0x016d 4040fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_15_BASE_IDX 1 4041fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_15 0x016e 4042fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_15_BASE_IDX 1 4043fb4d8502Sjsg #define mmPA_CL_UCP_0_X 0x016f 4044fb4d8502Sjsg #define mmPA_CL_UCP_0_X_BASE_IDX 1 4045fb4d8502Sjsg #define mmPA_CL_UCP_0_Y 0x0170 4046fb4d8502Sjsg #define mmPA_CL_UCP_0_Y_BASE_IDX 1 4047fb4d8502Sjsg #define mmPA_CL_UCP_0_Z 0x0171 4048fb4d8502Sjsg #define mmPA_CL_UCP_0_Z_BASE_IDX 1 4049fb4d8502Sjsg #define mmPA_CL_UCP_0_W 0x0172 4050fb4d8502Sjsg #define mmPA_CL_UCP_0_W_BASE_IDX 1 4051fb4d8502Sjsg #define mmPA_CL_UCP_1_X 0x0173 4052fb4d8502Sjsg #define mmPA_CL_UCP_1_X_BASE_IDX 1 4053fb4d8502Sjsg #define mmPA_CL_UCP_1_Y 0x0174 4054fb4d8502Sjsg #define mmPA_CL_UCP_1_Y_BASE_IDX 1 4055fb4d8502Sjsg #define mmPA_CL_UCP_1_Z 0x0175 4056fb4d8502Sjsg #define mmPA_CL_UCP_1_Z_BASE_IDX 1 4057fb4d8502Sjsg #define mmPA_CL_UCP_1_W 0x0176 4058fb4d8502Sjsg #define mmPA_CL_UCP_1_W_BASE_IDX 1 4059fb4d8502Sjsg #define mmPA_CL_UCP_2_X 0x0177 4060fb4d8502Sjsg #define mmPA_CL_UCP_2_X_BASE_IDX 1 4061fb4d8502Sjsg #define mmPA_CL_UCP_2_Y 0x0178 4062fb4d8502Sjsg #define mmPA_CL_UCP_2_Y_BASE_IDX 1 4063fb4d8502Sjsg #define mmPA_CL_UCP_2_Z 0x0179 4064fb4d8502Sjsg #define mmPA_CL_UCP_2_Z_BASE_IDX 1 4065fb4d8502Sjsg #define mmPA_CL_UCP_2_W 0x017a 4066fb4d8502Sjsg #define mmPA_CL_UCP_2_W_BASE_IDX 1 4067fb4d8502Sjsg #define mmPA_CL_UCP_3_X 0x017b 4068fb4d8502Sjsg #define mmPA_CL_UCP_3_X_BASE_IDX 1 4069fb4d8502Sjsg #define mmPA_CL_UCP_3_Y 0x017c 4070fb4d8502Sjsg #define mmPA_CL_UCP_3_Y_BASE_IDX 1 4071fb4d8502Sjsg #define mmPA_CL_UCP_3_Z 0x017d 4072fb4d8502Sjsg #define mmPA_CL_UCP_3_Z_BASE_IDX 1 4073fb4d8502Sjsg #define mmPA_CL_UCP_3_W 0x017e 4074fb4d8502Sjsg #define mmPA_CL_UCP_3_W_BASE_IDX 1 4075fb4d8502Sjsg #define mmPA_CL_UCP_4_X 0x017f 4076fb4d8502Sjsg #define mmPA_CL_UCP_4_X_BASE_IDX 1 4077fb4d8502Sjsg #define mmPA_CL_UCP_4_Y 0x0180 4078fb4d8502Sjsg #define mmPA_CL_UCP_4_Y_BASE_IDX 1 4079fb4d8502Sjsg #define mmPA_CL_UCP_4_Z 0x0181 4080fb4d8502Sjsg #define mmPA_CL_UCP_4_Z_BASE_IDX 1 4081fb4d8502Sjsg #define mmPA_CL_UCP_4_W 0x0182 4082fb4d8502Sjsg #define mmPA_CL_UCP_4_W_BASE_IDX 1 4083fb4d8502Sjsg #define mmPA_CL_UCP_5_X 0x0183 4084fb4d8502Sjsg #define mmPA_CL_UCP_5_X_BASE_IDX 1 4085fb4d8502Sjsg #define mmPA_CL_UCP_5_Y 0x0184 4086fb4d8502Sjsg #define mmPA_CL_UCP_5_Y_BASE_IDX 1 4087fb4d8502Sjsg #define mmPA_CL_UCP_5_Z 0x0185 4088fb4d8502Sjsg #define mmPA_CL_UCP_5_Z_BASE_IDX 1 4089fb4d8502Sjsg #define mmPA_CL_UCP_5_W 0x0186 4090fb4d8502Sjsg #define mmPA_CL_UCP_5_W_BASE_IDX 1 4091fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_0 0x0191 4092fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_0_BASE_IDX 1 4093fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_1 0x0192 4094fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_1_BASE_IDX 1 4095fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_2 0x0193 4096fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_2_BASE_IDX 1 4097fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_3 0x0194 4098fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_3_BASE_IDX 1 4099fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_4 0x0195 4100fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_4_BASE_IDX 1 4101fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_5 0x0196 4102fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_5_BASE_IDX 1 4103fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_6 0x0197 4104fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_6_BASE_IDX 1 4105fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_7 0x0198 4106fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_7_BASE_IDX 1 4107fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_8 0x0199 4108fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_8_BASE_IDX 1 4109fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_9 0x019a 4110fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_9_BASE_IDX 1 4111fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_10 0x019b 4112fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_10_BASE_IDX 1 4113fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_11 0x019c 4114fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_11_BASE_IDX 1 4115fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_12 0x019d 4116fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_12_BASE_IDX 1 4117fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_13 0x019e 4118fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_13_BASE_IDX 1 4119fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_14 0x019f 4120fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_14_BASE_IDX 1 4121fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_15 0x01a0 4122fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_15_BASE_IDX 1 4123fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_16 0x01a1 4124fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_16_BASE_IDX 1 4125fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_17 0x01a2 4126fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_17_BASE_IDX 1 4127fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_18 0x01a3 4128fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_18_BASE_IDX 1 4129fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_19 0x01a4 4130fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_19_BASE_IDX 1 4131fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_20 0x01a5 4132fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_20_BASE_IDX 1 4133fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_21 0x01a6 4134fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_21_BASE_IDX 1 4135fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_22 0x01a7 4136fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_22_BASE_IDX 1 4137fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_23 0x01a8 4138fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_23_BASE_IDX 1 4139fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_24 0x01a9 4140fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_24_BASE_IDX 1 4141fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_25 0x01aa 4142fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_25_BASE_IDX 1 4143fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_26 0x01ab 4144fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_26_BASE_IDX 1 4145fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_27 0x01ac 4146fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_27_BASE_IDX 1 4147fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_28 0x01ad 4148fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_28_BASE_IDX 1 4149fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_29 0x01ae 4150fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_29_BASE_IDX 1 4151fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_30 0x01af 4152fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_30_BASE_IDX 1 4153fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_31 0x01b0 4154fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_31_BASE_IDX 1 4155fb4d8502Sjsg #define mmSPI_VS_OUT_CONFIG 0x01b1 4156fb4d8502Sjsg #define mmSPI_VS_OUT_CONFIG_BASE_IDX 1 4157fb4d8502Sjsg #define mmSPI_PS_INPUT_ENA 0x01b3 4158fb4d8502Sjsg #define mmSPI_PS_INPUT_ENA_BASE_IDX 1 4159fb4d8502Sjsg #define mmSPI_PS_INPUT_ADDR 0x01b4 4160fb4d8502Sjsg #define mmSPI_PS_INPUT_ADDR_BASE_IDX 1 4161fb4d8502Sjsg #define mmSPI_INTERP_CONTROL_0 0x01b5 4162fb4d8502Sjsg #define mmSPI_INTERP_CONTROL_0_BASE_IDX 1 4163fb4d8502Sjsg #define mmSPI_PS_IN_CONTROL 0x01b6 4164fb4d8502Sjsg #define mmSPI_PS_IN_CONTROL_BASE_IDX 1 4165fb4d8502Sjsg #define mmSPI_BARYC_CNTL 0x01b8 4166fb4d8502Sjsg #define mmSPI_BARYC_CNTL_BASE_IDX 1 4167fb4d8502Sjsg #define mmSPI_TMPRING_SIZE 0x01ba 4168fb4d8502Sjsg #define mmSPI_TMPRING_SIZE_BASE_IDX 1 4169fb4d8502Sjsg #define mmSPI_SHADER_POS_FORMAT 0x01c3 4170fb4d8502Sjsg #define mmSPI_SHADER_POS_FORMAT_BASE_IDX 1 4171fb4d8502Sjsg #define mmSPI_SHADER_Z_FORMAT 0x01c4 4172fb4d8502Sjsg #define mmSPI_SHADER_Z_FORMAT_BASE_IDX 1 4173fb4d8502Sjsg #define mmSPI_SHADER_COL_FORMAT 0x01c5 4174fb4d8502Sjsg #define mmSPI_SHADER_COL_FORMAT_BASE_IDX 1 4175fb4d8502Sjsg #define mmSX_PS_DOWNCONVERT 0x01d5 4176fb4d8502Sjsg #define mmSX_PS_DOWNCONVERT_BASE_IDX 1 4177fb4d8502Sjsg #define mmSX_BLEND_OPT_EPSILON 0x01d6 4178fb4d8502Sjsg #define mmSX_BLEND_OPT_EPSILON_BASE_IDX 1 4179fb4d8502Sjsg #define mmSX_BLEND_OPT_CONTROL 0x01d7 4180fb4d8502Sjsg #define mmSX_BLEND_OPT_CONTROL_BASE_IDX 1 4181fb4d8502Sjsg #define mmSX_MRT0_BLEND_OPT 0x01d8 4182fb4d8502Sjsg #define mmSX_MRT0_BLEND_OPT_BASE_IDX 1 4183fb4d8502Sjsg #define mmSX_MRT1_BLEND_OPT 0x01d9 4184fb4d8502Sjsg #define mmSX_MRT1_BLEND_OPT_BASE_IDX 1 4185fb4d8502Sjsg #define mmSX_MRT2_BLEND_OPT 0x01da 4186fb4d8502Sjsg #define mmSX_MRT2_BLEND_OPT_BASE_IDX 1 4187fb4d8502Sjsg #define mmSX_MRT3_BLEND_OPT 0x01db 4188fb4d8502Sjsg #define mmSX_MRT3_BLEND_OPT_BASE_IDX 1 4189fb4d8502Sjsg #define mmSX_MRT4_BLEND_OPT 0x01dc 4190fb4d8502Sjsg #define mmSX_MRT4_BLEND_OPT_BASE_IDX 1 4191fb4d8502Sjsg #define mmSX_MRT5_BLEND_OPT 0x01dd 4192fb4d8502Sjsg #define mmSX_MRT5_BLEND_OPT_BASE_IDX 1 4193fb4d8502Sjsg #define mmSX_MRT6_BLEND_OPT 0x01de 4194fb4d8502Sjsg #define mmSX_MRT6_BLEND_OPT_BASE_IDX 1 4195fb4d8502Sjsg #define mmSX_MRT7_BLEND_OPT 0x01df 4196fb4d8502Sjsg #define mmSX_MRT7_BLEND_OPT_BASE_IDX 1 4197fb4d8502Sjsg #define mmCB_BLEND0_CONTROL 0x01e0 4198fb4d8502Sjsg #define mmCB_BLEND0_CONTROL_BASE_IDX 1 4199fb4d8502Sjsg #define mmCB_BLEND1_CONTROL 0x01e1 4200fb4d8502Sjsg #define mmCB_BLEND1_CONTROL_BASE_IDX 1 4201fb4d8502Sjsg #define mmCB_BLEND2_CONTROL 0x01e2 4202fb4d8502Sjsg #define mmCB_BLEND2_CONTROL_BASE_IDX 1 4203fb4d8502Sjsg #define mmCB_BLEND3_CONTROL 0x01e3 4204fb4d8502Sjsg #define mmCB_BLEND3_CONTROL_BASE_IDX 1 4205fb4d8502Sjsg #define mmCB_BLEND4_CONTROL 0x01e4 4206fb4d8502Sjsg #define mmCB_BLEND4_CONTROL_BASE_IDX 1 4207fb4d8502Sjsg #define mmCB_BLEND5_CONTROL 0x01e5 4208fb4d8502Sjsg #define mmCB_BLEND5_CONTROL_BASE_IDX 1 4209fb4d8502Sjsg #define mmCB_BLEND6_CONTROL 0x01e6 4210fb4d8502Sjsg #define mmCB_BLEND6_CONTROL_BASE_IDX 1 4211fb4d8502Sjsg #define mmCB_BLEND7_CONTROL 0x01e7 4212fb4d8502Sjsg #define mmCB_BLEND7_CONTROL_BASE_IDX 1 4213fb4d8502Sjsg #define mmCB_MRT0_EPITCH 0x01e8 4214fb4d8502Sjsg #define mmCB_MRT0_EPITCH_BASE_IDX 1 4215fb4d8502Sjsg #define mmCB_MRT1_EPITCH 0x01e9 4216fb4d8502Sjsg #define mmCB_MRT1_EPITCH_BASE_IDX 1 4217fb4d8502Sjsg #define mmCB_MRT2_EPITCH 0x01ea 4218fb4d8502Sjsg #define mmCB_MRT2_EPITCH_BASE_IDX 1 4219fb4d8502Sjsg #define mmCB_MRT3_EPITCH 0x01eb 4220fb4d8502Sjsg #define mmCB_MRT3_EPITCH_BASE_IDX 1 4221fb4d8502Sjsg #define mmCB_MRT4_EPITCH 0x01ec 4222fb4d8502Sjsg #define mmCB_MRT4_EPITCH_BASE_IDX 1 4223fb4d8502Sjsg #define mmCB_MRT5_EPITCH 0x01ed 4224fb4d8502Sjsg #define mmCB_MRT5_EPITCH_BASE_IDX 1 4225fb4d8502Sjsg #define mmCB_MRT6_EPITCH 0x01ee 4226fb4d8502Sjsg #define mmCB_MRT6_EPITCH_BASE_IDX 1 4227fb4d8502Sjsg #define mmCB_MRT7_EPITCH 0x01ef 4228fb4d8502Sjsg #define mmCB_MRT7_EPITCH_BASE_IDX 1 4229fb4d8502Sjsg #define mmCS_COPY_STATE 0x01f3 4230fb4d8502Sjsg #define mmCS_COPY_STATE_BASE_IDX 1 4231fb4d8502Sjsg #define mmGFX_COPY_STATE 0x01f4 4232fb4d8502Sjsg #define mmGFX_COPY_STATE_BASE_IDX 1 4233fb4d8502Sjsg #define mmPA_CL_POINT_X_RAD 0x01f5 4234fb4d8502Sjsg #define mmPA_CL_POINT_X_RAD_BASE_IDX 1 4235fb4d8502Sjsg #define mmPA_CL_POINT_Y_RAD 0x01f6 4236fb4d8502Sjsg #define mmPA_CL_POINT_Y_RAD_BASE_IDX 1 4237fb4d8502Sjsg #define mmPA_CL_POINT_SIZE 0x01f7 4238fb4d8502Sjsg #define mmPA_CL_POINT_SIZE_BASE_IDX 1 4239fb4d8502Sjsg #define mmPA_CL_POINT_CULL_RAD 0x01f8 4240fb4d8502Sjsg #define mmPA_CL_POINT_CULL_RAD_BASE_IDX 1 4241fb4d8502Sjsg #define mmVGT_DMA_BASE_HI 0x01f9 4242fb4d8502Sjsg #define mmVGT_DMA_BASE_HI_BASE_IDX 1 4243fb4d8502Sjsg #define mmVGT_DMA_BASE 0x01fa 4244fb4d8502Sjsg #define mmVGT_DMA_BASE_BASE_IDX 1 4245fb4d8502Sjsg #define mmVGT_DRAW_INITIATOR 0x01fc 4246fb4d8502Sjsg #define mmVGT_DRAW_INITIATOR_BASE_IDX 1 4247fb4d8502Sjsg #define mmVGT_IMMED_DATA 0x01fd 4248fb4d8502Sjsg #define mmVGT_IMMED_DATA_BASE_IDX 1 4249fb4d8502Sjsg #define mmVGT_EVENT_ADDRESS_REG 0x01fe 4250fb4d8502Sjsg #define mmVGT_EVENT_ADDRESS_REG_BASE_IDX 1 4251fb4d8502Sjsg #define mmDB_DEPTH_CONTROL 0x0200 4252fb4d8502Sjsg #define mmDB_DEPTH_CONTROL_BASE_IDX 1 4253fb4d8502Sjsg #define mmDB_EQAA 0x0201 4254fb4d8502Sjsg #define mmDB_EQAA_BASE_IDX 1 4255fb4d8502Sjsg #define mmCB_COLOR_CONTROL 0x0202 4256fb4d8502Sjsg #define mmCB_COLOR_CONTROL_BASE_IDX 1 4257fb4d8502Sjsg #define mmDB_SHADER_CONTROL 0x0203 4258fb4d8502Sjsg #define mmDB_SHADER_CONTROL_BASE_IDX 1 4259fb4d8502Sjsg #define mmPA_CL_CLIP_CNTL 0x0204 4260fb4d8502Sjsg #define mmPA_CL_CLIP_CNTL_BASE_IDX 1 4261fb4d8502Sjsg #define mmPA_SU_SC_MODE_CNTL 0x0205 4262fb4d8502Sjsg #define mmPA_SU_SC_MODE_CNTL_BASE_IDX 1 4263fb4d8502Sjsg #define mmPA_CL_VTE_CNTL 0x0206 4264fb4d8502Sjsg #define mmPA_CL_VTE_CNTL_BASE_IDX 1 4265fb4d8502Sjsg #define mmPA_CL_VS_OUT_CNTL 0x0207 4266fb4d8502Sjsg #define mmPA_CL_VS_OUT_CNTL_BASE_IDX 1 4267fb4d8502Sjsg #define mmPA_CL_NANINF_CNTL 0x0208 4268fb4d8502Sjsg #define mmPA_CL_NANINF_CNTL_BASE_IDX 1 4269fb4d8502Sjsg #define mmPA_SU_LINE_STIPPLE_CNTL 0x0209 4270fb4d8502Sjsg #define mmPA_SU_LINE_STIPPLE_CNTL_BASE_IDX 1 4271fb4d8502Sjsg #define mmPA_SU_LINE_STIPPLE_SCALE 0x020a 4272fb4d8502Sjsg #define mmPA_SU_LINE_STIPPLE_SCALE_BASE_IDX 1 4273fb4d8502Sjsg #define mmPA_SU_PRIM_FILTER_CNTL 0x020b 4274fb4d8502Sjsg #define mmPA_SU_PRIM_FILTER_CNTL_BASE_IDX 1 4275fb4d8502Sjsg #define mmPA_SU_SMALL_PRIM_FILTER_CNTL 0x020c 4276fb4d8502Sjsg #define mmPA_SU_SMALL_PRIM_FILTER_CNTL_BASE_IDX 1 4277fb4d8502Sjsg #define mmPA_CL_OBJPRIM_ID_CNTL 0x020d 4278fb4d8502Sjsg #define mmPA_CL_OBJPRIM_ID_CNTL_BASE_IDX 1 4279fb4d8502Sjsg #define mmPA_CL_NGG_CNTL 0x020e 4280fb4d8502Sjsg #define mmPA_CL_NGG_CNTL_BASE_IDX 1 4281fb4d8502Sjsg #define mmPA_SU_OVER_RASTERIZATION_CNTL 0x020f 4282fb4d8502Sjsg #define mmPA_SU_OVER_RASTERIZATION_CNTL_BASE_IDX 1 4283fb4d8502Sjsg #define mmPA_SU_POINT_SIZE 0x0280 4284fb4d8502Sjsg #define mmPA_SU_POINT_SIZE_BASE_IDX 1 4285fb4d8502Sjsg #define mmPA_SU_POINT_MINMAX 0x0281 4286fb4d8502Sjsg #define mmPA_SU_POINT_MINMAX_BASE_IDX 1 4287fb4d8502Sjsg #define mmPA_SU_LINE_CNTL 0x0282 4288fb4d8502Sjsg #define mmPA_SU_LINE_CNTL_BASE_IDX 1 4289fb4d8502Sjsg #define mmPA_SC_LINE_STIPPLE 0x0283 4290fb4d8502Sjsg #define mmPA_SC_LINE_STIPPLE_BASE_IDX 1 4291fb4d8502Sjsg #define mmVGT_OUTPUT_PATH_CNTL 0x0284 4292fb4d8502Sjsg #define mmVGT_OUTPUT_PATH_CNTL_BASE_IDX 1 4293fb4d8502Sjsg #define mmVGT_HOS_CNTL 0x0285 4294fb4d8502Sjsg #define mmVGT_HOS_CNTL_BASE_IDX 1 4295fb4d8502Sjsg #define mmVGT_HOS_MAX_TESS_LEVEL 0x0286 4296fb4d8502Sjsg #define mmVGT_HOS_MAX_TESS_LEVEL_BASE_IDX 1 4297fb4d8502Sjsg #define mmVGT_HOS_MIN_TESS_LEVEL 0x0287 4298fb4d8502Sjsg #define mmVGT_HOS_MIN_TESS_LEVEL_BASE_IDX 1 4299fb4d8502Sjsg #define mmVGT_HOS_REUSE_DEPTH 0x0288 4300fb4d8502Sjsg #define mmVGT_HOS_REUSE_DEPTH_BASE_IDX 1 4301fb4d8502Sjsg #define mmVGT_GROUP_PRIM_TYPE 0x0289 4302fb4d8502Sjsg #define mmVGT_GROUP_PRIM_TYPE_BASE_IDX 1 4303fb4d8502Sjsg #define mmVGT_GROUP_FIRST_DECR 0x028a 4304fb4d8502Sjsg #define mmVGT_GROUP_FIRST_DECR_BASE_IDX 1 4305fb4d8502Sjsg #define mmVGT_GROUP_DECR 0x028b 4306fb4d8502Sjsg #define mmVGT_GROUP_DECR_BASE_IDX 1 4307fb4d8502Sjsg #define mmVGT_GROUP_VECT_0_CNTL 0x028c 4308fb4d8502Sjsg #define mmVGT_GROUP_VECT_0_CNTL_BASE_IDX 1 4309fb4d8502Sjsg #define mmVGT_GROUP_VECT_1_CNTL 0x028d 4310fb4d8502Sjsg #define mmVGT_GROUP_VECT_1_CNTL_BASE_IDX 1 4311fb4d8502Sjsg #define mmVGT_GROUP_VECT_0_FMT_CNTL 0x028e 4312fb4d8502Sjsg #define mmVGT_GROUP_VECT_0_FMT_CNTL_BASE_IDX 1 4313fb4d8502Sjsg #define mmVGT_GROUP_VECT_1_FMT_CNTL 0x028f 4314fb4d8502Sjsg #define mmVGT_GROUP_VECT_1_FMT_CNTL_BASE_IDX 1 4315fb4d8502Sjsg #define mmVGT_GS_MODE 0x0290 4316fb4d8502Sjsg #define mmVGT_GS_MODE_BASE_IDX 1 4317fb4d8502Sjsg #define mmVGT_GS_ONCHIP_CNTL 0x0291 4318fb4d8502Sjsg #define mmVGT_GS_ONCHIP_CNTL_BASE_IDX 1 4319fb4d8502Sjsg #define mmPA_SC_MODE_CNTL_0 0x0292 4320fb4d8502Sjsg #define mmPA_SC_MODE_CNTL_0_BASE_IDX 1 4321fb4d8502Sjsg #define mmPA_SC_MODE_CNTL_1 0x0293 4322fb4d8502Sjsg #define mmPA_SC_MODE_CNTL_1_BASE_IDX 1 4323fb4d8502Sjsg #define mmVGT_ENHANCE 0x0294 4324fb4d8502Sjsg #define mmVGT_ENHANCE_BASE_IDX 1 4325fb4d8502Sjsg #define mmVGT_GS_PER_ES 0x0295 4326fb4d8502Sjsg #define mmVGT_GS_PER_ES_BASE_IDX 1 4327fb4d8502Sjsg #define mmVGT_ES_PER_GS 0x0296 4328fb4d8502Sjsg #define mmVGT_ES_PER_GS_BASE_IDX 1 4329fb4d8502Sjsg #define mmVGT_GS_PER_VS 0x0297 4330fb4d8502Sjsg #define mmVGT_GS_PER_VS_BASE_IDX 1 4331fb4d8502Sjsg #define mmVGT_GSVS_RING_OFFSET_1 0x0298 4332fb4d8502Sjsg #define mmVGT_GSVS_RING_OFFSET_1_BASE_IDX 1 4333fb4d8502Sjsg #define mmVGT_GSVS_RING_OFFSET_2 0x0299 4334fb4d8502Sjsg #define mmVGT_GSVS_RING_OFFSET_2_BASE_IDX 1 4335fb4d8502Sjsg #define mmVGT_GSVS_RING_OFFSET_3 0x029a 4336fb4d8502Sjsg #define mmVGT_GSVS_RING_OFFSET_3_BASE_IDX 1 4337fb4d8502Sjsg #define mmVGT_GS_OUT_PRIM_TYPE 0x029b 4338fb4d8502Sjsg #define mmVGT_GS_OUT_PRIM_TYPE_BASE_IDX 1 4339fb4d8502Sjsg #define mmIA_ENHANCE 0x029c 4340fb4d8502Sjsg #define mmIA_ENHANCE_BASE_IDX 1 4341fb4d8502Sjsg #define mmVGT_DMA_SIZE 0x029d 4342fb4d8502Sjsg #define mmVGT_DMA_SIZE_BASE_IDX 1 4343fb4d8502Sjsg #define mmVGT_DMA_MAX_SIZE 0x029e 4344fb4d8502Sjsg #define mmVGT_DMA_MAX_SIZE_BASE_IDX 1 4345fb4d8502Sjsg #define mmVGT_DMA_INDEX_TYPE 0x029f 4346fb4d8502Sjsg #define mmVGT_DMA_INDEX_TYPE_BASE_IDX 1 4347fb4d8502Sjsg #define mmWD_ENHANCE 0x02a0 4348fb4d8502Sjsg #define mmWD_ENHANCE_BASE_IDX 1 4349fb4d8502Sjsg #define mmVGT_PRIMITIVEID_EN 0x02a1 4350fb4d8502Sjsg #define mmVGT_PRIMITIVEID_EN_BASE_IDX 1 4351fb4d8502Sjsg #define mmVGT_DMA_NUM_INSTANCES 0x02a2 4352fb4d8502Sjsg #define mmVGT_DMA_NUM_INSTANCES_BASE_IDX 1 4353fb4d8502Sjsg #define mmVGT_PRIMITIVEID_RESET 0x02a3 4354fb4d8502Sjsg #define mmVGT_PRIMITIVEID_RESET_BASE_IDX 1 4355fb4d8502Sjsg #define mmVGT_EVENT_INITIATOR 0x02a4 4356fb4d8502Sjsg #define mmVGT_EVENT_INITIATOR_BASE_IDX 1 4357fb4d8502Sjsg #define mmVGT_GS_MAX_PRIMS_PER_SUBGROUP 0x02a5 4358fb4d8502Sjsg #define mmVGT_GS_MAX_PRIMS_PER_SUBGROUP_BASE_IDX 1 4359fb4d8502Sjsg #define mmVGT_DRAW_PAYLOAD_CNTL 0x02a6 4360fb4d8502Sjsg #define mmVGT_DRAW_PAYLOAD_CNTL_BASE_IDX 1 4361fb4d8502Sjsg #define mmVGT_INSTANCE_STEP_RATE_0 0x02a8 4362fb4d8502Sjsg #define mmVGT_INSTANCE_STEP_RATE_0_BASE_IDX 1 4363fb4d8502Sjsg #define mmVGT_INSTANCE_STEP_RATE_1 0x02a9 4364fb4d8502Sjsg #define mmVGT_INSTANCE_STEP_RATE_1_BASE_IDX 1 4365fb4d8502Sjsg #define mmVGT_ESGS_RING_ITEMSIZE 0x02ab 4366fb4d8502Sjsg #define mmVGT_ESGS_RING_ITEMSIZE_BASE_IDX 1 4367fb4d8502Sjsg #define mmVGT_GSVS_RING_ITEMSIZE 0x02ac 4368fb4d8502Sjsg #define mmVGT_GSVS_RING_ITEMSIZE_BASE_IDX 1 4369fb4d8502Sjsg #define mmVGT_REUSE_OFF 0x02ad 4370fb4d8502Sjsg #define mmVGT_REUSE_OFF_BASE_IDX 1 4371fb4d8502Sjsg #define mmVGT_VTX_CNT_EN 0x02ae 4372fb4d8502Sjsg #define mmVGT_VTX_CNT_EN_BASE_IDX 1 4373fb4d8502Sjsg #define mmDB_HTILE_SURFACE 0x02af 4374fb4d8502Sjsg #define mmDB_HTILE_SURFACE_BASE_IDX 1 4375fb4d8502Sjsg #define mmDB_SRESULTS_COMPARE_STATE0 0x02b0 4376fb4d8502Sjsg #define mmDB_SRESULTS_COMPARE_STATE0_BASE_IDX 1 4377fb4d8502Sjsg #define mmDB_SRESULTS_COMPARE_STATE1 0x02b1 4378fb4d8502Sjsg #define mmDB_SRESULTS_COMPARE_STATE1_BASE_IDX 1 4379fb4d8502Sjsg #define mmDB_PRELOAD_CONTROL 0x02b2 4380fb4d8502Sjsg #define mmDB_PRELOAD_CONTROL_BASE_IDX 1 4381fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_SIZE_0 0x02b4 4382fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_SIZE_0_BASE_IDX 1 4383fb4d8502Sjsg #define mmVGT_STRMOUT_VTX_STRIDE_0 0x02b5 4384fb4d8502Sjsg #define mmVGT_STRMOUT_VTX_STRIDE_0_BASE_IDX 1 4385fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_OFFSET_0 0x02b7 4386fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_OFFSET_0_BASE_IDX 1 4387fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_SIZE_1 0x02b8 4388fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_SIZE_1_BASE_IDX 1 4389fb4d8502Sjsg #define mmVGT_STRMOUT_VTX_STRIDE_1 0x02b9 4390fb4d8502Sjsg #define mmVGT_STRMOUT_VTX_STRIDE_1_BASE_IDX 1 4391fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_OFFSET_1 0x02bb 4392fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_OFFSET_1_BASE_IDX 1 4393fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_SIZE_2 0x02bc 4394fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_SIZE_2_BASE_IDX 1 4395fb4d8502Sjsg #define mmVGT_STRMOUT_VTX_STRIDE_2 0x02bd 4396fb4d8502Sjsg #define mmVGT_STRMOUT_VTX_STRIDE_2_BASE_IDX 1 4397fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_OFFSET_2 0x02bf 4398fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_OFFSET_2_BASE_IDX 1 4399fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_SIZE_3 0x02c0 4400fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_SIZE_3_BASE_IDX 1 4401fb4d8502Sjsg #define mmVGT_STRMOUT_VTX_STRIDE_3 0x02c1 4402fb4d8502Sjsg #define mmVGT_STRMOUT_VTX_STRIDE_3_BASE_IDX 1 4403fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_OFFSET_3 0x02c3 4404fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_OFFSET_3_BASE_IDX 1 4405fb4d8502Sjsg #define mmVGT_STRMOUT_DRAW_OPAQUE_OFFSET 0x02ca 4406fb4d8502Sjsg #define mmVGT_STRMOUT_DRAW_OPAQUE_OFFSET_BASE_IDX 1 4407fb4d8502Sjsg #define mmVGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE 0x02cb 4408fb4d8502Sjsg #define mmVGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE_BASE_IDX 1 4409fb4d8502Sjsg #define mmVGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE 0x02cc 4410fb4d8502Sjsg #define mmVGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE_BASE_IDX 1 4411fb4d8502Sjsg #define mmVGT_GS_MAX_VERT_OUT 0x02ce 4412fb4d8502Sjsg #define mmVGT_GS_MAX_VERT_OUT_BASE_IDX 1 4413fb4d8502Sjsg #define mmVGT_TESS_DISTRIBUTION 0x02d4 4414fb4d8502Sjsg #define mmVGT_TESS_DISTRIBUTION_BASE_IDX 1 4415fb4d8502Sjsg #define mmVGT_SHADER_STAGES_EN 0x02d5 4416fb4d8502Sjsg #define mmVGT_SHADER_STAGES_EN_BASE_IDX 1 4417fb4d8502Sjsg #define mmVGT_LS_HS_CONFIG 0x02d6 4418fb4d8502Sjsg #define mmVGT_LS_HS_CONFIG_BASE_IDX 1 4419fb4d8502Sjsg #define mmVGT_GS_VERT_ITEMSIZE 0x02d7 4420fb4d8502Sjsg #define mmVGT_GS_VERT_ITEMSIZE_BASE_IDX 1 4421fb4d8502Sjsg #define mmVGT_GS_VERT_ITEMSIZE_1 0x02d8 4422fb4d8502Sjsg #define mmVGT_GS_VERT_ITEMSIZE_1_BASE_IDX 1 4423fb4d8502Sjsg #define mmVGT_GS_VERT_ITEMSIZE_2 0x02d9 4424fb4d8502Sjsg #define mmVGT_GS_VERT_ITEMSIZE_2_BASE_IDX 1 4425fb4d8502Sjsg #define mmVGT_GS_VERT_ITEMSIZE_3 0x02da 4426fb4d8502Sjsg #define mmVGT_GS_VERT_ITEMSIZE_3_BASE_IDX 1 4427fb4d8502Sjsg #define mmVGT_TF_PARAM 0x02db 4428fb4d8502Sjsg #define mmVGT_TF_PARAM_BASE_IDX 1 4429fb4d8502Sjsg #define mmDB_ALPHA_TO_MASK 0x02dc 4430fb4d8502Sjsg #define mmDB_ALPHA_TO_MASK_BASE_IDX 1 4431fb4d8502Sjsg #define mmVGT_DISPATCH_DRAW_INDEX 0x02dd 4432fb4d8502Sjsg #define mmVGT_DISPATCH_DRAW_INDEX_BASE_IDX 1 4433fb4d8502Sjsg #define mmPA_SU_POLY_OFFSET_DB_FMT_CNTL 0x02de 4434fb4d8502Sjsg #define mmPA_SU_POLY_OFFSET_DB_FMT_CNTL_BASE_IDX 1 4435fb4d8502Sjsg #define mmPA_SU_POLY_OFFSET_CLAMP 0x02df 4436fb4d8502Sjsg #define mmPA_SU_POLY_OFFSET_CLAMP_BASE_IDX 1 4437fb4d8502Sjsg #define mmPA_SU_POLY_OFFSET_FRONT_SCALE 0x02e0 4438fb4d8502Sjsg #define mmPA_SU_POLY_OFFSET_FRONT_SCALE_BASE_IDX 1 4439fb4d8502Sjsg #define mmPA_SU_POLY_OFFSET_FRONT_OFFSET 0x02e1 4440fb4d8502Sjsg #define mmPA_SU_POLY_OFFSET_FRONT_OFFSET_BASE_IDX 1 4441fb4d8502Sjsg #define mmPA_SU_POLY_OFFSET_BACK_SCALE 0x02e2 4442fb4d8502Sjsg #define mmPA_SU_POLY_OFFSET_BACK_SCALE_BASE_IDX 1 4443fb4d8502Sjsg #define mmPA_SU_POLY_OFFSET_BACK_OFFSET 0x02e3 4444fb4d8502Sjsg #define mmPA_SU_POLY_OFFSET_BACK_OFFSET_BASE_IDX 1 4445fb4d8502Sjsg #define mmVGT_GS_INSTANCE_CNT 0x02e4 4446fb4d8502Sjsg #define mmVGT_GS_INSTANCE_CNT_BASE_IDX 1 4447fb4d8502Sjsg #define mmVGT_STRMOUT_CONFIG 0x02e5 4448fb4d8502Sjsg #define mmVGT_STRMOUT_CONFIG_BASE_IDX 1 4449fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_CONFIG 0x02e6 4450fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_CONFIG_BASE_IDX 1 4451fb4d8502Sjsg #define mmVGT_DMA_EVENT_INITIATOR 0x02e7 4452fb4d8502Sjsg #define mmVGT_DMA_EVENT_INITIATOR_BASE_IDX 1 4453fb4d8502Sjsg #define mmPA_SC_CENTROID_PRIORITY_0 0x02f5 4454fb4d8502Sjsg #define mmPA_SC_CENTROID_PRIORITY_0_BASE_IDX 1 4455fb4d8502Sjsg #define mmPA_SC_CENTROID_PRIORITY_1 0x02f6 4456fb4d8502Sjsg #define mmPA_SC_CENTROID_PRIORITY_1_BASE_IDX 1 4457fb4d8502Sjsg #define mmPA_SC_LINE_CNTL 0x02f7 4458fb4d8502Sjsg #define mmPA_SC_LINE_CNTL_BASE_IDX 1 4459fb4d8502Sjsg #define mmPA_SC_AA_CONFIG 0x02f8 4460fb4d8502Sjsg #define mmPA_SC_AA_CONFIG_BASE_IDX 1 4461fb4d8502Sjsg #define mmPA_SU_VTX_CNTL 0x02f9 4462fb4d8502Sjsg #define mmPA_SU_VTX_CNTL_BASE_IDX 1 4463fb4d8502Sjsg #define mmPA_CL_GB_VERT_CLIP_ADJ 0x02fa 4464fb4d8502Sjsg #define mmPA_CL_GB_VERT_CLIP_ADJ_BASE_IDX 1 4465fb4d8502Sjsg #define mmPA_CL_GB_VERT_DISC_ADJ 0x02fb 4466fb4d8502Sjsg #define mmPA_CL_GB_VERT_DISC_ADJ_BASE_IDX 1 4467fb4d8502Sjsg #define mmPA_CL_GB_HORZ_CLIP_ADJ 0x02fc 4468fb4d8502Sjsg #define mmPA_CL_GB_HORZ_CLIP_ADJ_BASE_IDX 1 4469fb4d8502Sjsg #define mmPA_CL_GB_HORZ_DISC_ADJ 0x02fd 4470fb4d8502Sjsg #define mmPA_CL_GB_HORZ_DISC_ADJ_BASE_IDX 1 4471fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 0x02fe 4472fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0_BASE_IDX 1 4473fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1 0x02ff 4474fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1_BASE_IDX 1 4475fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2 0x0300 4476fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2_BASE_IDX 1 4477fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3 0x0301 4478fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3_BASE_IDX 1 4479fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 0x0302 4480fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0_BASE_IDX 1 4481fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1 0x0303 4482fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1_BASE_IDX 1 4483fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2 0x0304 4484fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2_BASE_IDX 1 4485fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3 0x0305 4486fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3_BASE_IDX 1 4487fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 0x0306 4488fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0_BASE_IDX 1 4489fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1 0x0307 4490fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1_BASE_IDX 1 4491fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2 0x0308 4492fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2_BASE_IDX 1 4493fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3 0x0309 4494fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3_BASE_IDX 1 4495fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 0x030a 4496fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0_BASE_IDX 1 4497fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1 0x030b 4498fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1_BASE_IDX 1 4499fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2 0x030c 4500fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2_BASE_IDX 1 4501fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3 0x030d 4502fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3_BASE_IDX 1 4503fb4d8502Sjsg #define mmPA_SC_AA_MASK_X0Y0_X1Y0 0x030e 4504fb4d8502Sjsg #define mmPA_SC_AA_MASK_X0Y0_X1Y0_BASE_IDX 1 4505fb4d8502Sjsg #define mmPA_SC_AA_MASK_X0Y1_X1Y1 0x030f 4506fb4d8502Sjsg #define mmPA_SC_AA_MASK_X0Y1_X1Y1_BASE_IDX 1 4507fb4d8502Sjsg #define mmPA_SC_SHADER_CONTROL 0x0310 4508fb4d8502Sjsg #define mmPA_SC_SHADER_CONTROL_BASE_IDX 1 4509fb4d8502Sjsg #define mmPA_SC_BINNER_CNTL_0 0x0311 4510fb4d8502Sjsg #define mmPA_SC_BINNER_CNTL_0_BASE_IDX 1 4511fb4d8502Sjsg #define mmPA_SC_BINNER_CNTL_1 0x0312 4512fb4d8502Sjsg #define mmPA_SC_BINNER_CNTL_1_BASE_IDX 1 4513fb4d8502Sjsg #define mmPA_SC_CONSERVATIVE_RASTERIZATION_CNTL 0x0313 4514fb4d8502Sjsg #define mmPA_SC_CONSERVATIVE_RASTERIZATION_CNTL_BASE_IDX 1 4515fb4d8502Sjsg #define mmPA_SC_NGG_MODE_CNTL 0x0314 4516fb4d8502Sjsg #define mmPA_SC_NGG_MODE_CNTL_BASE_IDX 1 4517fb4d8502Sjsg #define mmVGT_VERTEX_REUSE_BLOCK_CNTL 0x0316 4518fb4d8502Sjsg #define mmVGT_VERTEX_REUSE_BLOCK_CNTL_BASE_IDX 1 4519fb4d8502Sjsg #define mmVGT_OUT_DEALLOC_CNTL 0x0317 4520fb4d8502Sjsg #define mmVGT_OUT_DEALLOC_CNTL_BASE_IDX 1 4521fb4d8502Sjsg #define mmCB_COLOR0_BASE 0x0318 4522fb4d8502Sjsg #define mmCB_COLOR0_BASE_BASE_IDX 1 4523fb4d8502Sjsg #define mmCB_COLOR0_BASE_EXT 0x0319 4524fb4d8502Sjsg #define mmCB_COLOR0_BASE_EXT_BASE_IDX 1 4525fb4d8502Sjsg #define mmCB_COLOR0_ATTRIB2 0x031a 4526fb4d8502Sjsg #define mmCB_COLOR0_ATTRIB2_BASE_IDX 1 4527fb4d8502Sjsg #define mmCB_COLOR0_VIEW 0x031b 4528fb4d8502Sjsg #define mmCB_COLOR0_VIEW_BASE_IDX 1 4529fb4d8502Sjsg #define mmCB_COLOR0_INFO 0x031c 4530fb4d8502Sjsg #define mmCB_COLOR0_INFO_BASE_IDX 1 4531fb4d8502Sjsg #define mmCB_COLOR0_ATTRIB 0x031d 4532fb4d8502Sjsg #define mmCB_COLOR0_ATTRIB_BASE_IDX 1 4533fb4d8502Sjsg #define mmCB_COLOR0_DCC_CONTROL 0x031e 4534fb4d8502Sjsg #define mmCB_COLOR0_DCC_CONTROL_BASE_IDX 1 4535fb4d8502Sjsg #define mmCB_COLOR0_CMASK 0x031f 4536fb4d8502Sjsg #define mmCB_COLOR0_CMASK_BASE_IDX 1 4537fb4d8502Sjsg #define mmCB_COLOR0_CMASK_BASE_EXT 0x0320 4538fb4d8502Sjsg #define mmCB_COLOR0_CMASK_BASE_EXT_BASE_IDX 1 4539fb4d8502Sjsg #define mmCB_COLOR0_FMASK 0x0321 4540fb4d8502Sjsg #define mmCB_COLOR0_FMASK_BASE_IDX 1 4541fb4d8502Sjsg #define mmCB_COLOR0_FMASK_BASE_EXT 0x0322 4542fb4d8502Sjsg #define mmCB_COLOR0_FMASK_BASE_EXT_BASE_IDX 1 4543fb4d8502Sjsg #define mmCB_COLOR0_CLEAR_WORD0 0x0323 4544fb4d8502Sjsg #define mmCB_COLOR0_CLEAR_WORD0_BASE_IDX 1 4545fb4d8502Sjsg #define mmCB_COLOR0_CLEAR_WORD1 0x0324 4546fb4d8502Sjsg #define mmCB_COLOR0_CLEAR_WORD1_BASE_IDX 1 4547fb4d8502Sjsg #define mmCB_COLOR0_DCC_BASE 0x0325 4548fb4d8502Sjsg #define mmCB_COLOR0_DCC_BASE_BASE_IDX 1 4549fb4d8502Sjsg #define mmCB_COLOR0_DCC_BASE_EXT 0x0326 4550fb4d8502Sjsg #define mmCB_COLOR0_DCC_BASE_EXT_BASE_IDX 1 4551fb4d8502Sjsg #define mmCB_COLOR1_BASE 0x0327 4552fb4d8502Sjsg #define mmCB_COLOR1_BASE_BASE_IDX 1 4553fb4d8502Sjsg #define mmCB_COLOR1_BASE_EXT 0x0328 4554fb4d8502Sjsg #define mmCB_COLOR1_BASE_EXT_BASE_IDX 1 4555fb4d8502Sjsg #define mmCB_COLOR1_ATTRIB2 0x0329 4556fb4d8502Sjsg #define mmCB_COLOR1_ATTRIB2_BASE_IDX 1 4557fb4d8502Sjsg #define mmCB_COLOR1_VIEW 0x032a 4558fb4d8502Sjsg #define mmCB_COLOR1_VIEW_BASE_IDX 1 4559fb4d8502Sjsg #define mmCB_COLOR1_INFO 0x032b 4560fb4d8502Sjsg #define mmCB_COLOR1_INFO_BASE_IDX 1 4561fb4d8502Sjsg #define mmCB_COLOR1_ATTRIB 0x032c 4562fb4d8502Sjsg #define mmCB_COLOR1_ATTRIB_BASE_IDX 1 4563fb4d8502Sjsg #define mmCB_COLOR1_DCC_CONTROL 0x032d 4564fb4d8502Sjsg #define mmCB_COLOR1_DCC_CONTROL_BASE_IDX 1 4565fb4d8502Sjsg #define mmCB_COLOR1_CMASK 0x032e 4566fb4d8502Sjsg #define mmCB_COLOR1_CMASK_BASE_IDX 1 4567fb4d8502Sjsg #define mmCB_COLOR1_CMASK_BASE_EXT 0x032f 4568fb4d8502Sjsg #define mmCB_COLOR1_CMASK_BASE_EXT_BASE_IDX 1 4569fb4d8502Sjsg #define mmCB_COLOR1_FMASK 0x0330 4570fb4d8502Sjsg #define mmCB_COLOR1_FMASK_BASE_IDX 1 4571fb4d8502Sjsg #define mmCB_COLOR1_FMASK_BASE_EXT 0x0331 4572fb4d8502Sjsg #define mmCB_COLOR1_FMASK_BASE_EXT_BASE_IDX 1 4573fb4d8502Sjsg #define mmCB_COLOR1_CLEAR_WORD0 0x0332 4574fb4d8502Sjsg #define mmCB_COLOR1_CLEAR_WORD0_BASE_IDX 1 4575fb4d8502Sjsg #define mmCB_COLOR1_CLEAR_WORD1 0x0333 4576fb4d8502Sjsg #define mmCB_COLOR1_CLEAR_WORD1_BASE_IDX 1 4577fb4d8502Sjsg #define mmCB_COLOR1_DCC_BASE 0x0334 4578fb4d8502Sjsg #define mmCB_COLOR1_DCC_BASE_BASE_IDX 1 4579fb4d8502Sjsg #define mmCB_COLOR1_DCC_BASE_EXT 0x0335 4580fb4d8502Sjsg #define mmCB_COLOR1_DCC_BASE_EXT_BASE_IDX 1 4581fb4d8502Sjsg #define mmCB_COLOR2_BASE 0x0336 4582fb4d8502Sjsg #define mmCB_COLOR2_BASE_BASE_IDX 1 4583fb4d8502Sjsg #define mmCB_COLOR2_BASE_EXT 0x0337 4584fb4d8502Sjsg #define mmCB_COLOR2_BASE_EXT_BASE_IDX 1 4585fb4d8502Sjsg #define mmCB_COLOR2_ATTRIB2 0x0338 4586fb4d8502Sjsg #define mmCB_COLOR2_ATTRIB2_BASE_IDX 1 4587fb4d8502Sjsg #define mmCB_COLOR2_VIEW 0x0339 4588fb4d8502Sjsg #define mmCB_COLOR2_VIEW_BASE_IDX 1 4589fb4d8502Sjsg #define mmCB_COLOR2_INFO 0x033a 4590fb4d8502Sjsg #define mmCB_COLOR2_INFO_BASE_IDX 1 4591fb4d8502Sjsg #define mmCB_COLOR2_ATTRIB 0x033b 4592fb4d8502Sjsg #define mmCB_COLOR2_ATTRIB_BASE_IDX 1 4593fb4d8502Sjsg #define mmCB_COLOR2_DCC_CONTROL 0x033c 4594fb4d8502Sjsg #define mmCB_COLOR2_DCC_CONTROL_BASE_IDX 1 4595fb4d8502Sjsg #define mmCB_COLOR2_CMASK 0x033d 4596fb4d8502Sjsg #define mmCB_COLOR2_CMASK_BASE_IDX 1 4597fb4d8502Sjsg #define mmCB_COLOR2_CMASK_BASE_EXT 0x033e 4598fb4d8502Sjsg #define mmCB_COLOR2_CMASK_BASE_EXT_BASE_IDX 1 4599fb4d8502Sjsg #define mmCB_COLOR2_FMASK 0x033f 4600fb4d8502Sjsg #define mmCB_COLOR2_FMASK_BASE_IDX 1 4601fb4d8502Sjsg #define mmCB_COLOR2_FMASK_BASE_EXT 0x0340 4602fb4d8502Sjsg #define mmCB_COLOR2_FMASK_BASE_EXT_BASE_IDX 1 4603fb4d8502Sjsg #define mmCB_COLOR2_CLEAR_WORD0 0x0341 4604fb4d8502Sjsg #define mmCB_COLOR2_CLEAR_WORD0_BASE_IDX 1 4605fb4d8502Sjsg #define mmCB_COLOR2_CLEAR_WORD1 0x0342 4606fb4d8502Sjsg #define mmCB_COLOR2_CLEAR_WORD1_BASE_IDX 1 4607fb4d8502Sjsg #define mmCB_COLOR2_DCC_BASE 0x0343 4608fb4d8502Sjsg #define mmCB_COLOR2_DCC_BASE_BASE_IDX 1 4609fb4d8502Sjsg #define mmCB_COLOR2_DCC_BASE_EXT 0x0344 4610fb4d8502Sjsg #define mmCB_COLOR2_DCC_BASE_EXT_BASE_IDX 1 4611fb4d8502Sjsg #define mmCB_COLOR3_BASE 0x0345 4612fb4d8502Sjsg #define mmCB_COLOR3_BASE_BASE_IDX 1 4613fb4d8502Sjsg #define mmCB_COLOR3_BASE_EXT 0x0346 4614fb4d8502Sjsg #define mmCB_COLOR3_BASE_EXT_BASE_IDX 1 4615fb4d8502Sjsg #define mmCB_COLOR3_ATTRIB2 0x0347 4616fb4d8502Sjsg #define mmCB_COLOR3_ATTRIB2_BASE_IDX 1 4617fb4d8502Sjsg #define mmCB_COLOR3_VIEW 0x0348 4618fb4d8502Sjsg #define mmCB_COLOR3_VIEW_BASE_IDX 1 4619fb4d8502Sjsg #define mmCB_COLOR3_INFO 0x0349 4620fb4d8502Sjsg #define mmCB_COLOR3_INFO_BASE_IDX 1 4621fb4d8502Sjsg #define mmCB_COLOR3_ATTRIB 0x034a 4622fb4d8502Sjsg #define mmCB_COLOR3_ATTRIB_BASE_IDX 1 4623fb4d8502Sjsg #define mmCB_COLOR3_DCC_CONTROL 0x034b 4624fb4d8502Sjsg #define mmCB_COLOR3_DCC_CONTROL_BASE_IDX 1 4625fb4d8502Sjsg #define mmCB_COLOR3_CMASK 0x034c 4626fb4d8502Sjsg #define mmCB_COLOR3_CMASK_BASE_IDX 1 4627fb4d8502Sjsg #define mmCB_COLOR3_CMASK_BASE_EXT 0x034d 4628fb4d8502Sjsg #define mmCB_COLOR3_CMASK_BASE_EXT_BASE_IDX 1 4629fb4d8502Sjsg #define mmCB_COLOR3_FMASK 0x034e 4630fb4d8502Sjsg #define mmCB_COLOR3_FMASK_BASE_IDX 1 4631fb4d8502Sjsg #define mmCB_COLOR3_FMASK_BASE_EXT 0x034f 4632fb4d8502Sjsg #define mmCB_COLOR3_FMASK_BASE_EXT_BASE_IDX 1 4633fb4d8502Sjsg #define mmCB_COLOR3_CLEAR_WORD0 0x0350 4634fb4d8502Sjsg #define mmCB_COLOR3_CLEAR_WORD0_BASE_IDX 1 4635fb4d8502Sjsg #define mmCB_COLOR3_CLEAR_WORD1 0x0351 4636fb4d8502Sjsg #define mmCB_COLOR3_CLEAR_WORD1_BASE_IDX 1 4637fb4d8502Sjsg #define mmCB_COLOR3_DCC_BASE 0x0352 4638fb4d8502Sjsg #define mmCB_COLOR3_DCC_BASE_BASE_IDX 1 4639fb4d8502Sjsg #define mmCB_COLOR3_DCC_BASE_EXT 0x0353 4640fb4d8502Sjsg #define mmCB_COLOR3_DCC_BASE_EXT_BASE_IDX 1 4641fb4d8502Sjsg #define mmCB_COLOR4_BASE 0x0354 4642fb4d8502Sjsg #define mmCB_COLOR4_BASE_BASE_IDX 1 4643fb4d8502Sjsg #define mmCB_COLOR4_BASE_EXT 0x0355 4644fb4d8502Sjsg #define mmCB_COLOR4_BASE_EXT_BASE_IDX 1 4645fb4d8502Sjsg #define mmCB_COLOR4_ATTRIB2 0x0356 4646fb4d8502Sjsg #define mmCB_COLOR4_ATTRIB2_BASE_IDX 1 4647fb4d8502Sjsg #define mmCB_COLOR4_VIEW 0x0357 4648fb4d8502Sjsg #define mmCB_COLOR4_VIEW_BASE_IDX 1 4649fb4d8502Sjsg #define mmCB_COLOR4_INFO 0x0358 4650fb4d8502Sjsg #define mmCB_COLOR4_INFO_BASE_IDX 1 4651fb4d8502Sjsg #define mmCB_COLOR4_ATTRIB 0x0359 4652fb4d8502Sjsg #define mmCB_COLOR4_ATTRIB_BASE_IDX 1 4653fb4d8502Sjsg #define mmCB_COLOR4_DCC_CONTROL 0x035a 4654fb4d8502Sjsg #define mmCB_COLOR4_DCC_CONTROL_BASE_IDX 1 4655fb4d8502Sjsg #define mmCB_COLOR4_CMASK 0x035b 4656fb4d8502Sjsg #define mmCB_COLOR4_CMASK_BASE_IDX 1 4657fb4d8502Sjsg #define mmCB_COLOR4_CMASK_BASE_EXT 0x035c 4658fb4d8502Sjsg #define mmCB_COLOR4_CMASK_BASE_EXT_BASE_IDX 1 4659fb4d8502Sjsg #define mmCB_COLOR4_FMASK 0x035d 4660fb4d8502Sjsg #define mmCB_COLOR4_FMASK_BASE_IDX 1 4661fb4d8502Sjsg #define mmCB_COLOR4_FMASK_BASE_EXT 0x035e 4662fb4d8502Sjsg #define mmCB_COLOR4_FMASK_BASE_EXT_BASE_IDX 1 4663fb4d8502Sjsg #define mmCB_COLOR4_CLEAR_WORD0 0x035f 4664fb4d8502Sjsg #define mmCB_COLOR4_CLEAR_WORD0_BASE_IDX 1 4665fb4d8502Sjsg #define mmCB_COLOR4_CLEAR_WORD1 0x0360 4666fb4d8502Sjsg #define mmCB_COLOR4_CLEAR_WORD1_BASE_IDX 1 4667fb4d8502Sjsg #define mmCB_COLOR4_DCC_BASE 0x0361 4668fb4d8502Sjsg #define mmCB_COLOR4_DCC_BASE_BASE_IDX 1 4669fb4d8502Sjsg #define mmCB_COLOR4_DCC_BASE_EXT 0x0362 4670fb4d8502Sjsg #define mmCB_COLOR4_DCC_BASE_EXT_BASE_IDX 1 4671fb4d8502Sjsg #define mmCB_COLOR5_BASE 0x0363 4672fb4d8502Sjsg #define mmCB_COLOR5_BASE_BASE_IDX 1 4673fb4d8502Sjsg #define mmCB_COLOR5_BASE_EXT 0x0364 4674fb4d8502Sjsg #define mmCB_COLOR5_BASE_EXT_BASE_IDX 1 4675fb4d8502Sjsg #define mmCB_COLOR5_ATTRIB2 0x0365 4676fb4d8502Sjsg #define mmCB_COLOR5_ATTRIB2_BASE_IDX 1 4677fb4d8502Sjsg #define mmCB_COLOR5_VIEW 0x0366 4678fb4d8502Sjsg #define mmCB_COLOR5_VIEW_BASE_IDX 1 4679fb4d8502Sjsg #define mmCB_COLOR5_INFO 0x0367 4680fb4d8502Sjsg #define mmCB_COLOR5_INFO_BASE_IDX 1 4681fb4d8502Sjsg #define mmCB_COLOR5_ATTRIB 0x0368 4682fb4d8502Sjsg #define mmCB_COLOR5_ATTRIB_BASE_IDX 1 4683fb4d8502Sjsg #define mmCB_COLOR5_DCC_CONTROL 0x0369 4684fb4d8502Sjsg #define mmCB_COLOR5_DCC_CONTROL_BASE_IDX 1 4685fb4d8502Sjsg #define mmCB_COLOR5_CMASK 0x036a 4686fb4d8502Sjsg #define mmCB_COLOR5_CMASK_BASE_IDX 1 4687fb4d8502Sjsg #define mmCB_COLOR5_CMASK_BASE_EXT 0x036b 4688fb4d8502Sjsg #define mmCB_COLOR5_CMASK_BASE_EXT_BASE_IDX 1 4689fb4d8502Sjsg #define mmCB_COLOR5_FMASK 0x036c 4690fb4d8502Sjsg #define mmCB_COLOR5_FMASK_BASE_IDX 1 4691fb4d8502Sjsg #define mmCB_COLOR5_FMASK_BASE_EXT 0x036d 4692fb4d8502Sjsg #define mmCB_COLOR5_FMASK_BASE_EXT_BASE_IDX 1 4693fb4d8502Sjsg #define mmCB_COLOR5_CLEAR_WORD0 0x036e 4694fb4d8502Sjsg #define mmCB_COLOR5_CLEAR_WORD0_BASE_IDX 1 4695fb4d8502Sjsg #define mmCB_COLOR5_CLEAR_WORD1 0x036f 4696fb4d8502Sjsg #define mmCB_COLOR5_CLEAR_WORD1_BASE_IDX 1 4697fb4d8502Sjsg #define mmCB_COLOR5_DCC_BASE 0x0370 4698fb4d8502Sjsg #define mmCB_COLOR5_DCC_BASE_BASE_IDX 1 4699fb4d8502Sjsg #define mmCB_COLOR5_DCC_BASE_EXT 0x0371 4700fb4d8502Sjsg #define mmCB_COLOR5_DCC_BASE_EXT_BASE_IDX 1 4701fb4d8502Sjsg #define mmCB_COLOR6_BASE 0x0372 4702fb4d8502Sjsg #define mmCB_COLOR6_BASE_BASE_IDX 1 4703fb4d8502Sjsg #define mmCB_COLOR6_BASE_EXT 0x0373 4704fb4d8502Sjsg #define mmCB_COLOR6_BASE_EXT_BASE_IDX 1 4705fb4d8502Sjsg #define mmCB_COLOR6_ATTRIB2 0x0374 4706fb4d8502Sjsg #define mmCB_COLOR6_ATTRIB2_BASE_IDX 1 4707fb4d8502Sjsg #define mmCB_COLOR6_VIEW 0x0375 4708fb4d8502Sjsg #define mmCB_COLOR6_VIEW_BASE_IDX 1 4709fb4d8502Sjsg #define mmCB_COLOR6_INFO 0x0376 4710fb4d8502Sjsg #define mmCB_COLOR6_INFO_BASE_IDX 1 4711fb4d8502Sjsg #define mmCB_COLOR6_ATTRIB 0x0377 4712fb4d8502Sjsg #define mmCB_COLOR6_ATTRIB_BASE_IDX 1 4713fb4d8502Sjsg #define mmCB_COLOR6_DCC_CONTROL 0x0378 4714fb4d8502Sjsg #define mmCB_COLOR6_DCC_CONTROL_BASE_IDX 1 4715fb4d8502Sjsg #define mmCB_COLOR6_CMASK 0x0379 4716fb4d8502Sjsg #define mmCB_COLOR6_CMASK_BASE_IDX 1 4717fb4d8502Sjsg #define mmCB_COLOR6_CMASK_BASE_EXT 0x037a 4718fb4d8502Sjsg #define mmCB_COLOR6_CMASK_BASE_EXT_BASE_IDX 1 4719fb4d8502Sjsg #define mmCB_COLOR6_FMASK 0x037b 4720fb4d8502Sjsg #define mmCB_COLOR6_FMASK_BASE_IDX 1 4721fb4d8502Sjsg #define mmCB_COLOR6_FMASK_BASE_EXT 0x037c 4722fb4d8502Sjsg #define mmCB_COLOR6_FMASK_BASE_EXT_BASE_IDX 1 4723fb4d8502Sjsg #define mmCB_COLOR6_CLEAR_WORD0 0x037d 4724fb4d8502Sjsg #define mmCB_COLOR6_CLEAR_WORD0_BASE_IDX 1 4725fb4d8502Sjsg #define mmCB_COLOR6_CLEAR_WORD1 0x037e 4726fb4d8502Sjsg #define mmCB_COLOR6_CLEAR_WORD1_BASE_IDX 1 4727fb4d8502Sjsg #define mmCB_COLOR6_DCC_BASE 0x037f 4728fb4d8502Sjsg #define mmCB_COLOR6_DCC_BASE_BASE_IDX 1 4729fb4d8502Sjsg #define mmCB_COLOR6_DCC_BASE_EXT 0x0380 4730fb4d8502Sjsg #define mmCB_COLOR6_DCC_BASE_EXT_BASE_IDX 1 4731fb4d8502Sjsg #define mmCB_COLOR7_BASE 0x0381 4732fb4d8502Sjsg #define mmCB_COLOR7_BASE_BASE_IDX 1 4733fb4d8502Sjsg #define mmCB_COLOR7_BASE_EXT 0x0382 4734fb4d8502Sjsg #define mmCB_COLOR7_BASE_EXT_BASE_IDX 1 4735fb4d8502Sjsg #define mmCB_COLOR7_ATTRIB2 0x0383 4736fb4d8502Sjsg #define mmCB_COLOR7_ATTRIB2_BASE_IDX 1 4737fb4d8502Sjsg #define mmCB_COLOR7_VIEW 0x0384 4738fb4d8502Sjsg #define mmCB_COLOR7_VIEW_BASE_IDX 1 4739fb4d8502Sjsg #define mmCB_COLOR7_INFO 0x0385 4740fb4d8502Sjsg #define mmCB_COLOR7_INFO_BASE_IDX 1 4741fb4d8502Sjsg #define mmCB_COLOR7_ATTRIB 0x0386 4742fb4d8502Sjsg #define mmCB_COLOR7_ATTRIB_BASE_IDX 1 4743fb4d8502Sjsg #define mmCB_COLOR7_DCC_CONTROL 0x0387 4744fb4d8502Sjsg #define mmCB_COLOR7_DCC_CONTROL_BASE_IDX 1 4745fb4d8502Sjsg #define mmCB_COLOR7_CMASK 0x0388 4746fb4d8502Sjsg #define mmCB_COLOR7_CMASK_BASE_IDX 1 4747fb4d8502Sjsg #define mmCB_COLOR7_CMASK_BASE_EXT 0x0389 4748fb4d8502Sjsg #define mmCB_COLOR7_CMASK_BASE_EXT_BASE_IDX 1 4749fb4d8502Sjsg #define mmCB_COLOR7_FMASK 0x038a 4750fb4d8502Sjsg #define mmCB_COLOR7_FMASK_BASE_IDX 1 4751fb4d8502Sjsg #define mmCB_COLOR7_FMASK_BASE_EXT 0x038b 4752fb4d8502Sjsg #define mmCB_COLOR7_FMASK_BASE_EXT_BASE_IDX 1 4753fb4d8502Sjsg #define mmCB_COLOR7_CLEAR_WORD0 0x038c 4754fb4d8502Sjsg #define mmCB_COLOR7_CLEAR_WORD0_BASE_IDX 1 4755fb4d8502Sjsg #define mmCB_COLOR7_CLEAR_WORD1 0x038d 4756fb4d8502Sjsg #define mmCB_COLOR7_CLEAR_WORD1_BASE_IDX 1 4757fb4d8502Sjsg #define mmCB_COLOR7_DCC_BASE 0x038e 4758fb4d8502Sjsg #define mmCB_COLOR7_DCC_BASE_BASE_IDX 1 4759fb4d8502Sjsg #define mmCB_COLOR7_DCC_BASE_EXT 0x038f 4760fb4d8502Sjsg #define mmCB_COLOR7_DCC_BASE_EXT_BASE_IDX 1 4761fb4d8502Sjsg 4762fb4d8502Sjsg 4763fb4d8502Sjsg // addressBlock: gc_gfxudec 4764fb4d8502Sjsg // base address: 0x30000 4765fb4d8502Sjsg #define mmCP_EOP_DONE_ADDR_LO 0x2000 4766fb4d8502Sjsg #define mmCP_EOP_DONE_ADDR_LO_BASE_IDX 1 4767fb4d8502Sjsg #define mmCP_EOP_DONE_ADDR_HI 0x2001 4768fb4d8502Sjsg #define mmCP_EOP_DONE_ADDR_HI_BASE_IDX 1 4769fb4d8502Sjsg #define mmCP_EOP_DONE_DATA_LO 0x2002 4770fb4d8502Sjsg #define mmCP_EOP_DONE_DATA_LO_BASE_IDX 1 4771fb4d8502Sjsg #define mmCP_EOP_DONE_DATA_HI 0x2003 4772fb4d8502Sjsg #define mmCP_EOP_DONE_DATA_HI_BASE_IDX 1 4773fb4d8502Sjsg #define mmCP_EOP_LAST_FENCE_LO 0x2004 4774fb4d8502Sjsg #define mmCP_EOP_LAST_FENCE_LO_BASE_IDX 1 4775fb4d8502Sjsg #define mmCP_EOP_LAST_FENCE_HI 0x2005 4776fb4d8502Sjsg #define mmCP_EOP_LAST_FENCE_HI_BASE_IDX 1 4777fb4d8502Sjsg #define mmCP_STREAM_OUT_ADDR_LO 0x2006 4778fb4d8502Sjsg #define mmCP_STREAM_OUT_ADDR_LO_BASE_IDX 1 4779fb4d8502Sjsg #define mmCP_STREAM_OUT_ADDR_HI 0x2007 4780fb4d8502Sjsg #define mmCP_STREAM_OUT_ADDR_HI_BASE_IDX 1 4781fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT0_LO 0x2008 4782fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT0_LO_BASE_IDX 1 4783fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT0_HI 0x2009 4784fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT0_HI_BASE_IDX 1 4785fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT0_LO 0x200a 4786fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT0_LO_BASE_IDX 1 4787fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT0_HI 0x200b 4788fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT0_HI_BASE_IDX 1 4789fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT1_LO 0x200c 4790fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT1_LO_BASE_IDX 1 4791fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT1_HI 0x200d 4792fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT1_HI_BASE_IDX 1 4793fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT1_LO 0x200e 4794fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT1_LO_BASE_IDX 1 4795fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT1_HI 0x200f 4796fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT1_HI_BASE_IDX 1 4797fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT2_LO 0x2010 4798fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT2_LO_BASE_IDX 1 4799fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT2_HI 0x2011 4800fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT2_HI_BASE_IDX 1 4801fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT2_LO 0x2012 4802fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT2_LO_BASE_IDX 1 4803fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT2_HI 0x2013 4804fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT2_HI_BASE_IDX 1 4805fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT3_LO 0x2014 4806fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT3_LO_BASE_IDX 1 4807fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT3_HI 0x2015 4808fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT3_HI_BASE_IDX 1 4809fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT3_LO 0x2016 4810fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT3_LO_BASE_IDX 1 4811fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT3_HI 0x2017 4812fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT3_HI_BASE_IDX 1 4813fb4d8502Sjsg #define mmCP_PIPE_STATS_ADDR_LO 0x2018 4814fb4d8502Sjsg #define mmCP_PIPE_STATS_ADDR_LO_BASE_IDX 1 4815fb4d8502Sjsg #define mmCP_PIPE_STATS_ADDR_HI 0x2019 4816fb4d8502Sjsg #define mmCP_PIPE_STATS_ADDR_HI_BASE_IDX 1 4817fb4d8502Sjsg #define mmCP_VGT_IAVERT_COUNT_LO 0x201a 4818fb4d8502Sjsg #define mmCP_VGT_IAVERT_COUNT_LO_BASE_IDX 1 4819fb4d8502Sjsg #define mmCP_VGT_IAVERT_COUNT_HI 0x201b 4820fb4d8502Sjsg #define mmCP_VGT_IAVERT_COUNT_HI_BASE_IDX 1 4821fb4d8502Sjsg #define mmCP_VGT_IAPRIM_COUNT_LO 0x201c 4822fb4d8502Sjsg #define mmCP_VGT_IAPRIM_COUNT_LO_BASE_IDX 1 4823fb4d8502Sjsg #define mmCP_VGT_IAPRIM_COUNT_HI 0x201d 4824fb4d8502Sjsg #define mmCP_VGT_IAPRIM_COUNT_HI_BASE_IDX 1 4825fb4d8502Sjsg #define mmCP_VGT_GSPRIM_COUNT_LO 0x201e 4826fb4d8502Sjsg #define mmCP_VGT_GSPRIM_COUNT_LO_BASE_IDX 1 4827fb4d8502Sjsg #define mmCP_VGT_GSPRIM_COUNT_HI 0x201f 4828fb4d8502Sjsg #define mmCP_VGT_GSPRIM_COUNT_HI_BASE_IDX 1 4829fb4d8502Sjsg #define mmCP_VGT_VSINVOC_COUNT_LO 0x2020 4830fb4d8502Sjsg #define mmCP_VGT_VSINVOC_COUNT_LO_BASE_IDX 1 4831fb4d8502Sjsg #define mmCP_VGT_VSINVOC_COUNT_HI 0x2021 4832fb4d8502Sjsg #define mmCP_VGT_VSINVOC_COUNT_HI_BASE_IDX 1 4833fb4d8502Sjsg #define mmCP_VGT_GSINVOC_COUNT_LO 0x2022 4834fb4d8502Sjsg #define mmCP_VGT_GSINVOC_COUNT_LO_BASE_IDX 1 4835fb4d8502Sjsg #define mmCP_VGT_GSINVOC_COUNT_HI 0x2023 4836fb4d8502Sjsg #define mmCP_VGT_GSINVOC_COUNT_HI_BASE_IDX 1 4837fb4d8502Sjsg #define mmCP_VGT_HSINVOC_COUNT_LO 0x2024 4838fb4d8502Sjsg #define mmCP_VGT_HSINVOC_COUNT_LO_BASE_IDX 1 4839fb4d8502Sjsg #define mmCP_VGT_HSINVOC_COUNT_HI 0x2025 4840fb4d8502Sjsg #define mmCP_VGT_HSINVOC_COUNT_HI_BASE_IDX 1 4841fb4d8502Sjsg #define mmCP_VGT_DSINVOC_COUNT_LO 0x2026 4842fb4d8502Sjsg #define mmCP_VGT_DSINVOC_COUNT_LO_BASE_IDX 1 4843fb4d8502Sjsg #define mmCP_VGT_DSINVOC_COUNT_HI 0x2027 4844fb4d8502Sjsg #define mmCP_VGT_DSINVOC_COUNT_HI_BASE_IDX 1 4845fb4d8502Sjsg #define mmCP_PA_CINVOC_COUNT_LO 0x2028 4846fb4d8502Sjsg #define mmCP_PA_CINVOC_COUNT_LO_BASE_IDX 1 4847fb4d8502Sjsg #define mmCP_PA_CINVOC_COUNT_HI 0x2029 4848fb4d8502Sjsg #define mmCP_PA_CINVOC_COUNT_HI_BASE_IDX 1 4849fb4d8502Sjsg #define mmCP_PA_CPRIM_COUNT_LO 0x202a 4850fb4d8502Sjsg #define mmCP_PA_CPRIM_COUNT_LO_BASE_IDX 1 4851fb4d8502Sjsg #define mmCP_PA_CPRIM_COUNT_HI 0x202b 4852fb4d8502Sjsg #define mmCP_PA_CPRIM_COUNT_HI_BASE_IDX 1 4853fb4d8502Sjsg #define mmCP_SC_PSINVOC_COUNT0_LO 0x202c 4854fb4d8502Sjsg #define mmCP_SC_PSINVOC_COUNT0_LO_BASE_IDX 1 4855fb4d8502Sjsg #define mmCP_SC_PSINVOC_COUNT0_HI 0x202d 4856fb4d8502Sjsg #define mmCP_SC_PSINVOC_COUNT0_HI_BASE_IDX 1 4857fb4d8502Sjsg #define mmCP_SC_PSINVOC_COUNT1_LO 0x202e 4858fb4d8502Sjsg #define mmCP_SC_PSINVOC_COUNT1_LO_BASE_IDX 1 4859fb4d8502Sjsg #define mmCP_SC_PSINVOC_COUNT1_HI 0x202f 4860fb4d8502Sjsg #define mmCP_SC_PSINVOC_COUNT1_HI_BASE_IDX 1 4861fb4d8502Sjsg #define mmCP_VGT_CSINVOC_COUNT_LO 0x2030 4862fb4d8502Sjsg #define mmCP_VGT_CSINVOC_COUNT_LO_BASE_IDX 1 4863fb4d8502Sjsg #define mmCP_VGT_CSINVOC_COUNT_HI 0x2031 4864fb4d8502Sjsg #define mmCP_VGT_CSINVOC_COUNT_HI_BASE_IDX 1 4865fb4d8502Sjsg #define mmCP_PIPE_STATS_CONTROL 0x203d 4866fb4d8502Sjsg #define mmCP_PIPE_STATS_CONTROL_BASE_IDX 1 4867fb4d8502Sjsg #define mmCP_STREAM_OUT_CONTROL 0x203e 4868fb4d8502Sjsg #define mmCP_STREAM_OUT_CONTROL_BASE_IDX 1 4869fb4d8502Sjsg #define mmCP_STRMOUT_CNTL 0x203f 4870fb4d8502Sjsg #define mmCP_STRMOUT_CNTL_BASE_IDX 1 4871fb4d8502Sjsg #define mmSCRATCH_REG0 0x2040 4872fb4d8502Sjsg #define mmSCRATCH_REG0_BASE_IDX 1 4873fb4d8502Sjsg #define mmSCRATCH_REG1 0x2041 4874fb4d8502Sjsg #define mmSCRATCH_REG1_BASE_IDX 1 4875fb4d8502Sjsg #define mmSCRATCH_REG2 0x2042 4876fb4d8502Sjsg #define mmSCRATCH_REG2_BASE_IDX 1 4877fb4d8502Sjsg #define mmSCRATCH_REG3 0x2043 4878fb4d8502Sjsg #define mmSCRATCH_REG3_BASE_IDX 1 4879fb4d8502Sjsg #define mmSCRATCH_REG4 0x2044 4880fb4d8502Sjsg #define mmSCRATCH_REG4_BASE_IDX 1 4881fb4d8502Sjsg #define mmSCRATCH_REG5 0x2045 4882fb4d8502Sjsg #define mmSCRATCH_REG5_BASE_IDX 1 4883fb4d8502Sjsg #define mmSCRATCH_REG6 0x2046 4884fb4d8502Sjsg #define mmSCRATCH_REG6_BASE_IDX 1 4885fb4d8502Sjsg #define mmSCRATCH_REG7 0x2047 4886fb4d8502Sjsg #define mmSCRATCH_REG7_BASE_IDX 1 4887fb4d8502Sjsg #define mmCP_APPEND_DATA_HI 0x204c 4888fb4d8502Sjsg #define mmCP_APPEND_DATA_HI_BASE_IDX 1 4889fb4d8502Sjsg #define mmCP_APPEND_LAST_CS_FENCE_HI 0x204d 4890fb4d8502Sjsg #define mmCP_APPEND_LAST_CS_FENCE_HI_BASE_IDX 1 4891fb4d8502Sjsg #define mmCP_APPEND_LAST_PS_FENCE_HI 0x204e 4892fb4d8502Sjsg #define mmCP_APPEND_LAST_PS_FENCE_HI_BASE_IDX 1 4893fb4d8502Sjsg #define mmSCRATCH_UMSK 0x2050 4894fb4d8502Sjsg #define mmSCRATCH_UMSK_BASE_IDX 1 4895fb4d8502Sjsg #define mmSCRATCH_ADDR 0x2051 4896fb4d8502Sjsg #define mmSCRATCH_ADDR_BASE_IDX 1 4897fb4d8502Sjsg #define mmCP_PFP_ATOMIC_PREOP_LO 0x2052 4898fb4d8502Sjsg #define mmCP_PFP_ATOMIC_PREOP_LO_BASE_IDX 1 4899fb4d8502Sjsg #define mmCP_PFP_ATOMIC_PREOP_HI 0x2053 4900fb4d8502Sjsg #define mmCP_PFP_ATOMIC_PREOP_HI_BASE_IDX 1 4901fb4d8502Sjsg #define mmCP_PFP_GDS_ATOMIC0_PREOP_LO 0x2054 4902fb4d8502Sjsg #define mmCP_PFP_GDS_ATOMIC0_PREOP_LO_BASE_IDX 1 4903fb4d8502Sjsg #define mmCP_PFP_GDS_ATOMIC0_PREOP_HI 0x2055 4904fb4d8502Sjsg #define mmCP_PFP_GDS_ATOMIC0_PREOP_HI_BASE_IDX 1 4905fb4d8502Sjsg #define mmCP_PFP_GDS_ATOMIC1_PREOP_LO 0x2056 4906fb4d8502Sjsg #define mmCP_PFP_GDS_ATOMIC1_PREOP_LO_BASE_IDX 1 4907fb4d8502Sjsg #define mmCP_PFP_GDS_ATOMIC1_PREOP_HI 0x2057 4908fb4d8502Sjsg #define mmCP_PFP_GDS_ATOMIC1_PREOP_HI_BASE_IDX 1 4909fb4d8502Sjsg #define mmCP_APPEND_ADDR_LO 0x2058 4910fb4d8502Sjsg #define mmCP_APPEND_ADDR_LO_BASE_IDX 1 4911fb4d8502Sjsg #define mmCP_APPEND_ADDR_HI 0x2059 4912fb4d8502Sjsg #define mmCP_APPEND_ADDR_HI_BASE_IDX 1 4913fb4d8502Sjsg #define mmCP_APPEND_DATA_LO 0x205a 4914fb4d8502Sjsg #define mmCP_APPEND_DATA_LO_BASE_IDX 1 4915fb4d8502Sjsg #define mmCP_APPEND_LAST_CS_FENCE_LO 0x205b 4916fb4d8502Sjsg #define mmCP_APPEND_LAST_CS_FENCE_LO_BASE_IDX 1 4917fb4d8502Sjsg #define mmCP_APPEND_LAST_PS_FENCE_LO 0x205c 4918fb4d8502Sjsg #define mmCP_APPEND_LAST_PS_FENCE_LO_BASE_IDX 1 4919fb4d8502Sjsg #define mmCP_ATOMIC_PREOP_LO 0x205d 4920fb4d8502Sjsg #define mmCP_ATOMIC_PREOP_LO_BASE_IDX 1 4921fb4d8502Sjsg #define mmCP_ME_ATOMIC_PREOP_LO 0x205d 4922fb4d8502Sjsg #define mmCP_ME_ATOMIC_PREOP_LO_BASE_IDX 1 4923fb4d8502Sjsg #define mmCP_ATOMIC_PREOP_HI 0x205e 4924fb4d8502Sjsg #define mmCP_ATOMIC_PREOP_HI_BASE_IDX 1 4925fb4d8502Sjsg #define mmCP_ME_ATOMIC_PREOP_HI 0x205e 4926fb4d8502Sjsg #define mmCP_ME_ATOMIC_PREOP_HI_BASE_IDX 1 4927fb4d8502Sjsg #define mmCP_GDS_ATOMIC0_PREOP_LO 0x205f 4928fb4d8502Sjsg #define mmCP_GDS_ATOMIC0_PREOP_LO_BASE_IDX 1 4929fb4d8502Sjsg #define mmCP_ME_GDS_ATOMIC0_PREOP_LO 0x205f 4930fb4d8502Sjsg #define mmCP_ME_GDS_ATOMIC0_PREOP_LO_BASE_IDX 1 4931fb4d8502Sjsg #define mmCP_GDS_ATOMIC0_PREOP_HI 0x2060 4932fb4d8502Sjsg #define mmCP_GDS_ATOMIC0_PREOP_HI_BASE_IDX 1 4933fb4d8502Sjsg #define mmCP_ME_GDS_ATOMIC0_PREOP_HI 0x2060 4934fb4d8502Sjsg #define mmCP_ME_GDS_ATOMIC0_PREOP_HI_BASE_IDX 1 4935fb4d8502Sjsg #define mmCP_GDS_ATOMIC1_PREOP_LO 0x2061 4936fb4d8502Sjsg #define mmCP_GDS_ATOMIC1_PREOP_LO_BASE_IDX 1 4937fb4d8502Sjsg #define mmCP_ME_GDS_ATOMIC1_PREOP_LO 0x2061 4938fb4d8502Sjsg #define mmCP_ME_GDS_ATOMIC1_PREOP_LO_BASE_IDX 1 4939fb4d8502Sjsg #define mmCP_GDS_ATOMIC1_PREOP_HI 0x2062 4940fb4d8502Sjsg #define mmCP_GDS_ATOMIC1_PREOP_HI_BASE_IDX 1 4941fb4d8502Sjsg #define mmCP_ME_GDS_ATOMIC1_PREOP_HI 0x2062 4942fb4d8502Sjsg #define mmCP_ME_GDS_ATOMIC1_PREOP_HI_BASE_IDX 1 4943fb4d8502Sjsg #define mmCP_ME_MC_WADDR_LO 0x2069 4944fb4d8502Sjsg #define mmCP_ME_MC_WADDR_LO_BASE_IDX 1 4945fb4d8502Sjsg #define mmCP_ME_MC_WADDR_HI 0x206a 4946fb4d8502Sjsg #define mmCP_ME_MC_WADDR_HI_BASE_IDX 1 4947fb4d8502Sjsg #define mmCP_ME_MC_WDATA_LO 0x206b 4948fb4d8502Sjsg #define mmCP_ME_MC_WDATA_LO_BASE_IDX 1 4949fb4d8502Sjsg #define mmCP_ME_MC_WDATA_HI 0x206c 4950fb4d8502Sjsg #define mmCP_ME_MC_WDATA_HI_BASE_IDX 1 4951fb4d8502Sjsg #define mmCP_ME_MC_RADDR_LO 0x206d 4952fb4d8502Sjsg #define mmCP_ME_MC_RADDR_LO_BASE_IDX 1 4953fb4d8502Sjsg #define mmCP_ME_MC_RADDR_HI 0x206e 4954fb4d8502Sjsg #define mmCP_ME_MC_RADDR_HI_BASE_IDX 1 4955fb4d8502Sjsg #define mmCP_SEM_WAIT_TIMER 0x206f 4956fb4d8502Sjsg #define mmCP_SEM_WAIT_TIMER_BASE_IDX 1 4957fb4d8502Sjsg #define mmCP_SIG_SEM_ADDR_LO 0x2070 4958fb4d8502Sjsg #define mmCP_SIG_SEM_ADDR_LO_BASE_IDX 1 4959fb4d8502Sjsg #define mmCP_SIG_SEM_ADDR_HI 0x2071 4960fb4d8502Sjsg #define mmCP_SIG_SEM_ADDR_HI_BASE_IDX 1 4961fb4d8502Sjsg #define mmCP_WAIT_REG_MEM_TIMEOUT 0x2074 4962fb4d8502Sjsg #define mmCP_WAIT_REG_MEM_TIMEOUT_BASE_IDX 1 4963fb4d8502Sjsg #define mmCP_WAIT_SEM_ADDR_LO 0x2075 4964fb4d8502Sjsg #define mmCP_WAIT_SEM_ADDR_LO_BASE_IDX 1 4965fb4d8502Sjsg #define mmCP_WAIT_SEM_ADDR_HI 0x2076 4966fb4d8502Sjsg #define mmCP_WAIT_SEM_ADDR_HI_BASE_IDX 1 4967fb4d8502Sjsg #define mmCP_DMA_PFP_CONTROL 0x2077 4968fb4d8502Sjsg #define mmCP_DMA_PFP_CONTROL_BASE_IDX 1 4969fb4d8502Sjsg #define mmCP_DMA_ME_CONTROL 0x2078 4970fb4d8502Sjsg #define mmCP_DMA_ME_CONTROL_BASE_IDX 1 4971fb4d8502Sjsg #define mmCP_COHER_BASE_HI 0x2079 4972fb4d8502Sjsg #define mmCP_COHER_BASE_HI_BASE_IDX 1 4973fb4d8502Sjsg #define mmCP_COHER_START_DELAY 0x207b 4974fb4d8502Sjsg #define mmCP_COHER_START_DELAY_BASE_IDX 1 4975fb4d8502Sjsg #define mmCP_COHER_CNTL 0x207c 4976fb4d8502Sjsg #define mmCP_COHER_CNTL_BASE_IDX 1 4977fb4d8502Sjsg #define mmCP_COHER_SIZE 0x207d 4978fb4d8502Sjsg #define mmCP_COHER_SIZE_BASE_IDX 1 4979fb4d8502Sjsg #define mmCP_COHER_BASE 0x207e 4980fb4d8502Sjsg #define mmCP_COHER_BASE_BASE_IDX 1 4981fb4d8502Sjsg #define mmCP_COHER_STATUS 0x207f 4982fb4d8502Sjsg #define mmCP_COHER_STATUS_BASE_IDX 1 4983fb4d8502Sjsg #define mmCP_DMA_ME_SRC_ADDR 0x2080 4984fb4d8502Sjsg #define mmCP_DMA_ME_SRC_ADDR_BASE_IDX 1 4985fb4d8502Sjsg #define mmCP_DMA_ME_SRC_ADDR_HI 0x2081 4986fb4d8502Sjsg #define mmCP_DMA_ME_SRC_ADDR_HI_BASE_IDX 1 4987fb4d8502Sjsg #define mmCP_DMA_ME_DST_ADDR 0x2082 4988fb4d8502Sjsg #define mmCP_DMA_ME_DST_ADDR_BASE_IDX 1 4989fb4d8502Sjsg #define mmCP_DMA_ME_DST_ADDR_HI 0x2083 4990fb4d8502Sjsg #define mmCP_DMA_ME_DST_ADDR_HI_BASE_IDX 1 4991fb4d8502Sjsg #define mmCP_DMA_ME_COMMAND 0x2084 4992fb4d8502Sjsg #define mmCP_DMA_ME_COMMAND_BASE_IDX 1 4993fb4d8502Sjsg #define mmCP_DMA_PFP_SRC_ADDR 0x2085 4994fb4d8502Sjsg #define mmCP_DMA_PFP_SRC_ADDR_BASE_IDX 1 4995fb4d8502Sjsg #define mmCP_DMA_PFP_SRC_ADDR_HI 0x2086 4996fb4d8502Sjsg #define mmCP_DMA_PFP_SRC_ADDR_HI_BASE_IDX 1 4997fb4d8502Sjsg #define mmCP_DMA_PFP_DST_ADDR 0x2087 4998fb4d8502Sjsg #define mmCP_DMA_PFP_DST_ADDR_BASE_IDX 1 4999fb4d8502Sjsg #define mmCP_DMA_PFP_DST_ADDR_HI 0x2088 5000fb4d8502Sjsg #define mmCP_DMA_PFP_DST_ADDR_HI_BASE_IDX 1 5001fb4d8502Sjsg #define mmCP_DMA_PFP_COMMAND 0x2089 5002fb4d8502Sjsg #define mmCP_DMA_PFP_COMMAND_BASE_IDX 1 5003fb4d8502Sjsg #define mmCP_DMA_CNTL 0x208a 5004fb4d8502Sjsg #define mmCP_DMA_CNTL_BASE_IDX 1 5005fb4d8502Sjsg #define mmCP_DMA_READ_TAGS 0x208b 5006fb4d8502Sjsg #define mmCP_DMA_READ_TAGS_BASE_IDX 1 5007fb4d8502Sjsg #define mmCP_COHER_SIZE_HI 0x208c 5008fb4d8502Sjsg #define mmCP_COHER_SIZE_HI_BASE_IDX 1 5009fb4d8502Sjsg #define mmCP_PFP_IB_CONTROL 0x208d 5010fb4d8502Sjsg #define mmCP_PFP_IB_CONTROL_BASE_IDX 1 5011fb4d8502Sjsg #define mmCP_PFP_LOAD_CONTROL 0x208e 5012fb4d8502Sjsg #define mmCP_PFP_LOAD_CONTROL_BASE_IDX 1 5013fb4d8502Sjsg #define mmCP_SCRATCH_INDEX 0x208f 5014fb4d8502Sjsg #define mmCP_SCRATCH_INDEX_BASE_IDX 1 5015fb4d8502Sjsg #define mmCP_SCRATCH_DATA 0x2090 5016fb4d8502Sjsg #define mmCP_SCRATCH_DATA_BASE_IDX 1 5017fb4d8502Sjsg #define mmCP_RB_OFFSET 0x2091 5018fb4d8502Sjsg #define mmCP_RB_OFFSET_BASE_IDX 1 5019fb4d8502Sjsg #define mmCP_IB1_OFFSET 0x2092 5020fb4d8502Sjsg #define mmCP_IB1_OFFSET_BASE_IDX 1 5021fb4d8502Sjsg #define mmCP_IB2_OFFSET 0x2093 5022fb4d8502Sjsg #define mmCP_IB2_OFFSET_BASE_IDX 1 5023fb4d8502Sjsg #define mmCP_IB1_PREAMBLE_BEGIN 0x2094 5024fb4d8502Sjsg #define mmCP_IB1_PREAMBLE_BEGIN_BASE_IDX 1 5025fb4d8502Sjsg #define mmCP_IB1_PREAMBLE_END 0x2095 5026fb4d8502Sjsg #define mmCP_IB1_PREAMBLE_END_BASE_IDX 1 5027fb4d8502Sjsg #define mmCP_IB2_PREAMBLE_BEGIN 0x2096 5028fb4d8502Sjsg #define mmCP_IB2_PREAMBLE_BEGIN_BASE_IDX 1 5029fb4d8502Sjsg #define mmCP_IB2_PREAMBLE_END 0x2097 5030fb4d8502Sjsg #define mmCP_IB2_PREAMBLE_END_BASE_IDX 1 5031fb4d8502Sjsg #define mmCP_CE_IB1_OFFSET 0x2098 5032fb4d8502Sjsg #define mmCP_CE_IB1_OFFSET_BASE_IDX 1 5033fb4d8502Sjsg #define mmCP_CE_IB2_OFFSET 0x2099 5034fb4d8502Sjsg #define mmCP_CE_IB2_OFFSET_BASE_IDX 1 5035fb4d8502Sjsg #define mmCP_CE_COUNTER 0x209a 5036fb4d8502Sjsg #define mmCP_CE_COUNTER_BASE_IDX 1 5037fb4d8502Sjsg #define mmCP_CE_RB_OFFSET 0x209b 5038fb4d8502Sjsg #define mmCP_CE_RB_OFFSET_BASE_IDX 1 5039fb4d8502Sjsg #define mmCP_CE_INIT_CMD_BUFSZ 0x20bd 5040fb4d8502Sjsg #define mmCP_CE_INIT_CMD_BUFSZ_BASE_IDX 1 5041fb4d8502Sjsg #define mmCP_CE_IB1_CMD_BUFSZ 0x20be 5042fb4d8502Sjsg #define mmCP_CE_IB1_CMD_BUFSZ_BASE_IDX 1 5043fb4d8502Sjsg #define mmCP_CE_IB2_CMD_BUFSZ 0x20bf 5044fb4d8502Sjsg #define mmCP_CE_IB2_CMD_BUFSZ_BASE_IDX 1 5045fb4d8502Sjsg #define mmCP_IB1_CMD_BUFSZ 0x20c0 5046fb4d8502Sjsg #define mmCP_IB1_CMD_BUFSZ_BASE_IDX 1 5047fb4d8502Sjsg #define mmCP_IB2_CMD_BUFSZ 0x20c1 5048fb4d8502Sjsg #define mmCP_IB2_CMD_BUFSZ_BASE_IDX 1 5049fb4d8502Sjsg #define mmCP_ST_CMD_BUFSZ 0x20c2 5050fb4d8502Sjsg #define mmCP_ST_CMD_BUFSZ_BASE_IDX 1 5051fb4d8502Sjsg #define mmCP_CE_INIT_BASE_LO 0x20c3 5052fb4d8502Sjsg #define mmCP_CE_INIT_BASE_LO_BASE_IDX 1 5053fb4d8502Sjsg #define mmCP_CE_INIT_BASE_HI 0x20c4 5054fb4d8502Sjsg #define mmCP_CE_INIT_BASE_HI_BASE_IDX 1 5055fb4d8502Sjsg #define mmCP_CE_INIT_BUFSZ 0x20c5 5056fb4d8502Sjsg #define mmCP_CE_INIT_BUFSZ_BASE_IDX 1 5057fb4d8502Sjsg #define mmCP_CE_IB1_BASE_LO 0x20c6 5058fb4d8502Sjsg #define mmCP_CE_IB1_BASE_LO_BASE_IDX 1 5059fb4d8502Sjsg #define mmCP_CE_IB1_BASE_HI 0x20c7 5060fb4d8502Sjsg #define mmCP_CE_IB1_BASE_HI_BASE_IDX 1 5061fb4d8502Sjsg #define mmCP_CE_IB1_BUFSZ 0x20c8 5062fb4d8502Sjsg #define mmCP_CE_IB1_BUFSZ_BASE_IDX 1 5063fb4d8502Sjsg #define mmCP_CE_IB2_BASE_LO 0x20c9 5064fb4d8502Sjsg #define mmCP_CE_IB2_BASE_LO_BASE_IDX 1 5065fb4d8502Sjsg #define mmCP_CE_IB2_BASE_HI 0x20ca 5066fb4d8502Sjsg #define mmCP_CE_IB2_BASE_HI_BASE_IDX 1 5067fb4d8502Sjsg #define mmCP_CE_IB2_BUFSZ 0x20cb 5068fb4d8502Sjsg #define mmCP_CE_IB2_BUFSZ_BASE_IDX 1 5069fb4d8502Sjsg #define mmCP_IB1_BASE_LO 0x20cc 5070fb4d8502Sjsg #define mmCP_IB1_BASE_LO_BASE_IDX 1 5071fb4d8502Sjsg #define mmCP_IB1_BASE_HI 0x20cd 5072fb4d8502Sjsg #define mmCP_IB1_BASE_HI_BASE_IDX 1 5073fb4d8502Sjsg #define mmCP_IB1_BUFSZ 0x20ce 5074fb4d8502Sjsg #define mmCP_IB1_BUFSZ_BASE_IDX 1 5075fb4d8502Sjsg #define mmCP_IB2_BASE_LO 0x20cf 5076fb4d8502Sjsg #define mmCP_IB2_BASE_LO_BASE_IDX 1 5077fb4d8502Sjsg #define mmCP_IB2_BASE_HI 0x20d0 5078fb4d8502Sjsg #define mmCP_IB2_BASE_HI_BASE_IDX 1 5079fb4d8502Sjsg #define mmCP_IB2_BUFSZ 0x20d1 5080fb4d8502Sjsg #define mmCP_IB2_BUFSZ_BASE_IDX 1 5081fb4d8502Sjsg #define mmCP_ST_BASE_LO 0x20d2 5082fb4d8502Sjsg #define mmCP_ST_BASE_LO_BASE_IDX 1 5083fb4d8502Sjsg #define mmCP_ST_BASE_HI 0x20d3 5084fb4d8502Sjsg #define mmCP_ST_BASE_HI_BASE_IDX 1 5085fb4d8502Sjsg #define mmCP_ST_BUFSZ 0x20d4 5086fb4d8502Sjsg #define mmCP_ST_BUFSZ_BASE_IDX 1 5087fb4d8502Sjsg #define mmCP_EOP_DONE_EVENT_CNTL 0x20d5 5088fb4d8502Sjsg #define mmCP_EOP_DONE_EVENT_CNTL_BASE_IDX 1 5089fb4d8502Sjsg #define mmCP_EOP_DONE_DATA_CNTL 0x20d6 5090fb4d8502Sjsg #define mmCP_EOP_DONE_DATA_CNTL_BASE_IDX 1 5091fb4d8502Sjsg #define mmCP_EOP_DONE_CNTX_ID 0x20d7 5092fb4d8502Sjsg #define mmCP_EOP_DONE_CNTX_ID_BASE_IDX 1 5093fb4d8502Sjsg #define mmCP_PFP_COMPLETION_STATUS 0x20ec 5094fb4d8502Sjsg #define mmCP_PFP_COMPLETION_STATUS_BASE_IDX 1 5095fb4d8502Sjsg #define mmCP_CE_COMPLETION_STATUS 0x20ed 5096fb4d8502Sjsg #define mmCP_CE_COMPLETION_STATUS_BASE_IDX 1 5097fb4d8502Sjsg #define mmCP_PRED_NOT_VISIBLE 0x20ee 5098fb4d8502Sjsg #define mmCP_PRED_NOT_VISIBLE_BASE_IDX 1 5099fb4d8502Sjsg #define mmCP_PFP_METADATA_BASE_ADDR 0x20f0 5100fb4d8502Sjsg #define mmCP_PFP_METADATA_BASE_ADDR_BASE_IDX 1 5101fb4d8502Sjsg #define mmCP_PFP_METADATA_BASE_ADDR_HI 0x20f1 5102fb4d8502Sjsg #define mmCP_PFP_METADATA_BASE_ADDR_HI_BASE_IDX 1 5103fb4d8502Sjsg #define mmCP_CE_METADATA_BASE_ADDR 0x20f2 5104fb4d8502Sjsg #define mmCP_CE_METADATA_BASE_ADDR_BASE_IDX 1 5105fb4d8502Sjsg #define mmCP_CE_METADATA_BASE_ADDR_HI 0x20f3 5106fb4d8502Sjsg #define mmCP_CE_METADATA_BASE_ADDR_HI_BASE_IDX 1 5107fb4d8502Sjsg #define mmCP_DRAW_INDX_INDR_ADDR 0x20f4 5108fb4d8502Sjsg #define mmCP_DRAW_INDX_INDR_ADDR_BASE_IDX 1 5109fb4d8502Sjsg #define mmCP_DRAW_INDX_INDR_ADDR_HI 0x20f5 5110fb4d8502Sjsg #define mmCP_DRAW_INDX_INDR_ADDR_HI_BASE_IDX 1 5111fb4d8502Sjsg #define mmCP_DISPATCH_INDR_ADDR 0x20f6 5112fb4d8502Sjsg #define mmCP_DISPATCH_INDR_ADDR_BASE_IDX 1 5113fb4d8502Sjsg #define mmCP_DISPATCH_INDR_ADDR_HI 0x20f7 5114fb4d8502Sjsg #define mmCP_DISPATCH_INDR_ADDR_HI_BASE_IDX 1 5115fb4d8502Sjsg #define mmCP_INDEX_BASE_ADDR 0x20f8 5116fb4d8502Sjsg #define mmCP_INDEX_BASE_ADDR_BASE_IDX 1 5117fb4d8502Sjsg #define mmCP_INDEX_BASE_ADDR_HI 0x20f9 5118fb4d8502Sjsg #define mmCP_INDEX_BASE_ADDR_HI_BASE_IDX 1 5119fb4d8502Sjsg #define mmCP_INDEX_TYPE 0x20fa 5120fb4d8502Sjsg #define mmCP_INDEX_TYPE_BASE_IDX 1 5121fb4d8502Sjsg #define mmCP_GDS_BKUP_ADDR 0x20fb 5122fb4d8502Sjsg #define mmCP_GDS_BKUP_ADDR_BASE_IDX 1 5123fb4d8502Sjsg #define mmCP_GDS_BKUP_ADDR_HI 0x20fc 5124fb4d8502Sjsg #define mmCP_GDS_BKUP_ADDR_HI_BASE_IDX 1 5125fb4d8502Sjsg #define mmCP_SAMPLE_STATUS 0x20fd 5126fb4d8502Sjsg #define mmCP_SAMPLE_STATUS_BASE_IDX 1 5127fb4d8502Sjsg #define mmCP_ME_COHER_CNTL 0x20fe 5128fb4d8502Sjsg #define mmCP_ME_COHER_CNTL_BASE_IDX 1 5129fb4d8502Sjsg #define mmCP_ME_COHER_SIZE 0x20ff 5130fb4d8502Sjsg #define mmCP_ME_COHER_SIZE_BASE_IDX 1 5131fb4d8502Sjsg #define mmCP_ME_COHER_SIZE_HI 0x2100 5132fb4d8502Sjsg #define mmCP_ME_COHER_SIZE_HI_BASE_IDX 1 5133fb4d8502Sjsg #define mmCP_ME_COHER_BASE 0x2101 5134fb4d8502Sjsg #define mmCP_ME_COHER_BASE_BASE_IDX 1 5135fb4d8502Sjsg #define mmCP_ME_COHER_BASE_HI 0x2102 5136fb4d8502Sjsg #define mmCP_ME_COHER_BASE_HI_BASE_IDX 1 5137fb4d8502Sjsg #define mmCP_ME_COHER_STATUS 0x2103 5138fb4d8502Sjsg #define mmCP_ME_COHER_STATUS_BASE_IDX 1 5139fb4d8502Sjsg #define mmRLC_GPM_PERF_COUNT_0 0x2140 5140fb4d8502Sjsg #define mmRLC_GPM_PERF_COUNT_0_BASE_IDX 1 5141fb4d8502Sjsg #define mmRLC_GPM_PERF_COUNT_1 0x2141 5142fb4d8502Sjsg #define mmRLC_GPM_PERF_COUNT_1_BASE_IDX 1 5143fb4d8502Sjsg #define mmGRBM_GFX_INDEX 0x2200 5144fb4d8502Sjsg #define mmGRBM_GFX_INDEX_BASE_IDX 1 5145fb4d8502Sjsg #define mmVGT_GSVS_RING_SIZE 0x2241 5146fb4d8502Sjsg #define mmVGT_GSVS_RING_SIZE_BASE_IDX 1 5147fb4d8502Sjsg #define mmVGT_PRIMITIVE_TYPE 0x2242 5148fb4d8502Sjsg #define mmVGT_PRIMITIVE_TYPE_BASE_IDX 1 5149fb4d8502Sjsg #define mmVGT_INDEX_TYPE 0x2243 5150fb4d8502Sjsg #define mmVGT_INDEX_TYPE_BASE_IDX 1 5151fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_0 0x2244 5152fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_0_BASE_IDX 1 5153fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_1 0x2245 5154fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_1_BASE_IDX 1 5155fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_2 0x2246 5156fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_2_BASE_IDX 1 5157fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_3 0x2247 5158fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_3_BASE_IDX 1 5159fb4d8502Sjsg #define mmVGT_MAX_VTX_INDX 0x2248 5160fb4d8502Sjsg #define mmVGT_MAX_VTX_INDX_BASE_IDX 1 5161fb4d8502Sjsg #define mmVGT_MIN_VTX_INDX 0x2249 5162fb4d8502Sjsg #define mmVGT_MIN_VTX_INDX_BASE_IDX 1 5163fb4d8502Sjsg #define mmVGT_INDX_OFFSET 0x224a 5164fb4d8502Sjsg #define mmVGT_INDX_OFFSET_BASE_IDX 1 5165fb4d8502Sjsg #define mmVGT_MULTI_PRIM_IB_RESET_EN 0x224b 5166fb4d8502Sjsg #define mmVGT_MULTI_PRIM_IB_RESET_EN_BASE_IDX 1 5167fb4d8502Sjsg #define mmVGT_NUM_INDICES 0x224c 5168fb4d8502Sjsg #define mmVGT_NUM_INDICES_BASE_IDX 1 5169fb4d8502Sjsg #define mmVGT_NUM_INSTANCES 0x224d 5170fb4d8502Sjsg #define mmVGT_NUM_INSTANCES_BASE_IDX 1 5171fb4d8502Sjsg #define mmVGT_TF_RING_SIZE 0x224e 5172fb4d8502Sjsg #define mmVGT_TF_RING_SIZE_BASE_IDX 1 5173fb4d8502Sjsg #define mmVGT_HS_OFFCHIP_PARAM 0x224f 5174fb4d8502Sjsg #define mmVGT_HS_OFFCHIP_PARAM_BASE_IDX 1 5175fb4d8502Sjsg #define mmVGT_TF_MEMORY_BASE 0x2250 5176fb4d8502Sjsg #define mmVGT_TF_MEMORY_BASE_BASE_IDX 1 5177fb4d8502Sjsg #define mmVGT_TF_MEMORY_BASE_HI 0x2251 5178fb4d8502Sjsg #define mmVGT_TF_MEMORY_BASE_HI_BASE_IDX 1 5179fb4d8502Sjsg #define mmWD_POS_BUF_BASE 0x2252 5180fb4d8502Sjsg #define mmWD_POS_BUF_BASE_BASE_IDX 1 5181fb4d8502Sjsg #define mmWD_POS_BUF_BASE_HI 0x2253 5182fb4d8502Sjsg #define mmWD_POS_BUF_BASE_HI_BASE_IDX 1 5183fb4d8502Sjsg #define mmWD_CNTL_SB_BUF_BASE 0x2254 5184fb4d8502Sjsg #define mmWD_CNTL_SB_BUF_BASE_BASE_IDX 1 5185fb4d8502Sjsg #define mmWD_CNTL_SB_BUF_BASE_HI 0x2255 5186fb4d8502Sjsg #define mmWD_CNTL_SB_BUF_BASE_HI_BASE_IDX 1 5187fb4d8502Sjsg #define mmWD_INDEX_BUF_BASE 0x2256 5188fb4d8502Sjsg #define mmWD_INDEX_BUF_BASE_BASE_IDX 1 5189fb4d8502Sjsg #define mmWD_INDEX_BUF_BASE_HI 0x2257 5190fb4d8502Sjsg #define mmWD_INDEX_BUF_BASE_HI_BASE_IDX 1 5191fb4d8502Sjsg #define mmIA_MULTI_VGT_PARAM 0x2258 5192fb4d8502Sjsg #define mmIA_MULTI_VGT_PARAM_BASE_IDX 1 5193fb4d8502Sjsg #define mmVGT_INSTANCE_BASE_ID 0x225a 5194fb4d8502Sjsg #define mmVGT_INSTANCE_BASE_ID_BASE_IDX 1 5195fb4d8502Sjsg #define mmPA_SU_LINE_STIPPLE_VALUE 0x2280 5196fb4d8502Sjsg #define mmPA_SU_LINE_STIPPLE_VALUE_BASE_IDX 1 5197fb4d8502Sjsg #define mmPA_SC_LINE_STIPPLE_STATE 0x2281 5198fb4d8502Sjsg #define mmPA_SC_LINE_STIPPLE_STATE_BASE_IDX 1 5199fb4d8502Sjsg #define mmPA_SC_SCREEN_EXTENT_MIN_0 0x2284 5200fb4d8502Sjsg #define mmPA_SC_SCREEN_EXTENT_MIN_0_BASE_IDX 1 5201fb4d8502Sjsg #define mmPA_SC_SCREEN_EXTENT_MAX_0 0x2285 5202fb4d8502Sjsg #define mmPA_SC_SCREEN_EXTENT_MAX_0_BASE_IDX 1 5203fb4d8502Sjsg #define mmPA_SC_SCREEN_EXTENT_MIN_1 0x2286 5204fb4d8502Sjsg #define mmPA_SC_SCREEN_EXTENT_MIN_1_BASE_IDX 1 5205fb4d8502Sjsg #define mmPA_SC_SCREEN_EXTENT_MAX_1 0x228b 5206fb4d8502Sjsg #define mmPA_SC_SCREEN_EXTENT_MAX_1_BASE_IDX 1 5207fb4d8502Sjsg #define mmPA_SC_P3D_TRAP_SCREEN_HV_EN 0x22a0 5208fb4d8502Sjsg #define mmPA_SC_P3D_TRAP_SCREEN_HV_EN_BASE_IDX 1 5209fb4d8502Sjsg #define mmPA_SC_P3D_TRAP_SCREEN_H 0x22a1 5210fb4d8502Sjsg #define mmPA_SC_P3D_TRAP_SCREEN_H_BASE_IDX 1 5211fb4d8502Sjsg #define mmPA_SC_P3D_TRAP_SCREEN_V 0x22a2 5212fb4d8502Sjsg #define mmPA_SC_P3D_TRAP_SCREEN_V_BASE_IDX 1 5213fb4d8502Sjsg #define mmPA_SC_P3D_TRAP_SCREEN_OCCURRENCE 0x22a3 5214fb4d8502Sjsg #define mmPA_SC_P3D_TRAP_SCREEN_OCCURRENCE_BASE_IDX 1 5215fb4d8502Sjsg #define mmPA_SC_P3D_TRAP_SCREEN_COUNT 0x22a4 5216fb4d8502Sjsg #define mmPA_SC_P3D_TRAP_SCREEN_COUNT_BASE_IDX 1 5217fb4d8502Sjsg #define mmPA_SC_HP3D_TRAP_SCREEN_HV_EN 0x22a8 5218fb4d8502Sjsg #define mmPA_SC_HP3D_TRAP_SCREEN_HV_EN_BASE_IDX 1 5219fb4d8502Sjsg #define mmPA_SC_HP3D_TRAP_SCREEN_H 0x22a9 5220fb4d8502Sjsg #define mmPA_SC_HP3D_TRAP_SCREEN_H_BASE_IDX 1 5221fb4d8502Sjsg #define mmPA_SC_HP3D_TRAP_SCREEN_V 0x22aa 5222fb4d8502Sjsg #define mmPA_SC_HP3D_TRAP_SCREEN_V_BASE_IDX 1 5223fb4d8502Sjsg #define mmPA_SC_HP3D_TRAP_SCREEN_OCCURRENCE 0x22ab 5224fb4d8502Sjsg #define mmPA_SC_HP3D_TRAP_SCREEN_OCCURRENCE_BASE_IDX 1 5225fb4d8502Sjsg #define mmPA_SC_HP3D_TRAP_SCREEN_COUNT 0x22ac 5226fb4d8502Sjsg #define mmPA_SC_HP3D_TRAP_SCREEN_COUNT_BASE_IDX 1 5227fb4d8502Sjsg #define mmPA_SC_TRAP_SCREEN_HV_EN 0x22b0 5228fb4d8502Sjsg #define mmPA_SC_TRAP_SCREEN_HV_EN_BASE_IDX 1 5229fb4d8502Sjsg #define mmPA_SC_TRAP_SCREEN_H 0x22b1 5230fb4d8502Sjsg #define mmPA_SC_TRAP_SCREEN_H_BASE_IDX 1 5231fb4d8502Sjsg #define mmPA_SC_TRAP_SCREEN_V 0x22b2 5232fb4d8502Sjsg #define mmPA_SC_TRAP_SCREEN_V_BASE_IDX 1 5233fb4d8502Sjsg #define mmPA_SC_TRAP_SCREEN_OCCURRENCE 0x22b3 5234fb4d8502Sjsg #define mmPA_SC_TRAP_SCREEN_OCCURRENCE_BASE_IDX 1 5235fb4d8502Sjsg #define mmPA_SC_TRAP_SCREEN_COUNT 0x22b4 5236fb4d8502Sjsg #define mmPA_SC_TRAP_SCREEN_COUNT_BASE_IDX 1 5237fb4d8502Sjsg #define mmSQ_THREAD_TRACE_BASE 0x2330 5238fb4d8502Sjsg #define mmSQ_THREAD_TRACE_BASE_BASE_IDX 1 5239fb4d8502Sjsg #define mmSQ_THREAD_TRACE_SIZE 0x2331 5240fb4d8502Sjsg #define mmSQ_THREAD_TRACE_SIZE_BASE_IDX 1 5241fb4d8502Sjsg #define mmSQ_THREAD_TRACE_MASK 0x2332 5242fb4d8502Sjsg #define mmSQ_THREAD_TRACE_MASK_BASE_IDX 1 5243fb4d8502Sjsg #define mmSQ_THREAD_TRACE_TOKEN_MASK 0x2333 5244fb4d8502Sjsg #define mmSQ_THREAD_TRACE_TOKEN_MASK_BASE_IDX 1 5245fb4d8502Sjsg #define mmSQ_THREAD_TRACE_PERF_MASK 0x2334 5246fb4d8502Sjsg #define mmSQ_THREAD_TRACE_PERF_MASK_BASE_IDX 1 5247fb4d8502Sjsg #define mmSQ_THREAD_TRACE_CTRL 0x2335 5248fb4d8502Sjsg #define mmSQ_THREAD_TRACE_CTRL_BASE_IDX 1 5249fb4d8502Sjsg #define mmSQ_THREAD_TRACE_MODE 0x2336 5250fb4d8502Sjsg #define mmSQ_THREAD_TRACE_MODE_BASE_IDX 1 5251fb4d8502Sjsg #define mmSQ_THREAD_TRACE_BASE2 0x2337 5252fb4d8502Sjsg #define mmSQ_THREAD_TRACE_BASE2_BASE_IDX 1 5253fb4d8502Sjsg #define mmSQ_THREAD_TRACE_TOKEN_MASK2 0x2338 5254fb4d8502Sjsg #define mmSQ_THREAD_TRACE_TOKEN_MASK2_BASE_IDX 1 5255fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WPTR 0x2339 5256fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WPTR_BASE_IDX 1 5257fb4d8502Sjsg #define mmSQ_THREAD_TRACE_STATUS 0x233a 5258fb4d8502Sjsg #define mmSQ_THREAD_TRACE_STATUS_BASE_IDX 1 5259fb4d8502Sjsg #define mmSQ_THREAD_TRACE_HIWATER 0x233b 5260fb4d8502Sjsg #define mmSQ_THREAD_TRACE_HIWATER_BASE_IDX 1 5261fb4d8502Sjsg #define mmSQ_THREAD_TRACE_CNTR 0x233c 5262fb4d8502Sjsg #define mmSQ_THREAD_TRACE_CNTR_BASE_IDX 1 5263fb4d8502Sjsg #define mmSQ_THREAD_TRACE_USERDATA_0 0x2340 5264fb4d8502Sjsg #define mmSQ_THREAD_TRACE_USERDATA_0_BASE_IDX 1 5265fb4d8502Sjsg #define mmSQ_THREAD_TRACE_USERDATA_1 0x2341 5266fb4d8502Sjsg #define mmSQ_THREAD_TRACE_USERDATA_1_BASE_IDX 1 5267fb4d8502Sjsg #define mmSQ_THREAD_TRACE_USERDATA_2 0x2342 5268fb4d8502Sjsg #define mmSQ_THREAD_TRACE_USERDATA_2_BASE_IDX 1 5269fb4d8502Sjsg #define mmSQ_THREAD_TRACE_USERDATA_3 0x2343 5270fb4d8502Sjsg #define mmSQ_THREAD_TRACE_USERDATA_3_BASE_IDX 1 5271fb4d8502Sjsg #define mmSQC_CACHES 0x2348 5272fb4d8502Sjsg #define mmSQC_CACHES_BASE_IDX 1 5273fb4d8502Sjsg #define mmSQC_WRITEBACK 0x2349 5274fb4d8502Sjsg #define mmSQC_WRITEBACK_BASE_IDX 1 5275fb4d8502Sjsg #define mmTA_CS_BC_BASE_ADDR 0x2380 5276fb4d8502Sjsg #define mmTA_CS_BC_BASE_ADDR_BASE_IDX 1 5277fb4d8502Sjsg #define mmTA_CS_BC_BASE_ADDR_HI 0x2381 5278fb4d8502Sjsg #define mmTA_CS_BC_BASE_ADDR_HI_BASE_IDX 1 5279fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT0_LOW 0x23c0 5280fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT0_LOW_BASE_IDX 1 5281fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT0_HI 0x23c1 5282fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT0_HI_BASE_IDX 1 5283fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT1_LOW 0x23c2 5284fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT1_LOW_BASE_IDX 1 5285fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT1_HI 0x23c3 5286fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT1_HI_BASE_IDX 1 5287fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT2_LOW 0x23c4 5288fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT2_LOW_BASE_IDX 1 5289fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT2_HI 0x23c5 5290fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT2_HI_BASE_IDX 1 5291fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT3_LOW 0x23c6 5292fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT3_LOW_BASE_IDX 1 5293fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT3_HI 0x23c7 5294fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT3_HI_BASE_IDX 1 5295fb4d8502Sjsg #define mmDB_ZPASS_COUNT_LOW 0x23fe 5296fb4d8502Sjsg #define mmDB_ZPASS_COUNT_LOW_BASE_IDX 1 5297fb4d8502Sjsg #define mmDB_ZPASS_COUNT_HI 0x23ff 5298fb4d8502Sjsg #define mmDB_ZPASS_COUNT_HI_BASE_IDX 1 5299fb4d8502Sjsg #define mmGDS_RD_ADDR 0x2400 5300fb4d8502Sjsg #define mmGDS_RD_ADDR_BASE_IDX 1 5301fb4d8502Sjsg #define mmGDS_RD_DATA 0x2401 5302fb4d8502Sjsg #define mmGDS_RD_DATA_BASE_IDX 1 5303fb4d8502Sjsg #define mmGDS_RD_BURST_ADDR 0x2402 5304fb4d8502Sjsg #define mmGDS_RD_BURST_ADDR_BASE_IDX 1 5305fb4d8502Sjsg #define mmGDS_RD_BURST_COUNT 0x2403 5306fb4d8502Sjsg #define mmGDS_RD_BURST_COUNT_BASE_IDX 1 5307fb4d8502Sjsg #define mmGDS_RD_BURST_DATA 0x2404 5308fb4d8502Sjsg #define mmGDS_RD_BURST_DATA_BASE_IDX 1 5309fb4d8502Sjsg #define mmGDS_WR_ADDR 0x2405 5310fb4d8502Sjsg #define mmGDS_WR_ADDR_BASE_IDX 1 5311fb4d8502Sjsg #define mmGDS_WR_DATA 0x2406 5312fb4d8502Sjsg #define mmGDS_WR_DATA_BASE_IDX 1 5313fb4d8502Sjsg #define mmGDS_WR_BURST_ADDR 0x2407 5314fb4d8502Sjsg #define mmGDS_WR_BURST_ADDR_BASE_IDX 1 5315fb4d8502Sjsg #define mmGDS_WR_BURST_DATA 0x2408 5316fb4d8502Sjsg #define mmGDS_WR_BURST_DATA_BASE_IDX 1 5317fb4d8502Sjsg #define mmGDS_WRITE_COMPLETE 0x2409 5318fb4d8502Sjsg #define mmGDS_WRITE_COMPLETE_BASE_IDX 1 5319fb4d8502Sjsg #define mmGDS_ATOM_CNTL 0x240a 5320fb4d8502Sjsg #define mmGDS_ATOM_CNTL_BASE_IDX 1 5321fb4d8502Sjsg #define mmGDS_ATOM_COMPLETE 0x240b 5322fb4d8502Sjsg #define mmGDS_ATOM_COMPLETE_BASE_IDX 1 5323fb4d8502Sjsg #define mmGDS_ATOM_BASE 0x240c 5324fb4d8502Sjsg #define mmGDS_ATOM_BASE_BASE_IDX 1 5325fb4d8502Sjsg #define mmGDS_ATOM_SIZE 0x240d 5326fb4d8502Sjsg #define mmGDS_ATOM_SIZE_BASE_IDX 1 5327fb4d8502Sjsg #define mmGDS_ATOM_OFFSET0 0x240e 5328fb4d8502Sjsg #define mmGDS_ATOM_OFFSET0_BASE_IDX 1 5329fb4d8502Sjsg #define mmGDS_ATOM_OFFSET1 0x240f 5330fb4d8502Sjsg #define mmGDS_ATOM_OFFSET1_BASE_IDX 1 5331fb4d8502Sjsg #define mmGDS_ATOM_DST 0x2410 5332fb4d8502Sjsg #define mmGDS_ATOM_DST_BASE_IDX 1 5333fb4d8502Sjsg #define mmGDS_ATOM_OP 0x2411 5334fb4d8502Sjsg #define mmGDS_ATOM_OP_BASE_IDX 1 5335fb4d8502Sjsg #define mmGDS_ATOM_SRC0 0x2412 5336fb4d8502Sjsg #define mmGDS_ATOM_SRC0_BASE_IDX 1 5337fb4d8502Sjsg #define mmGDS_ATOM_SRC0_U 0x2413 5338fb4d8502Sjsg #define mmGDS_ATOM_SRC0_U_BASE_IDX 1 5339fb4d8502Sjsg #define mmGDS_ATOM_SRC1 0x2414 5340fb4d8502Sjsg #define mmGDS_ATOM_SRC1_BASE_IDX 1 5341fb4d8502Sjsg #define mmGDS_ATOM_SRC1_U 0x2415 5342fb4d8502Sjsg #define mmGDS_ATOM_SRC1_U_BASE_IDX 1 5343fb4d8502Sjsg #define mmGDS_ATOM_READ0 0x2416 5344fb4d8502Sjsg #define mmGDS_ATOM_READ0_BASE_IDX 1 5345fb4d8502Sjsg #define mmGDS_ATOM_READ0_U 0x2417 5346fb4d8502Sjsg #define mmGDS_ATOM_READ0_U_BASE_IDX 1 5347fb4d8502Sjsg #define mmGDS_ATOM_READ1 0x2418 5348fb4d8502Sjsg #define mmGDS_ATOM_READ1_BASE_IDX 1 5349fb4d8502Sjsg #define mmGDS_ATOM_READ1_U 0x2419 5350fb4d8502Sjsg #define mmGDS_ATOM_READ1_U_BASE_IDX 1 5351fb4d8502Sjsg #define mmGDS_GWS_RESOURCE_CNTL 0x241a 5352fb4d8502Sjsg #define mmGDS_GWS_RESOURCE_CNTL_BASE_IDX 1 5353fb4d8502Sjsg #define mmGDS_GWS_RESOURCE 0x241b 5354fb4d8502Sjsg #define mmGDS_GWS_RESOURCE_BASE_IDX 1 5355fb4d8502Sjsg #define mmGDS_GWS_RESOURCE_CNT 0x241c 5356fb4d8502Sjsg #define mmGDS_GWS_RESOURCE_CNT_BASE_IDX 1 5357fb4d8502Sjsg #define mmGDS_OA_CNTL 0x241d 5358fb4d8502Sjsg #define mmGDS_OA_CNTL_BASE_IDX 1 5359fb4d8502Sjsg #define mmGDS_OA_COUNTER 0x241e 5360fb4d8502Sjsg #define mmGDS_OA_COUNTER_BASE_IDX 1 5361fb4d8502Sjsg #define mmGDS_OA_ADDRESS 0x241f 5362fb4d8502Sjsg #define mmGDS_OA_ADDRESS_BASE_IDX 1 5363fb4d8502Sjsg #define mmGDS_OA_INCDEC 0x2420 5364fb4d8502Sjsg #define mmGDS_OA_INCDEC_BASE_IDX 1 5365fb4d8502Sjsg #define mmGDS_OA_RING_SIZE 0x2421 5366fb4d8502Sjsg #define mmGDS_OA_RING_SIZE_BASE_IDX 1 5367fb4d8502Sjsg #define mmSPI_CONFIG_CNTL 0x2440 5368fb4d8502Sjsg #define mmSPI_CONFIG_CNTL_BASE_IDX 1 5369fb4d8502Sjsg #define mmSPI_CONFIG_CNTL_1 0x2441 5370fb4d8502Sjsg #define mmSPI_CONFIG_CNTL_1_BASE_IDX 1 5371fb4d8502Sjsg #define mmSPI_CONFIG_CNTL_2 0x2442 5372fb4d8502Sjsg #define mmSPI_CONFIG_CNTL_2_BASE_IDX 1 5373fb4d8502Sjsg 5374fb4d8502Sjsg 5375fb4d8502Sjsg // addressBlock: gc_perfddec 5376fb4d8502Sjsg // base address: 0x34000 5377fb4d8502Sjsg #define mmCPG_PERFCOUNTER1_LO 0x3000 5378fb4d8502Sjsg #define mmCPG_PERFCOUNTER1_LO_BASE_IDX 1 5379fb4d8502Sjsg #define mmCPG_PERFCOUNTER1_HI 0x3001 5380fb4d8502Sjsg #define mmCPG_PERFCOUNTER1_HI_BASE_IDX 1 5381fb4d8502Sjsg #define mmCPG_PERFCOUNTER0_LO 0x3002 5382fb4d8502Sjsg #define mmCPG_PERFCOUNTER0_LO_BASE_IDX 1 5383fb4d8502Sjsg #define mmCPG_PERFCOUNTER0_HI 0x3003 5384fb4d8502Sjsg #define mmCPG_PERFCOUNTER0_HI_BASE_IDX 1 5385fb4d8502Sjsg #define mmCPC_PERFCOUNTER1_LO 0x3004 5386fb4d8502Sjsg #define mmCPC_PERFCOUNTER1_LO_BASE_IDX 1 5387fb4d8502Sjsg #define mmCPC_PERFCOUNTER1_HI 0x3005 5388fb4d8502Sjsg #define mmCPC_PERFCOUNTER1_HI_BASE_IDX 1 5389fb4d8502Sjsg #define mmCPC_PERFCOUNTER0_LO 0x3006 5390fb4d8502Sjsg #define mmCPC_PERFCOUNTER0_LO_BASE_IDX 1 5391fb4d8502Sjsg #define mmCPC_PERFCOUNTER0_HI 0x3007 5392fb4d8502Sjsg #define mmCPC_PERFCOUNTER0_HI_BASE_IDX 1 5393fb4d8502Sjsg #define mmCPF_PERFCOUNTER1_LO 0x3008 5394fb4d8502Sjsg #define mmCPF_PERFCOUNTER1_LO_BASE_IDX 1 5395fb4d8502Sjsg #define mmCPF_PERFCOUNTER1_HI 0x3009 5396fb4d8502Sjsg #define mmCPF_PERFCOUNTER1_HI_BASE_IDX 1 5397fb4d8502Sjsg #define mmCPF_PERFCOUNTER0_LO 0x300a 5398fb4d8502Sjsg #define mmCPF_PERFCOUNTER0_LO_BASE_IDX 1 5399fb4d8502Sjsg #define mmCPF_PERFCOUNTER0_HI 0x300b 5400fb4d8502Sjsg #define mmCPF_PERFCOUNTER0_HI_BASE_IDX 1 5401fb4d8502Sjsg #define mmCPF_LATENCY_STATS_DATA 0x300c 5402fb4d8502Sjsg #define mmCPF_LATENCY_STATS_DATA_BASE_IDX 1 5403fb4d8502Sjsg #define mmCPG_LATENCY_STATS_DATA 0x300d 5404fb4d8502Sjsg #define mmCPG_LATENCY_STATS_DATA_BASE_IDX 1 5405fb4d8502Sjsg #define mmCPC_LATENCY_STATS_DATA 0x300e 5406fb4d8502Sjsg #define mmCPC_LATENCY_STATS_DATA_BASE_IDX 1 5407fb4d8502Sjsg #define mmGRBM_PERFCOUNTER0_LO 0x3040 5408fb4d8502Sjsg #define mmGRBM_PERFCOUNTER0_LO_BASE_IDX 1 5409fb4d8502Sjsg #define mmGRBM_PERFCOUNTER0_HI 0x3041 5410fb4d8502Sjsg #define mmGRBM_PERFCOUNTER0_HI_BASE_IDX 1 5411fb4d8502Sjsg #define mmGRBM_PERFCOUNTER1_LO 0x3043 5412fb4d8502Sjsg #define mmGRBM_PERFCOUNTER1_LO_BASE_IDX 1 5413fb4d8502Sjsg #define mmGRBM_PERFCOUNTER1_HI 0x3044 5414fb4d8502Sjsg #define mmGRBM_PERFCOUNTER1_HI_BASE_IDX 1 5415fb4d8502Sjsg #define mmGRBM_SE0_PERFCOUNTER_LO 0x3045 5416fb4d8502Sjsg #define mmGRBM_SE0_PERFCOUNTER_LO_BASE_IDX 1 5417fb4d8502Sjsg #define mmGRBM_SE0_PERFCOUNTER_HI 0x3046 5418fb4d8502Sjsg #define mmGRBM_SE0_PERFCOUNTER_HI_BASE_IDX 1 5419fb4d8502Sjsg #define mmGRBM_SE1_PERFCOUNTER_LO 0x3047 5420fb4d8502Sjsg #define mmGRBM_SE1_PERFCOUNTER_LO_BASE_IDX 1 5421fb4d8502Sjsg #define mmGRBM_SE1_PERFCOUNTER_HI 0x3048 5422fb4d8502Sjsg #define mmGRBM_SE1_PERFCOUNTER_HI_BASE_IDX 1 5423fb4d8502Sjsg #define mmGRBM_SE2_PERFCOUNTER_LO 0x3049 5424fb4d8502Sjsg #define mmGRBM_SE2_PERFCOUNTER_LO_BASE_IDX 1 5425fb4d8502Sjsg #define mmGRBM_SE2_PERFCOUNTER_HI 0x304a 5426fb4d8502Sjsg #define mmGRBM_SE2_PERFCOUNTER_HI_BASE_IDX 1 5427fb4d8502Sjsg #define mmGRBM_SE3_PERFCOUNTER_LO 0x304b 5428fb4d8502Sjsg #define mmGRBM_SE3_PERFCOUNTER_LO_BASE_IDX 1 5429fb4d8502Sjsg #define mmGRBM_SE3_PERFCOUNTER_HI 0x304c 5430fb4d8502Sjsg #define mmGRBM_SE3_PERFCOUNTER_HI_BASE_IDX 1 5431fb4d8502Sjsg #define mmWD_PERFCOUNTER0_LO 0x3080 5432fb4d8502Sjsg #define mmWD_PERFCOUNTER0_LO_BASE_IDX 1 5433fb4d8502Sjsg #define mmWD_PERFCOUNTER0_HI 0x3081 5434fb4d8502Sjsg #define mmWD_PERFCOUNTER0_HI_BASE_IDX 1 5435fb4d8502Sjsg #define mmWD_PERFCOUNTER1_LO 0x3082 5436fb4d8502Sjsg #define mmWD_PERFCOUNTER1_LO_BASE_IDX 1 5437fb4d8502Sjsg #define mmWD_PERFCOUNTER1_HI 0x3083 5438fb4d8502Sjsg #define mmWD_PERFCOUNTER1_HI_BASE_IDX 1 5439fb4d8502Sjsg #define mmWD_PERFCOUNTER2_LO 0x3084 5440fb4d8502Sjsg #define mmWD_PERFCOUNTER2_LO_BASE_IDX 1 5441fb4d8502Sjsg #define mmWD_PERFCOUNTER2_HI 0x3085 5442fb4d8502Sjsg #define mmWD_PERFCOUNTER2_HI_BASE_IDX 1 5443fb4d8502Sjsg #define mmWD_PERFCOUNTER3_LO 0x3086 5444fb4d8502Sjsg #define mmWD_PERFCOUNTER3_LO_BASE_IDX 1 5445fb4d8502Sjsg #define mmWD_PERFCOUNTER3_HI 0x3087 5446fb4d8502Sjsg #define mmWD_PERFCOUNTER3_HI_BASE_IDX 1 5447fb4d8502Sjsg #define mmIA_PERFCOUNTER0_LO 0x3088 5448fb4d8502Sjsg #define mmIA_PERFCOUNTER0_LO_BASE_IDX 1 5449fb4d8502Sjsg #define mmIA_PERFCOUNTER0_HI 0x3089 5450fb4d8502Sjsg #define mmIA_PERFCOUNTER0_HI_BASE_IDX 1 5451fb4d8502Sjsg #define mmIA_PERFCOUNTER1_LO 0x308a 5452fb4d8502Sjsg #define mmIA_PERFCOUNTER1_LO_BASE_IDX 1 5453fb4d8502Sjsg #define mmIA_PERFCOUNTER1_HI 0x308b 5454fb4d8502Sjsg #define mmIA_PERFCOUNTER1_HI_BASE_IDX 1 5455fb4d8502Sjsg #define mmIA_PERFCOUNTER2_LO 0x308c 5456fb4d8502Sjsg #define mmIA_PERFCOUNTER2_LO_BASE_IDX 1 5457fb4d8502Sjsg #define mmIA_PERFCOUNTER2_HI 0x308d 5458fb4d8502Sjsg #define mmIA_PERFCOUNTER2_HI_BASE_IDX 1 5459fb4d8502Sjsg #define mmIA_PERFCOUNTER3_LO 0x308e 5460fb4d8502Sjsg #define mmIA_PERFCOUNTER3_LO_BASE_IDX 1 5461fb4d8502Sjsg #define mmIA_PERFCOUNTER3_HI 0x308f 5462fb4d8502Sjsg #define mmIA_PERFCOUNTER3_HI_BASE_IDX 1 5463fb4d8502Sjsg #define mmVGT_PERFCOUNTER0_LO 0x3090 5464fb4d8502Sjsg #define mmVGT_PERFCOUNTER0_LO_BASE_IDX 1 5465fb4d8502Sjsg #define mmVGT_PERFCOUNTER0_HI 0x3091 5466fb4d8502Sjsg #define mmVGT_PERFCOUNTER0_HI_BASE_IDX 1 5467fb4d8502Sjsg #define mmVGT_PERFCOUNTER1_LO 0x3092 5468fb4d8502Sjsg #define mmVGT_PERFCOUNTER1_LO_BASE_IDX 1 5469fb4d8502Sjsg #define mmVGT_PERFCOUNTER1_HI 0x3093 5470fb4d8502Sjsg #define mmVGT_PERFCOUNTER1_HI_BASE_IDX 1 5471fb4d8502Sjsg #define mmVGT_PERFCOUNTER2_LO 0x3094 5472fb4d8502Sjsg #define mmVGT_PERFCOUNTER2_LO_BASE_IDX 1 5473fb4d8502Sjsg #define mmVGT_PERFCOUNTER2_HI 0x3095 5474fb4d8502Sjsg #define mmVGT_PERFCOUNTER2_HI_BASE_IDX 1 5475fb4d8502Sjsg #define mmVGT_PERFCOUNTER3_LO 0x3096 5476fb4d8502Sjsg #define mmVGT_PERFCOUNTER3_LO_BASE_IDX 1 5477fb4d8502Sjsg #define mmVGT_PERFCOUNTER3_HI 0x3097 5478fb4d8502Sjsg #define mmVGT_PERFCOUNTER3_HI_BASE_IDX 1 5479fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER0_LO 0x3100 5480fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER0_LO_BASE_IDX 1 5481fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER0_HI 0x3101 5482fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER0_HI_BASE_IDX 1 5483fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER1_LO 0x3102 5484fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER1_LO_BASE_IDX 1 5485fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER1_HI 0x3103 5486fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER1_HI_BASE_IDX 1 5487fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER2_LO 0x3104 5488fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER2_LO_BASE_IDX 1 5489fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER2_HI 0x3105 5490fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER2_HI_BASE_IDX 1 5491fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER3_LO 0x3106 5492fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER3_LO_BASE_IDX 1 5493fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER3_HI 0x3107 5494fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER3_HI_BASE_IDX 1 5495fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER0_LO 0x3140 5496fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER0_LO_BASE_IDX 1 5497fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER0_HI 0x3141 5498fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER0_HI_BASE_IDX 1 5499fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER1_LO 0x3142 5500fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER1_LO_BASE_IDX 1 5501fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER1_HI 0x3143 5502fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER1_HI_BASE_IDX 1 5503fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER2_LO 0x3144 5504fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER2_LO_BASE_IDX 1 5505fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER2_HI 0x3145 5506fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER2_HI_BASE_IDX 1 5507fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER3_LO 0x3146 5508fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER3_LO_BASE_IDX 1 5509fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER3_HI 0x3147 5510fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER3_HI_BASE_IDX 1 5511fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER4_LO 0x3148 5512fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER4_LO_BASE_IDX 1 5513fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER4_HI 0x3149 5514fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER4_HI_BASE_IDX 1 5515fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER5_LO 0x314a 5516fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER5_LO_BASE_IDX 1 5517fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER5_HI 0x314b 5518fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER5_HI_BASE_IDX 1 5519fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER6_LO 0x314c 5520fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER6_LO_BASE_IDX 1 5521fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER6_HI 0x314d 5522fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER6_HI_BASE_IDX 1 5523fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER7_LO 0x314e 5524fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER7_LO_BASE_IDX 1 5525fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER7_HI 0x314f 5526fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER7_HI_BASE_IDX 1 5527fb4d8502Sjsg #define mmSPI_PERFCOUNTER0_HI 0x3180 5528fb4d8502Sjsg #define mmSPI_PERFCOUNTER0_HI_BASE_IDX 1 5529fb4d8502Sjsg #define mmSPI_PERFCOUNTER0_LO 0x3181 5530fb4d8502Sjsg #define mmSPI_PERFCOUNTER0_LO_BASE_IDX 1 5531fb4d8502Sjsg #define mmSPI_PERFCOUNTER1_HI 0x3182 5532fb4d8502Sjsg #define mmSPI_PERFCOUNTER1_HI_BASE_IDX 1 5533fb4d8502Sjsg #define mmSPI_PERFCOUNTER1_LO 0x3183 5534fb4d8502Sjsg #define mmSPI_PERFCOUNTER1_LO_BASE_IDX 1 5535fb4d8502Sjsg #define mmSPI_PERFCOUNTER2_HI 0x3184 5536fb4d8502Sjsg #define mmSPI_PERFCOUNTER2_HI_BASE_IDX 1 5537fb4d8502Sjsg #define mmSPI_PERFCOUNTER2_LO 0x3185 5538fb4d8502Sjsg #define mmSPI_PERFCOUNTER2_LO_BASE_IDX 1 5539fb4d8502Sjsg #define mmSPI_PERFCOUNTER3_HI 0x3186 5540fb4d8502Sjsg #define mmSPI_PERFCOUNTER3_HI_BASE_IDX 1 5541fb4d8502Sjsg #define mmSPI_PERFCOUNTER3_LO 0x3187 5542fb4d8502Sjsg #define mmSPI_PERFCOUNTER3_LO_BASE_IDX 1 5543fb4d8502Sjsg #define mmSPI_PERFCOUNTER4_HI 0x3188 5544fb4d8502Sjsg #define mmSPI_PERFCOUNTER4_HI_BASE_IDX 1 5545fb4d8502Sjsg #define mmSPI_PERFCOUNTER4_LO 0x3189 5546fb4d8502Sjsg #define mmSPI_PERFCOUNTER4_LO_BASE_IDX 1 5547fb4d8502Sjsg #define mmSPI_PERFCOUNTER5_HI 0x318a 5548fb4d8502Sjsg #define mmSPI_PERFCOUNTER5_HI_BASE_IDX 1 5549fb4d8502Sjsg #define mmSPI_PERFCOUNTER5_LO 0x318b 5550fb4d8502Sjsg #define mmSPI_PERFCOUNTER5_LO_BASE_IDX 1 5551fb4d8502Sjsg #define mmSQ_PERFCOUNTER0_LO 0x31c0 5552fb4d8502Sjsg #define mmSQ_PERFCOUNTER0_LO_BASE_IDX 1 5553fb4d8502Sjsg #define mmSQ_PERFCOUNTER0_HI 0x31c1 5554fb4d8502Sjsg #define mmSQ_PERFCOUNTER0_HI_BASE_IDX 1 5555fb4d8502Sjsg #define mmSQ_PERFCOUNTER1_LO 0x31c2 5556fb4d8502Sjsg #define mmSQ_PERFCOUNTER1_LO_BASE_IDX 1 5557fb4d8502Sjsg #define mmSQ_PERFCOUNTER1_HI 0x31c3 5558fb4d8502Sjsg #define mmSQ_PERFCOUNTER1_HI_BASE_IDX 1 5559fb4d8502Sjsg #define mmSQ_PERFCOUNTER2_LO 0x31c4 5560fb4d8502Sjsg #define mmSQ_PERFCOUNTER2_LO_BASE_IDX 1 5561fb4d8502Sjsg #define mmSQ_PERFCOUNTER2_HI 0x31c5 5562fb4d8502Sjsg #define mmSQ_PERFCOUNTER2_HI_BASE_IDX 1 5563fb4d8502Sjsg #define mmSQ_PERFCOUNTER3_LO 0x31c6 5564fb4d8502Sjsg #define mmSQ_PERFCOUNTER3_LO_BASE_IDX 1 5565fb4d8502Sjsg #define mmSQ_PERFCOUNTER3_HI 0x31c7 5566fb4d8502Sjsg #define mmSQ_PERFCOUNTER3_HI_BASE_IDX 1 5567fb4d8502Sjsg #define mmSQ_PERFCOUNTER4_LO 0x31c8 5568fb4d8502Sjsg #define mmSQ_PERFCOUNTER4_LO_BASE_IDX 1 5569fb4d8502Sjsg #define mmSQ_PERFCOUNTER4_HI 0x31c9 5570fb4d8502Sjsg #define mmSQ_PERFCOUNTER4_HI_BASE_IDX 1 5571fb4d8502Sjsg #define mmSQ_PERFCOUNTER5_LO 0x31ca 5572fb4d8502Sjsg #define mmSQ_PERFCOUNTER5_LO_BASE_IDX 1 5573fb4d8502Sjsg #define mmSQ_PERFCOUNTER5_HI 0x31cb 5574fb4d8502Sjsg #define mmSQ_PERFCOUNTER5_HI_BASE_IDX 1 5575fb4d8502Sjsg #define mmSQ_PERFCOUNTER6_LO 0x31cc 5576fb4d8502Sjsg #define mmSQ_PERFCOUNTER6_LO_BASE_IDX 1 5577fb4d8502Sjsg #define mmSQ_PERFCOUNTER6_HI 0x31cd 5578fb4d8502Sjsg #define mmSQ_PERFCOUNTER6_HI_BASE_IDX 1 5579fb4d8502Sjsg #define mmSQ_PERFCOUNTER7_LO 0x31ce 5580fb4d8502Sjsg #define mmSQ_PERFCOUNTER7_LO_BASE_IDX 1 5581fb4d8502Sjsg #define mmSQ_PERFCOUNTER7_HI 0x31cf 5582fb4d8502Sjsg #define mmSQ_PERFCOUNTER7_HI_BASE_IDX 1 5583fb4d8502Sjsg #define mmSQ_PERFCOUNTER8_LO 0x31d0 5584fb4d8502Sjsg #define mmSQ_PERFCOUNTER8_LO_BASE_IDX 1 5585fb4d8502Sjsg #define mmSQ_PERFCOUNTER8_HI 0x31d1 5586fb4d8502Sjsg #define mmSQ_PERFCOUNTER8_HI_BASE_IDX 1 5587fb4d8502Sjsg #define mmSQ_PERFCOUNTER9_LO 0x31d2 5588fb4d8502Sjsg #define mmSQ_PERFCOUNTER9_LO_BASE_IDX 1 5589fb4d8502Sjsg #define mmSQ_PERFCOUNTER9_HI 0x31d3 5590fb4d8502Sjsg #define mmSQ_PERFCOUNTER9_HI_BASE_IDX 1 5591fb4d8502Sjsg #define mmSQ_PERFCOUNTER10_LO 0x31d4 5592fb4d8502Sjsg #define mmSQ_PERFCOUNTER10_LO_BASE_IDX 1 5593fb4d8502Sjsg #define mmSQ_PERFCOUNTER10_HI 0x31d5 5594fb4d8502Sjsg #define mmSQ_PERFCOUNTER10_HI_BASE_IDX 1 5595fb4d8502Sjsg #define mmSQ_PERFCOUNTER11_LO 0x31d6 5596fb4d8502Sjsg #define mmSQ_PERFCOUNTER11_LO_BASE_IDX 1 5597fb4d8502Sjsg #define mmSQ_PERFCOUNTER11_HI 0x31d7 5598fb4d8502Sjsg #define mmSQ_PERFCOUNTER11_HI_BASE_IDX 1 5599fb4d8502Sjsg #define mmSQ_PERFCOUNTER12_LO 0x31d8 5600fb4d8502Sjsg #define mmSQ_PERFCOUNTER12_LO_BASE_IDX 1 5601fb4d8502Sjsg #define mmSQ_PERFCOUNTER12_HI 0x31d9 5602fb4d8502Sjsg #define mmSQ_PERFCOUNTER12_HI_BASE_IDX 1 5603fb4d8502Sjsg #define mmSQ_PERFCOUNTER13_LO 0x31da 5604fb4d8502Sjsg #define mmSQ_PERFCOUNTER13_LO_BASE_IDX 1 5605fb4d8502Sjsg #define mmSQ_PERFCOUNTER13_HI 0x31db 5606fb4d8502Sjsg #define mmSQ_PERFCOUNTER13_HI_BASE_IDX 1 5607fb4d8502Sjsg #define mmSQ_PERFCOUNTER14_LO 0x31dc 5608fb4d8502Sjsg #define mmSQ_PERFCOUNTER14_LO_BASE_IDX 1 5609fb4d8502Sjsg #define mmSQ_PERFCOUNTER14_HI 0x31dd 5610fb4d8502Sjsg #define mmSQ_PERFCOUNTER14_HI_BASE_IDX 1 5611fb4d8502Sjsg #define mmSQ_PERFCOUNTER15_LO 0x31de 5612fb4d8502Sjsg #define mmSQ_PERFCOUNTER15_LO_BASE_IDX 1 5613fb4d8502Sjsg #define mmSQ_PERFCOUNTER15_HI 0x31df 5614fb4d8502Sjsg #define mmSQ_PERFCOUNTER15_HI_BASE_IDX 1 5615fb4d8502Sjsg #define mmSX_PERFCOUNTER0_LO 0x3240 5616fb4d8502Sjsg #define mmSX_PERFCOUNTER0_LO_BASE_IDX 1 5617fb4d8502Sjsg #define mmSX_PERFCOUNTER0_HI 0x3241 5618fb4d8502Sjsg #define mmSX_PERFCOUNTER0_HI_BASE_IDX 1 5619fb4d8502Sjsg #define mmSX_PERFCOUNTER1_LO 0x3242 5620fb4d8502Sjsg #define mmSX_PERFCOUNTER1_LO_BASE_IDX 1 5621fb4d8502Sjsg #define mmSX_PERFCOUNTER1_HI 0x3243 5622fb4d8502Sjsg #define mmSX_PERFCOUNTER1_HI_BASE_IDX 1 5623fb4d8502Sjsg #define mmSX_PERFCOUNTER2_LO 0x3244 5624fb4d8502Sjsg #define mmSX_PERFCOUNTER2_LO_BASE_IDX 1 5625fb4d8502Sjsg #define mmSX_PERFCOUNTER2_HI 0x3245 5626fb4d8502Sjsg #define mmSX_PERFCOUNTER2_HI_BASE_IDX 1 5627fb4d8502Sjsg #define mmSX_PERFCOUNTER3_LO 0x3246 5628fb4d8502Sjsg #define mmSX_PERFCOUNTER3_LO_BASE_IDX 1 5629fb4d8502Sjsg #define mmSX_PERFCOUNTER3_HI 0x3247 5630fb4d8502Sjsg #define mmSX_PERFCOUNTER3_HI_BASE_IDX 1 5631fb4d8502Sjsg #define mmGDS_PERFCOUNTER0_LO 0x3280 5632fb4d8502Sjsg #define mmGDS_PERFCOUNTER0_LO_BASE_IDX 1 5633fb4d8502Sjsg #define mmGDS_PERFCOUNTER0_HI 0x3281 5634fb4d8502Sjsg #define mmGDS_PERFCOUNTER0_HI_BASE_IDX 1 5635fb4d8502Sjsg #define mmGDS_PERFCOUNTER1_LO 0x3282 5636fb4d8502Sjsg #define mmGDS_PERFCOUNTER1_LO_BASE_IDX 1 5637fb4d8502Sjsg #define mmGDS_PERFCOUNTER1_HI 0x3283 5638fb4d8502Sjsg #define mmGDS_PERFCOUNTER1_HI_BASE_IDX 1 5639fb4d8502Sjsg #define mmGDS_PERFCOUNTER2_LO 0x3284 5640fb4d8502Sjsg #define mmGDS_PERFCOUNTER2_LO_BASE_IDX 1 5641fb4d8502Sjsg #define mmGDS_PERFCOUNTER2_HI 0x3285 5642fb4d8502Sjsg #define mmGDS_PERFCOUNTER2_HI_BASE_IDX 1 5643fb4d8502Sjsg #define mmGDS_PERFCOUNTER3_LO 0x3286 5644fb4d8502Sjsg #define mmGDS_PERFCOUNTER3_LO_BASE_IDX 1 5645fb4d8502Sjsg #define mmGDS_PERFCOUNTER3_HI 0x3287 5646fb4d8502Sjsg #define mmGDS_PERFCOUNTER3_HI_BASE_IDX 1 5647fb4d8502Sjsg #define mmTA_PERFCOUNTER0_LO 0x32c0 5648fb4d8502Sjsg #define mmTA_PERFCOUNTER0_LO_BASE_IDX 1 5649fb4d8502Sjsg #define mmTA_PERFCOUNTER0_HI 0x32c1 5650fb4d8502Sjsg #define mmTA_PERFCOUNTER0_HI_BASE_IDX 1 5651fb4d8502Sjsg #define mmTA_PERFCOUNTER1_LO 0x32c2 5652fb4d8502Sjsg #define mmTA_PERFCOUNTER1_LO_BASE_IDX 1 5653fb4d8502Sjsg #define mmTA_PERFCOUNTER1_HI 0x32c3 5654fb4d8502Sjsg #define mmTA_PERFCOUNTER1_HI_BASE_IDX 1 5655fb4d8502Sjsg #define mmTD_PERFCOUNTER0_LO 0x3300 5656fb4d8502Sjsg #define mmTD_PERFCOUNTER0_LO_BASE_IDX 1 5657fb4d8502Sjsg #define mmTD_PERFCOUNTER0_HI 0x3301 5658fb4d8502Sjsg #define mmTD_PERFCOUNTER0_HI_BASE_IDX 1 5659fb4d8502Sjsg #define mmTD_PERFCOUNTER1_LO 0x3302 5660fb4d8502Sjsg #define mmTD_PERFCOUNTER1_LO_BASE_IDX 1 5661fb4d8502Sjsg #define mmTD_PERFCOUNTER1_HI 0x3303 5662fb4d8502Sjsg #define mmTD_PERFCOUNTER1_HI_BASE_IDX 1 5663fb4d8502Sjsg #define mmTCP_PERFCOUNTER0_LO 0x3340 5664fb4d8502Sjsg #define mmTCP_PERFCOUNTER0_LO_BASE_IDX 1 5665fb4d8502Sjsg #define mmTCP_PERFCOUNTER0_HI 0x3341 5666fb4d8502Sjsg #define mmTCP_PERFCOUNTER0_HI_BASE_IDX 1 5667fb4d8502Sjsg #define mmTCP_PERFCOUNTER1_LO 0x3342 5668fb4d8502Sjsg #define mmTCP_PERFCOUNTER1_LO_BASE_IDX 1 5669fb4d8502Sjsg #define mmTCP_PERFCOUNTER1_HI 0x3343 5670fb4d8502Sjsg #define mmTCP_PERFCOUNTER1_HI_BASE_IDX 1 5671fb4d8502Sjsg #define mmTCP_PERFCOUNTER2_LO 0x3344 5672fb4d8502Sjsg #define mmTCP_PERFCOUNTER2_LO_BASE_IDX 1 5673fb4d8502Sjsg #define mmTCP_PERFCOUNTER2_HI 0x3345 5674fb4d8502Sjsg #define mmTCP_PERFCOUNTER2_HI_BASE_IDX 1 5675fb4d8502Sjsg #define mmTCP_PERFCOUNTER3_LO 0x3346 5676fb4d8502Sjsg #define mmTCP_PERFCOUNTER3_LO_BASE_IDX 1 5677fb4d8502Sjsg #define mmTCP_PERFCOUNTER3_HI 0x3347 5678fb4d8502Sjsg #define mmTCP_PERFCOUNTER3_HI_BASE_IDX 1 5679fb4d8502Sjsg #define mmTCC_PERFCOUNTER0_LO 0x3380 5680fb4d8502Sjsg #define mmTCC_PERFCOUNTER0_LO_BASE_IDX 1 5681fb4d8502Sjsg #define mmTCC_PERFCOUNTER0_HI 0x3381 5682fb4d8502Sjsg #define mmTCC_PERFCOUNTER0_HI_BASE_IDX 1 5683fb4d8502Sjsg #define mmTCC_PERFCOUNTER1_LO 0x3382 5684fb4d8502Sjsg #define mmTCC_PERFCOUNTER1_LO_BASE_IDX 1 5685fb4d8502Sjsg #define mmTCC_PERFCOUNTER1_HI 0x3383 5686fb4d8502Sjsg #define mmTCC_PERFCOUNTER1_HI_BASE_IDX 1 5687fb4d8502Sjsg #define mmTCC_PERFCOUNTER2_LO 0x3384 5688fb4d8502Sjsg #define mmTCC_PERFCOUNTER2_LO_BASE_IDX 1 5689fb4d8502Sjsg #define mmTCC_PERFCOUNTER2_HI 0x3385 5690fb4d8502Sjsg #define mmTCC_PERFCOUNTER2_HI_BASE_IDX 1 5691fb4d8502Sjsg #define mmTCC_PERFCOUNTER3_LO 0x3386 5692fb4d8502Sjsg #define mmTCC_PERFCOUNTER3_LO_BASE_IDX 1 5693fb4d8502Sjsg #define mmTCC_PERFCOUNTER3_HI 0x3387 5694fb4d8502Sjsg #define mmTCC_PERFCOUNTER3_HI_BASE_IDX 1 5695fb4d8502Sjsg #define mmTCA_PERFCOUNTER0_LO 0x3390 5696fb4d8502Sjsg #define mmTCA_PERFCOUNTER0_LO_BASE_IDX 1 5697fb4d8502Sjsg #define mmTCA_PERFCOUNTER0_HI 0x3391 5698fb4d8502Sjsg #define mmTCA_PERFCOUNTER0_HI_BASE_IDX 1 5699fb4d8502Sjsg #define mmTCA_PERFCOUNTER1_LO 0x3392 5700fb4d8502Sjsg #define mmTCA_PERFCOUNTER1_LO_BASE_IDX 1 5701fb4d8502Sjsg #define mmTCA_PERFCOUNTER1_HI 0x3393 5702fb4d8502Sjsg #define mmTCA_PERFCOUNTER1_HI_BASE_IDX 1 5703fb4d8502Sjsg #define mmTCA_PERFCOUNTER2_LO 0x3394 5704fb4d8502Sjsg #define mmTCA_PERFCOUNTER2_LO_BASE_IDX 1 5705fb4d8502Sjsg #define mmTCA_PERFCOUNTER2_HI 0x3395 5706fb4d8502Sjsg #define mmTCA_PERFCOUNTER2_HI_BASE_IDX 1 5707fb4d8502Sjsg #define mmTCA_PERFCOUNTER3_LO 0x3396 5708fb4d8502Sjsg #define mmTCA_PERFCOUNTER3_LO_BASE_IDX 1 5709fb4d8502Sjsg #define mmTCA_PERFCOUNTER3_HI 0x3397 5710fb4d8502Sjsg #define mmTCA_PERFCOUNTER3_HI_BASE_IDX 1 5711fb4d8502Sjsg #define mmCB_PERFCOUNTER0_LO 0x3406 5712fb4d8502Sjsg #define mmCB_PERFCOUNTER0_LO_BASE_IDX 1 5713fb4d8502Sjsg #define mmCB_PERFCOUNTER0_HI 0x3407 5714fb4d8502Sjsg #define mmCB_PERFCOUNTER0_HI_BASE_IDX 1 5715fb4d8502Sjsg #define mmCB_PERFCOUNTER1_LO 0x3408 5716fb4d8502Sjsg #define mmCB_PERFCOUNTER1_LO_BASE_IDX 1 5717fb4d8502Sjsg #define mmCB_PERFCOUNTER1_HI 0x3409 5718fb4d8502Sjsg #define mmCB_PERFCOUNTER1_HI_BASE_IDX 1 5719fb4d8502Sjsg #define mmCB_PERFCOUNTER2_LO 0x340a 5720fb4d8502Sjsg #define mmCB_PERFCOUNTER2_LO_BASE_IDX 1 5721fb4d8502Sjsg #define mmCB_PERFCOUNTER2_HI 0x340b 5722fb4d8502Sjsg #define mmCB_PERFCOUNTER2_HI_BASE_IDX 1 5723fb4d8502Sjsg #define mmCB_PERFCOUNTER3_LO 0x340c 5724fb4d8502Sjsg #define mmCB_PERFCOUNTER3_LO_BASE_IDX 1 5725fb4d8502Sjsg #define mmCB_PERFCOUNTER3_HI 0x340d 5726fb4d8502Sjsg #define mmCB_PERFCOUNTER3_HI_BASE_IDX 1 5727fb4d8502Sjsg #define mmDB_PERFCOUNTER0_LO 0x3440 5728fb4d8502Sjsg #define mmDB_PERFCOUNTER0_LO_BASE_IDX 1 5729fb4d8502Sjsg #define mmDB_PERFCOUNTER0_HI 0x3441 5730fb4d8502Sjsg #define mmDB_PERFCOUNTER0_HI_BASE_IDX 1 5731fb4d8502Sjsg #define mmDB_PERFCOUNTER1_LO 0x3442 5732fb4d8502Sjsg #define mmDB_PERFCOUNTER1_LO_BASE_IDX 1 5733fb4d8502Sjsg #define mmDB_PERFCOUNTER1_HI 0x3443 5734fb4d8502Sjsg #define mmDB_PERFCOUNTER1_HI_BASE_IDX 1 5735fb4d8502Sjsg #define mmDB_PERFCOUNTER2_LO 0x3444 5736fb4d8502Sjsg #define mmDB_PERFCOUNTER2_LO_BASE_IDX 1 5737fb4d8502Sjsg #define mmDB_PERFCOUNTER2_HI 0x3445 5738fb4d8502Sjsg #define mmDB_PERFCOUNTER2_HI_BASE_IDX 1 5739fb4d8502Sjsg #define mmDB_PERFCOUNTER3_LO 0x3446 5740fb4d8502Sjsg #define mmDB_PERFCOUNTER3_LO_BASE_IDX 1 5741fb4d8502Sjsg #define mmDB_PERFCOUNTER3_HI 0x3447 5742fb4d8502Sjsg #define mmDB_PERFCOUNTER3_HI_BASE_IDX 1 5743fb4d8502Sjsg #define mmRLC_PERFCOUNTER0_LO 0x3480 5744fb4d8502Sjsg #define mmRLC_PERFCOUNTER0_LO_BASE_IDX 1 5745fb4d8502Sjsg #define mmRLC_PERFCOUNTER0_HI 0x3481 5746fb4d8502Sjsg #define mmRLC_PERFCOUNTER0_HI_BASE_IDX 1 5747fb4d8502Sjsg #define mmRLC_PERFCOUNTER1_LO 0x3482 5748fb4d8502Sjsg #define mmRLC_PERFCOUNTER1_LO_BASE_IDX 1 5749fb4d8502Sjsg #define mmRLC_PERFCOUNTER1_HI 0x3483 5750fb4d8502Sjsg #define mmRLC_PERFCOUNTER1_HI_BASE_IDX 1 5751fb4d8502Sjsg #define mmRMI_PERFCOUNTER0_LO 0x34c0 5752fb4d8502Sjsg #define mmRMI_PERFCOUNTER0_LO_BASE_IDX 1 5753fb4d8502Sjsg #define mmRMI_PERFCOUNTER0_HI 0x34c1 5754fb4d8502Sjsg #define mmRMI_PERFCOUNTER0_HI_BASE_IDX 1 5755fb4d8502Sjsg #define mmRMI_PERFCOUNTER1_LO 0x34c2 5756fb4d8502Sjsg #define mmRMI_PERFCOUNTER1_LO_BASE_IDX 1 5757fb4d8502Sjsg #define mmRMI_PERFCOUNTER1_HI 0x34c3 5758fb4d8502Sjsg #define mmRMI_PERFCOUNTER1_HI_BASE_IDX 1 5759fb4d8502Sjsg #define mmRMI_PERFCOUNTER2_LO 0x34c4 5760fb4d8502Sjsg #define mmRMI_PERFCOUNTER2_LO_BASE_IDX 1 5761fb4d8502Sjsg #define mmRMI_PERFCOUNTER2_HI 0x34c5 5762fb4d8502Sjsg #define mmRMI_PERFCOUNTER2_HI_BASE_IDX 1 5763fb4d8502Sjsg #define mmRMI_PERFCOUNTER3_LO 0x34c6 5764fb4d8502Sjsg #define mmRMI_PERFCOUNTER3_LO_BASE_IDX 1 5765fb4d8502Sjsg #define mmRMI_PERFCOUNTER3_HI 0x34c7 5766fb4d8502Sjsg #define mmRMI_PERFCOUNTER3_HI_BASE_IDX 1 5767fb4d8502Sjsg 5768fb4d8502Sjsg 5769fb4d8502Sjsg // addressBlock: gc_utcl2_atcl2pfcntrdec 5770fb4d8502Sjsg // base address: 0x35400 5771fb4d8502Sjsg #define mmATC_L2_PERFCOUNTER_LO 0x3500 5772fb4d8502Sjsg #define mmATC_L2_PERFCOUNTER_LO_BASE_IDX 1 5773fb4d8502Sjsg #define mmATC_L2_PERFCOUNTER_HI 0x3501 5774fb4d8502Sjsg #define mmATC_L2_PERFCOUNTER_HI_BASE_IDX 1 5775fb4d8502Sjsg 5776fb4d8502Sjsg 5777fb4d8502Sjsg // addressBlock: gc_utcl2_vml2prdec 5778fb4d8502Sjsg // base address: 0x35420 5779fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER_LO 0x3508 5780fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER_LO_BASE_IDX 1 5781fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER_HI 0x3509 5782fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER_HI_BASE_IDX 1 5783fb4d8502Sjsg 5784fb4d8502Sjsg 5785fb4d8502Sjsg // addressBlock: gc_perfsdec 5786fb4d8502Sjsg // base address: 0x36000 5787fb4d8502Sjsg #define mmCPG_PERFCOUNTER1_SELECT 0x3800 5788fb4d8502Sjsg #define mmCPG_PERFCOUNTER1_SELECT_BASE_IDX 1 5789fb4d8502Sjsg #define mmCPG_PERFCOUNTER0_SELECT1 0x3801 5790fb4d8502Sjsg #define mmCPG_PERFCOUNTER0_SELECT1_BASE_IDX 1 5791fb4d8502Sjsg #define mmCPG_PERFCOUNTER0_SELECT 0x3802 5792fb4d8502Sjsg #define mmCPG_PERFCOUNTER0_SELECT_BASE_IDX 1 5793fb4d8502Sjsg #define mmCPC_PERFCOUNTER1_SELECT 0x3803 5794fb4d8502Sjsg #define mmCPC_PERFCOUNTER1_SELECT_BASE_IDX 1 5795fb4d8502Sjsg #define mmCPC_PERFCOUNTER0_SELECT1 0x3804 5796fb4d8502Sjsg #define mmCPC_PERFCOUNTER0_SELECT1_BASE_IDX 1 5797fb4d8502Sjsg #define mmCPF_PERFCOUNTER1_SELECT 0x3805 5798fb4d8502Sjsg #define mmCPF_PERFCOUNTER1_SELECT_BASE_IDX 1 5799fb4d8502Sjsg #define mmCPF_PERFCOUNTER0_SELECT1 0x3806 5800fb4d8502Sjsg #define mmCPF_PERFCOUNTER0_SELECT1_BASE_IDX 1 5801fb4d8502Sjsg #define mmCPF_PERFCOUNTER0_SELECT 0x3807 5802fb4d8502Sjsg #define mmCPF_PERFCOUNTER0_SELECT_BASE_IDX 1 5803fb4d8502Sjsg #define mmCP_PERFMON_CNTL 0x3808 5804fb4d8502Sjsg #define mmCP_PERFMON_CNTL_BASE_IDX 1 5805fb4d8502Sjsg #define mmCPC_PERFCOUNTER0_SELECT 0x3809 5806fb4d8502Sjsg #define mmCPC_PERFCOUNTER0_SELECT_BASE_IDX 1 5807fb4d8502Sjsg #define mmCPF_TC_PERF_COUNTER_WINDOW_SELECT 0x380a 5808fb4d8502Sjsg #define mmCPF_TC_PERF_COUNTER_WINDOW_SELECT_BASE_IDX 1 5809fb4d8502Sjsg #define mmCPG_TC_PERF_COUNTER_WINDOW_SELECT 0x380b 5810fb4d8502Sjsg #define mmCPG_TC_PERF_COUNTER_WINDOW_SELECT_BASE_IDX 1 5811fb4d8502Sjsg #define mmCPF_LATENCY_STATS_SELECT 0x380c 5812fb4d8502Sjsg #define mmCPF_LATENCY_STATS_SELECT_BASE_IDX 1 5813fb4d8502Sjsg #define mmCPG_LATENCY_STATS_SELECT 0x380d 5814fb4d8502Sjsg #define mmCPG_LATENCY_STATS_SELECT_BASE_IDX 1 5815fb4d8502Sjsg #define mmCPC_LATENCY_STATS_SELECT 0x380e 5816fb4d8502Sjsg #define mmCPC_LATENCY_STATS_SELECT_BASE_IDX 1 5817fb4d8502Sjsg #define mmCP_DRAW_OBJECT 0x3810 5818fb4d8502Sjsg #define mmCP_DRAW_OBJECT_BASE_IDX 1 5819fb4d8502Sjsg #define mmCP_DRAW_OBJECT_COUNTER 0x3811 5820fb4d8502Sjsg #define mmCP_DRAW_OBJECT_COUNTER_BASE_IDX 1 5821fb4d8502Sjsg #define mmCP_DRAW_WINDOW_MASK_HI 0x3812 5822fb4d8502Sjsg #define mmCP_DRAW_WINDOW_MASK_HI_BASE_IDX 1 5823fb4d8502Sjsg #define mmCP_DRAW_WINDOW_HI 0x3813 5824fb4d8502Sjsg #define mmCP_DRAW_WINDOW_HI_BASE_IDX 1 5825fb4d8502Sjsg #define mmCP_DRAW_WINDOW_LO 0x3814 5826fb4d8502Sjsg #define mmCP_DRAW_WINDOW_LO_BASE_IDX 1 5827fb4d8502Sjsg #define mmCP_DRAW_WINDOW_CNTL 0x3815 5828fb4d8502Sjsg #define mmCP_DRAW_WINDOW_CNTL_BASE_IDX 1 5829fb4d8502Sjsg #define mmGRBM_PERFCOUNTER0_SELECT 0x3840 5830fb4d8502Sjsg #define mmGRBM_PERFCOUNTER0_SELECT_BASE_IDX 1 5831fb4d8502Sjsg #define mmGRBM_PERFCOUNTER1_SELECT 0x3841 5832fb4d8502Sjsg #define mmGRBM_PERFCOUNTER1_SELECT_BASE_IDX 1 5833fb4d8502Sjsg #define mmGRBM_SE0_PERFCOUNTER_SELECT 0x3842 5834fb4d8502Sjsg #define mmGRBM_SE0_PERFCOUNTER_SELECT_BASE_IDX 1 5835fb4d8502Sjsg #define mmGRBM_SE1_PERFCOUNTER_SELECT 0x3843 5836fb4d8502Sjsg #define mmGRBM_SE1_PERFCOUNTER_SELECT_BASE_IDX 1 5837fb4d8502Sjsg #define mmGRBM_SE2_PERFCOUNTER_SELECT 0x3844 5838fb4d8502Sjsg #define mmGRBM_SE2_PERFCOUNTER_SELECT_BASE_IDX 1 5839fb4d8502Sjsg #define mmGRBM_SE3_PERFCOUNTER_SELECT 0x3845 5840fb4d8502Sjsg #define mmGRBM_SE3_PERFCOUNTER_SELECT_BASE_IDX 1 5841fb4d8502Sjsg #define mmWD_PERFCOUNTER0_SELECT 0x3880 5842fb4d8502Sjsg #define mmWD_PERFCOUNTER0_SELECT_BASE_IDX 1 5843fb4d8502Sjsg #define mmWD_PERFCOUNTER1_SELECT 0x3881 5844fb4d8502Sjsg #define mmWD_PERFCOUNTER1_SELECT_BASE_IDX 1 5845fb4d8502Sjsg #define mmWD_PERFCOUNTER2_SELECT 0x3882 5846fb4d8502Sjsg #define mmWD_PERFCOUNTER2_SELECT_BASE_IDX 1 5847fb4d8502Sjsg #define mmWD_PERFCOUNTER3_SELECT 0x3883 5848fb4d8502Sjsg #define mmWD_PERFCOUNTER3_SELECT_BASE_IDX 1 5849fb4d8502Sjsg #define mmIA_PERFCOUNTER0_SELECT 0x3884 5850fb4d8502Sjsg #define mmIA_PERFCOUNTER0_SELECT_BASE_IDX 1 5851fb4d8502Sjsg #define mmIA_PERFCOUNTER1_SELECT 0x3885 5852fb4d8502Sjsg #define mmIA_PERFCOUNTER1_SELECT_BASE_IDX 1 5853fb4d8502Sjsg #define mmIA_PERFCOUNTER2_SELECT 0x3886 5854fb4d8502Sjsg #define mmIA_PERFCOUNTER2_SELECT_BASE_IDX 1 5855fb4d8502Sjsg #define mmIA_PERFCOUNTER3_SELECT 0x3887 5856fb4d8502Sjsg #define mmIA_PERFCOUNTER3_SELECT_BASE_IDX 1 5857fb4d8502Sjsg #define mmIA_PERFCOUNTER0_SELECT1 0x3888 5858fb4d8502Sjsg #define mmIA_PERFCOUNTER0_SELECT1_BASE_IDX 1 5859fb4d8502Sjsg #define mmVGT_PERFCOUNTER0_SELECT 0x388c 5860fb4d8502Sjsg #define mmVGT_PERFCOUNTER0_SELECT_BASE_IDX 1 5861fb4d8502Sjsg #define mmVGT_PERFCOUNTER1_SELECT 0x388d 5862fb4d8502Sjsg #define mmVGT_PERFCOUNTER1_SELECT_BASE_IDX 1 5863fb4d8502Sjsg #define mmVGT_PERFCOUNTER2_SELECT 0x388e 5864fb4d8502Sjsg #define mmVGT_PERFCOUNTER2_SELECT_BASE_IDX 1 5865fb4d8502Sjsg #define mmVGT_PERFCOUNTER3_SELECT 0x388f 5866fb4d8502Sjsg #define mmVGT_PERFCOUNTER3_SELECT_BASE_IDX 1 5867fb4d8502Sjsg #define mmVGT_PERFCOUNTER0_SELECT1 0x3890 5868fb4d8502Sjsg #define mmVGT_PERFCOUNTER0_SELECT1_BASE_IDX 1 5869fb4d8502Sjsg #define mmVGT_PERFCOUNTER1_SELECT1 0x3891 5870fb4d8502Sjsg #define mmVGT_PERFCOUNTER1_SELECT1_BASE_IDX 1 5871fb4d8502Sjsg #define mmVGT_PERFCOUNTER_SEID_MASK 0x3894 5872fb4d8502Sjsg #define mmVGT_PERFCOUNTER_SEID_MASK_BASE_IDX 1 5873fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER0_SELECT 0x3900 5874fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER0_SELECT_BASE_IDX 1 5875fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER0_SELECT1 0x3901 5876fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER0_SELECT1_BASE_IDX 1 5877fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER1_SELECT 0x3902 5878fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER1_SELECT_BASE_IDX 1 5879fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER1_SELECT1 0x3903 5880fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER1_SELECT1_BASE_IDX 1 5881fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER2_SELECT 0x3904 5882fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER2_SELECT_BASE_IDX 1 5883fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER3_SELECT 0x3905 5884fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER3_SELECT_BASE_IDX 1 5885fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER0_SELECT 0x3940 5886fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER0_SELECT_BASE_IDX 1 5887fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER0_SELECT1 0x3941 5888fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER0_SELECT1_BASE_IDX 1 5889fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER1_SELECT 0x3942 5890fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER1_SELECT_BASE_IDX 1 5891fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER2_SELECT 0x3943 5892fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER2_SELECT_BASE_IDX 1 5893fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER3_SELECT 0x3944 5894fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER3_SELECT_BASE_IDX 1 5895fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER4_SELECT 0x3945 5896fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER4_SELECT_BASE_IDX 1 5897fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER5_SELECT 0x3946 5898fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER5_SELECT_BASE_IDX 1 5899fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER6_SELECT 0x3947 5900fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER6_SELECT_BASE_IDX 1 5901fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER7_SELECT 0x3948 5902fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER7_SELECT_BASE_IDX 1 5903fb4d8502Sjsg #define mmSPI_PERFCOUNTER0_SELECT 0x3980 5904fb4d8502Sjsg #define mmSPI_PERFCOUNTER0_SELECT_BASE_IDX 1 5905fb4d8502Sjsg #define mmSPI_PERFCOUNTER1_SELECT 0x3981 5906fb4d8502Sjsg #define mmSPI_PERFCOUNTER1_SELECT_BASE_IDX 1 5907fb4d8502Sjsg #define mmSPI_PERFCOUNTER2_SELECT 0x3982 5908fb4d8502Sjsg #define mmSPI_PERFCOUNTER2_SELECT_BASE_IDX 1 5909fb4d8502Sjsg #define mmSPI_PERFCOUNTER3_SELECT 0x3983 5910fb4d8502Sjsg #define mmSPI_PERFCOUNTER3_SELECT_BASE_IDX 1 5911fb4d8502Sjsg #define mmSPI_PERFCOUNTER0_SELECT1 0x3984 5912fb4d8502Sjsg #define mmSPI_PERFCOUNTER0_SELECT1_BASE_IDX 1 5913fb4d8502Sjsg #define mmSPI_PERFCOUNTER1_SELECT1 0x3985 5914fb4d8502Sjsg #define mmSPI_PERFCOUNTER1_SELECT1_BASE_IDX 1 5915fb4d8502Sjsg #define mmSPI_PERFCOUNTER2_SELECT1 0x3986 5916fb4d8502Sjsg #define mmSPI_PERFCOUNTER2_SELECT1_BASE_IDX 1 5917fb4d8502Sjsg #define mmSPI_PERFCOUNTER3_SELECT1 0x3987 5918fb4d8502Sjsg #define mmSPI_PERFCOUNTER3_SELECT1_BASE_IDX 1 5919fb4d8502Sjsg #define mmSPI_PERFCOUNTER4_SELECT 0x3988 5920fb4d8502Sjsg #define mmSPI_PERFCOUNTER4_SELECT_BASE_IDX 1 5921fb4d8502Sjsg #define mmSPI_PERFCOUNTER5_SELECT 0x3989 5922fb4d8502Sjsg #define mmSPI_PERFCOUNTER5_SELECT_BASE_IDX 1 5923fb4d8502Sjsg #define mmSPI_PERFCOUNTER_BINS 0x398a 5924fb4d8502Sjsg #define mmSPI_PERFCOUNTER_BINS_BASE_IDX 1 5925fb4d8502Sjsg #define mmSQ_PERFCOUNTER0_SELECT 0x39c0 5926fb4d8502Sjsg #define mmSQ_PERFCOUNTER0_SELECT_BASE_IDX 1 5927fb4d8502Sjsg #define mmSQ_PERFCOUNTER1_SELECT 0x39c1 5928fb4d8502Sjsg #define mmSQ_PERFCOUNTER1_SELECT_BASE_IDX 1 5929fb4d8502Sjsg #define mmSQ_PERFCOUNTER2_SELECT 0x39c2 5930fb4d8502Sjsg #define mmSQ_PERFCOUNTER2_SELECT_BASE_IDX 1 5931fb4d8502Sjsg #define mmSQ_PERFCOUNTER3_SELECT 0x39c3 5932fb4d8502Sjsg #define mmSQ_PERFCOUNTER3_SELECT_BASE_IDX 1 5933fb4d8502Sjsg #define mmSQ_PERFCOUNTER4_SELECT 0x39c4 5934fb4d8502Sjsg #define mmSQ_PERFCOUNTER4_SELECT_BASE_IDX 1 5935fb4d8502Sjsg #define mmSQ_PERFCOUNTER5_SELECT 0x39c5 5936fb4d8502Sjsg #define mmSQ_PERFCOUNTER5_SELECT_BASE_IDX 1 5937fb4d8502Sjsg #define mmSQ_PERFCOUNTER6_SELECT 0x39c6 5938fb4d8502Sjsg #define mmSQ_PERFCOUNTER6_SELECT_BASE_IDX 1 5939fb4d8502Sjsg #define mmSQ_PERFCOUNTER7_SELECT 0x39c7 5940fb4d8502Sjsg #define mmSQ_PERFCOUNTER7_SELECT_BASE_IDX 1 5941fb4d8502Sjsg #define mmSQ_PERFCOUNTER8_SELECT 0x39c8 5942fb4d8502Sjsg #define mmSQ_PERFCOUNTER8_SELECT_BASE_IDX 1 5943fb4d8502Sjsg #define mmSQ_PERFCOUNTER9_SELECT 0x39c9 5944fb4d8502Sjsg #define mmSQ_PERFCOUNTER9_SELECT_BASE_IDX 1 5945fb4d8502Sjsg #define mmSQ_PERFCOUNTER10_SELECT 0x39ca 5946fb4d8502Sjsg #define mmSQ_PERFCOUNTER10_SELECT_BASE_IDX 1 5947fb4d8502Sjsg #define mmSQ_PERFCOUNTER11_SELECT 0x39cb 5948fb4d8502Sjsg #define mmSQ_PERFCOUNTER11_SELECT_BASE_IDX 1 5949fb4d8502Sjsg #define mmSQ_PERFCOUNTER12_SELECT 0x39cc 5950fb4d8502Sjsg #define mmSQ_PERFCOUNTER12_SELECT_BASE_IDX 1 5951fb4d8502Sjsg #define mmSQ_PERFCOUNTER13_SELECT 0x39cd 5952fb4d8502Sjsg #define mmSQ_PERFCOUNTER13_SELECT_BASE_IDX 1 5953fb4d8502Sjsg #define mmSQ_PERFCOUNTER14_SELECT 0x39ce 5954fb4d8502Sjsg #define mmSQ_PERFCOUNTER14_SELECT_BASE_IDX 1 5955fb4d8502Sjsg #define mmSQ_PERFCOUNTER15_SELECT 0x39cf 5956fb4d8502Sjsg #define mmSQ_PERFCOUNTER15_SELECT_BASE_IDX 1 5957fb4d8502Sjsg #define mmSQ_PERFCOUNTER_CTRL 0x39e0 5958fb4d8502Sjsg #define mmSQ_PERFCOUNTER_CTRL_BASE_IDX 1 5959fb4d8502Sjsg #define mmSQ_PERFCOUNTER_MASK 0x39e1 5960fb4d8502Sjsg #define mmSQ_PERFCOUNTER_MASK_BASE_IDX 1 5961fb4d8502Sjsg #define mmSQ_PERFCOUNTER_CTRL2 0x39e2 5962fb4d8502Sjsg #define mmSQ_PERFCOUNTER_CTRL2_BASE_IDX 1 5963fb4d8502Sjsg #define mmSX_PERFCOUNTER0_SELECT 0x3a40 5964fb4d8502Sjsg #define mmSX_PERFCOUNTER0_SELECT_BASE_IDX 1 5965fb4d8502Sjsg #define mmSX_PERFCOUNTER1_SELECT 0x3a41 5966fb4d8502Sjsg #define mmSX_PERFCOUNTER1_SELECT_BASE_IDX 1 5967fb4d8502Sjsg #define mmSX_PERFCOUNTER2_SELECT 0x3a42 5968fb4d8502Sjsg #define mmSX_PERFCOUNTER2_SELECT_BASE_IDX 1 5969fb4d8502Sjsg #define mmSX_PERFCOUNTER3_SELECT 0x3a43 5970fb4d8502Sjsg #define mmSX_PERFCOUNTER3_SELECT_BASE_IDX 1 5971fb4d8502Sjsg #define mmSX_PERFCOUNTER0_SELECT1 0x3a44 5972fb4d8502Sjsg #define mmSX_PERFCOUNTER0_SELECT1_BASE_IDX 1 5973fb4d8502Sjsg #define mmSX_PERFCOUNTER1_SELECT1 0x3a45 5974fb4d8502Sjsg #define mmSX_PERFCOUNTER1_SELECT1_BASE_IDX 1 5975fb4d8502Sjsg #define mmGDS_PERFCOUNTER0_SELECT 0x3a80 5976fb4d8502Sjsg #define mmGDS_PERFCOUNTER0_SELECT_BASE_IDX 1 5977fb4d8502Sjsg #define mmGDS_PERFCOUNTER1_SELECT 0x3a81 5978fb4d8502Sjsg #define mmGDS_PERFCOUNTER1_SELECT_BASE_IDX 1 5979fb4d8502Sjsg #define mmGDS_PERFCOUNTER2_SELECT 0x3a82 5980fb4d8502Sjsg #define mmGDS_PERFCOUNTER2_SELECT_BASE_IDX 1 5981fb4d8502Sjsg #define mmGDS_PERFCOUNTER3_SELECT 0x3a83 5982fb4d8502Sjsg #define mmGDS_PERFCOUNTER3_SELECT_BASE_IDX 1 5983fb4d8502Sjsg #define mmGDS_PERFCOUNTER0_SELECT1 0x3a84 5984fb4d8502Sjsg #define mmGDS_PERFCOUNTER0_SELECT1_BASE_IDX 1 5985fb4d8502Sjsg #define mmTA_PERFCOUNTER0_SELECT 0x3ac0 5986fb4d8502Sjsg #define mmTA_PERFCOUNTER0_SELECT_BASE_IDX 1 5987fb4d8502Sjsg #define mmTA_PERFCOUNTER0_SELECT1 0x3ac1 5988fb4d8502Sjsg #define mmTA_PERFCOUNTER0_SELECT1_BASE_IDX 1 5989fb4d8502Sjsg #define mmTA_PERFCOUNTER1_SELECT 0x3ac2 5990fb4d8502Sjsg #define mmTA_PERFCOUNTER1_SELECT_BASE_IDX 1 5991fb4d8502Sjsg #define mmTD_PERFCOUNTER0_SELECT 0x3b00 5992fb4d8502Sjsg #define mmTD_PERFCOUNTER0_SELECT_BASE_IDX 1 5993fb4d8502Sjsg #define mmTD_PERFCOUNTER0_SELECT1 0x3b01 5994fb4d8502Sjsg #define mmTD_PERFCOUNTER0_SELECT1_BASE_IDX 1 5995fb4d8502Sjsg #define mmTD_PERFCOUNTER1_SELECT 0x3b02 5996fb4d8502Sjsg #define mmTD_PERFCOUNTER1_SELECT_BASE_IDX 1 5997fb4d8502Sjsg #define mmTCP_PERFCOUNTER0_SELECT 0x3b40 5998fb4d8502Sjsg #define mmTCP_PERFCOUNTER0_SELECT_BASE_IDX 1 5999fb4d8502Sjsg #define mmTCP_PERFCOUNTER0_SELECT1 0x3b41 6000fb4d8502Sjsg #define mmTCP_PERFCOUNTER0_SELECT1_BASE_IDX 1 6001fb4d8502Sjsg #define mmTCP_PERFCOUNTER1_SELECT 0x3b42 6002fb4d8502Sjsg #define mmTCP_PERFCOUNTER1_SELECT_BASE_IDX 1 6003fb4d8502Sjsg #define mmTCP_PERFCOUNTER1_SELECT1 0x3b43 6004fb4d8502Sjsg #define mmTCP_PERFCOUNTER1_SELECT1_BASE_IDX 1 6005fb4d8502Sjsg #define mmTCP_PERFCOUNTER2_SELECT 0x3b44 6006fb4d8502Sjsg #define mmTCP_PERFCOUNTER2_SELECT_BASE_IDX 1 6007fb4d8502Sjsg #define mmTCP_PERFCOUNTER3_SELECT 0x3b45 6008fb4d8502Sjsg #define mmTCP_PERFCOUNTER3_SELECT_BASE_IDX 1 6009fb4d8502Sjsg #define mmTCC_PERFCOUNTER0_SELECT 0x3b80 6010fb4d8502Sjsg #define mmTCC_PERFCOUNTER0_SELECT_BASE_IDX 1 6011fb4d8502Sjsg #define mmTCC_PERFCOUNTER0_SELECT1 0x3b81 6012fb4d8502Sjsg #define mmTCC_PERFCOUNTER0_SELECT1_BASE_IDX 1 6013fb4d8502Sjsg #define mmTCC_PERFCOUNTER1_SELECT 0x3b82 6014fb4d8502Sjsg #define mmTCC_PERFCOUNTER1_SELECT_BASE_IDX 1 6015fb4d8502Sjsg #define mmTCC_PERFCOUNTER1_SELECT1 0x3b83 6016fb4d8502Sjsg #define mmTCC_PERFCOUNTER1_SELECT1_BASE_IDX 1 6017fb4d8502Sjsg #define mmTCC_PERFCOUNTER2_SELECT 0x3b84 6018fb4d8502Sjsg #define mmTCC_PERFCOUNTER2_SELECT_BASE_IDX 1 6019fb4d8502Sjsg #define mmTCC_PERFCOUNTER3_SELECT 0x3b85 6020fb4d8502Sjsg #define mmTCC_PERFCOUNTER3_SELECT_BASE_IDX 1 6021fb4d8502Sjsg #define mmTCA_PERFCOUNTER0_SELECT 0x3b90 6022fb4d8502Sjsg #define mmTCA_PERFCOUNTER0_SELECT_BASE_IDX 1 6023fb4d8502Sjsg #define mmTCA_PERFCOUNTER0_SELECT1 0x3b91 6024fb4d8502Sjsg #define mmTCA_PERFCOUNTER0_SELECT1_BASE_IDX 1 6025fb4d8502Sjsg #define mmTCA_PERFCOUNTER1_SELECT 0x3b92 6026fb4d8502Sjsg #define mmTCA_PERFCOUNTER1_SELECT_BASE_IDX 1 6027fb4d8502Sjsg #define mmTCA_PERFCOUNTER1_SELECT1 0x3b93 6028fb4d8502Sjsg #define mmTCA_PERFCOUNTER1_SELECT1_BASE_IDX 1 6029fb4d8502Sjsg #define mmTCA_PERFCOUNTER2_SELECT 0x3b94 6030fb4d8502Sjsg #define mmTCA_PERFCOUNTER2_SELECT_BASE_IDX 1 6031fb4d8502Sjsg #define mmTCA_PERFCOUNTER3_SELECT 0x3b95 6032fb4d8502Sjsg #define mmTCA_PERFCOUNTER3_SELECT_BASE_IDX 1 6033fb4d8502Sjsg #define mmCB_PERFCOUNTER_FILTER 0x3c00 6034fb4d8502Sjsg #define mmCB_PERFCOUNTER_FILTER_BASE_IDX 1 6035fb4d8502Sjsg #define mmCB_PERFCOUNTER0_SELECT 0x3c01 6036fb4d8502Sjsg #define mmCB_PERFCOUNTER0_SELECT_BASE_IDX 1 6037fb4d8502Sjsg #define mmCB_PERFCOUNTER0_SELECT1 0x3c02 6038fb4d8502Sjsg #define mmCB_PERFCOUNTER0_SELECT1_BASE_IDX 1 6039fb4d8502Sjsg #define mmCB_PERFCOUNTER1_SELECT 0x3c03 6040fb4d8502Sjsg #define mmCB_PERFCOUNTER1_SELECT_BASE_IDX 1 6041fb4d8502Sjsg #define mmCB_PERFCOUNTER2_SELECT 0x3c04 6042fb4d8502Sjsg #define mmCB_PERFCOUNTER2_SELECT_BASE_IDX 1 6043fb4d8502Sjsg #define mmCB_PERFCOUNTER3_SELECT 0x3c05 6044fb4d8502Sjsg #define mmCB_PERFCOUNTER3_SELECT_BASE_IDX 1 6045fb4d8502Sjsg #define mmDB_PERFCOUNTER0_SELECT 0x3c40 6046fb4d8502Sjsg #define mmDB_PERFCOUNTER0_SELECT_BASE_IDX 1 6047fb4d8502Sjsg #define mmDB_PERFCOUNTER0_SELECT1 0x3c41 6048fb4d8502Sjsg #define mmDB_PERFCOUNTER0_SELECT1_BASE_IDX 1 6049fb4d8502Sjsg #define mmDB_PERFCOUNTER1_SELECT 0x3c42 6050fb4d8502Sjsg #define mmDB_PERFCOUNTER1_SELECT_BASE_IDX 1 6051fb4d8502Sjsg #define mmDB_PERFCOUNTER1_SELECT1 0x3c43 6052fb4d8502Sjsg #define mmDB_PERFCOUNTER1_SELECT1_BASE_IDX 1 6053fb4d8502Sjsg #define mmDB_PERFCOUNTER2_SELECT 0x3c44 6054fb4d8502Sjsg #define mmDB_PERFCOUNTER2_SELECT_BASE_IDX 1 6055fb4d8502Sjsg #define mmDB_PERFCOUNTER3_SELECT 0x3c46 6056fb4d8502Sjsg #define mmDB_PERFCOUNTER3_SELECT_BASE_IDX 1 6057fb4d8502Sjsg #define mmRLC_SPM_PERFMON_CNTL 0x3c80 6058fb4d8502Sjsg #define mmRLC_SPM_PERFMON_CNTL_BASE_IDX 1 6059fb4d8502Sjsg #define mmRLC_SPM_PERFMON_RING_BASE_LO 0x3c81 6060fb4d8502Sjsg #define mmRLC_SPM_PERFMON_RING_BASE_LO_BASE_IDX 1 6061fb4d8502Sjsg #define mmRLC_SPM_PERFMON_RING_BASE_HI 0x3c82 6062fb4d8502Sjsg #define mmRLC_SPM_PERFMON_RING_BASE_HI_BASE_IDX 1 6063fb4d8502Sjsg #define mmRLC_SPM_PERFMON_RING_SIZE 0x3c83 6064fb4d8502Sjsg #define mmRLC_SPM_PERFMON_RING_SIZE_BASE_IDX 1 6065fb4d8502Sjsg #define mmRLC_SPM_PERFMON_SEGMENT_SIZE 0x3c84 6066fb4d8502Sjsg #define mmRLC_SPM_PERFMON_SEGMENT_SIZE_BASE_IDX 1 6067fb4d8502Sjsg #define mmRLC_SPM_SE_MUXSEL_ADDR 0x3c85 6068fb4d8502Sjsg #define mmRLC_SPM_SE_MUXSEL_ADDR_BASE_IDX 1 6069fb4d8502Sjsg #define mmRLC_SPM_SE_MUXSEL_DATA 0x3c86 6070fb4d8502Sjsg #define mmRLC_SPM_SE_MUXSEL_DATA_BASE_IDX 1 6071fb4d8502Sjsg #define mmRLC_SPM_CPG_PERFMON_SAMPLE_DELAY 0x3c87 6072fb4d8502Sjsg #define mmRLC_SPM_CPG_PERFMON_SAMPLE_DELAY_BASE_IDX 1 6073fb4d8502Sjsg #define mmRLC_SPM_CPC_PERFMON_SAMPLE_DELAY 0x3c88 6074fb4d8502Sjsg #define mmRLC_SPM_CPC_PERFMON_SAMPLE_DELAY_BASE_IDX 1 6075fb4d8502Sjsg #define mmRLC_SPM_CPF_PERFMON_SAMPLE_DELAY 0x3c89 6076fb4d8502Sjsg #define mmRLC_SPM_CPF_PERFMON_SAMPLE_DELAY_BASE_IDX 1 6077fb4d8502Sjsg #define mmRLC_SPM_CB_PERFMON_SAMPLE_DELAY 0x3c8a 6078fb4d8502Sjsg #define mmRLC_SPM_CB_PERFMON_SAMPLE_DELAY_BASE_IDX 1 6079fb4d8502Sjsg #define mmRLC_SPM_DB_PERFMON_SAMPLE_DELAY 0x3c8b 6080fb4d8502Sjsg #define mmRLC_SPM_DB_PERFMON_SAMPLE_DELAY_BASE_IDX 1 6081fb4d8502Sjsg #define mmRLC_SPM_PA_PERFMON_SAMPLE_DELAY 0x3c8c 6082fb4d8502Sjsg #define mmRLC_SPM_PA_PERFMON_SAMPLE_DELAY_BASE_IDX 1 6083fb4d8502Sjsg #define mmRLC_SPM_GDS_PERFMON_SAMPLE_DELAY 0x3c8d 6084fb4d8502Sjsg #define mmRLC_SPM_GDS_PERFMON_SAMPLE_DELAY_BASE_IDX 1 6085fb4d8502Sjsg #define mmRLC_SPM_IA_PERFMON_SAMPLE_DELAY 0x3c8e 6086fb4d8502Sjsg #define mmRLC_SPM_IA_PERFMON_SAMPLE_DELAY_BASE_IDX 1 6087fb4d8502Sjsg #define mmRLC_SPM_SC_PERFMON_SAMPLE_DELAY 0x3c90 6088fb4d8502Sjsg #define mmRLC_SPM_SC_PERFMON_SAMPLE_DELAY_BASE_IDX 1 6089fb4d8502Sjsg #define mmRLC_SPM_TCC_PERFMON_SAMPLE_DELAY 0x3c91 6090fb4d8502Sjsg #define mmRLC_SPM_TCC_PERFMON_SAMPLE_DELAY_BASE_IDX 1 6091fb4d8502Sjsg #define mmRLC_SPM_TCA_PERFMON_SAMPLE_DELAY 0x3c92 6092fb4d8502Sjsg #define mmRLC_SPM_TCA_PERFMON_SAMPLE_DELAY_BASE_IDX 1 6093fb4d8502Sjsg #define mmRLC_SPM_TCP_PERFMON_SAMPLE_DELAY 0x3c93 6094fb4d8502Sjsg #define mmRLC_SPM_TCP_PERFMON_SAMPLE_DELAY_BASE_IDX 1 6095fb4d8502Sjsg #define mmRLC_SPM_TA_PERFMON_SAMPLE_DELAY 0x3c94 6096fb4d8502Sjsg #define mmRLC_SPM_TA_PERFMON_SAMPLE_DELAY_BASE_IDX 1 6097fb4d8502Sjsg #define mmRLC_SPM_TD_PERFMON_SAMPLE_DELAY 0x3c95 6098fb4d8502Sjsg #define mmRLC_SPM_TD_PERFMON_SAMPLE_DELAY_BASE_IDX 1 6099fb4d8502Sjsg #define mmRLC_SPM_VGT_PERFMON_SAMPLE_DELAY 0x3c96 6100fb4d8502Sjsg #define mmRLC_SPM_VGT_PERFMON_SAMPLE_DELAY_BASE_IDX 1 6101fb4d8502Sjsg #define mmRLC_SPM_SPI_PERFMON_SAMPLE_DELAY 0x3c97 6102fb4d8502Sjsg #define mmRLC_SPM_SPI_PERFMON_SAMPLE_DELAY_BASE_IDX 1 6103fb4d8502Sjsg #define mmRLC_SPM_SQG_PERFMON_SAMPLE_DELAY 0x3c98 6104fb4d8502Sjsg #define mmRLC_SPM_SQG_PERFMON_SAMPLE_DELAY_BASE_IDX 1 6105fb4d8502Sjsg #define mmRLC_SPM_SX_PERFMON_SAMPLE_DELAY 0x3c9a 6106fb4d8502Sjsg #define mmRLC_SPM_SX_PERFMON_SAMPLE_DELAY_BASE_IDX 1 6107fb4d8502Sjsg #define mmRLC_SPM_GLOBAL_MUXSEL_ADDR 0x3c9b 6108fb4d8502Sjsg #define mmRLC_SPM_GLOBAL_MUXSEL_ADDR_BASE_IDX 1 6109fb4d8502Sjsg #define mmRLC_SPM_GLOBAL_MUXSEL_DATA 0x3c9c 6110fb4d8502Sjsg #define mmRLC_SPM_GLOBAL_MUXSEL_DATA_BASE_IDX 1 6111fb4d8502Sjsg #define mmRLC_SPM_RING_RDPTR 0x3c9d 6112fb4d8502Sjsg #define mmRLC_SPM_RING_RDPTR_BASE_IDX 1 6113fb4d8502Sjsg #define mmRLC_SPM_SEGMENT_THRESHOLD 0x3c9e 6114fb4d8502Sjsg #define mmRLC_SPM_SEGMENT_THRESHOLD_BASE_IDX 1 6115fb4d8502Sjsg #define mmRLC_SPM_RMI_PERFMON_SAMPLE_DELAY 0x3ca3 6116fb4d8502Sjsg #define mmRLC_SPM_RMI_PERFMON_SAMPLE_DELAY_BASE_IDX 1 6117fb4d8502Sjsg #define mmRLC_PERFMON_CLK_CNTL 0x3cbf 6118fb4d8502Sjsg #define mmRLC_PERFMON_CLK_CNTL_BASE_IDX 1 6119fb4d8502Sjsg #define mmRLC_PERFMON_CNTL 0x3cc0 6120fb4d8502Sjsg #define mmRLC_PERFMON_CNTL_BASE_IDX 1 6121fb4d8502Sjsg #define mmRLC_PERFCOUNTER0_SELECT 0x3cc1 6122fb4d8502Sjsg #define mmRLC_PERFCOUNTER0_SELECT_BASE_IDX 1 6123fb4d8502Sjsg #define mmRLC_PERFCOUNTER1_SELECT 0x3cc2 6124fb4d8502Sjsg #define mmRLC_PERFCOUNTER1_SELECT_BASE_IDX 1 6125fb4d8502Sjsg #define mmRLC_GPU_IOV_PERF_CNT_CNTL 0x3cc3 6126fb4d8502Sjsg #define mmRLC_GPU_IOV_PERF_CNT_CNTL_BASE_IDX 1 6127fb4d8502Sjsg #define mmRLC_GPU_IOV_PERF_CNT_WR_ADDR 0x3cc4 6128fb4d8502Sjsg #define mmRLC_GPU_IOV_PERF_CNT_WR_ADDR_BASE_IDX 1 6129fb4d8502Sjsg #define mmRLC_GPU_IOV_PERF_CNT_WR_DATA 0x3cc5 6130fb4d8502Sjsg #define mmRLC_GPU_IOV_PERF_CNT_WR_DATA_BASE_IDX 1 6131fb4d8502Sjsg #define mmRLC_GPU_IOV_PERF_CNT_RD_ADDR 0x3cc6 6132fb4d8502Sjsg #define mmRLC_GPU_IOV_PERF_CNT_RD_ADDR_BASE_IDX 1 6133fb4d8502Sjsg #define mmRLC_GPU_IOV_PERF_CNT_RD_DATA 0x3cc7 6134fb4d8502Sjsg #define mmRLC_GPU_IOV_PERF_CNT_RD_DATA_BASE_IDX 1 6135fb4d8502Sjsg #define mmRMI_PERFCOUNTER0_SELECT 0x3d00 6136fb4d8502Sjsg #define mmRMI_PERFCOUNTER0_SELECT_BASE_IDX 1 6137fb4d8502Sjsg #define mmRMI_PERFCOUNTER0_SELECT1 0x3d01 6138fb4d8502Sjsg #define mmRMI_PERFCOUNTER0_SELECT1_BASE_IDX 1 6139fb4d8502Sjsg #define mmRMI_PERFCOUNTER1_SELECT 0x3d02 6140fb4d8502Sjsg #define mmRMI_PERFCOUNTER1_SELECT_BASE_IDX 1 6141fb4d8502Sjsg #define mmRMI_PERFCOUNTER2_SELECT 0x3d03 6142fb4d8502Sjsg #define mmRMI_PERFCOUNTER2_SELECT_BASE_IDX 1 6143fb4d8502Sjsg #define mmRMI_PERFCOUNTER2_SELECT1 0x3d04 6144fb4d8502Sjsg #define mmRMI_PERFCOUNTER2_SELECT1_BASE_IDX 1 6145fb4d8502Sjsg #define mmRMI_PERFCOUNTER3_SELECT 0x3d05 6146fb4d8502Sjsg #define mmRMI_PERFCOUNTER3_SELECT_BASE_IDX 1 6147fb4d8502Sjsg #define mmRMI_PERF_COUNTER_CNTL 0x3d06 6148fb4d8502Sjsg #define mmRMI_PERF_COUNTER_CNTL_BASE_IDX 1 6149fb4d8502Sjsg 6150fb4d8502Sjsg 6151fb4d8502Sjsg // addressBlock: gc_utcl2_atcl2pfcntldec 6152fb4d8502Sjsg // base address: 0x37500 6153fb4d8502Sjsg #define mmATC_L2_PERFCOUNTER0_CFG 0x3d40 6154fb4d8502Sjsg #define mmATC_L2_PERFCOUNTER0_CFG_BASE_IDX 1 6155fb4d8502Sjsg #define mmATC_L2_PERFCOUNTER1_CFG 0x3d41 6156fb4d8502Sjsg #define mmATC_L2_PERFCOUNTER1_CFG_BASE_IDX 1 6157fb4d8502Sjsg #define mmATC_L2_PERFCOUNTER_RSLT_CNTL 0x3d42 6158fb4d8502Sjsg #define mmATC_L2_PERFCOUNTER_RSLT_CNTL_BASE_IDX 1 6159fb4d8502Sjsg 6160fb4d8502Sjsg 6161fb4d8502Sjsg // addressBlock: gc_utcl2_vml2pldec 6162fb4d8502Sjsg // base address: 0x37530 6163fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER0_CFG 0x3d4c 6164fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER0_CFG_BASE_IDX 1 6165fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER1_CFG 0x3d4d 6166fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER1_CFG_BASE_IDX 1 6167fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER2_CFG 0x3d4e 6168fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER2_CFG_BASE_IDX 1 6169fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER3_CFG 0x3d4f 6170fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER3_CFG_BASE_IDX 1 6171fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER4_CFG 0x3d50 6172fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER4_CFG_BASE_IDX 1 6173fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER5_CFG 0x3d51 6174fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER5_CFG_BASE_IDX 1 6175fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER6_CFG 0x3d52 6176fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER6_CFG_BASE_IDX 1 6177fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER7_CFG 0x3d53 6178fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER7_CFG_BASE_IDX 1 6179fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER_RSLT_CNTL 0x3d54 6180fb4d8502Sjsg #define mmMC_VM_L2_PERFCOUNTER_RSLT_CNTL_BASE_IDX 1 6181fb4d8502Sjsg 6182fb4d8502Sjsg 6183fb4d8502Sjsg // addressBlock: gc_rlcpdec 6184fb4d8502Sjsg // base address: 0x3b000 6185fb4d8502Sjsg #define mmRLC_CNTL 0x4c00 6186fb4d8502Sjsg #define mmRLC_CNTL_BASE_IDX 1 6187fb4d8502Sjsg #define mmRLC_STAT 0x4c04 6188fb4d8502Sjsg #define mmRLC_STAT_BASE_IDX 1 6189fb4d8502Sjsg #define mmRLC_SAFE_MODE 0x4c05 6190fb4d8502Sjsg #define mmRLC_SAFE_MODE_BASE_IDX 1 6191fb4d8502Sjsg #define mmRLC_MEM_SLP_CNTL 0x4c06 6192fb4d8502Sjsg #define mmRLC_MEM_SLP_CNTL_BASE_IDX 1 6193fb4d8502Sjsg #define mmSMU_RLC_RESPONSE 0x4c07 6194fb4d8502Sjsg #define mmSMU_RLC_RESPONSE_BASE_IDX 1 6195fb4d8502Sjsg #define mmRLC_RLCV_SAFE_MODE 0x4c08 6196fb4d8502Sjsg #define mmRLC_RLCV_SAFE_MODE_BASE_IDX 1 6197fb4d8502Sjsg #define mmRLC_SMU_SAFE_MODE 0x4c09 6198fb4d8502Sjsg #define mmRLC_SMU_SAFE_MODE_BASE_IDX 1 6199fb4d8502Sjsg #define mmRLC_RLCV_COMMAND 0x4c0a 6200fb4d8502Sjsg #define mmRLC_RLCV_COMMAND_BASE_IDX 1 6201fb4d8502Sjsg #define mmRLC_REFCLOCK_TIMESTAMP_LSB 0x4c0c 6202fb4d8502Sjsg #define mmRLC_REFCLOCK_TIMESTAMP_LSB_BASE_IDX 1 6203fb4d8502Sjsg #define mmRLC_REFCLOCK_TIMESTAMP_MSB 0x4c0d 6204fb4d8502Sjsg #define mmRLC_REFCLOCK_TIMESTAMP_MSB_BASE_IDX 1 6205fb4d8502Sjsg #define mmRLC_GPM_TIMER_INT_0 0x4c0e 6206fb4d8502Sjsg #define mmRLC_GPM_TIMER_INT_0_BASE_IDX 1 6207fb4d8502Sjsg #define mmRLC_GPM_TIMER_INT_1 0x4c0f 6208fb4d8502Sjsg #define mmRLC_GPM_TIMER_INT_1_BASE_IDX 1 6209fb4d8502Sjsg #define mmRLC_GPM_TIMER_INT_2 0x4c10 6210fb4d8502Sjsg #define mmRLC_GPM_TIMER_INT_2_BASE_IDX 1 6211fb4d8502Sjsg #define mmRLC_GPM_TIMER_CTRL 0x4c11 6212fb4d8502Sjsg #define mmRLC_GPM_TIMER_CTRL_BASE_IDX 1 6213fb4d8502Sjsg #define mmRLC_LB_CNTR_MAX 0x4c12 6214fb4d8502Sjsg #define mmRLC_LB_CNTR_MAX_BASE_IDX 1 6215fb4d8502Sjsg #define mmRLC_GPM_TIMER_STAT 0x4c13 6216fb4d8502Sjsg #define mmRLC_GPM_TIMER_STAT_BASE_IDX 1 6217fb4d8502Sjsg #define mmRLC_GPM_TIMER_INT_3 0x4c15 6218fb4d8502Sjsg #define mmRLC_GPM_TIMER_INT_3_BASE_IDX 1 6219fb4d8502Sjsg #define mmRLC_SERDES_WR_NONCU_MASTER_MASK_1 0x4c16 6220fb4d8502Sjsg #define mmRLC_SERDES_WR_NONCU_MASTER_MASK_1_BASE_IDX 1 6221fb4d8502Sjsg #define mmRLC_SERDES_NONCU_MASTER_BUSY_1 0x4c17 6222fb4d8502Sjsg #define mmRLC_SERDES_NONCU_MASTER_BUSY_1_BASE_IDX 1 6223fb4d8502Sjsg #define mmRLC_INT_STAT 0x4c18 6224fb4d8502Sjsg #define mmRLC_INT_STAT_BASE_IDX 1 6225fb4d8502Sjsg #define mmRLC_LB_CNTL 0x4c19 6226fb4d8502Sjsg #define mmRLC_LB_CNTL_BASE_IDX 1 6227fb4d8502Sjsg #define mmRLC_MGCG_CTRL 0x4c1a 6228fb4d8502Sjsg #define mmRLC_MGCG_CTRL_BASE_IDX 1 6229fb4d8502Sjsg #define mmRLC_LB_CNTR_INIT 0x4c1b 6230fb4d8502Sjsg #define mmRLC_LB_CNTR_INIT_BASE_IDX 1 6231fb4d8502Sjsg #define mmRLC_LOAD_BALANCE_CNTR 0x4c1c 6232fb4d8502Sjsg #define mmRLC_LOAD_BALANCE_CNTR_BASE_IDX 1 6233fb4d8502Sjsg #define mmRLC_JUMP_TABLE_RESTORE 0x4c1e 6234fb4d8502Sjsg #define mmRLC_JUMP_TABLE_RESTORE_BASE_IDX 1 6235fb4d8502Sjsg #define mmRLC_PG_DELAY_2 0x4c1f 6236fb4d8502Sjsg #define mmRLC_PG_DELAY_2_BASE_IDX 1 6237fb4d8502Sjsg #define mmRLC_GPU_CLOCK_COUNT_LSB 0x4c24 6238fb4d8502Sjsg #define mmRLC_GPU_CLOCK_COUNT_LSB_BASE_IDX 1 6239fb4d8502Sjsg #define mmRLC_GPU_CLOCK_COUNT_MSB 0x4c25 6240fb4d8502Sjsg #define mmRLC_GPU_CLOCK_COUNT_MSB_BASE_IDX 1 6241fb4d8502Sjsg #define mmRLC_CAPTURE_GPU_CLOCK_COUNT 0x4c26 6242fb4d8502Sjsg #define mmRLC_CAPTURE_GPU_CLOCK_COUNT_BASE_IDX 1 6243fb4d8502Sjsg #define mmRLC_UCODE_CNTL 0x4c27 6244fb4d8502Sjsg #define mmRLC_UCODE_CNTL_BASE_IDX 1 6245fb4d8502Sjsg #define mmRLC_GPM_THREAD_RESET 0x4c28 6246fb4d8502Sjsg #define mmRLC_GPM_THREAD_RESET_BASE_IDX 1 6247fb4d8502Sjsg #define mmRLC_GPM_CP_DMA_COMPLETE_T0 0x4c29 6248fb4d8502Sjsg #define mmRLC_GPM_CP_DMA_COMPLETE_T0_BASE_IDX 1 6249fb4d8502Sjsg #define mmRLC_GPM_CP_DMA_COMPLETE_T1 0x4c2a 6250fb4d8502Sjsg #define mmRLC_GPM_CP_DMA_COMPLETE_T1_BASE_IDX 1 6251fb4d8502Sjsg #define mmRLC_FIREWALL_VIOLATION 0x4c2b 6252fb4d8502Sjsg #define mmRLC_FIREWALL_VIOLATION_BASE_IDX 1 6253fb4d8502Sjsg #define mmRLC_GPM_STAT 0x4c40 6254fb4d8502Sjsg #define mmRLC_GPM_STAT_BASE_IDX 1 6255fb4d8502Sjsg #define mmRLC_GPU_CLOCK_32_RES_SEL 0x4c41 6256fb4d8502Sjsg #define mmRLC_GPU_CLOCK_32_RES_SEL_BASE_IDX 1 6257fb4d8502Sjsg #define mmRLC_GPU_CLOCK_32 0x4c42 6258fb4d8502Sjsg #define mmRLC_GPU_CLOCK_32_BASE_IDX 1 6259fb4d8502Sjsg #define mmRLC_PG_CNTL 0x4c43 6260fb4d8502Sjsg #define mmRLC_PG_CNTL_BASE_IDX 1 6261fb4d8502Sjsg #define mmRLC_GPM_THREAD_PRIORITY 0x4c44 6262fb4d8502Sjsg #define mmRLC_GPM_THREAD_PRIORITY_BASE_IDX 1 6263fb4d8502Sjsg #define mmRLC_GPM_THREAD_ENABLE 0x4c45 6264fb4d8502Sjsg #define mmRLC_GPM_THREAD_ENABLE_BASE_IDX 1 6265fb4d8502Sjsg #define mmRLC_CGTT_MGCG_OVERRIDE 0x4c48 6266fb4d8502Sjsg #define mmRLC_CGTT_MGCG_OVERRIDE_BASE_IDX 1 6267fb4d8502Sjsg #define mmRLC_CGCG_CGLS_CTRL 0x4c49 6268fb4d8502Sjsg #define mmRLC_CGCG_CGLS_CTRL_BASE_IDX 1 6269fb4d8502Sjsg #define mmRLC_CGCG_RAMP_CTRL 0x4c4a 6270fb4d8502Sjsg #define mmRLC_CGCG_RAMP_CTRL_BASE_IDX 1 6271fb4d8502Sjsg #define mmRLC_DYN_PG_STATUS 0x4c4b 6272fb4d8502Sjsg #define mmRLC_DYN_PG_STATUS_BASE_IDX 1 6273fb4d8502Sjsg #define mmRLC_DYN_PG_REQUEST 0x4c4c 6274fb4d8502Sjsg #define mmRLC_DYN_PG_REQUEST_BASE_IDX 1 6275fb4d8502Sjsg #define mmRLC_PG_DELAY 0x4c4d 6276fb4d8502Sjsg #define mmRLC_PG_DELAY_BASE_IDX 1 6277fb4d8502Sjsg #define mmRLC_CU_STATUS 0x4c4e 6278fb4d8502Sjsg #define mmRLC_CU_STATUS_BASE_IDX 1 6279fb4d8502Sjsg #define mmRLC_LB_INIT_CU_MASK 0x4c4f 6280fb4d8502Sjsg #define mmRLC_LB_INIT_CU_MASK_BASE_IDX 1 6281fb4d8502Sjsg #define mmRLC_LB_ALWAYS_ACTIVE_CU_MASK 0x4c50 6282fb4d8502Sjsg #define mmRLC_LB_ALWAYS_ACTIVE_CU_MASK_BASE_IDX 1 6283fb4d8502Sjsg #define mmRLC_LB_PARAMS 0x4c51 6284fb4d8502Sjsg #define mmRLC_LB_PARAMS_BASE_IDX 1 6285fb4d8502Sjsg #define mmRLC_THREAD1_DELAY 0x4c52 6286fb4d8502Sjsg #define mmRLC_THREAD1_DELAY_BASE_IDX 1 6287fb4d8502Sjsg #define mmRLC_PG_ALWAYS_ON_CU_MASK 0x4c53 6288fb4d8502Sjsg #define mmRLC_PG_ALWAYS_ON_CU_MASK_BASE_IDX 1 6289fb4d8502Sjsg #define mmRLC_MAX_PG_CU 0x4c54 6290fb4d8502Sjsg #define mmRLC_MAX_PG_CU_BASE_IDX 1 6291fb4d8502Sjsg #define mmRLC_AUTO_PG_CTRL 0x4c55 6292fb4d8502Sjsg #define mmRLC_AUTO_PG_CTRL_BASE_IDX 1 6293fb4d8502Sjsg #define mmRLC_SMU_GRBM_REG_SAVE_CTRL 0x4c56 6294fb4d8502Sjsg #define mmRLC_SMU_GRBM_REG_SAVE_CTRL_BASE_IDX 1 6295fb4d8502Sjsg #define mmRLC_SERDES_RD_MASTER_INDEX 0x4c59 6296fb4d8502Sjsg #define mmRLC_SERDES_RD_MASTER_INDEX_BASE_IDX 1 6297fb4d8502Sjsg #define mmRLC_SERDES_RD_DATA_0 0x4c5a 6298fb4d8502Sjsg #define mmRLC_SERDES_RD_DATA_0_BASE_IDX 1 6299fb4d8502Sjsg #define mmRLC_SERDES_RD_DATA_1 0x4c5b 6300fb4d8502Sjsg #define mmRLC_SERDES_RD_DATA_1_BASE_IDX 1 6301fb4d8502Sjsg #define mmRLC_SERDES_RD_DATA_2 0x4c5c 6302fb4d8502Sjsg #define mmRLC_SERDES_RD_DATA_2_BASE_IDX 1 6303fb4d8502Sjsg #define mmRLC_SERDES_WR_CU_MASTER_MASK 0x4c5d 6304fb4d8502Sjsg #define mmRLC_SERDES_WR_CU_MASTER_MASK_BASE_IDX 1 6305fb4d8502Sjsg #define mmRLC_SERDES_WR_NONCU_MASTER_MASK 0x4c5e 6306fb4d8502Sjsg #define mmRLC_SERDES_WR_NONCU_MASTER_MASK_BASE_IDX 1 6307fb4d8502Sjsg #define mmRLC_SERDES_WR_CTRL 0x4c5f 6308fb4d8502Sjsg #define mmRLC_SERDES_WR_CTRL_BASE_IDX 1 6309fb4d8502Sjsg #define mmRLC_SERDES_WR_DATA 0x4c60 6310fb4d8502Sjsg #define mmRLC_SERDES_WR_DATA_BASE_IDX 1 6311fb4d8502Sjsg #define mmRLC_SERDES_CU_MASTER_BUSY 0x4c61 6312fb4d8502Sjsg #define mmRLC_SERDES_CU_MASTER_BUSY_BASE_IDX 1 6313fb4d8502Sjsg #define mmRLC_SERDES_NONCU_MASTER_BUSY 0x4c62 6314fb4d8502Sjsg #define mmRLC_SERDES_NONCU_MASTER_BUSY_BASE_IDX 1 6315fb4d8502Sjsg #define mmRLC_GPM_GENERAL_0 0x4c63 6316fb4d8502Sjsg #define mmRLC_GPM_GENERAL_0_BASE_IDX 1 6317fb4d8502Sjsg #define mmRLC_GPM_GENERAL_1 0x4c64 6318fb4d8502Sjsg #define mmRLC_GPM_GENERAL_1_BASE_IDX 1 6319fb4d8502Sjsg #define mmRLC_GPM_GENERAL_2 0x4c65 6320fb4d8502Sjsg #define mmRLC_GPM_GENERAL_2_BASE_IDX 1 6321fb4d8502Sjsg #define mmRLC_GPM_GENERAL_3 0x4c66 6322fb4d8502Sjsg #define mmRLC_GPM_GENERAL_3_BASE_IDX 1 6323fb4d8502Sjsg #define mmRLC_GPM_GENERAL_4 0x4c67 6324fb4d8502Sjsg #define mmRLC_GPM_GENERAL_4_BASE_IDX 1 6325fb4d8502Sjsg #define mmRLC_GPM_GENERAL_5 0x4c68 6326fb4d8502Sjsg #define mmRLC_GPM_GENERAL_5_BASE_IDX 1 6327fb4d8502Sjsg #define mmRLC_GPM_GENERAL_6 0x4c69 6328fb4d8502Sjsg #define mmRLC_GPM_GENERAL_6_BASE_IDX 1 6329fb4d8502Sjsg #define mmRLC_GPM_GENERAL_7 0x4c6a 6330fb4d8502Sjsg #define mmRLC_GPM_GENERAL_7_BASE_IDX 1 6331fb4d8502Sjsg #define mmRLC_GPM_SCRATCH_ADDR 0x4c6c 6332fb4d8502Sjsg #define mmRLC_GPM_SCRATCH_ADDR_BASE_IDX 1 6333fb4d8502Sjsg #define mmRLC_GPM_SCRATCH_DATA 0x4c6d 6334fb4d8502Sjsg #define mmRLC_GPM_SCRATCH_DATA_BASE_IDX 1 6335fb4d8502Sjsg #define mmRLC_STATIC_PG_STATUS 0x4c6e 6336fb4d8502Sjsg #define mmRLC_STATIC_PG_STATUS_BASE_IDX 1 6337fb4d8502Sjsg #define mmRLC_SPM_MC_CNTL 0x4c71 6338fb4d8502Sjsg #define mmRLC_SPM_MC_CNTL_BASE_IDX 1 6339fb4d8502Sjsg #define mmRLC_SPM_INT_CNTL 0x4c72 6340fb4d8502Sjsg #define mmRLC_SPM_INT_CNTL_BASE_IDX 1 6341fb4d8502Sjsg #define mmRLC_SPM_INT_STATUS 0x4c73 6342fb4d8502Sjsg #define mmRLC_SPM_INT_STATUS_BASE_IDX 1 6343fb4d8502Sjsg #define mmRLC_SMU_MESSAGE 0x4c76 6344fb4d8502Sjsg #define mmRLC_SMU_MESSAGE_BASE_IDX 1 6345fb4d8502Sjsg #define mmRLC_GPM_LOG_SIZE 0x4c77 6346fb4d8502Sjsg #define mmRLC_GPM_LOG_SIZE_BASE_IDX 1 6347fb4d8502Sjsg #define mmRLC_PG_DELAY_3 0x4c78 6348fb4d8502Sjsg #define mmRLC_PG_DELAY_3_BASE_IDX 1 6349fb4d8502Sjsg #define mmRLC_GPR_REG1 0x4c79 6350fb4d8502Sjsg #define mmRLC_GPR_REG1_BASE_IDX 1 6351fb4d8502Sjsg #define mmRLC_GPR_REG2 0x4c7a 6352fb4d8502Sjsg #define mmRLC_GPR_REG2_BASE_IDX 1 6353fb4d8502Sjsg #define mmRLC_GPM_LOG_CONT 0x4c7b 6354fb4d8502Sjsg #define mmRLC_GPM_LOG_CONT_BASE_IDX 1 6355fb4d8502Sjsg #define mmRLC_GPM_INT_DISABLE_TH0 0x4c7c 6356fb4d8502Sjsg #define mmRLC_GPM_INT_DISABLE_TH0_BASE_IDX 1 6357fb4d8502Sjsg #define mmRLC_GPM_INT_DISABLE_TH1 0x4c7d 6358fb4d8502Sjsg #define mmRLC_GPM_INT_DISABLE_TH1_BASE_IDX 1 6359fb4d8502Sjsg #define mmRLC_GPM_INT_FORCE_TH0 0x4c7e 6360fb4d8502Sjsg #define mmRLC_GPM_INT_FORCE_TH0_BASE_IDX 1 6361fb4d8502Sjsg #define mmRLC_GPM_INT_FORCE_TH1 0x4c7f 6362fb4d8502Sjsg #define mmRLC_GPM_INT_FORCE_TH1_BASE_IDX 1 6363fb4d8502Sjsg #define mmRLC_SRM_CNTL 0x4c80 6364fb4d8502Sjsg #define mmRLC_SRM_CNTL_BASE_IDX 1 6365fb4d8502Sjsg #define mmRLC_SRM_ARAM_ADDR 0x4c83 6366fb4d8502Sjsg #define mmRLC_SRM_ARAM_ADDR_BASE_IDX 1 6367fb4d8502Sjsg #define mmRLC_SRM_ARAM_DATA 0x4c84 6368fb4d8502Sjsg #define mmRLC_SRM_ARAM_DATA_BASE_IDX 1 6369fb4d8502Sjsg #define mmRLC_SRM_DRAM_ADDR 0x4c85 6370fb4d8502Sjsg #define mmRLC_SRM_DRAM_ADDR_BASE_IDX 1 6371fb4d8502Sjsg #define mmRLC_SRM_DRAM_DATA 0x4c86 6372fb4d8502Sjsg #define mmRLC_SRM_DRAM_DATA_BASE_IDX 1 6373fb4d8502Sjsg #define mmRLC_SRM_GPM_COMMAND 0x4c87 6374fb4d8502Sjsg #define mmRLC_SRM_GPM_COMMAND_BASE_IDX 1 6375fb4d8502Sjsg #define mmRLC_SRM_GPM_COMMAND_STATUS 0x4c88 6376fb4d8502Sjsg #define mmRLC_SRM_GPM_COMMAND_STATUS_BASE_IDX 1 6377fb4d8502Sjsg #define mmRLC_SRM_RLCV_COMMAND 0x4c89 6378fb4d8502Sjsg #define mmRLC_SRM_RLCV_COMMAND_BASE_IDX 1 6379fb4d8502Sjsg #define mmRLC_SRM_RLCV_COMMAND_STATUS 0x4c8a 6380fb4d8502Sjsg #define mmRLC_SRM_RLCV_COMMAND_STATUS_BASE_IDX 1 6381fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_ADDR_0 0x4c8b 6382fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_ADDR_0_BASE_IDX 1 6383fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_ADDR_1 0x4c8c 6384fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_ADDR_1_BASE_IDX 1 6385fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_ADDR_2 0x4c8d 6386fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_ADDR_2_BASE_IDX 1 6387fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_ADDR_3 0x4c8e 6388fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_ADDR_3_BASE_IDX 1 6389fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_ADDR_4 0x4c8f 6390fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_ADDR_4_BASE_IDX 1 6391fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_ADDR_5 0x4c90 6392fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_ADDR_5_BASE_IDX 1 6393fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_ADDR_6 0x4c91 6394fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_ADDR_6_BASE_IDX 1 6395fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_ADDR_7 0x4c92 6396fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_ADDR_7_BASE_IDX 1 6397fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_DATA_0 0x4c93 6398fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_DATA_0_BASE_IDX 1 6399fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_DATA_1 0x4c94 6400fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_DATA_1_BASE_IDX 1 6401fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_DATA_2 0x4c95 6402fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_DATA_2_BASE_IDX 1 6403fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_DATA_3 0x4c96 6404fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_DATA_3_BASE_IDX 1 6405fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_DATA_4 0x4c97 6406fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_DATA_4_BASE_IDX 1 6407fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_DATA_5 0x4c98 6408fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_DATA_5_BASE_IDX 1 6409fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_DATA_6 0x4c99 6410fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_DATA_6_BASE_IDX 1 6411fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_DATA_7 0x4c9a 6412fb4d8502Sjsg #define mmRLC_SRM_INDEX_CNTL_DATA_7_BASE_IDX 1 6413fb4d8502Sjsg #define mmRLC_SRM_STAT 0x4c9b 6414fb4d8502Sjsg #define mmRLC_SRM_STAT_BASE_IDX 1 6415fb4d8502Sjsg #define mmRLC_SRM_GPM_ABORT 0x4c9c 6416fb4d8502Sjsg #define mmRLC_SRM_GPM_ABORT_BASE_IDX 1 6417fb4d8502Sjsg #define mmRLC_CSIB_ADDR_LO 0x4ca2 6418fb4d8502Sjsg #define mmRLC_CSIB_ADDR_LO_BASE_IDX 1 6419fb4d8502Sjsg #define mmRLC_CSIB_ADDR_HI 0x4ca3 6420fb4d8502Sjsg #define mmRLC_CSIB_ADDR_HI_BASE_IDX 1 6421fb4d8502Sjsg #define mmRLC_CSIB_LENGTH 0x4ca4 6422fb4d8502Sjsg #define mmRLC_CSIB_LENGTH_BASE_IDX 1 6423fb4d8502Sjsg #define mmRLC_SMU_COMMAND 0x4ca9 6424fb4d8502Sjsg #define mmRLC_SMU_COMMAND_BASE_IDX 1 6425fb4d8502Sjsg #define mmRLC_CP_SCHEDULERS 0x4caa 6426fb4d8502Sjsg #define mmRLC_CP_SCHEDULERS_BASE_IDX 1 6427fb4d8502Sjsg #define mmRLC_SMU_ARGUMENT_1 0x4cab 6428fb4d8502Sjsg #define mmRLC_SMU_ARGUMENT_1_BASE_IDX 1 6429fb4d8502Sjsg #define mmRLC_SMU_ARGUMENT_2 0x4cac 6430fb4d8502Sjsg #define mmRLC_SMU_ARGUMENT_2_BASE_IDX 1 6431fb4d8502Sjsg #define mmRLC_GPM_GENERAL_8 0x4cad 6432fb4d8502Sjsg #define mmRLC_GPM_GENERAL_8_BASE_IDX 1 6433fb4d8502Sjsg #define mmRLC_GPM_GENERAL_9 0x4cae 6434fb4d8502Sjsg #define mmRLC_GPM_GENERAL_9_BASE_IDX 1 6435fb4d8502Sjsg #define mmRLC_GPM_GENERAL_10 0x4caf 6436fb4d8502Sjsg #define mmRLC_GPM_GENERAL_10_BASE_IDX 1 6437fb4d8502Sjsg #define mmRLC_GPM_GENERAL_11 0x4cb0 6438fb4d8502Sjsg #define mmRLC_GPM_GENERAL_11_BASE_IDX 1 6439fb4d8502Sjsg #define mmRLC_GPM_GENERAL_12 0x4cb1 6440fb4d8502Sjsg #define mmRLC_GPM_GENERAL_12_BASE_IDX 1 6441fb4d8502Sjsg #define mmRLC_GPM_UTCL1_CNTL_0 0x4cb2 6442fb4d8502Sjsg #define mmRLC_GPM_UTCL1_CNTL_0_BASE_IDX 1 6443fb4d8502Sjsg #define mmRLC_GPM_UTCL1_CNTL_1 0x4cb3 6444fb4d8502Sjsg #define mmRLC_GPM_UTCL1_CNTL_1_BASE_IDX 1 6445fb4d8502Sjsg #define mmRLC_GPM_UTCL1_CNTL_2 0x4cb4 6446fb4d8502Sjsg #define mmRLC_GPM_UTCL1_CNTL_2_BASE_IDX 1 6447fb4d8502Sjsg #define mmRLC_SPM_UTCL1_CNTL 0x4cb5 6448fb4d8502Sjsg #define mmRLC_SPM_UTCL1_CNTL_BASE_IDX 1 6449fb4d8502Sjsg #define mmRLC_UTCL1_STATUS_2 0x4cb6 6450fb4d8502Sjsg #define mmRLC_UTCL1_STATUS_2_BASE_IDX 1 6451fb4d8502Sjsg #define mmRLC_LB_THR_CONFIG_2 0x4cb8 6452fb4d8502Sjsg #define mmRLC_LB_THR_CONFIG_2_BASE_IDX 1 6453fb4d8502Sjsg #define mmRLC_LB_THR_CONFIG_3 0x4cb9 6454fb4d8502Sjsg #define mmRLC_LB_THR_CONFIG_3_BASE_IDX 1 6455fb4d8502Sjsg #define mmRLC_LB_THR_CONFIG_4 0x4cba 6456fb4d8502Sjsg #define mmRLC_LB_THR_CONFIG_4_BASE_IDX 1 6457fb4d8502Sjsg #define mmRLC_SPM_UTCL1_ERROR_1 0x4cbc 6458fb4d8502Sjsg #define mmRLC_SPM_UTCL1_ERROR_1_BASE_IDX 1 6459fb4d8502Sjsg #define mmRLC_SPM_UTCL1_ERROR_2 0x4cbd 6460fb4d8502Sjsg #define mmRLC_SPM_UTCL1_ERROR_2_BASE_IDX 1 6461fb4d8502Sjsg #define mmRLC_GPM_UTCL1_TH0_ERROR_1 0x4cbe 6462fb4d8502Sjsg #define mmRLC_GPM_UTCL1_TH0_ERROR_1_BASE_IDX 1 6463fb4d8502Sjsg #define mmRLC_LB_THR_CONFIG_1 0x4cbf 6464fb4d8502Sjsg #define mmRLC_LB_THR_CONFIG_1_BASE_IDX 1 6465fb4d8502Sjsg #define mmRLC_GPM_UTCL1_TH0_ERROR_2 0x4cc0 6466fb4d8502Sjsg #define mmRLC_GPM_UTCL1_TH0_ERROR_2_BASE_IDX 1 6467fb4d8502Sjsg #define mmRLC_GPM_UTCL1_TH1_ERROR_1 0x4cc1 6468fb4d8502Sjsg #define mmRLC_GPM_UTCL1_TH1_ERROR_1_BASE_IDX 1 6469fb4d8502Sjsg #define mmRLC_GPM_UTCL1_TH1_ERROR_2 0x4cc2 6470fb4d8502Sjsg #define mmRLC_GPM_UTCL1_TH1_ERROR_2_BASE_IDX 1 6471fb4d8502Sjsg #define mmRLC_GPM_UTCL1_TH2_ERROR_1 0x4cc3 6472fb4d8502Sjsg #define mmRLC_GPM_UTCL1_TH2_ERROR_1_BASE_IDX 1 6473fb4d8502Sjsg #define mmRLC_GPM_UTCL1_TH2_ERROR_2 0x4cc4 6474fb4d8502Sjsg #define mmRLC_GPM_UTCL1_TH2_ERROR_2_BASE_IDX 1 6475fb4d8502Sjsg #define mmRLC_CGCG_CGLS_CTRL_3D 0x4cc5 6476fb4d8502Sjsg #define mmRLC_CGCG_CGLS_CTRL_3D_BASE_IDX 1 6477fb4d8502Sjsg #define mmRLC_CGCG_RAMP_CTRL_3D 0x4cc6 6478fb4d8502Sjsg #define mmRLC_CGCG_RAMP_CTRL_3D_BASE_IDX 1 6479fb4d8502Sjsg #define mmRLC_SEMAPHORE_0 0x4cc7 6480fb4d8502Sjsg #define mmRLC_SEMAPHORE_0_BASE_IDX 1 6481fb4d8502Sjsg #define mmRLC_SEMAPHORE_1 0x4cc8 6482fb4d8502Sjsg #define mmRLC_SEMAPHORE_1_BASE_IDX 1 6483fb4d8502Sjsg #define mmRLC_CP_EOF_INT 0x4cca 6484fb4d8502Sjsg #define mmRLC_CP_EOF_INT_BASE_IDX 1 6485fb4d8502Sjsg #define mmRLC_CP_EOF_INT_CNT 0x4ccb 6486fb4d8502Sjsg #define mmRLC_CP_EOF_INT_CNT_BASE_IDX 1 6487fb4d8502Sjsg #define mmRLC_SPARE_INT 0x4ccc 6488fb4d8502Sjsg #define mmRLC_SPARE_INT_BASE_IDX 1 6489fb4d8502Sjsg #define mmRLC_PREWALKER_UTCL1_CNTL 0x4ccd 6490fb4d8502Sjsg #define mmRLC_PREWALKER_UTCL1_CNTL_BASE_IDX 1 6491fb4d8502Sjsg #define mmRLC_PREWALKER_UTCL1_TRIG 0x4cce 6492fb4d8502Sjsg #define mmRLC_PREWALKER_UTCL1_TRIG_BASE_IDX 1 6493fb4d8502Sjsg #define mmRLC_PREWALKER_UTCL1_ADDR_LSB 0x4ccf 6494fb4d8502Sjsg #define mmRLC_PREWALKER_UTCL1_ADDR_LSB_BASE_IDX 1 6495fb4d8502Sjsg #define mmRLC_PREWALKER_UTCL1_ADDR_MSB 0x4cd0 6496fb4d8502Sjsg #define mmRLC_PREWALKER_UTCL1_ADDR_MSB_BASE_IDX 1 6497fb4d8502Sjsg #define mmRLC_PREWALKER_UTCL1_SIZE_LSB 0x4cd1 6498fb4d8502Sjsg #define mmRLC_PREWALKER_UTCL1_SIZE_LSB_BASE_IDX 1 6499fb4d8502Sjsg #define mmRLC_PREWALKER_UTCL1_SIZE_MSB 0x4cd2 6500fb4d8502Sjsg #define mmRLC_PREWALKER_UTCL1_SIZE_MSB_BASE_IDX 1 6501fb4d8502Sjsg #define mmRLC_DSM_TRIG 0x4cd3 6502fb4d8502Sjsg #define mmRLC_DSM_TRIG_BASE_IDX 1 6503fb4d8502Sjsg #define mmRLC_UTCL1_STATUS 0x4cd4 6504fb4d8502Sjsg #define mmRLC_UTCL1_STATUS_BASE_IDX 1 6505fb4d8502Sjsg #define mmRLC_R2I_CNTL_0 0x4cd5 6506fb4d8502Sjsg #define mmRLC_R2I_CNTL_0_BASE_IDX 1 6507fb4d8502Sjsg #define mmRLC_R2I_CNTL_1 0x4cd6 6508fb4d8502Sjsg #define mmRLC_R2I_CNTL_1_BASE_IDX 1 6509fb4d8502Sjsg #define mmRLC_R2I_CNTL_2 0x4cd7 6510fb4d8502Sjsg #define mmRLC_R2I_CNTL_2_BASE_IDX 1 6511fb4d8502Sjsg #define mmRLC_R2I_CNTL_3 0x4cd8 6512fb4d8502Sjsg #define mmRLC_R2I_CNTL_3_BASE_IDX 1 6513fb4d8502Sjsg #define mmRLC_UTCL2_CNTL 0x4cd9 6514fb4d8502Sjsg #define mmRLC_UTCL2_CNTL_BASE_IDX 1 6515fb4d8502Sjsg #define mmRLC_LBPW_CU_STAT 0x4cda 6516fb4d8502Sjsg #define mmRLC_LBPW_CU_STAT_BASE_IDX 1 6517fb4d8502Sjsg #define mmRLC_DS_CNTL 0x4cdb 6518fb4d8502Sjsg #define mmRLC_DS_CNTL_BASE_IDX 1 6519fb4d8502Sjsg #define mmRLC_RLCV_SPARE_INT 0x4f30 6520fb4d8502Sjsg #define mmRLC_RLCV_SPARE_INT_BASE_IDX 1 6521fb4d8502Sjsg 6522fb4d8502Sjsg 6523fb4d8502Sjsg // addressBlock: gc_pwrdec 6524fb4d8502Sjsg // base address: 0x3c000 6525fb4d8502Sjsg #define mmCGTS_SM_CTRL_REG 0x5000 6526fb4d8502Sjsg #define mmCGTS_SM_CTRL_REG_BASE_IDX 1 6527fb4d8502Sjsg #define mmCGTS_RD_CTRL_REG 0x5001 6528fb4d8502Sjsg #define mmCGTS_RD_CTRL_REG_BASE_IDX 1 6529fb4d8502Sjsg #define mmCGTS_RD_REG 0x5002 6530fb4d8502Sjsg #define mmCGTS_RD_REG_BASE_IDX 1 6531fb4d8502Sjsg #define mmCGTS_TCC_DISABLE 0x5003 6532fb4d8502Sjsg #define mmCGTS_TCC_DISABLE_BASE_IDX 1 6533fb4d8502Sjsg #define mmCGTS_USER_TCC_DISABLE 0x5004 6534fb4d8502Sjsg #define mmCGTS_USER_TCC_DISABLE_BASE_IDX 1 6535fb4d8502Sjsg #define mmCGTS_CU0_SP0_CTRL_REG 0x5008 6536fb4d8502Sjsg #define mmCGTS_CU0_SP0_CTRL_REG_BASE_IDX 1 6537fb4d8502Sjsg #define mmCGTS_CU0_LDS_SQ_CTRL_REG 0x5009 6538fb4d8502Sjsg #define mmCGTS_CU0_LDS_SQ_CTRL_REG_BASE_IDX 1 6539fb4d8502Sjsg #define mmCGTS_CU0_TA_SQC_CTRL_REG 0x500a 6540fb4d8502Sjsg #define mmCGTS_CU0_TA_SQC_CTRL_REG_BASE_IDX 1 6541fb4d8502Sjsg #define mmCGTS_CU0_SP1_CTRL_REG 0x500b 6542fb4d8502Sjsg #define mmCGTS_CU0_SP1_CTRL_REG_BASE_IDX 1 6543fb4d8502Sjsg #define mmCGTS_CU0_TD_TCP_CTRL_REG 0x500c 6544fb4d8502Sjsg #define mmCGTS_CU0_TD_TCP_CTRL_REG_BASE_IDX 1 6545fb4d8502Sjsg #define mmCGTS_CU1_SP0_CTRL_REG 0x500d 6546fb4d8502Sjsg #define mmCGTS_CU1_SP0_CTRL_REG_BASE_IDX 1 6547fb4d8502Sjsg #define mmCGTS_CU1_LDS_SQ_CTRL_REG 0x500e 6548fb4d8502Sjsg #define mmCGTS_CU1_LDS_SQ_CTRL_REG_BASE_IDX 1 6549fb4d8502Sjsg #define mmCGTS_CU1_TA_SQC_CTRL_REG 0x500f 6550fb4d8502Sjsg #define mmCGTS_CU1_TA_SQC_CTRL_REG_BASE_IDX 1 6551fb4d8502Sjsg #define mmCGTS_CU1_SP1_CTRL_REG 0x5010 6552fb4d8502Sjsg #define mmCGTS_CU1_SP1_CTRL_REG_BASE_IDX 1 6553fb4d8502Sjsg #define mmCGTS_CU1_TD_TCP_CTRL_REG 0x5011 6554fb4d8502Sjsg #define mmCGTS_CU1_TD_TCP_CTRL_REG_BASE_IDX 1 6555fb4d8502Sjsg #define mmCGTS_CU2_SP0_CTRL_REG 0x5012 6556fb4d8502Sjsg #define mmCGTS_CU2_SP0_CTRL_REG_BASE_IDX 1 6557fb4d8502Sjsg #define mmCGTS_CU2_LDS_SQ_CTRL_REG 0x5013 6558fb4d8502Sjsg #define mmCGTS_CU2_LDS_SQ_CTRL_REG_BASE_IDX 1 6559fb4d8502Sjsg #define mmCGTS_CU2_TA_SQC_CTRL_REG 0x5014 6560fb4d8502Sjsg #define mmCGTS_CU2_TA_SQC_CTRL_REG_BASE_IDX 1 6561fb4d8502Sjsg #define mmCGTS_CU2_SP1_CTRL_REG 0x5015 6562fb4d8502Sjsg #define mmCGTS_CU2_SP1_CTRL_REG_BASE_IDX 1 6563fb4d8502Sjsg #define mmCGTS_CU2_TD_TCP_CTRL_REG 0x5016 6564fb4d8502Sjsg #define mmCGTS_CU2_TD_TCP_CTRL_REG_BASE_IDX 1 6565fb4d8502Sjsg #define mmCGTS_CU3_SP0_CTRL_REG 0x5017 6566fb4d8502Sjsg #define mmCGTS_CU3_SP0_CTRL_REG_BASE_IDX 1 6567fb4d8502Sjsg #define mmCGTS_CU3_LDS_SQ_CTRL_REG 0x5018 6568fb4d8502Sjsg #define mmCGTS_CU3_LDS_SQ_CTRL_REG_BASE_IDX 1 6569fb4d8502Sjsg #define mmCGTS_CU3_TA_SQC_CTRL_REG 0x5019 6570fb4d8502Sjsg #define mmCGTS_CU3_TA_SQC_CTRL_REG_BASE_IDX 1 6571fb4d8502Sjsg #define mmCGTS_CU3_SP1_CTRL_REG 0x501a 6572fb4d8502Sjsg #define mmCGTS_CU3_SP1_CTRL_REG_BASE_IDX 1 6573fb4d8502Sjsg #define mmCGTS_CU3_TD_TCP_CTRL_REG 0x501b 6574fb4d8502Sjsg #define mmCGTS_CU3_TD_TCP_CTRL_REG_BASE_IDX 1 6575fb4d8502Sjsg #define mmCGTS_CU4_SP0_CTRL_REG 0x501c 6576fb4d8502Sjsg #define mmCGTS_CU4_SP0_CTRL_REG_BASE_IDX 1 6577fb4d8502Sjsg #define mmCGTS_CU4_LDS_SQ_CTRL_REG 0x501d 6578fb4d8502Sjsg #define mmCGTS_CU4_LDS_SQ_CTRL_REG_BASE_IDX 1 6579fb4d8502Sjsg #define mmCGTS_CU4_TA_SQC_CTRL_REG 0x501e 6580fb4d8502Sjsg #define mmCGTS_CU4_TA_SQC_CTRL_REG_BASE_IDX 1 6581fb4d8502Sjsg #define mmCGTS_CU4_SP1_CTRL_REG 0x501f 6582fb4d8502Sjsg #define mmCGTS_CU4_SP1_CTRL_REG_BASE_IDX 1 6583fb4d8502Sjsg #define mmCGTS_CU4_TD_TCP_CTRL_REG 0x5020 6584fb4d8502Sjsg #define mmCGTS_CU4_TD_TCP_CTRL_REG_BASE_IDX 1 6585fb4d8502Sjsg #define mmCGTS_CU5_SP0_CTRL_REG 0x5021 6586fb4d8502Sjsg #define mmCGTS_CU5_SP0_CTRL_REG_BASE_IDX 1 6587fb4d8502Sjsg #define mmCGTS_CU5_LDS_SQ_CTRL_REG 0x5022 6588fb4d8502Sjsg #define mmCGTS_CU5_LDS_SQ_CTRL_REG_BASE_IDX 1 6589fb4d8502Sjsg #define mmCGTS_CU5_TA_SQC_CTRL_REG 0x5023 6590fb4d8502Sjsg #define mmCGTS_CU5_TA_SQC_CTRL_REG_BASE_IDX 1 6591fb4d8502Sjsg #define mmCGTS_CU5_SP1_CTRL_REG 0x5024 6592fb4d8502Sjsg #define mmCGTS_CU5_SP1_CTRL_REG_BASE_IDX 1 6593fb4d8502Sjsg #define mmCGTS_CU5_TD_TCP_CTRL_REG 0x5025 6594fb4d8502Sjsg #define mmCGTS_CU5_TD_TCP_CTRL_REG_BASE_IDX 1 6595fb4d8502Sjsg #define mmCGTS_CU6_SP0_CTRL_REG 0x5026 6596fb4d8502Sjsg #define mmCGTS_CU6_SP0_CTRL_REG_BASE_IDX 1 6597fb4d8502Sjsg #define mmCGTS_CU6_LDS_SQ_CTRL_REG 0x5027 6598fb4d8502Sjsg #define mmCGTS_CU6_LDS_SQ_CTRL_REG_BASE_IDX 1 6599fb4d8502Sjsg #define mmCGTS_CU6_TA_SQC_CTRL_REG 0x5028 6600fb4d8502Sjsg #define mmCGTS_CU6_TA_SQC_CTRL_REG_BASE_IDX 1 6601fb4d8502Sjsg #define mmCGTS_CU6_SP1_CTRL_REG 0x5029 6602fb4d8502Sjsg #define mmCGTS_CU6_SP1_CTRL_REG_BASE_IDX 1 6603fb4d8502Sjsg #define mmCGTS_CU6_TD_TCP_CTRL_REG 0x502a 6604fb4d8502Sjsg #define mmCGTS_CU6_TD_TCP_CTRL_REG_BASE_IDX 1 6605fb4d8502Sjsg #define mmCGTS_CU7_SP0_CTRL_REG 0x502b 6606fb4d8502Sjsg #define mmCGTS_CU7_SP0_CTRL_REG_BASE_IDX 1 6607fb4d8502Sjsg #define mmCGTS_CU7_LDS_SQ_CTRL_REG 0x502c 6608fb4d8502Sjsg #define mmCGTS_CU7_LDS_SQ_CTRL_REG_BASE_IDX 1 6609fb4d8502Sjsg #define mmCGTS_CU7_TA_SQC_CTRL_REG 0x502d 6610fb4d8502Sjsg #define mmCGTS_CU7_TA_SQC_CTRL_REG_BASE_IDX 1 6611fb4d8502Sjsg #define mmCGTS_CU7_SP1_CTRL_REG 0x502e 6612fb4d8502Sjsg #define mmCGTS_CU7_SP1_CTRL_REG_BASE_IDX 1 6613fb4d8502Sjsg #define mmCGTS_CU7_TD_TCP_CTRL_REG 0x502f 6614fb4d8502Sjsg #define mmCGTS_CU7_TD_TCP_CTRL_REG_BASE_IDX 1 6615fb4d8502Sjsg #define mmCGTS_CU8_SP0_CTRL_REG 0x5030 6616fb4d8502Sjsg #define mmCGTS_CU8_SP0_CTRL_REG_BASE_IDX 1 6617fb4d8502Sjsg #define mmCGTS_CU8_LDS_SQ_CTRL_REG 0x5031 6618fb4d8502Sjsg #define mmCGTS_CU8_LDS_SQ_CTRL_REG_BASE_IDX 1 6619fb4d8502Sjsg #define mmCGTS_CU8_TA_SQC_CTRL_REG 0x5032 6620fb4d8502Sjsg #define mmCGTS_CU8_TA_SQC_CTRL_REG_BASE_IDX 1 6621fb4d8502Sjsg #define mmCGTS_CU8_SP1_CTRL_REG 0x5033 6622fb4d8502Sjsg #define mmCGTS_CU8_SP1_CTRL_REG_BASE_IDX 1 6623fb4d8502Sjsg #define mmCGTS_CU8_TD_TCP_CTRL_REG 0x5034 6624fb4d8502Sjsg #define mmCGTS_CU8_TD_TCP_CTRL_REG_BASE_IDX 1 6625fb4d8502Sjsg #define mmCGTS_CU9_SP0_CTRL_REG 0x5035 6626fb4d8502Sjsg #define mmCGTS_CU9_SP0_CTRL_REG_BASE_IDX 1 6627fb4d8502Sjsg #define mmCGTS_CU9_LDS_SQ_CTRL_REG 0x5036 6628fb4d8502Sjsg #define mmCGTS_CU9_LDS_SQ_CTRL_REG_BASE_IDX 1 6629fb4d8502Sjsg #define mmCGTS_CU9_TA_SQC_CTRL_REG 0x5037 6630fb4d8502Sjsg #define mmCGTS_CU9_TA_SQC_CTRL_REG_BASE_IDX 1 6631fb4d8502Sjsg #define mmCGTS_CU9_SP1_CTRL_REG 0x5038 6632fb4d8502Sjsg #define mmCGTS_CU9_SP1_CTRL_REG_BASE_IDX 1 6633fb4d8502Sjsg #define mmCGTS_CU9_TD_TCP_CTRL_REG 0x5039 6634fb4d8502Sjsg #define mmCGTS_CU9_TD_TCP_CTRL_REG_BASE_IDX 1 6635fb4d8502Sjsg #define mmCGTS_CU10_SP0_CTRL_REG 0x503a 6636fb4d8502Sjsg #define mmCGTS_CU10_SP0_CTRL_REG_BASE_IDX 1 6637fb4d8502Sjsg #define mmCGTS_CU10_LDS_SQ_CTRL_REG 0x503b 6638fb4d8502Sjsg #define mmCGTS_CU10_LDS_SQ_CTRL_REG_BASE_IDX 1 6639fb4d8502Sjsg #define mmCGTS_CU10_TA_SQC_CTRL_REG 0x503c 6640fb4d8502Sjsg #define mmCGTS_CU10_TA_SQC_CTRL_REG_BASE_IDX 1 6641fb4d8502Sjsg #define mmCGTS_CU10_SP1_CTRL_REG 0x503d 6642fb4d8502Sjsg #define mmCGTS_CU10_SP1_CTRL_REG_BASE_IDX 1 6643fb4d8502Sjsg #define mmCGTS_CU10_TD_TCP_CTRL_REG 0x503e 6644fb4d8502Sjsg #define mmCGTS_CU10_TD_TCP_CTRL_REG_BASE_IDX 1 6645fb4d8502Sjsg #define mmCGTS_CU11_SP0_CTRL_REG 0x503f 6646fb4d8502Sjsg #define mmCGTS_CU11_SP0_CTRL_REG_BASE_IDX 1 6647fb4d8502Sjsg #define mmCGTS_CU11_LDS_SQ_CTRL_REG 0x5040 6648fb4d8502Sjsg #define mmCGTS_CU11_LDS_SQ_CTRL_REG_BASE_IDX 1 6649fb4d8502Sjsg #define mmCGTS_CU11_TA_SQC_CTRL_REG 0x5041 6650fb4d8502Sjsg #define mmCGTS_CU11_TA_SQC_CTRL_REG_BASE_IDX 1 6651fb4d8502Sjsg #define mmCGTS_CU11_SP1_CTRL_REG 0x5042 6652fb4d8502Sjsg #define mmCGTS_CU11_SP1_CTRL_REG_BASE_IDX 1 6653fb4d8502Sjsg #define mmCGTS_CU11_TD_TCP_CTRL_REG 0x5043 6654fb4d8502Sjsg #define mmCGTS_CU11_TD_TCP_CTRL_REG_BASE_IDX 1 6655fb4d8502Sjsg #define mmCGTS_CU12_SP0_CTRL_REG 0x5044 6656fb4d8502Sjsg #define mmCGTS_CU12_SP0_CTRL_REG_BASE_IDX 1 6657fb4d8502Sjsg #define mmCGTS_CU12_LDS_SQ_CTRL_REG 0x5045 6658fb4d8502Sjsg #define mmCGTS_CU12_LDS_SQ_CTRL_REG_BASE_IDX 1 6659fb4d8502Sjsg #define mmCGTS_CU12_TA_SQC_CTRL_REG 0x5046 6660fb4d8502Sjsg #define mmCGTS_CU12_TA_SQC_CTRL_REG_BASE_IDX 1 6661fb4d8502Sjsg #define mmCGTS_CU12_SP1_CTRL_REG 0x5047 6662fb4d8502Sjsg #define mmCGTS_CU12_SP1_CTRL_REG_BASE_IDX 1 6663fb4d8502Sjsg #define mmCGTS_CU12_TD_TCP_CTRL_REG 0x5048 6664fb4d8502Sjsg #define mmCGTS_CU12_TD_TCP_CTRL_REG_BASE_IDX 1 6665fb4d8502Sjsg #define mmCGTS_CU13_SP0_CTRL_REG 0x5049 6666fb4d8502Sjsg #define mmCGTS_CU13_SP0_CTRL_REG_BASE_IDX 1 6667fb4d8502Sjsg #define mmCGTS_CU13_LDS_SQ_CTRL_REG 0x504a 6668fb4d8502Sjsg #define mmCGTS_CU13_LDS_SQ_CTRL_REG_BASE_IDX 1 6669fb4d8502Sjsg #define mmCGTS_CU13_TA_SQC_CTRL_REG 0x504b 6670fb4d8502Sjsg #define mmCGTS_CU13_TA_SQC_CTRL_REG_BASE_IDX 1 6671fb4d8502Sjsg #define mmCGTS_CU13_SP1_CTRL_REG 0x504c 6672fb4d8502Sjsg #define mmCGTS_CU13_SP1_CTRL_REG_BASE_IDX 1 6673fb4d8502Sjsg #define mmCGTS_CU13_TD_TCP_CTRL_REG 0x504d 6674fb4d8502Sjsg #define mmCGTS_CU13_TD_TCP_CTRL_REG_BASE_IDX 1 6675fb4d8502Sjsg #define mmCGTS_CU14_SP0_CTRL_REG 0x504e 6676fb4d8502Sjsg #define mmCGTS_CU14_SP0_CTRL_REG_BASE_IDX 1 6677fb4d8502Sjsg #define mmCGTS_CU14_LDS_SQ_CTRL_REG 0x504f 6678fb4d8502Sjsg #define mmCGTS_CU14_LDS_SQ_CTRL_REG_BASE_IDX 1 6679fb4d8502Sjsg #define mmCGTS_CU14_TA_SQC_CTRL_REG 0x5050 6680fb4d8502Sjsg #define mmCGTS_CU14_TA_SQC_CTRL_REG_BASE_IDX 1 6681fb4d8502Sjsg #define mmCGTS_CU14_SP1_CTRL_REG 0x5051 6682fb4d8502Sjsg #define mmCGTS_CU14_SP1_CTRL_REG_BASE_IDX 1 6683fb4d8502Sjsg #define mmCGTS_CU14_TD_TCP_CTRL_REG 0x5052 6684fb4d8502Sjsg #define mmCGTS_CU14_TD_TCP_CTRL_REG_BASE_IDX 1 6685fb4d8502Sjsg #define mmCGTS_CU15_SP0_CTRL_REG 0x5053 6686fb4d8502Sjsg #define mmCGTS_CU15_SP0_CTRL_REG_BASE_IDX 1 6687fb4d8502Sjsg #define mmCGTS_CU15_LDS_SQ_CTRL_REG 0x5054 6688fb4d8502Sjsg #define mmCGTS_CU15_LDS_SQ_CTRL_REG_BASE_IDX 1 6689fb4d8502Sjsg #define mmCGTS_CU15_TA_SQC_CTRL_REG 0x5055 6690fb4d8502Sjsg #define mmCGTS_CU15_TA_SQC_CTRL_REG_BASE_IDX 1 6691fb4d8502Sjsg #define mmCGTS_CU15_SP1_CTRL_REG 0x5056 6692fb4d8502Sjsg #define mmCGTS_CU15_SP1_CTRL_REG_BASE_IDX 1 6693fb4d8502Sjsg #define mmCGTS_CU15_TD_TCP_CTRL_REG 0x5057 6694fb4d8502Sjsg #define mmCGTS_CU15_TD_TCP_CTRL_REG_BASE_IDX 1 6695fb4d8502Sjsg #define mmCGTS_CU0_TCPI_CTRL_REG 0x5058 6696fb4d8502Sjsg #define mmCGTS_CU0_TCPI_CTRL_REG_BASE_IDX 1 6697fb4d8502Sjsg #define mmCGTS_CU1_TCPI_CTRL_REG 0x5059 6698fb4d8502Sjsg #define mmCGTS_CU1_TCPI_CTRL_REG_BASE_IDX 1 6699fb4d8502Sjsg #define mmCGTS_CU2_TCPI_CTRL_REG 0x505a 6700fb4d8502Sjsg #define mmCGTS_CU2_TCPI_CTRL_REG_BASE_IDX 1 6701fb4d8502Sjsg #define mmCGTS_CU3_TCPI_CTRL_REG 0x505b 6702fb4d8502Sjsg #define mmCGTS_CU3_TCPI_CTRL_REG_BASE_IDX 1 6703fb4d8502Sjsg #define mmCGTS_CU4_TCPI_CTRL_REG 0x505c 6704fb4d8502Sjsg #define mmCGTS_CU4_TCPI_CTRL_REG_BASE_IDX 1 6705fb4d8502Sjsg #define mmCGTS_CU5_TCPI_CTRL_REG 0x505d 6706fb4d8502Sjsg #define mmCGTS_CU5_TCPI_CTRL_REG_BASE_IDX 1 6707fb4d8502Sjsg #define mmCGTS_CU6_TCPI_CTRL_REG 0x505e 6708fb4d8502Sjsg #define mmCGTS_CU6_TCPI_CTRL_REG_BASE_IDX 1 6709fb4d8502Sjsg #define mmCGTS_CU7_TCPI_CTRL_REG 0x505f 6710fb4d8502Sjsg #define mmCGTS_CU7_TCPI_CTRL_REG_BASE_IDX 1 6711fb4d8502Sjsg #define mmCGTS_CU8_TCPI_CTRL_REG 0x5060 6712fb4d8502Sjsg #define mmCGTS_CU8_TCPI_CTRL_REG_BASE_IDX 1 6713fb4d8502Sjsg #define mmCGTS_CU9_TCPI_CTRL_REG 0x5061 6714fb4d8502Sjsg #define mmCGTS_CU9_TCPI_CTRL_REG_BASE_IDX 1 6715fb4d8502Sjsg #define mmCGTS_CU10_TCPI_CTRL_REG 0x5062 6716fb4d8502Sjsg #define mmCGTS_CU10_TCPI_CTRL_REG_BASE_IDX 1 6717fb4d8502Sjsg #define mmCGTS_CU11_TCPI_CTRL_REG 0x5063 6718fb4d8502Sjsg #define mmCGTS_CU11_TCPI_CTRL_REG_BASE_IDX 1 6719fb4d8502Sjsg #define mmCGTS_CU12_TCPI_CTRL_REG 0x5064 6720fb4d8502Sjsg #define mmCGTS_CU12_TCPI_CTRL_REG_BASE_IDX 1 6721fb4d8502Sjsg #define mmCGTS_CU13_TCPI_CTRL_REG 0x5065 6722fb4d8502Sjsg #define mmCGTS_CU13_TCPI_CTRL_REG_BASE_IDX 1 6723fb4d8502Sjsg #define mmCGTS_CU14_TCPI_CTRL_REG 0x5066 6724fb4d8502Sjsg #define mmCGTS_CU14_TCPI_CTRL_REG_BASE_IDX 1 6725fb4d8502Sjsg #define mmCGTS_CU15_TCPI_CTRL_REG 0x5067 6726fb4d8502Sjsg #define mmCGTS_CU15_TCPI_CTRL_REG_BASE_IDX 1 6727fb4d8502Sjsg #define mmCGTT_SPI_CLK_CTRL 0x5080 6728fb4d8502Sjsg #define mmCGTT_SPI_CLK_CTRL_BASE_IDX 1 6729fb4d8502Sjsg #define mmCGTT_PC_CLK_CTRL 0x5081 6730fb4d8502Sjsg #define mmCGTT_PC_CLK_CTRL_BASE_IDX 1 6731fb4d8502Sjsg #define mmCGTT_BCI_CLK_CTRL 0x5082 6732fb4d8502Sjsg #define mmCGTT_BCI_CLK_CTRL_BASE_IDX 1 6733fb4d8502Sjsg #define mmCGTT_VGT_CLK_CTRL 0x5084 6734fb4d8502Sjsg #define mmCGTT_VGT_CLK_CTRL_BASE_IDX 1 6735fb4d8502Sjsg #define mmCGTT_IA_CLK_CTRL 0x5085 6736fb4d8502Sjsg #define mmCGTT_IA_CLK_CTRL_BASE_IDX 1 6737fb4d8502Sjsg #define mmCGTT_WD_CLK_CTRL 0x5086 6738fb4d8502Sjsg #define mmCGTT_WD_CLK_CTRL_BASE_IDX 1 6739fb4d8502Sjsg #define mmCGTT_PA_CLK_CTRL 0x5088 6740fb4d8502Sjsg #define mmCGTT_PA_CLK_CTRL_BASE_IDX 1 6741fb4d8502Sjsg #define mmCGTT_SC_CLK_CTRL0 0x5089 6742fb4d8502Sjsg #define mmCGTT_SC_CLK_CTRL0_BASE_IDX 1 6743fb4d8502Sjsg #define mmCGTT_SC_CLK_CTRL1 0x508a 6744fb4d8502Sjsg #define mmCGTT_SC_CLK_CTRL1_BASE_IDX 1 6745fb4d8502Sjsg #define mmCGTT_SQ_CLK_CTRL 0x508c 6746fb4d8502Sjsg #define mmCGTT_SQ_CLK_CTRL_BASE_IDX 1 6747fb4d8502Sjsg #define mmCGTT_SQG_CLK_CTRL 0x508d 6748fb4d8502Sjsg #define mmCGTT_SQG_CLK_CTRL_BASE_IDX 1 6749fb4d8502Sjsg #define mmSQ_ALU_CLK_CTRL 0x508e 6750fb4d8502Sjsg #define mmSQ_ALU_CLK_CTRL_BASE_IDX 1 6751fb4d8502Sjsg #define mmSQ_TEX_CLK_CTRL 0x508f 6752fb4d8502Sjsg #define mmSQ_TEX_CLK_CTRL_BASE_IDX 1 6753fb4d8502Sjsg #define mmSQ_LDS_CLK_CTRL 0x5090 6754fb4d8502Sjsg #define mmSQ_LDS_CLK_CTRL_BASE_IDX 1 6755fb4d8502Sjsg #define mmSQ_POWER_THROTTLE 0x5091 6756fb4d8502Sjsg #define mmSQ_POWER_THROTTLE_BASE_IDX 1 6757fb4d8502Sjsg #define mmSQ_POWER_THROTTLE2 0x5092 6758fb4d8502Sjsg #define mmSQ_POWER_THROTTLE2_BASE_IDX 1 6759fb4d8502Sjsg #define mmCGTT_SX_CLK_CTRL0 0x5094 6760fb4d8502Sjsg #define mmCGTT_SX_CLK_CTRL0_BASE_IDX 1 6761fb4d8502Sjsg #define mmCGTT_SX_CLK_CTRL1 0x5095 6762fb4d8502Sjsg #define mmCGTT_SX_CLK_CTRL1_BASE_IDX 1 6763fb4d8502Sjsg #define mmCGTT_SX_CLK_CTRL2 0x5096 6764fb4d8502Sjsg #define mmCGTT_SX_CLK_CTRL2_BASE_IDX 1 6765fb4d8502Sjsg #define mmCGTT_SX_CLK_CTRL3 0x5097 6766fb4d8502Sjsg #define mmCGTT_SX_CLK_CTRL3_BASE_IDX 1 6767fb4d8502Sjsg #define mmCGTT_SX_CLK_CTRL4 0x5098 6768fb4d8502Sjsg #define mmCGTT_SX_CLK_CTRL4_BASE_IDX 1 6769fb4d8502Sjsg #define mmTD_CGTT_CTRL 0x509c 6770fb4d8502Sjsg #define mmTD_CGTT_CTRL_BASE_IDX 1 6771fb4d8502Sjsg #define mmTA_CGTT_CTRL 0x509d 6772fb4d8502Sjsg #define mmTA_CGTT_CTRL_BASE_IDX 1 6773fb4d8502Sjsg #define mmCGTT_TCPI_CLK_CTRL 0x509e 6774fb4d8502Sjsg #define mmCGTT_TCPI_CLK_CTRL_BASE_IDX 1 6775fb4d8502Sjsg #define mmCGTT_TCI_CLK_CTRL 0x509f 6776fb4d8502Sjsg #define mmCGTT_TCI_CLK_CTRL_BASE_IDX 1 6777fb4d8502Sjsg #define mmCGTT_GDS_CLK_CTRL 0x50a0 6778fb4d8502Sjsg #define mmCGTT_GDS_CLK_CTRL_BASE_IDX 1 6779fb4d8502Sjsg #define mmDB_CGTT_CLK_CTRL_0 0x50a4 6780fb4d8502Sjsg #define mmDB_CGTT_CLK_CTRL_0_BASE_IDX 1 6781fb4d8502Sjsg #define mmCB_CGTT_SCLK_CTRL 0x50a8 6782fb4d8502Sjsg #define mmCB_CGTT_SCLK_CTRL_BASE_IDX 1 6783fb4d8502Sjsg #define mmTCC_CGTT_SCLK_CTRL 0x50ac 6784fb4d8502Sjsg #define mmTCC_CGTT_SCLK_CTRL_BASE_IDX 1 6785fb4d8502Sjsg #define mmTCA_CGTT_SCLK_CTRL 0x50ad 6786fb4d8502Sjsg #define mmTCA_CGTT_SCLK_CTRL_BASE_IDX 1 6787fb4d8502Sjsg #define mmCGTT_CP_CLK_CTRL 0x50b0 6788fb4d8502Sjsg #define mmCGTT_CP_CLK_CTRL_BASE_IDX 1 6789fb4d8502Sjsg #define mmCGTT_CPF_CLK_CTRL 0x50b1 6790fb4d8502Sjsg #define mmCGTT_CPF_CLK_CTRL_BASE_IDX 1 6791fb4d8502Sjsg #define mmCGTT_CPC_CLK_CTRL 0x50b2 6792fb4d8502Sjsg #define mmCGTT_CPC_CLK_CTRL_BASE_IDX 1 6793fb4d8502Sjsg #define mmRLC_PWR_CTRL 0x50b4 6794fb4d8502Sjsg #define mmRLC_PWR_CTRL_BASE_IDX 1 6795fb4d8502Sjsg #define mmCGTT_RLC_CLK_CTRL 0x50b5 6796fb4d8502Sjsg #define mmCGTT_RLC_CLK_CTRL_BASE_IDX 1 6797fb4d8502Sjsg #define mmRLC_GFX_RM_CNTL 0x50b6 6798fb4d8502Sjsg #define mmRLC_GFX_RM_CNTL_BASE_IDX 1 6799fb4d8502Sjsg #define mmRMI_CGTT_SCLK_CTRL 0x50c0 6800fb4d8502Sjsg #define mmRMI_CGTT_SCLK_CTRL_BASE_IDX 1 6801fb4d8502Sjsg #define mmCGTT_TCPF_CLK_CTRL 0x50c1 6802fb4d8502Sjsg #define mmCGTT_TCPF_CLK_CTRL_BASE_IDX 1 6803fb4d8502Sjsg 6804fb4d8502Sjsg 6805fb4d8502Sjsg // addressBlock: gc_ea_pwrdec 6806fb4d8502Sjsg // base address: 0x3c000 6807fb4d8502Sjsg #define mmGCEA_CGTT_CLK_CTRL 0x50c4 6808fb4d8502Sjsg #define mmGCEA_CGTT_CLK_CTRL_BASE_IDX 1 6809fb4d8502Sjsg 6810fb4d8502Sjsg 6811fb4d8502Sjsg // addressBlock: gc_utcl2_vmsharedhvdec 6812fb4d8502Sjsg // base address: 0x3ea00 6813fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF0 0x5a80 6814fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF0_BASE_IDX 1 6815fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF1 0x5a81 6816fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF1_BASE_IDX 1 6817fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF2 0x5a82 6818fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF2_BASE_IDX 1 6819fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF3 0x5a83 6820fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF3_BASE_IDX 1 6821fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF4 0x5a84 6822fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF4_BASE_IDX 1 6823fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF5 0x5a85 6824fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF5_BASE_IDX 1 6825fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF6 0x5a86 6826fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF6_BASE_IDX 1 6827fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF7 0x5a87 6828fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF7_BASE_IDX 1 6829fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF8 0x5a88 6830fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF8_BASE_IDX 1 6831fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF9 0x5a89 6832fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF9_BASE_IDX 1 6833fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF10 0x5a8a 6834fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF10_BASE_IDX 1 6835fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF11 0x5a8b 6836fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF11_BASE_IDX 1 6837fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF12 0x5a8c 6838fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF12_BASE_IDX 1 6839fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF13 0x5a8d 6840fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF13_BASE_IDX 1 6841fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF14 0x5a8e 6842fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF14_BASE_IDX 1 6843fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF15 0x5a8f 6844fb4d8502Sjsg #define mmMC_VM_FB_SIZE_OFFSET_VF15_BASE_IDX 1 6845fb4d8502Sjsg #define mmVM_IOMMU_MMIO_CNTRL_1 0x5a90 6846fb4d8502Sjsg #define mmVM_IOMMU_MMIO_CNTRL_1_BASE_IDX 1 6847fb4d8502Sjsg #define mmMC_VM_MARC_BASE_LO_0 0x5a91 6848fb4d8502Sjsg #define mmMC_VM_MARC_BASE_LO_0_BASE_IDX 1 6849fb4d8502Sjsg #define mmMC_VM_MARC_BASE_LO_1 0x5a92 6850fb4d8502Sjsg #define mmMC_VM_MARC_BASE_LO_1_BASE_IDX 1 6851fb4d8502Sjsg #define mmMC_VM_MARC_BASE_LO_2 0x5a93 6852fb4d8502Sjsg #define mmMC_VM_MARC_BASE_LO_2_BASE_IDX 1 6853fb4d8502Sjsg #define mmMC_VM_MARC_BASE_LO_3 0x5a94 6854fb4d8502Sjsg #define mmMC_VM_MARC_BASE_LO_3_BASE_IDX 1 6855fb4d8502Sjsg #define mmMC_VM_MARC_BASE_HI_0 0x5a95 6856fb4d8502Sjsg #define mmMC_VM_MARC_BASE_HI_0_BASE_IDX 1 6857fb4d8502Sjsg #define mmMC_VM_MARC_BASE_HI_1 0x5a96 6858fb4d8502Sjsg #define mmMC_VM_MARC_BASE_HI_1_BASE_IDX 1 6859fb4d8502Sjsg #define mmMC_VM_MARC_BASE_HI_2 0x5a97 6860fb4d8502Sjsg #define mmMC_VM_MARC_BASE_HI_2_BASE_IDX 1 6861fb4d8502Sjsg #define mmMC_VM_MARC_BASE_HI_3 0x5a98 6862fb4d8502Sjsg #define mmMC_VM_MARC_BASE_HI_3_BASE_IDX 1 6863fb4d8502Sjsg #define mmMC_VM_MARC_RELOC_LO_0 0x5a99 6864fb4d8502Sjsg #define mmMC_VM_MARC_RELOC_LO_0_BASE_IDX 1 6865fb4d8502Sjsg #define mmMC_VM_MARC_RELOC_LO_1 0x5a9a 6866fb4d8502Sjsg #define mmMC_VM_MARC_RELOC_LO_1_BASE_IDX 1 6867fb4d8502Sjsg #define mmMC_VM_MARC_RELOC_LO_2 0x5a9b 6868fb4d8502Sjsg #define mmMC_VM_MARC_RELOC_LO_2_BASE_IDX 1 6869fb4d8502Sjsg #define mmMC_VM_MARC_RELOC_LO_3 0x5a9c 6870fb4d8502Sjsg #define mmMC_VM_MARC_RELOC_LO_3_BASE_IDX 1 6871fb4d8502Sjsg #define mmMC_VM_MARC_RELOC_HI_0 0x5a9d 6872fb4d8502Sjsg #define mmMC_VM_MARC_RELOC_HI_0_BASE_IDX 1 6873fb4d8502Sjsg #define mmMC_VM_MARC_RELOC_HI_1 0x5a9e 6874fb4d8502Sjsg #define mmMC_VM_MARC_RELOC_HI_1_BASE_IDX 1 6875fb4d8502Sjsg #define mmMC_VM_MARC_RELOC_HI_2 0x5a9f 6876fb4d8502Sjsg #define mmMC_VM_MARC_RELOC_HI_2_BASE_IDX 1 6877fb4d8502Sjsg #define mmMC_VM_MARC_RELOC_HI_3 0x5aa0 6878fb4d8502Sjsg #define mmMC_VM_MARC_RELOC_HI_3_BASE_IDX 1 6879fb4d8502Sjsg #define mmMC_VM_MARC_LEN_LO_0 0x5aa1 6880fb4d8502Sjsg #define mmMC_VM_MARC_LEN_LO_0_BASE_IDX 1 6881fb4d8502Sjsg #define mmMC_VM_MARC_LEN_LO_1 0x5aa2 6882fb4d8502Sjsg #define mmMC_VM_MARC_LEN_LO_1_BASE_IDX 1 6883fb4d8502Sjsg #define mmMC_VM_MARC_LEN_LO_2 0x5aa3 6884fb4d8502Sjsg #define mmMC_VM_MARC_LEN_LO_2_BASE_IDX 1 6885fb4d8502Sjsg #define mmMC_VM_MARC_LEN_LO_3 0x5aa4 6886fb4d8502Sjsg #define mmMC_VM_MARC_LEN_LO_3_BASE_IDX 1 6887fb4d8502Sjsg #define mmMC_VM_MARC_LEN_HI_0 0x5aa5 6888fb4d8502Sjsg #define mmMC_VM_MARC_LEN_HI_0_BASE_IDX 1 6889fb4d8502Sjsg #define mmMC_VM_MARC_LEN_HI_1 0x5aa6 6890fb4d8502Sjsg #define mmMC_VM_MARC_LEN_HI_1_BASE_IDX 1 6891fb4d8502Sjsg #define mmMC_VM_MARC_LEN_HI_2 0x5aa7 6892fb4d8502Sjsg #define mmMC_VM_MARC_LEN_HI_2_BASE_IDX 1 6893fb4d8502Sjsg #define mmMC_VM_MARC_LEN_HI_3 0x5aa8 6894fb4d8502Sjsg #define mmMC_VM_MARC_LEN_HI_3_BASE_IDX 1 6895fb4d8502Sjsg #define mmVM_IOMMU_CONTROL_REGISTER 0x5aa9 6896fb4d8502Sjsg #define mmVM_IOMMU_CONTROL_REGISTER_BASE_IDX 1 6897fb4d8502Sjsg #define mmVM_IOMMU_PERFORMANCE_OPTIMIZATION_CONTROL_REGISTER 0x5aaa 6898fb4d8502Sjsg #define mmVM_IOMMU_PERFORMANCE_OPTIMIZATION_CONTROL_REGISTER_BASE_IDX 1 6899fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL 0x5aab 6900fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_BASE_IDX 1 6901fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_0 0x5aac 6902fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_0_BASE_IDX 1 6903fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_1 0x5aad 6904fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_1_BASE_IDX 1 6905fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_2 0x5aae 6906fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_2_BASE_IDX 1 6907fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_3 0x5aaf 6908fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_3_BASE_IDX 1 6909fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_4 0x5ab0 6910fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_4_BASE_IDX 1 6911fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_5 0x5ab1 6912fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_5_BASE_IDX 1 6913fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_6 0x5ab2 6914fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_6_BASE_IDX 1 6915fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_7 0x5ab3 6916fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_7_BASE_IDX 1 6917fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_8 0x5ab4 6918fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_8_BASE_IDX 1 6919fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_9 0x5ab5 6920fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_9_BASE_IDX 1 6921fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_10 0x5ab6 6922fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_10_BASE_IDX 1 6923fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_11 0x5ab7 6924fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_11_BASE_IDX 1 6925fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_12 0x5ab8 6926fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_12_BASE_IDX 1 6927fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_13 0x5ab9 6928fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_13_BASE_IDX 1 6929fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_14 0x5aba 6930fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_14_BASE_IDX 1 6931fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_15 0x5abb 6932fb4d8502Sjsg #define mmVM_PCIE_ATS_CNTL_VF_15_BASE_IDX 1 6933fb4d8502Sjsg #define mmUTCL2_CGTT_CLK_CTRL 0x5abc 6934fb4d8502Sjsg #define mmUTCL2_CGTT_CLK_CTRL_BASE_IDX 1 6935fb4d8502Sjsg 6936fb4d8502Sjsg 6937fb4d8502Sjsg // addressBlock: gc_hypdec 6938fb4d8502Sjsg // base address: 0x3e000 6939fb4d8502Sjsg #define mmCP_HYP_PFP_UCODE_ADDR 0x5814 6940fb4d8502Sjsg #define mmCP_HYP_PFP_UCODE_ADDR_BASE_IDX 1 6941fb4d8502Sjsg #define mmCP_PFP_UCODE_ADDR 0x5814 6942fb4d8502Sjsg #define mmCP_PFP_UCODE_ADDR_BASE_IDX 1 6943fb4d8502Sjsg #define mmCP_HYP_PFP_UCODE_DATA 0x5815 6944fb4d8502Sjsg #define mmCP_HYP_PFP_UCODE_DATA_BASE_IDX 1 6945fb4d8502Sjsg #define mmCP_PFP_UCODE_DATA 0x5815 6946fb4d8502Sjsg #define mmCP_PFP_UCODE_DATA_BASE_IDX 1 6947fb4d8502Sjsg #define mmCP_HYP_ME_UCODE_ADDR 0x5816 6948fb4d8502Sjsg #define mmCP_HYP_ME_UCODE_ADDR_BASE_IDX 1 6949fb4d8502Sjsg #define mmCP_ME_RAM_RADDR 0x5816 6950fb4d8502Sjsg #define mmCP_ME_RAM_RADDR_BASE_IDX 1 6951fb4d8502Sjsg #define mmCP_ME_RAM_WADDR 0x5816 6952fb4d8502Sjsg #define mmCP_ME_RAM_WADDR_BASE_IDX 1 6953fb4d8502Sjsg #define mmCP_HYP_ME_UCODE_DATA 0x5817 6954fb4d8502Sjsg #define mmCP_HYP_ME_UCODE_DATA_BASE_IDX 1 6955fb4d8502Sjsg #define mmCP_ME_RAM_DATA 0x5817 6956fb4d8502Sjsg #define mmCP_ME_RAM_DATA_BASE_IDX 1 6957fb4d8502Sjsg #define mmCP_CE_UCODE_ADDR 0x5818 6958fb4d8502Sjsg #define mmCP_CE_UCODE_ADDR_BASE_IDX 1 6959fb4d8502Sjsg #define mmCP_HYP_CE_UCODE_ADDR 0x5818 6960fb4d8502Sjsg #define mmCP_HYP_CE_UCODE_ADDR_BASE_IDX 1 6961fb4d8502Sjsg #define mmCP_CE_UCODE_DATA 0x5819 6962fb4d8502Sjsg #define mmCP_CE_UCODE_DATA_BASE_IDX 1 6963fb4d8502Sjsg #define mmCP_HYP_CE_UCODE_DATA 0x5819 6964fb4d8502Sjsg #define mmCP_HYP_CE_UCODE_DATA_BASE_IDX 1 6965fb4d8502Sjsg #define mmCP_HYP_MEC1_UCODE_ADDR 0x581a 6966fb4d8502Sjsg #define mmCP_HYP_MEC1_UCODE_ADDR_BASE_IDX 1 6967fb4d8502Sjsg #define mmCP_MEC_ME1_UCODE_ADDR 0x581a 6968fb4d8502Sjsg #define mmCP_MEC_ME1_UCODE_ADDR_BASE_IDX 1 6969fb4d8502Sjsg #define mmCP_HYP_MEC1_UCODE_DATA 0x581b 6970fb4d8502Sjsg #define mmCP_HYP_MEC1_UCODE_DATA_BASE_IDX 1 6971fb4d8502Sjsg #define mmCP_MEC_ME1_UCODE_DATA 0x581b 6972fb4d8502Sjsg #define mmCP_MEC_ME1_UCODE_DATA_BASE_IDX 1 6973fb4d8502Sjsg #define mmCP_HYP_MEC2_UCODE_ADDR 0x581c 6974fb4d8502Sjsg #define mmCP_HYP_MEC2_UCODE_ADDR_BASE_IDX 1 6975fb4d8502Sjsg #define mmCP_MEC_ME2_UCODE_ADDR 0x581c 6976fb4d8502Sjsg #define mmCP_MEC_ME2_UCODE_ADDR_BASE_IDX 1 6977fb4d8502Sjsg #define mmCP_HYP_MEC2_UCODE_DATA 0x581d 6978fb4d8502Sjsg #define mmCP_HYP_MEC2_UCODE_DATA_BASE_IDX 1 6979fb4d8502Sjsg #define mmCP_MEC_ME2_UCODE_DATA 0x581d 6980fb4d8502Sjsg #define mmCP_MEC_ME2_UCODE_DATA_BASE_IDX 1 6981fb4d8502Sjsg #define mmRLC_GPM_UCODE_ADDR 0x583c 6982fb4d8502Sjsg #define mmRLC_GPM_UCODE_ADDR_BASE_IDX 1 6983fb4d8502Sjsg #define mmRLC_GPM_UCODE_DATA 0x583d 6984fb4d8502Sjsg #define mmRLC_GPM_UCODE_DATA_BASE_IDX 1 6985fb4d8502Sjsg #define mmGRBM_GFX_INDEX_SR_SELECT 0x5a00 6986fb4d8502Sjsg #define mmGRBM_GFX_INDEX_SR_SELECT_BASE_IDX 1 6987fb4d8502Sjsg #define mmGRBM_GFX_INDEX_SR_DATA 0x5a01 6988fb4d8502Sjsg #define mmGRBM_GFX_INDEX_SR_DATA_BASE_IDX 1 6989fb4d8502Sjsg #define mmGRBM_GFX_CNTL_SR_SELECT 0x5a02 6990fb4d8502Sjsg #define mmGRBM_GFX_CNTL_SR_SELECT_BASE_IDX 1 6991fb4d8502Sjsg #define mmGRBM_GFX_CNTL_SR_DATA 0x5a03 6992fb4d8502Sjsg #define mmGRBM_GFX_CNTL_SR_DATA_BASE_IDX 1 6993fb4d8502Sjsg #define mmGRBM_CAM_INDEX 0x5a04 6994fb4d8502Sjsg #define mmGRBM_CAM_INDEX_BASE_IDX 1 6995fb4d8502Sjsg #define mmGRBM_HYP_CAM_INDEX 0x5a04 6996fb4d8502Sjsg #define mmGRBM_HYP_CAM_INDEX_BASE_IDX 1 6997fb4d8502Sjsg #define mmGRBM_CAM_DATA 0x5a05 6998fb4d8502Sjsg #define mmGRBM_CAM_DATA_BASE_IDX 1 6999fb4d8502Sjsg #define mmGRBM_HYP_CAM_DATA 0x5a05 7000fb4d8502Sjsg #define mmGRBM_HYP_CAM_DATA_BASE_IDX 1 7001fb4d8502Sjsg #define mmRLC_GPU_IOV_VF_ENABLE 0x5b00 7002fb4d8502Sjsg #define mmRLC_GPU_IOV_VF_ENABLE_BASE_IDX 1 7003fb4d8502Sjsg #define mmRLC_GFX_RM_CNTL_ADJ 0x5b01 7004fb4d8502Sjsg #define mmRLC_GFX_RM_CNTL_ADJ_BASE_IDX 1 7005fb4d8502Sjsg #define mmRLC_GPU_IOV_CFG_REG6 0x5b06 7006fb4d8502Sjsg #define mmRLC_GPU_IOV_CFG_REG6_BASE_IDX 1 7007fb4d8502Sjsg #define mmRLC_GPU_IOV_CFG_REG8 0x5b20 7008fb4d8502Sjsg #define mmRLC_GPU_IOV_CFG_REG8_BASE_IDX 1 7009fb4d8502Sjsg #define mmRLC_RLCV_TIMER_INT_0 0x5b25 7010fb4d8502Sjsg #define mmRLC_RLCV_TIMER_INT_0_BASE_IDX 1 7011fb4d8502Sjsg #define mmRLC_RLCV_TIMER_CTRL 0x5b26 7012fb4d8502Sjsg #define mmRLC_RLCV_TIMER_CTRL_BASE_IDX 1 7013fb4d8502Sjsg #define mmRLC_RLCV_TIMER_STAT 0x5b27 7014fb4d8502Sjsg #define mmRLC_RLCV_TIMER_STAT_BASE_IDX 1 7015fb4d8502Sjsg #define mmRLC_GPU_IOV_VF_DOORBELL_STATUS 0x5b2a 7016fb4d8502Sjsg #define mmRLC_GPU_IOV_VF_DOORBELL_STATUS_BASE_IDX 1 7017fb4d8502Sjsg #define mmRLC_GPU_IOV_VF_DOORBELL_STATUS_SET 0x5b2b 7018fb4d8502Sjsg #define mmRLC_GPU_IOV_VF_DOORBELL_STATUS_SET_BASE_IDX 1 7019fb4d8502Sjsg #define mmRLC_GPU_IOV_VF_DOORBELL_STATUS_CLR 0x5b2c 7020fb4d8502Sjsg #define mmRLC_GPU_IOV_VF_DOORBELL_STATUS_CLR_BASE_IDX 1 7021fb4d8502Sjsg #define mmRLC_GPU_IOV_VF_MASK 0x5b2d 7022fb4d8502Sjsg #define mmRLC_GPU_IOV_VF_MASK_BASE_IDX 1 7023fb4d8502Sjsg #define mmRLC_HYP_SEMAPHORE_2 0x5b2e 7024fb4d8502Sjsg #define mmRLC_HYP_SEMAPHORE_2_BASE_IDX 1 7025fb4d8502Sjsg #define mmRLC_HYP_SEMAPHORE_3 0x5b2f 7026fb4d8502Sjsg #define mmRLC_HYP_SEMAPHORE_3_BASE_IDX 1 7027fb4d8502Sjsg #define mmRLC_CLK_CNTL 0x5b31 7028fb4d8502Sjsg #define mmRLC_CLK_CNTL_BASE_IDX 1 7029fb4d8502Sjsg #define mmRLC_GPU_IOV_SCH_BLOCK 0x5b34 7030fb4d8502Sjsg #define mmRLC_GPU_IOV_SCH_BLOCK_BASE_IDX 1 7031fb4d8502Sjsg #define mmRLC_GPU_IOV_CFG_REG1 0x5b35 7032fb4d8502Sjsg #define mmRLC_GPU_IOV_CFG_REG1_BASE_IDX 1 7033fb4d8502Sjsg #define mmRLC_GPU_IOV_CFG_REG2 0x5b36 7034fb4d8502Sjsg #define mmRLC_GPU_IOV_CFG_REG2_BASE_IDX 1 7035fb4d8502Sjsg #define mmRLC_GPU_IOV_VM_BUSY_STATUS 0x5b37 7036fb4d8502Sjsg #define mmRLC_GPU_IOV_VM_BUSY_STATUS_BASE_IDX 1 7037fb4d8502Sjsg #define mmRLC_GPU_IOV_SCH_0 0x5b38 7038fb4d8502Sjsg #define mmRLC_GPU_IOV_SCH_0_BASE_IDX 1 7039fb4d8502Sjsg #define mmRLC_GPU_IOV_ACTIVE_FCN_ID 0x5b39 7040fb4d8502Sjsg #define mmRLC_GPU_IOV_ACTIVE_FCN_ID_BASE_IDX 1 7041fb4d8502Sjsg #define mmRLC_GPU_IOV_SCH_3 0x5b3a 7042fb4d8502Sjsg #define mmRLC_GPU_IOV_SCH_3_BASE_IDX 1 7043fb4d8502Sjsg #define mmRLC_GPU_IOV_SCH_1 0x5b3b 7044fb4d8502Sjsg #define mmRLC_GPU_IOV_SCH_1_BASE_IDX 1 7045fb4d8502Sjsg #define mmRLC_GPU_IOV_SCH_2 0x5b3c 7046fb4d8502Sjsg #define mmRLC_GPU_IOV_SCH_2_BASE_IDX 1 7047fb4d8502Sjsg #define mmRLC_GPU_IOV_UCODE_ADDR 0x5b42 7048fb4d8502Sjsg #define mmRLC_GPU_IOV_UCODE_ADDR_BASE_IDX 1 7049fb4d8502Sjsg #define mmRLC_GPU_IOV_UCODE_DATA 0x5b43 7050fb4d8502Sjsg #define mmRLC_GPU_IOV_UCODE_DATA_BASE_IDX 1 7051fb4d8502Sjsg #define mmRLC_GPU_IOV_SCRATCH_ADDR 0x5b44 7052fb4d8502Sjsg #define mmRLC_GPU_IOV_SCRATCH_ADDR_BASE_IDX 1 7053fb4d8502Sjsg #define mmRLC_GPU_IOV_SCRATCH_DATA 0x5b45 7054fb4d8502Sjsg #define mmRLC_GPU_IOV_SCRATCH_DATA_BASE_IDX 1 7055fb4d8502Sjsg #define mmRLC_GPU_IOV_F32_CNTL 0x5b46 7056fb4d8502Sjsg #define mmRLC_GPU_IOV_F32_CNTL_BASE_IDX 1 7057fb4d8502Sjsg #define mmRLC_GPU_IOV_F32_RESET 0x5b47 7058fb4d8502Sjsg #define mmRLC_GPU_IOV_F32_RESET_BASE_IDX 1 7059fb4d8502Sjsg #define mmRLC_GPU_IOV_SDMA0_STATUS 0x5b48 7060fb4d8502Sjsg #define mmRLC_GPU_IOV_SDMA0_STATUS_BASE_IDX 1 7061fb4d8502Sjsg #define mmRLC_GPU_IOV_SDMA1_STATUS 0x5b49 7062fb4d8502Sjsg #define mmRLC_GPU_IOV_SDMA1_STATUS_BASE_IDX 1 7063fb4d8502Sjsg #define mmRLC_GPU_IOV_SMU_RESPONSE 0x5b4a 7064fb4d8502Sjsg #define mmRLC_GPU_IOV_SMU_RESPONSE_BASE_IDX 1 7065fb4d8502Sjsg #define mmRLC_GPU_IOV_VIRT_RESET_REQ 0x5b4c 7066fb4d8502Sjsg #define mmRLC_GPU_IOV_VIRT_RESET_REQ_BASE_IDX 1 7067fb4d8502Sjsg #define mmRLC_GPU_IOV_RLC_RESPONSE 0x5b4d 7068fb4d8502Sjsg #define mmRLC_GPU_IOV_RLC_RESPONSE_BASE_IDX 1 7069fb4d8502Sjsg #define mmRLC_GPU_IOV_INT_DISABLE 0x5b4e 7070fb4d8502Sjsg #define mmRLC_GPU_IOV_INT_DISABLE_BASE_IDX 1 7071fb4d8502Sjsg #define mmRLC_GPU_IOV_INT_FORCE 0x5b4f 7072fb4d8502Sjsg #define mmRLC_GPU_IOV_INT_FORCE_BASE_IDX 1 7073fb4d8502Sjsg #define mmRLC_GPU_IOV_SDMA0_BUSY_STATUS 0x5b50 7074fb4d8502Sjsg #define mmRLC_GPU_IOV_SDMA0_BUSY_STATUS_BASE_IDX 1 7075fb4d8502Sjsg #define mmRLC_GPU_IOV_SDMA1_BUSY_STATUS 0x5b51 7076fb4d8502Sjsg #define mmRLC_GPU_IOV_SDMA1_BUSY_STATUS_BASE_IDX 1 7077fb4d8502Sjsg 7078fb4d8502Sjsg 7079fb4d8502Sjsg // addressBlock: gccacind 7080fb4d8502Sjsg // base address: 0x0 7081fb4d8502Sjsg #define ixGC_CAC_CNTL 0x0000 7082fb4d8502Sjsg #define ixGC_CAC_OVR_SEL 0x0001 7083fb4d8502Sjsg #define ixGC_CAC_OVR_VAL 0x0002 7084fb4d8502Sjsg #define ixGC_CAC_WEIGHT_BCI_0 0x0003 7085fb4d8502Sjsg #define ixGC_CAC_WEIGHT_CB_0 0x0004 7086fb4d8502Sjsg #define ixGC_CAC_WEIGHT_CB_1 0x0005 7087fb4d8502Sjsg #define ixGC_CAC_WEIGHT_CP_0 0x0008 7088fb4d8502Sjsg #define ixGC_CAC_WEIGHT_CP_1 0x0009 7089fb4d8502Sjsg #define ixGC_CAC_WEIGHT_DB_0 0x000a 7090fb4d8502Sjsg #define ixGC_CAC_WEIGHT_DB_1 0x000b 7091fb4d8502Sjsg #define ixGC_CAC_WEIGHT_GDS_0 0x000e 7092fb4d8502Sjsg #define ixGC_CAC_WEIGHT_GDS_1 0x000f 7093fb4d8502Sjsg #define ixGC_CAC_WEIGHT_IA_0 0x0010 7094fb4d8502Sjsg #define ixGC_CAC_WEIGHT_LDS_0 0x0011 7095fb4d8502Sjsg #define ixGC_CAC_WEIGHT_LDS_1 0x0012 7096fb4d8502Sjsg #define ixGC_CAC_WEIGHT_PA_0 0x0013 7097fb4d8502Sjsg #define ixGC_CAC_WEIGHT_PC_0 0x0014 7098fb4d8502Sjsg #define ixGC_CAC_WEIGHT_SC_0 0x0015 7099fb4d8502Sjsg #define ixGC_CAC_WEIGHT_SPI_0 0x0016 7100fb4d8502Sjsg #define ixGC_CAC_WEIGHT_SPI_1 0x0017 7101fb4d8502Sjsg #define ixGC_CAC_WEIGHT_SPI_2 0x0018 7102fb4d8502Sjsg #define ixGC_CAC_WEIGHT_SQ_0 0x001a 7103fb4d8502Sjsg #define ixGC_CAC_WEIGHT_SQ_1 0x001b 7104fb4d8502Sjsg #define ixGC_CAC_WEIGHT_SQ_2 0x001c 7105fb4d8502Sjsg #define ixGC_CAC_WEIGHT_SQ_3 0x001d 7106fb4d8502Sjsg #define ixGC_CAC_WEIGHT_SQ_4 0x001e 7107fb4d8502Sjsg #define ixGC_CAC_WEIGHT_SX_0 0x001f 7108fb4d8502Sjsg #define ixGC_CAC_WEIGHT_SXRB_0 0x0020 7109fb4d8502Sjsg #define ixGC_CAC_WEIGHT_TA_0 0x0021 7110fb4d8502Sjsg #define ixGC_CAC_WEIGHT_TCC_0 0x0022 7111fb4d8502Sjsg #define ixGC_CAC_WEIGHT_TCC_1 0x0023 7112fb4d8502Sjsg #define ixGC_CAC_WEIGHT_TCC_2 0x0024 7113fb4d8502Sjsg #define ixGC_CAC_WEIGHT_TCP_0 0x0025 7114fb4d8502Sjsg #define ixGC_CAC_WEIGHT_TCP_1 0x0026 7115fb4d8502Sjsg #define ixGC_CAC_WEIGHT_TCP_2 0x0027 7116fb4d8502Sjsg #define ixGC_CAC_WEIGHT_TD_0 0x0028 7117fb4d8502Sjsg #define ixGC_CAC_WEIGHT_TD_1 0x0029 7118fb4d8502Sjsg #define ixGC_CAC_WEIGHT_TD_2 0x002a 7119fb4d8502Sjsg #define ixGC_CAC_WEIGHT_VGT_0 0x002b 7120fb4d8502Sjsg #define ixGC_CAC_WEIGHT_VGT_1 0x002c 7121fb4d8502Sjsg #define ixGC_CAC_WEIGHT_WD_0 0x002d 7122fb4d8502Sjsg #define ixGC_CAC_WEIGHT_CU_0 0x0032 7123fb4d8502Sjsg #define ixGC_CAC_WEIGHT_CU_1 0x0033 7124fb4d8502Sjsg #define ixGC_CAC_WEIGHT_CU_2 0x0034 7125fb4d8502Sjsg #define ixGC_CAC_WEIGHT_CU_3 0x0035 7126fb4d8502Sjsg #define ixGC_CAC_WEIGHT_CU_4 0x0036 7127fb4d8502Sjsg #define ixGC_CAC_WEIGHT_CU_5 0x0037 7128fb4d8502Sjsg #define ixGC_CAC_ACC_BCI0 0x0042 7129fb4d8502Sjsg #define ixGC_CAC_ACC_CB0 0x0043 7130fb4d8502Sjsg #define ixGC_CAC_ACC_CB1 0x0044 7131fb4d8502Sjsg #define ixGC_CAC_ACC_CB2 0x0045 7132fb4d8502Sjsg #define ixGC_CAC_ACC_CB3 0x0046 7133fb4d8502Sjsg #define ixGC_CAC_ACC_CP0 0x004b 7134fb4d8502Sjsg #define ixGC_CAC_ACC_CP1 0x004c 7135fb4d8502Sjsg #define ixGC_CAC_ACC_CP2 0x004d 7136fb4d8502Sjsg #define ixGC_CAC_ACC_DB0 0x004e 7137fb4d8502Sjsg #define ixGC_CAC_ACC_DB1 0x004f 7138fb4d8502Sjsg #define ixGC_CAC_ACC_DB2 0x0050 7139fb4d8502Sjsg #define ixGC_CAC_ACC_DB3 0x0051 7140fb4d8502Sjsg #define ixGC_CAC_ACC_GDS0 0x0056 7141fb4d8502Sjsg #define ixGC_CAC_ACC_GDS1 0x0057 7142fb4d8502Sjsg #define ixGC_CAC_ACC_GDS2 0x0058 7143fb4d8502Sjsg #define ixGC_CAC_ACC_GDS3 0x0059 7144fb4d8502Sjsg #define ixGC_CAC_ACC_IA0 0x005a 7145fb4d8502Sjsg #define ixGC_CAC_ACC_LDS0 0x005b 7146fb4d8502Sjsg #define ixGC_CAC_ACC_LDS1 0x005c 7147fb4d8502Sjsg #define ixGC_CAC_ACC_LDS2 0x005d 7148fb4d8502Sjsg #define ixGC_CAC_ACC_LDS3 0x005e 7149fb4d8502Sjsg #define ixGC_CAC_ACC_PA0 0x005f 7150fb4d8502Sjsg #define ixGC_CAC_ACC_PA1 0x0060 7151fb4d8502Sjsg #define ixGC_CAC_ACC_PC0 0x0061 7152fb4d8502Sjsg #define ixGC_CAC_ACC_SC0 0x0062 7153fb4d8502Sjsg #define ixGC_CAC_ACC_SPI0 0x0063 7154fb4d8502Sjsg #define ixGC_CAC_ACC_SPI1 0x0064 7155fb4d8502Sjsg #define ixGC_CAC_ACC_SPI2 0x0065 7156fb4d8502Sjsg #define ixGC_CAC_ACC_SPI3 0x0066 7157fb4d8502Sjsg #define ixGC_CAC_ACC_SPI4 0x0067 7158fb4d8502Sjsg #define ixGC_CAC_ACC_SPI5 0x0068 7159fb4d8502Sjsg #define ixGC_CAC_WEIGHT_PG_0 0x0069 7160fb4d8502Sjsg #define ixGC_CAC_ACC_PG0 0x006a 7161fb4d8502Sjsg #define ixGC_CAC_OVRD_PG 0x006b 7162fb4d8502Sjsg #define ixGC_CAC_WEIGHT_UTCL2_ATCL2_0 0x006f 7163fb4d8502Sjsg #define ixGC_CAC_ACC_EA0 0x0070 7164fb4d8502Sjsg #define ixGC_CAC_ACC_EA1 0x0071 7165fb4d8502Sjsg #define ixGC_CAC_ACC_EA2 0x0072 7166fb4d8502Sjsg #define ixGC_CAC_ACC_EA3 0x0073 7167fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_ATCL20 0x0074 7168fb4d8502Sjsg #define ixGC_CAC_OVRD_EA 0x0075 7169fb4d8502Sjsg #define ixGC_CAC_OVRD_UTCL2_ATCL2 0x0076 7170fb4d8502Sjsg #define ixGC_CAC_WEIGHT_EA_0 0x0077 7171fb4d8502Sjsg #define ixGC_CAC_WEIGHT_EA_1 0x0078 7172fb4d8502Sjsg #define ixGC_CAC_WEIGHT_RMI_0 0x0079 7173fb4d8502Sjsg #define ixGC_CAC_ACC_RMI0 0x007a 7174fb4d8502Sjsg #define ixGC_CAC_OVRD_RMI 0x007b 7175fb4d8502Sjsg #define ixGC_CAC_WEIGHT_UTCL2_ATCL2_1 0x007c 7176fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_ATCL21 0x007d 7177fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_ATCL22 0x007e 7178fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_ATCL23 0x007f 7179fb4d8502Sjsg #define ixGC_CAC_ACC_EA4 0x0080 7180fb4d8502Sjsg #define ixGC_CAC_ACC_EA5 0x0081 7181fb4d8502Sjsg #define ixGC_CAC_WEIGHT_EA_2 0x0082 7182fb4d8502Sjsg #define ixGC_CAC_ACC_SQ0_LOWER 0x0089 7183fb4d8502Sjsg #define ixGC_CAC_ACC_SQ0_UPPER 0x008a 7184fb4d8502Sjsg #define ixGC_CAC_ACC_SQ1_LOWER 0x008b 7185fb4d8502Sjsg #define ixGC_CAC_ACC_SQ1_UPPER 0x008c 7186fb4d8502Sjsg #define ixGC_CAC_ACC_SQ2_LOWER 0x008d 7187fb4d8502Sjsg #define ixGC_CAC_ACC_SQ2_UPPER 0x008e 7188fb4d8502Sjsg #define ixGC_CAC_ACC_SQ3_LOWER 0x008f 7189fb4d8502Sjsg #define ixGC_CAC_ACC_SQ3_UPPER 0x0090 7190fb4d8502Sjsg #define ixGC_CAC_ACC_SQ4_LOWER 0x0091 7191fb4d8502Sjsg #define ixGC_CAC_ACC_SQ4_UPPER 0x0092 7192fb4d8502Sjsg #define ixGC_CAC_ACC_SQ5_LOWER 0x0093 7193fb4d8502Sjsg #define ixGC_CAC_ACC_SQ5_UPPER 0x0094 7194fb4d8502Sjsg #define ixGC_CAC_ACC_SQ6_LOWER 0x0095 7195fb4d8502Sjsg #define ixGC_CAC_ACC_SQ6_UPPER 0x0096 7196fb4d8502Sjsg #define ixGC_CAC_ACC_SQ7_LOWER 0x0097 7197fb4d8502Sjsg #define ixGC_CAC_ACC_SQ7_UPPER 0x0098 7198fb4d8502Sjsg #define ixGC_CAC_ACC_SQ8_LOWER 0x0099 7199fb4d8502Sjsg #define ixGC_CAC_ACC_SQ8_UPPER 0x009a 7200fb4d8502Sjsg #define ixGC_CAC_ACC_SX0 0x009b 7201fb4d8502Sjsg #define ixGC_CAC_ACC_SXRB0 0x009c 7202fb4d8502Sjsg #define ixGC_CAC_ACC_SXRB1 0x009d 7203fb4d8502Sjsg #define ixGC_CAC_ACC_TA0 0x009e 7204fb4d8502Sjsg #define ixGC_CAC_ACC_TCC0 0x009f 7205fb4d8502Sjsg #define ixGC_CAC_ACC_TCC1 0x00a0 7206fb4d8502Sjsg #define ixGC_CAC_ACC_TCC2 0x00a1 7207fb4d8502Sjsg #define ixGC_CAC_ACC_TCC3 0x00a2 7208fb4d8502Sjsg #define ixGC_CAC_ACC_TCC4 0x00a3 7209fb4d8502Sjsg #define ixGC_CAC_ACC_TCP0 0x00a4 7210fb4d8502Sjsg #define ixGC_CAC_ACC_TCP1 0x00a5 7211fb4d8502Sjsg #define ixGC_CAC_ACC_TCP2 0x00a6 7212fb4d8502Sjsg #define ixGC_CAC_ACC_TCP3 0x00a7 7213fb4d8502Sjsg #define ixGC_CAC_ACC_TCP4 0x00a8 7214fb4d8502Sjsg #define ixGC_CAC_ACC_TD0 0x00a9 7215fb4d8502Sjsg #define ixGC_CAC_ACC_TD1 0x00aa 7216fb4d8502Sjsg #define ixGC_CAC_ACC_TD2 0x00ab 7217fb4d8502Sjsg #define ixGC_CAC_ACC_TD3 0x00ac 7218fb4d8502Sjsg #define ixGC_CAC_ACC_TD4 0x00ad 7219fb4d8502Sjsg #define ixGC_CAC_ACC_TD5 0x00ae 7220fb4d8502Sjsg #define ixGC_CAC_ACC_VGT0 0x00af 7221fb4d8502Sjsg #define ixGC_CAC_ACC_VGT1 0x00b0 7222fb4d8502Sjsg #define ixGC_CAC_ACC_VGT2 0x00b1 7223fb4d8502Sjsg #define ixGC_CAC_ACC_WD0 0x00b2 7224fb4d8502Sjsg #define ixGC_CAC_ACC_CU0 0x00ba 7225fb4d8502Sjsg #define ixGC_CAC_ACC_CU1 0x00bb 7226fb4d8502Sjsg #define ixGC_CAC_ACC_CU2 0x00bc 7227fb4d8502Sjsg #define ixGC_CAC_ACC_CU3 0x00bd 7228fb4d8502Sjsg #define ixGC_CAC_ACC_CU4 0x00be 7229fb4d8502Sjsg #define ixGC_CAC_ACC_CU5 0x00bf 7230fb4d8502Sjsg #define ixGC_CAC_ACC_CU6 0x00c0 7231fb4d8502Sjsg #define ixGC_CAC_ACC_CU7 0x00c1 7232fb4d8502Sjsg #define ixGC_CAC_ACC_CU8 0x00c2 7233fb4d8502Sjsg #define ixGC_CAC_ACC_CU9 0x00c3 7234fb4d8502Sjsg #define ixGC_CAC_ACC_CU10 0x00c4 7235fb4d8502Sjsg #define ixGC_CAC_OVRD_BCI 0x00da 7236fb4d8502Sjsg #define ixGC_CAC_OVRD_CB 0x00db 7237fb4d8502Sjsg #define ixGC_CAC_OVRD_CP 0x00dd 7238fb4d8502Sjsg #define ixGC_CAC_OVRD_DB 0x00de 7239fb4d8502Sjsg #define ixGC_CAC_OVRD_GDS 0x00e0 7240fb4d8502Sjsg #define ixGC_CAC_OVRD_IA 0x00e1 7241fb4d8502Sjsg #define ixGC_CAC_OVRD_LDS 0x00e2 7242fb4d8502Sjsg #define ixGC_CAC_OVRD_PA 0x00e3 7243fb4d8502Sjsg #define ixGC_CAC_OVRD_PC 0x00e4 7244fb4d8502Sjsg #define ixGC_CAC_OVRD_SC 0x00e5 7245fb4d8502Sjsg #define ixGC_CAC_OVRD_SPI 0x00e6 7246fb4d8502Sjsg #define ixGC_CAC_OVRD_CU 0x00e7 7247fb4d8502Sjsg #define ixGC_CAC_OVRD_SQ 0x00e8 7248fb4d8502Sjsg #define ixGC_CAC_OVRD_SX 0x00e9 7249fb4d8502Sjsg #define ixGC_CAC_OVRD_SXRB 0x00ea 7250fb4d8502Sjsg #define ixGC_CAC_OVRD_TA 0x00eb 7251fb4d8502Sjsg #define ixGC_CAC_OVRD_TCC 0x00ec 7252fb4d8502Sjsg #define ixGC_CAC_OVRD_TCP 0x00ed 7253fb4d8502Sjsg #define ixGC_CAC_OVRD_TD 0x00ee 7254fb4d8502Sjsg #define ixGC_CAC_OVRD_VGT 0x00ef 7255fb4d8502Sjsg #define ixGC_CAC_OVRD_WD 0x00f0 7256fb4d8502Sjsg #define ixGC_CAC_ACC_BCI1 0x00ff 7257fb4d8502Sjsg #define ixGC_CAC_WEIGHT_UTCL2_ATCL2_2 0x0100 7258fb4d8502Sjsg #define ixGC_CAC_WEIGHT_UTCL2_ROUTER_0 0x0101 7259fb4d8502Sjsg #define ixGC_CAC_WEIGHT_UTCL2_ROUTER_1 0x0102 7260fb4d8502Sjsg #define ixGC_CAC_WEIGHT_UTCL2_ROUTER_2 0x0103 7261fb4d8502Sjsg #define ixGC_CAC_WEIGHT_UTCL2_ROUTER_3 0x0104 7262fb4d8502Sjsg #define ixGC_CAC_WEIGHT_UTCL2_ROUTER_4 0x0105 7263fb4d8502Sjsg #define ixGC_CAC_WEIGHT_UTCL2_VML2_0 0x0106 7264fb4d8502Sjsg #define ixGC_CAC_WEIGHT_UTCL2_VML2_1 0x0107 7265fb4d8502Sjsg #define ixGC_CAC_WEIGHT_UTCL2_VML2_2 0x0108 7266fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_ATCL24 0x0109 7267fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_ROUTER0 0x010a 7268fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_ROUTER1 0x010b 7269fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_ROUTER2 0x010c 7270fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_ROUTER3 0x010d 7271fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_ROUTER4 0x010e 7272fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_ROUTER5 0x010f 7273fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_ROUTER6 0x0110 7274fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_ROUTER7 0x0111 7275fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_ROUTER8 0x0112 7276fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_ROUTER9 0x0113 7277fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_VML20 0x0114 7278fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_VML21 0x0115 7279fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_VML22 0x0116 7280fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_VML23 0x0117 7281fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_VML24 0x0118 7282fb4d8502Sjsg #define ixGC_CAC_OVRD_UTCL2_ROUTER 0x0119 7283fb4d8502Sjsg #define ixGC_CAC_OVRD_UTCL2_VML2 0x011a 7284fb4d8502Sjsg #define ixGC_CAC_WEIGHT_UTCL2_WALKER_0 0x011b 7285fb4d8502Sjsg #define ixGC_CAC_WEIGHT_UTCL2_WALKER_1 0x011c 7286fb4d8502Sjsg #define ixGC_CAC_WEIGHT_UTCL2_WALKER_2 0x011d 7287fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_WALKER0 0x011e 7288fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_WALKER1 0x011f 7289fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_WALKER2 0x0120 7290fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_WALKER3 0x0121 7291fb4d8502Sjsg #define ixGC_CAC_ACC_UTCL2_WALKER4 0x0122 7292fb4d8502Sjsg #define ixGC_CAC_OVRD_UTCL2_WALKER 0x0123 7293fb4d8502Sjsg 7294fb4d8502Sjsg 7295fb4d8502Sjsg // addressBlock: secacind 7296fb4d8502Sjsg // base address: 0x0 7297fb4d8502Sjsg #define ixSE_CAC_CNTL 0x0000 7298fb4d8502Sjsg #define ixSE_CAC_OVR_SEL 0x0001 7299fb4d8502Sjsg #define ixSE_CAC_OVR_VAL 0x0002 7300fb4d8502Sjsg 7301fb4d8502Sjsg 7302fb4d8502Sjsg // addressBlock: sqind 7303fb4d8502Sjsg // base address: 0x0 7304*ad8b1aafSjsg #define ixSQ_DEBUG_STS_LOCAL 0x0008 7305fb4d8502Sjsg #define ixSQ_WAVE_MODE 0x0011 7306fb4d8502Sjsg #define ixSQ_WAVE_STATUS 0x0012 7307fb4d8502Sjsg #define ixSQ_WAVE_TRAPSTS 0x0013 7308fb4d8502Sjsg #define ixSQ_WAVE_HW_ID 0x0014 7309fb4d8502Sjsg #define ixSQ_WAVE_GPR_ALLOC 0x0015 7310fb4d8502Sjsg #define ixSQ_WAVE_LDS_ALLOC 0x0016 7311fb4d8502Sjsg #define ixSQ_WAVE_IB_STS 0x0017 7312fb4d8502Sjsg #define ixSQ_WAVE_PC_LO 0x0018 7313fb4d8502Sjsg #define ixSQ_WAVE_PC_HI 0x0019 7314fb4d8502Sjsg #define ixSQ_WAVE_INST_DW0 0x001a 7315fb4d8502Sjsg #define ixSQ_WAVE_INST_DW1 0x001b 7316fb4d8502Sjsg #define ixSQ_WAVE_IB_DBG0 0x001c 7317fb4d8502Sjsg #define ixSQ_WAVE_IB_DBG1 0x001d 7318fb4d8502Sjsg #define ixSQ_WAVE_FLUSH_IB 0x001e 7319fb4d8502Sjsg #define ixSQ_WAVE_TTMP0 0x026c 7320fb4d8502Sjsg #define ixSQ_WAVE_TTMP1 0x026d 7321fb4d8502Sjsg #define ixSQ_WAVE_TTMP2 0x026e 7322fb4d8502Sjsg #define ixSQ_WAVE_TTMP3 0x026f 7323fb4d8502Sjsg #define ixSQ_WAVE_TTMP4 0x0270 7324fb4d8502Sjsg #define ixSQ_WAVE_TTMP5 0x0271 7325fb4d8502Sjsg #define ixSQ_WAVE_TTMP6 0x0272 7326fb4d8502Sjsg #define ixSQ_WAVE_TTMP7 0x0273 7327fb4d8502Sjsg #define ixSQ_WAVE_TTMP8 0x0274 7328fb4d8502Sjsg #define ixSQ_WAVE_TTMP9 0x0275 7329fb4d8502Sjsg #define ixSQ_WAVE_TTMP10 0x0276 7330fb4d8502Sjsg #define ixSQ_WAVE_TTMP11 0x0277 7331fb4d8502Sjsg #define ixSQ_WAVE_TTMP12 0x0278 7332fb4d8502Sjsg #define ixSQ_WAVE_TTMP13 0x0279 7333fb4d8502Sjsg #define ixSQ_WAVE_TTMP14 0x027a 7334fb4d8502Sjsg #define ixSQ_WAVE_TTMP15 0x027b 7335fb4d8502Sjsg #define ixSQ_WAVE_M0 0x027c 7336fb4d8502Sjsg #define ixSQ_WAVE_EXEC_LO 0x027e 7337fb4d8502Sjsg #define ixSQ_WAVE_EXEC_HI 0x027f 7338fb4d8502Sjsg #define ixSQ_INTERRUPT_WORD_AUTO_CTXID 0x20c0 7339fb4d8502Sjsg #define ixSQ_INTERRUPT_WORD_AUTO_HI 0x20c0 7340fb4d8502Sjsg #define ixSQ_INTERRUPT_WORD_AUTO_LO 0x20c0 7341fb4d8502Sjsg #define ixSQ_INTERRUPT_WORD_CMN_CTXID 0x20c0 7342fb4d8502Sjsg #define ixSQ_INTERRUPT_WORD_CMN_HI 0x20c0 7343fb4d8502Sjsg #define ixSQ_INTERRUPT_WORD_WAVE_CTXID 0x20c0 7344fb4d8502Sjsg #define ixSQ_INTERRUPT_WORD_WAVE_HI 0x20c0 7345fb4d8502Sjsg #define ixSQ_INTERRUPT_WORD_WAVE_LO 0x20c0 7346fb4d8502Sjsg 7347fb4d8502Sjsg 7348fb4d8502Sjsg // addressBlock: didtind 7349fb4d8502Sjsg // base address: 0x0 7350fb4d8502Sjsg #define ixDIDT_SQ_CTRL0 0x0000 7351fb4d8502Sjsg #define ixDIDT_SQ_CTRL1 0x0001 7352fb4d8502Sjsg #define ixDIDT_SQ_CTRL2 0x0002 7353fb4d8502Sjsg #define ixDIDT_SQ_STALL_CTRL 0x0004 7354fb4d8502Sjsg #define ixDIDT_SQ_TUNING_CTRL 0x0005 7355fb4d8502Sjsg #define ixDIDT_SQ_STALL_AUTO_RELEASE_CTRL 0x0006 7356fb4d8502Sjsg #define ixDIDT_SQ_CTRL3 0x0007 7357fb4d8502Sjsg #define ixDIDT_SQ_STALL_PATTERN_1_2 0x0008 7358fb4d8502Sjsg #define ixDIDT_SQ_STALL_PATTERN_3_4 0x0009 7359fb4d8502Sjsg #define ixDIDT_SQ_STALL_PATTERN_5_6 0x000a 7360fb4d8502Sjsg #define ixDIDT_SQ_STALL_PATTERN_7 0x000b 7361fb4d8502Sjsg #define ixDIDT_SQ_WEIGHT0_3 0x0010 7362fb4d8502Sjsg #define ixDIDT_SQ_WEIGHT4_7 0x0011 7363fb4d8502Sjsg #define ixDIDT_SQ_WEIGHT8_11 0x0012 7364fb4d8502Sjsg #define ixDIDT_SQ_EDC_CTRL 0x0013 7365fb4d8502Sjsg #define ixDIDT_SQ_EDC_THRESHOLD 0x0014 7366fb4d8502Sjsg #define ixDIDT_SQ_EDC_STALL_PATTERN_1_2 0x0015 7367fb4d8502Sjsg #define ixDIDT_SQ_EDC_STALL_PATTERN_3_4 0x0016 7368fb4d8502Sjsg #define ixDIDT_SQ_EDC_STALL_PATTERN_5_6 0x0017 7369fb4d8502Sjsg #define ixDIDT_SQ_EDC_STALL_PATTERN_7 0x0018 7370fb4d8502Sjsg #define ixDIDT_SQ_EDC_STATUS 0x0019 7371fb4d8502Sjsg #define ixDIDT_SQ_EDC_STALL_DELAY_1 0x001a 7372fb4d8502Sjsg #define ixDIDT_SQ_EDC_STALL_DELAY_2 0x001b 7373fb4d8502Sjsg #define ixDIDT_SQ_EDC_STALL_DELAY_3 0x001c 7374fb4d8502Sjsg #define ixDIDT_SQ_EDC_OVERFLOW 0x001e 7375fb4d8502Sjsg #define ixDIDT_SQ_EDC_ROLLING_POWER_DELTA 0x001f 7376fb4d8502Sjsg #define ixDIDT_DB_CTRL0 0x0020 7377fb4d8502Sjsg #define ixDIDT_DB_CTRL1 0x0021 7378fb4d8502Sjsg #define ixDIDT_DB_CTRL2 0x0022 7379fb4d8502Sjsg #define ixDIDT_DB_STALL_CTRL 0x0024 7380fb4d8502Sjsg #define ixDIDT_DB_TUNING_CTRL 0x0025 7381fb4d8502Sjsg #define ixDIDT_DB_STALL_AUTO_RELEASE_CTRL 0x0026 7382fb4d8502Sjsg #define ixDIDT_DB_CTRL3 0x0027 7383fb4d8502Sjsg #define ixDIDT_DB_STALL_PATTERN_1_2 0x0028 7384fb4d8502Sjsg #define ixDIDT_DB_STALL_PATTERN_3_4 0x0029 7385fb4d8502Sjsg #define ixDIDT_DB_STALL_PATTERN_5_6 0x002a 7386fb4d8502Sjsg #define ixDIDT_DB_STALL_PATTERN_7 0x002b 7387fb4d8502Sjsg #define ixDIDT_DB_WEIGHT0_3 0x0030 7388fb4d8502Sjsg #define ixDIDT_DB_WEIGHT4_7 0x0031 7389fb4d8502Sjsg #define ixDIDT_DB_WEIGHT8_11 0x0032 7390fb4d8502Sjsg #define ixDIDT_DB_EDC_CTRL 0x0033 7391fb4d8502Sjsg #define ixDIDT_DB_EDC_THRESHOLD 0x0034 7392fb4d8502Sjsg #define ixDIDT_DB_EDC_STALL_PATTERN_1_2 0x0035 7393fb4d8502Sjsg #define ixDIDT_DB_EDC_STALL_PATTERN_3_4 0x0036 7394fb4d8502Sjsg #define ixDIDT_DB_EDC_STALL_PATTERN_5_6 0x0037 7395fb4d8502Sjsg #define ixDIDT_DB_EDC_STALL_PATTERN_7 0x0038 7396fb4d8502Sjsg #define ixDIDT_DB_EDC_STATUS 0x0039 7397fb4d8502Sjsg #define ixDIDT_DB_EDC_STALL_DELAY_1 0x003a 7398fb4d8502Sjsg #define ixDIDT_DB_EDC_OVERFLOW 0x003e 7399fb4d8502Sjsg #define ixDIDT_DB_EDC_ROLLING_POWER_DELTA 0x003f 7400fb4d8502Sjsg #define ixDIDT_TD_CTRL0 0x0040 7401fb4d8502Sjsg #define ixDIDT_TD_CTRL1 0x0041 7402fb4d8502Sjsg #define ixDIDT_TD_CTRL2 0x0042 7403fb4d8502Sjsg #define ixDIDT_TD_STALL_CTRL 0x0044 7404fb4d8502Sjsg #define ixDIDT_TD_TUNING_CTRL 0x0045 7405fb4d8502Sjsg #define ixDIDT_TD_STALL_AUTO_RELEASE_CTRL 0x0046 7406fb4d8502Sjsg #define ixDIDT_TD_CTRL3 0x0047 7407fb4d8502Sjsg #define ixDIDT_TD_STALL_PATTERN_1_2 0x0048 7408fb4d8502Sjsg #define ixDIDT_TD_STALL_PATTERN_3_4 0x0049 7409fb4d8502Sjsg #define ixDIDT_TD_STALL_PATTERN_5_6 0x004a 7410fb4d8502Sjsg #define ixDIDT_TD_STALL_PATTERN_7 0x004b 7411fb4d8502Sjsg #define ixDIDT_TD_WEIGHT0_3 0x0050 7412fb4d8502Sjsg #define ixDIDT_TD_WEIGHT4_7 0x0051 7413fb4d8502Sjsg #define ixDIDT_TD_WEIGHT8_11 0x0052 7414fb4d8502Sjsg #define ixDIDT_TD_EDC_CTRL 0x0053 7415fb4d8502Sjsg #define ixDIDT_TD_EDC_THRESHOLD 0x0054 7416fb4d8502Sjsg #define ixDIDT_TD_EDC_STALL_PATTERN_1_2 0x0055 7417fb4d8502Sjsg #define ixDIDT_TD_EDC_STALL_PATTERN_3_4 0x0056 7418fb4d8502Sjsg #define ixDIDT_TD_EDC_STALL_PATTERN_5_6 0x0057 7419fb4d8502Sjsg #define ixDIDT_TD_EDC_STALL_PATTERN_7 0x0058 7420fb4d8502Sjsg #define ixDIDT_TD_EDC_STATUS 0x0059 7421fb4d8502Sjsg #define ixDIDT_TD_EDC_STALL_DELAY_1 0x005a 7422fb4d8502Sjsg #define ixDIDT_TD_EDC_STALL_DELAY_2 0x005b 7423fb4d8502Sjsg #define ixDIDT_TD_EDC_STALL_DELAY_3 0x005c 7424fb4d8502Sjsg #define ixDIDT_TD_EDC_OVERFLOW 0x005e 7425fb4d8502Sjsg #define ixDIDT_TD_EDC_ROLLING_POWER_DELTA 0x005f 7426fb4d8502Sjsg #define ixDIDT_TCP_CTRL0 0x0060 7427fb4d8502Sjsg #define ixDIDT_TCP_CTRL1 0x0061 7428fb4d8502Sjsg #define ixDIDT_TCP_CTRL2 0x0062 7429fb4d8502Sjsg #define ixDIDT_TCP_STALL_CTRL 0x0064 7430fb4d8502Sjsg #define ixDIDT_TCP_TUNING_CTRL 0x0065 7431fb4d8502Sjsg #define ixDIDT_TCP_STALL_AUTO_RELEASE_CTRL 0x0066 7432fb4d8502Sjsg #define ixDIDT_TCP_CTRL3 0x0067 7433fb4d8502Sjsg #define ixDIDT_TCP_STALL_PATTERN_1_2 0x0068 7434fb4d8502Sjsg #define ixDIDT_TCP_STALL_PATTERN_3_4 0x0069 7435fb4d8502Sjsg #define ixDIDT_TCP_STALL_PATTERN_5_6 0x006a 7436fb4d8502Sjsg #define ixDIDT_TCP_STALL_PATTERN_7 0x006b 7437fb4d8502Sjsg #define ixDIDT_TCP_WEIGHT0_3 0x0070 7438fb4d8502Sjsg #define ixDIDT_TCP_WEIGHT4_7 0x0071 7439fb4d8502Sjsg #define ixDIDT_TCP_WEIGHT8_11 0x0072 7440fb4d8502Sjsg #define ixDIDT_TCP_EDC_CTRL 0x0073 7441fb4d8502Sjsg #define ixDIDT_TCP_EDC_THRESHOLD 0x0074 7442fb4d8502Sjsg #define ixDIDT_TCP_EDC_STALL_PATTERN_1_2 0x0075 7443fb4d8502Sjsg #define ixDIDT_TCP_EDC_STALL_PATTERN_3_4 0x0076 7444fb4d8502Sjsg #define ixDIDT_TCP_EDC_STALL_PATTERN_5_6 0x0077 7445fb4d8502Sjsg #define ixDIDT_TCP_EDC_STALL_PATTERN_7 0x0078 7446fb4d8502Sjsg #define ixDIDT_TCP_EDC_STATUS 0x0079 7447fb4d8502Sjsg #define ixDIDT_TCP_EDC_STALL_DELAY_1 0x007a 7448fb4d8502Sjsg #define ixDIDT_TCP_EDC_STALL_DELAY_2 0x007b 7449fb4d8502Sjsg #define ixDIDT_TCP_EDC_STALL_DELAY_3 0x007c 7450fb4d8502Sjsg #define ixDIDT_TCP_EDC_OVERFLOW 0x007e 7451fb4d8502Sjsg #define ixDIDT_TCP_EDC_ROLLING_POWER_DELTA 0x007f 7452fb4d8502Sjsg #define ixDIDT_DBR_CTRL0 0x0080 7453fb4d8502Sjsg #define ixDIDT_DBR_CTRL1 0x0081 7454fb4d8502Sjsg #define ixDIDT_DBR_CTRL2 0x0082 7455fb4d8502Sjsg #define ixDIDT_DBR_STALL_CTRL 0x0084 7456fb4d8502Sjsg #define ixDIDT_DBR_TUNING_CTRL 0x0085 7457fb4d8502Sjsg #define ixDIDT_DBR_STALL_AUTO_RELEASE_CTRL 0x0086 7458fb4d8502Sjsg #define ixDIDT_DBR_CTRL3 0x0087 7459fb4d8502Sjsg #define ixDIDT_DBR_STALL_PATTERN_1_2 0x0088 7460fb4d8502Sjsg #define ixDIDT_DBR_STALL_PATTERN_3_4 0x0089 7461fb4d8502Sjsg #define ixDIDT_DBR_STALL_PATTERN_5_6 0x008a 7462fb4d8502Sjsg #define ixDIDT_DBR_STALL_PATTERN_7 0x008b 7463fb4d8502Sjsg #define ixDIDT_DBR_WEIGHT0_3 0x0090 7464fb4d8502Sjsg #define ixDIDT_DBR_WEIGHT4_7 0x0091 7465fb4d8502Sjsg #define ixDIDT_DBR_WEIGHT8_11 0x0092 7466fb4d8502Sjsg #define ixDIDT_DBR_EDC_CTRL 0x0093 7467fb4d8502Sjsg #define ixDIDT_DBR_EDC_THRESHOLD 0x0094 7468fb4d8502Sjsg #define ixDIDT_DBR_EDC_STALL_PATTERN_1_2 0x0095 7469fb4d8502Sjsg #define ixDIDT_DBR_EDC_STALL_PATTERN_3_4 0x0096 7470fb4d8502Sjsg #define ixDIDT_DBR_EDC_STALL_PATTERN_5_6 0x0097 7471fb4d8502Sjsg #define ixDIDT_DBR_EDC_STALL_PATTERN_7 0x0098 7472fb4d8502Sjsg #define ixDIDT_DBR_EDC_STATUS 0x0099 7473fb4d8502Sjsg #define ixDIDT_DBR_EDC_STALL_DELAY_1 0x009a 7474fb4d8502Sjsg #define ixDIDT_DBR_EDC_OVERFLOW 0x009e 7475fb4d8502Sjsg #define ixDIDT_DBR_EDC_ROLLING_POWER_DELTA 0x009f 7476fb4d8502Sjsg #define ixDIDT_SQ_STALL_EVENT_COUNTER 0x00a0 7477fb4d8502Sjsg #define ixDIDT_DB_STALL_EVENT_COUNTER 0x00a1 7478fb4d8502Sjsg #define ixDIDT_TD_STALL_EVENT_COUNTER 0x00a2 7479fb4d8502Sjsg #define ixDIDT_TCP_STALL_EVENT_COUNTER 0x00a3 7480fb4d8502Sjsg #define ixDIDT_DBR_STALL_EVENT_COUNTER 0x00a4 7481fb4d8502Sjsg 7482fb4d8502Sjsg 7483fb4d8502Sjsg #endif 7484