1*fb4d8502Sjsg /*
2*fb4d8502Sjsg  * GFX_7_0 Register documentation
3*fb4d8502Sjsg  *
4*fb4d8502Sjsg  * Copyright (C) 2014  Advanced Micro Devices, Inc.
5*fb4d8502Sjsg  *
6*fb4d8502Sjsg  * Permission is hereby granted, free of charge, to any person obtaining a
7*fb4d8502Sjsg  * copy of this software and associated documentation files (the "Software"),
8*fb4d8502Sjsg  * to deal in the Software without restriction, including without limitation
9*fb4d8502Sjsg  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10*fb4d8502Sjsg  * and/or sell copies of the Software, and to permit persons to whom the
11*fb4d8502Sjsg  * Software is furnished to do so, subject to the following conditions:
12*fb4d8502Sjsg  *
13*fb4d8502Sjsg  * The above copyright notice and this permission notice shall be included
14*fb4d8502Sjsg  * in all copies or substantial portions of the Software.
15*fb4d8502Sjsg  *
16*fb4d8502Sjsg  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17*fb4d8502Sjsg  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18*fb4d8502Sjsg  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19*fb4d8502Sjsg  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
20*fb4d8502Sjsg  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21*fb4d8502Sjsg  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22*fb4d8502Sjsg  */
23*fb4d8502Sjsg 
24*fb4d8502Sjsg #ifndef GFX_7_0_D_H
25*fb4d8502Sjsg #define GFX_7_0_D_H
26*fb4d8502Sjsg 
27*fb4d8502Sjsg #define mmCB_BLEND_RED                                                          0xa105
28*fb4d8502Sjsg #define mmCB_BLEND_GREEN                                                        0xa106
29*fb4d8502Sjsg #define mmCB_BLEND_BLUE                                                         0xa107
30*fb4d8502Sjsg #define mmCB_BLEND_ALPHA                                                        0xa108
31*fb4d8502Sjsg #define mmCB_COLOR_CONTROL                                                      0xa202
32*fb4d8502Sjsg #define mmCB_BLEND0_CONTROL                                                     0xa1e0
33*fb4d8502Sjsg #define mmCB_BLEND1_CONTROL                                                     0xa1e1
34*fb4d8502Sjsg #define mmCB_BLEND2_CONTROL                                                     0xa1e2
35*fb4d8502Sjsg #define mmCB_BLEND3_CONTROL                                                     0xa1e3
36*fb4d8502Sjsg #define mmCB_BLEND4_CONTROL                                                     0xa1e4
37*fb4d8502Sjsg #define mmCB_BLEND5_CONTROL                                                     0xa1e5
38*fb4d8502Sjsg #define mmCB_BLEND6_CONTROL                                                     0xa1e6
39*fb4d8502Sjsg #define mmCB_BLEND7_CONTROL                                                     0xa1e7
40*fb4d8502Sjsg #define mmCB_COLOR0_BASE                                                        0xa318
41*fb4d8502Sjsg #define mmCB_COLOR1_BASE                                                        0xa327
42*fb4d8502Sjsg #define mmCB_COLOR2_BASE                                                        0xa336
43*fb4d8502Sjsg #define mmCB_COLOR3_BASE                                                        0xa345
44*fb4d8502Sjsg #define mmCB_COLOR4_BASE                                                        0xa354
45*fb4d8502Sjsg #define mmCB_COLOR5_BASE                                                        0xa363
46*fb4d8502Sjsg #define mmCB_COLOR6_BASE                                                        0xa372
47*fb4d8502Sjsg #define mmCB_COLOR7_BASE                                                        0xa381
48*fb4d8502Sjsg #define mmCB_COLOR0_PITCH                                                       0xa319
49*fb4d8502Sjsg #define mmCB_COLOR1_PITCH                                                       0xa328
50*fb4d8502Sjsg #define mmCB_COLOR2_PITCH                                                       0xa337
51*fb4d8502Sjsg #define mmCB_COLOR3_PITCH                                                       0xa346
52*fb4d8502Sjsg #define mmCB_COLOR4_PITCH                                                       0xa355
53*fb4d8502Sjsg #define mmCB_COLOR5_PITCH                                                       0xa364
54*fb4d8502Sjsg #define mmCB_COLOR6_PITCH                                                       0xa373
55*fb4d8502Sjsg #define mmCB_COLOR7_PITCH                                                       0xa382
56*fb4d8502Sjsg #define mmCB_COLOR0_SLICE                                                       0xa31a
57*fb4d8502Sjsg #define mmCB_COLOR1_SLICE                                                       0xa329
58*fb4d8502Sjsg #define mmCB_COLOR2_SLICE                                                       0xa338
59*fb4d8502Sjsg #define mmCB_COLOR3_SLICE                                                       0xa347
60*fb4d8502Sjsg #define mmCB_COLOR4_SLICE                                                       0xa356
61*fb4d8502Sjsg #define mmCB_COLOR5_SLICE                                                       0xa365
62*fb4d8502Sjsg #define mmCB_COLOR6_SLICE                                                       0xa374
63*fb4d8502Sjsg #define mmCB_COLOR7_SLICE                                                       0xa383
64*fb4d8502Sjsg #define mmCB_COLOR0_VIEW                                                        0xa31b
65*fb4d8502Sjsg #define mmCB_COLOR1_VIEW                                                        0xa32a
66*fb4d8502Sjsg #define mmCB_COLOR2_VIEW                                                        0xa339
67*fb4d8502Sjsg #define mmCB_COLOR3_VIEW                                                        0xa348
68*fb4d8502Sjsg #define mmCB_COLOR4_VIEW                                                        0xa357
69*fb4d8502Sjsg #define mmCB_COLOR5_VIEW                                                        0xa366
70*fb4d8502Sjsg #define mmCB_COLOR6_VIEW                                                        0xa375
71*fb4d8502Sjsg #define mmCB_COLOR7_VIEW                                                        0xa384
72*fb4d8502Sjsg #define mmCB_COLOR0_INFO                                                        0xa31c
73*fb4d8502Sjsg #define mmCB_COLOR1_INFO                                                        0xa32b
74*fb4d8502Sjsg #define mmCB_COLOR2_INFO                                                        0xa33a
75*fb4d8502Sjsg #define mmCB_COLOR3_INFO                                                        0xa349
76*fb4d8502Sjsg #define mmCB_COLOR4_INFO                                                        0xa358
77*fb4d8502Sjsg #define mmCB_COLOR5_INFO                                                        0xa367
78*fb4d8502Sjsg #define mmCB_COLOR6_INFO                                                        0xa376
79*fb4d8502Sjsg #define mmCB_COLOR7_INFO                                                        0xa385
80*fb4d8502Sjsg #define mmCB_COLOR0_ATTRIB                                                      0xa31d
81*fb4d8502Sjsg #define mmCB_COLOR1_ATTRIB                                                      0xa32c
82*fb4d8502Sjsg #define mmCB_COLOR2_ATTRIB                                                      0xa33b
83*fb4d8502Sjsg #define mmCB_COLOR3_ATTRIB                                                      0xa34a
84*fb4d8502Sjsg #define mmCB_COLOR4_ATTRIB                                                      0xa359
85*fb4d8502Sjsg #define mmCB_COLOR5_ATTRIB                                                      0xa368
86*fb4d8502Sjsg #define mmCB_COLOR6_ATTRIB                                                      0xa377
87*fb4d8502Sjsg #define mmCB_COLOR7_ATTRIB                                                      0xa386
88*fb4d8502Sjsg #define mmCB_COLOR0_CMASK                                                       0xa31f
89*fb4d8502Sjsg #define mmCB_COLOR1_CMASK                                                       0xa32e
90*fb4d8502Sjsg #define mmCB_COLOR2_CMASK                                                       0xa33d
91*fb4d8502Sjsg #define mmCB_COLOR3_CMASK                                                       0xa34c
92*fb4d8502Sjsg #define mmCB_COLOR4_CMASK                                                       0xa35b
93*fb4d8502Sjsg #define mmCB_COLOR5_CMASK                                                       0xa36a
94*fb4d8502Sjsg #define mmCB_COLOR6_CMASK                                                       0xa379
95*fb4d8502Sjsg #define mmCB_COLOR7_CMASK                                                       0xa388
96*fb4d8502Sjsg #define mmCB_COLOR0_CMASK_SLICE                                                 0xa320
97*fb4d8502Sjsg #define mmCB_COLOR1_CMASK_SLICE                                                 0xa32f
98*fb4d8502Sjsg #define mmCB_COLOR2_CMASK_SLICE                                                 0xa33e
99*fb4d8502Sjsg #define mmCB_COLOR3_CMASK_SLICE                                                 0xa34d
100*fb4d8502Sjsg #define mmCB_COLOR4_CMASK_SLICE                                                 0xa35c
101*fb4d8502Sjsg #define mmCB_COLOR5_CMASK_SLICE                                                 0xa36b
102*fb4d8502Sjsg #define mmCB_COLOR6_CMASK_SLICE                                                 0xa37a
103*fb4d8502Sjsg #define mmCB_COLOR7_CMASK_SLICE                                                 0xa389
104*fb4d8502Sjsg #define mmCB_COLOR0_FMASK                                                       0xa321
105*fb4d8502Sjsg #define mmCB_COLOR1_FMASK                                                       0xa330
106*fb4d8502Sjsg #define mmCB_COLOR2_FMASK                                                       0xa33f
107*fb4d8502Sjsg #define mmCB_COLOR3_FMASK                                                       0xa34e
108*fb4d8502Sjsg #define mmCB_COLOR4_FMASK                                                       0xa35d
109*fb4d8502Sjsg #define mmCB_COLOR5_FMASK                                                       0xa36c
110*fb4d8502Sjsg #define mmCB_COLOR6_FMASK                                                       0xa37b
111*fb4d8502Sjsg #define mmCB_COLOR7_FMASK                                                       0xa38a
112*fb4d8502Sjsg #define mmCB_COLOR0_FMASK_SLICE                                                 0xa322
113*fb4d8502Sjsg #define mmCB_COLOR1_FMASK_SLICE                                                 0xa331
114*fb4d8502Sjsg #define mmCB_COLOR2_FMASK_SLICE                                                 0xa340
115*fb4d8502Sjsg #define mmCB_COLOR3_FMASK_SLICE                                                 0xa34f
116*fb4d8502Sjsg #define mmCB_COLOR4_FMASK_SLICE                                                 0xa35e
117*fb4d8502Sjsg #define mmCB_COLOR5_FMASK_SLICE                                                 0xa36d
118*fb4d8502Sjsg #define mmCB_COLOR6_FMASK_SLICE                                                 0xa37c
119*fb4d8502Sjsg #define mmCB_COLOR7_FMASK_SLICE                                                 0xa38b
120*fb4d8502Sjsg #define mmCB_COLOR0_CLEAR_WORD0                                                 0xa323
121*fb4d8502Sjsg #define mmCB_COLOR1_CLEAR_WORD0                                                 0xa332
122*fb4d8502Sjsg #define mmCB_COLOR2_CLEAR_WORD0                                                 0xa341
123*fb4d8502Sjsg #define mmCB_COLOR3_CLEAR_WORD0                                                 0xa350
124*fb4d8502Sjsg #define mmCB_COLOR4_CLEAR_WORD0                                                 0xa35f
125*fb4d8502Sjsg #define mmCB_COLOR5_CLEAR_WORD0                                                 0xa36e
126*fb4d8502Sjsg #define mmCB_COLOR6_CLEAR_WORD0                                                 0xa37d
127*fb4d8502Sjsg #define mmCB_COLOR7_CLEAR_WORD0                                                 0xa38c
128*fb4d8502Sjsg #define mmCB_COLOR0_CLEAR_WORD1                                                 0xa324
129*fb4d8502Sjsg #define mmCB_COLOR1_CLEAR_WORD1                                                 0xa333
130*fb4d8502Sjsg #define mmCB_COLOR2_CLEAR_WORD1                                                 0xa342
131*fb4d8502Sjsg #define mmCB_COLOR3_CLEAR_WORD1                                                 0xa351
132*fb4d8502Sjsg #define mmCB_COLOR4_CLEAR_WORD1                                                 0xa360
133*fb4d8502Sjsg #define mmCB_COLOR5_CLEAR_WORD1                                                 0xa36f
134*fb4d8502Sjsg #define mmCB_COLOR6_CLEAR_WORD1                                                 0xa37e
135*fb4d8502Sjsg #define mmCB_COLOR7_CLEAR_WORD1                                                 0xa38d
136*fb4d8502Sjsg #define mmCB_TARGET_MASK                                                        0xa08e
137*fb4d8502Sjsg #define mmCB_SHADER_MASK                                                        0xa08f
138*fb4d8502Sjsg #define mmCB_HW_CONTROL                                                         0x2684
139*fb4d8502Sjsg #define mmCB_HW_CONTROL_1                                                       0x2685
140*fb4d8502Sjsg #define mmCB_HW_CONTROL_2                                                       0x2686
141*fb4d8502Sjsg #define mmCB_HW_CONTROL_3                                                       0x2683
142*fb4d8502Sjsg #define mmCB_PERFCOUNTER_FILTER                                                 0xdc00
143*fb4d8502Sjsg #define mmCB_PERFCOUNTER0_SELECT                                                0xdc01
144*fb4d8502Sjsg #define mmCB_PERFCOUNTER0_SELECT1                                               0xdc02
145*fb4d8502Sjsg #define mmCB_PERFCOUNTER1_SELECT                                                0xdc03
146*fb4d8502Sjsg #define mmCB_PERFCOUNTER2_SELECT                                                0xdc04
147*fb4d8502Sjsg #define mmCB_PERFCOUNTER3_SELECT                                                0xdc05
148*fb4d8502Sjsg #define mmCB_PERFCOUNTER0_LO                                                    0xd406
149*fb4d8502Sjsg #define mmCB_PERFCOUNTER1_LO                                                    0xd408
150*fb4d8502Sjsg #define mmCB_PERFCOUNTER2_LO                                                    0xd40a
151*fb4d8502Sjsg #define mmCB_PERFCOUNTER3_LO                                                    0xd40c
152*fb4d8502Sjsg #define mmCB_PERFCOUNTER0_HI                                                    0xd407
153*fb4d8502Sjsg #define mmCB_PERFCOUNTER1_HI                                                    0xd409
154*fb4d8502Sjsg #define mmCB_PERFCOUNTER2_HI                                                    0xd40b
155*fb4d8502Sjsg #define mmCB_PERFCOUNTER3_HI                                                    0xd40d
156*fb4d8502Sjsg #define mmCB_CGTT_SCLK_CTRL                                                     0xf0a8
157*fb4d8502Sjsg #define mmCB_DEBUG_BUS_1                                                        0x2699
158*fb4d8502Sjsg #define mmCB_DEBUG_BUS_2                                                        0x269a
159*fb4d8502Sjsg #define mmCB_DEBUG_BUS_3                                                        0x269b
160*fb4d8502Sjsg #define mmCB_DEBUG_BUS_4                                                        0x269c
161*fb4d8502Sjsg #define mmCB_DEBUG_BUS_5                                                        0x269d
162*fb4d8502Sjsg #define mmCB_DEBUG_BUS_6                                                        0x269e
163*fb4d8502Sjsg #define mmCB_DEBUG_BUS_7                                                        0x269f
164*fb4d8502Sjsg #define mmCB_DEBUG_BUS_8                                                        0x26a0
165*fb4d8502Sjsg #define mmCB_DEBUG_BUS_9                                                        0x26a1
166*fb4d8502Sjsg #define mmCB_DEBUG_BUS_10                                                       0x26a2
167*fb4d8502Sjsg #define mmCB_DEBUG_BUS_11                                                       0x26a3
168*fb4d8502Sjsg #define mmCB_DEBUG_BUS_12                                                       0x26a4
169*fb4d8502Sjsg #define mmCB_DEBUG_BUS_13                                                       0x26a5
170*fb4d8502Sjsg #define mmCB_DEBUG_BUS_14                                                       0x26a6
171*fb4d8502Sjsg #define mmCB_DEBUG_BUS_15                                                       0x26a7
172*fb4d8502Sjsg #define mmCB_DEBUG_BUS_16                                                       0x26a8
173*fb4d8502Sjsg #define mmCB_DEBUG_BUS_17                                                       0x26a9
174*fb4d8502Sjsg #define mmCB_DEBUG_BUS_18                                                       0x26aa
175*fb4d8502Sjsg #define mmCP_DFY_CNTL                                                           0x3020
176*fb4d8502Sjsg #define mmCP_DFY_STAT                                                           0x3021
177*fb4d8502Sjsg #define mmCP_DFY_ADDR_HI                                                        0x3022
178*fb4d8502Sjsg #define mmCP_DFY_ADDR_LO                                                        0x3023
179*fb4d8502Sjsg #define mmCP_DFY_DATA_0                                                         0x3024
180*fb4d8502Sjsg #define mmCP_DFY_DATA_1                                                         0x3025
181*fb4d8502Sjsg #define mmCP_DFY_DATA_2                                                         0x3026
182*fb4d8502Sjsg #define mmCP_DFY_DATA_3                                                         0x3027
183*fb4d8502Sjsg #define mmCP_DFY_DATA_4                                                         0x3028
184*fb4d8502Sjsg #define mmCP_DFY_DATA_5                                                         0x3029
185*fb4d8502Sjsg #define mmCP_DFY_DATA_6                                                         0x302a
186*fb4d8502Sjsg #define mmCP_DFY_DATA_7                                                         0x302b
187*fb4d8502Sjsg #define mmCP_DFY_DATA_8                                                         0x302c
188*fb4d8502Sjsg #define mmCP_DFY_DATA_9                                                         0x302d
189*fb4d8502Sjsg #define mmCP_DFY_DATA_10                                                        0x302e
190*fb4d8502Sjsg #define mmCP_DFY_DATA_11                                                        0x302f
191*fb4d8502Sjsg #define mmCP_DFY_DATA_12                                                        0x3030
192*fb4d8502Sjsg #define mmCP_DFY_DATA_13                                                        0x3031
193*fb4d8502Sjsg #define mmCP_DFY_DATA_14                                                        0x3032
194*fb4d8502Sjsg #define mmCP_DFY_DATA_15                                                        0x3033
195*fb4d8502Sjsg #define mmCP_RB0_BASE                                                           0x3040
196*fb4d8502Sjsg #define mmCP_RB0_BASE_HI                                                        0x30b1
197*fb4d8502Sjsg #define mmCP_RB_BASE                                                            0x3040
198*fb4d8502Sjsg #define mmCP_RB1_BASE                                                           0x3060
199*fb4d8502Sjsg #define mmCP_RB1_BASE_HI                                                        0x30b2
200*fb4d8502Sjsg #define mmCP_RB2_BASE                                                           0x3065
201*fb4d8502Sjsg #define mmCP_RB0_CNTL                                                           0x3041
202*fb4d8502Sjsg #define mmCP_RB_CNTL                                                            0x3041
203*fb4d8502Sjsg #define mmCP_RB1_CNTL                                                           0x3061
204*fb4d8502Sjsg #define mmCP_RB2_CNTL                                                           0x3066
205*fb4d8502Sjsg #define mmCP_RB_RPTR_WR                                                         0x3042
206*fb4d8502Sjsg #define mmCP_RB0_RPTR_ADDR                                                      0x3043
207*fb4d8502Sjsg #define mmCP_RB_RPTR_ADDR                                                       0x3043
208*fb4d8502Sjsg #define mmCP_RB1_RPTR_ADDR                                                      0x3062
209*fb4d8502Sjsg #define mmCP_RB2_RPTR_ADDR                                                      0x3067
210*fb4d8502Sjsg #define mmCP_RB0_RPTR_ADDR_HI                                                   0x3044
211*fb4d8502Sjsg #define mmCP_RB_RPTR_ADDR_HI                                                    0x3044
212*fb4d8502Sjsg #define mmCP_RB1_RPTR_ADDR_HI                                                   0x3063
213*fb4d8502Sjsg #define mmCP_RB2_RPTR_ADDR_HI                                                   0x3068
214*fb4d8502Sjsg #define mmCP_RB0_WPTR                                                           0x3045
215*fb4d8502Sjsg #define mmCP_RB_WPTR                                                            0x3045
216*fb4d8502Sjsg #define mmCP_RB1_WPTR                                                           0x3064
217*fb4d8502Sjsg #define mmCP_RB2_WPTR                                                           0x3069
218*fb4d8502Sjsg #define mmCP_RB_WPTR_POLL_ADDR_LO                                               0x3046
219*fb4d8502Sjsg #define mmCP_RB_WPTR_POLL_ADDR_HI                                               0x3047
220*fb4d8502Sjsg #define mmGC_PRIV_MODE                                                          0x3048
221*fb4d8502Sjsg #define mmCP_INT_CNTL                                                           0x3049
222*fb4d8502Sjsg #define mmCP_INT_CNTL_RING0                                                     0x306a
223*fb4d8502Sjsg #define mmCP_INT_CNTL_RING1                                                     0x306b
224*fb4d8502Sjsg #define mmCP_INT_CNTL_RING2                                                     0x306c
225*fb4d8502Sjsg #define mmCP_INT_STATUS                                                         0x304a
226*fb4d8502Sjsg #define mmCP_INT_STATUS_RING0                                                   0x306d
227*fb4d8502Sjsg #define mmCP_INT_STATUS_RING1                                                   0x306e
228*fb4d8502Sjsg #define mmCP_INT_STATUS_RING2                                                   0x306f
229*fb4d8502Sjsg #define mmCP_DEVICE_ID                                                          0x304b
230*fb4d8502Sjsg #define mmCP_RING_PRIORITY_CNTS                                                 0x304c
231*fb4d8502Sjsg #define mmCP_ME0_PIPE_PRIORITY_CNTS                                             0x304c
232*fb4d8502Sjsg #define mmCP_RING0_PRIORITY                                                     0x304d
233*fb4d8502Sjsg #define mmCP_ME0_PIPE0_PRIORITY                                                 0x304d
234*fb4d8502Sjsg #define mmCP_RING1_PRIORITY                                                     0x304e
235*fb4d8502Sjsg #define mmCP_ME0_PIPE1_PRIORITY                                                 0x304e
236*fb4d8502Sjsg #define mmCP_RING2_PRIORITY                                                     0x304f
237*fb4d8502Sjsg #define mmCP_ME0_PIPE2_PRIORITY                                                 0x304f
238*fb4d8502Sjsg #define mmCP_ENDIAN_SWAP                                                        0x3050
239*fb4d8502Sjsg #define mmCP_RB_VMID                                                            0x3051
240*fb4d8502Sjsg #define mmCP_PFP_UCODE_ADDR                                                     0x3054
241*fb4d8502Sjsg #define mmCP_PFP_UCODE_DATA                                                     0x3055
242*fb4d8502Sjsg #define mmCP_ME_RAM_RADDR                                                       0x3056
243*fb4d8502Sjsg #define mmCP_ME_RAM_WADDR                                                       0x3057
244*fb4d8502Sjsg #define mmCP_ME_RAM_DATA                                                        0x3058
245*fb4d8502Sjsg #define mmCGTT_CPC_CLK_CTRL                                                     0xf0b2
246*fb4d8502Sjsg #define mmCGTT_CPF_CLK_CTRL                                                     0xf0b1
247*fb4d8502Sjsg #define mmCGTT_CP_CLK_CTRL                                                      0xf0b0
248*fb4d8502Sjsg #define mmCP_CE_UCODE_ADDR                                                      0x305a
249*fb4d8502Sjsg #define mmCP_CE_UCODE_DATA                                                      0x305b
250*fb4d8502Sjsg #define mmCP_MEC_ME1_UCODE_ADDR                                                 0x305c
251*fb4d8502Sjsg #define mmCP_MEC_ME1_UCODE_DATA                                                 0x305d
252*fb4d8502Sjsg #define mmCP_MEC_ME2_UCODE_ADDR                                                 0x305e
253*fb4d8502Sjsg #define mmCP_MEC_ME2_UCODE_DATA                                                 0x305f
254*fb4d8502Sjsg #define mmCP_PWR_CNTL                                                           0x3078
255*fb4d8502Sjsg #define mmCP_MEM_SLP_CNTL                                                       0x3079
256*fb4d8502Sjsg #define mmCP_ECC_FIRSTOCCURRENCE                                                0x307a
257*fb4d8502Sjsg #define mmCP_ECC_FIRSTOCCURRENCE_RING0                                          0x307b
258*fb4d8502Sjsg #define mmCP_ECC_FIRSTOCCURRENCE_RING1                                          0x307c
259*fb4d8502Sjsg #define mmCP_ECC_FIRSTOCCURRENCE_RING2                                          0x307d
260*fb4d8502Sjsg #define mmCP_CPF_DEBUG                                                          0x3080
261*fb4d8502Sjsg #define mmCP_FETCHER_SOURCE                                                     0x3082
262*fb4d8502Sjsg #define mmCP_PQ_WPTR_POLL_CNTL                                                  0x3083
263*fb4d8502Sjsg #define mmCP_PQ_WPTR_POLL_CNTL1                                                 0x3084
264*fb4d8502Sjsg #define mmCPC_INT_CNTL                                                          0x30b4
265*fb4d8502Sjsg #define mmCP_ME1_PIPE0_INT_CNTL                                                 0x3085
266*fb4d8502Sjsg #define mmCP_ME1_PIPE1_INT_CNTL                                                 0x3086
267*fb4d8502Sjsg #define mmCP_ME1_PIPE2_INT_CNTL                                                 0x3087
268*fb4d8502Sjsg #define mmCP_ME1_PIPE3_INT_CNTL                                                 0x3088
269*fb4d8502Sjsg #define mmCP_ME2_PIPE0_INT_CNTL                                                 0x3089
270*fb4d8502Sjsg #define mmCP_ME2_PIPE1_INT_CNTL                                                 0x308a
271*fb4d8502Sjsg #define mmCP_ME2_PIPE2_INT_CNTL                                                 0x308b
272*fb4d8502Sjsg #define mmCP_ME2_PIPE3_INT_CNTL                                                 0x308c
273*fb4d8502Sjsg #define mmCPC_INT_STATUS                                                        0x30b5
274*fb4d8502Sjsg #define mmCP_ME1_PIPE0_INT_STATUS                                               0x308d
275*fb4d8502Sjsg #define mmCP_ME1_PIPE1_INT_STATUS                                               0x308e
276*fb4d8502Sjsg #define mmCP_ME1_PIPE2_INT_STATUS                                               0x308f
277*fb4d8502Sjsg #define mmCP_ME1_PIPE3_INT_STATUS                                               0x3090
278*fb4d8502Sjsg #define mmCP_ME2_PIPE0_INT_STATUS                                               0x3091
279*fb4d8502Sjsg #define mmCP_ME2_PIPE1_INT_STATUS                                               0x3092
280*fb4d8502Sjsg #define mmCP_ME2_PIPE2_INT_STATUS                                               0x3093
281*fb4d8502Sjsg #define mmCP_ME2_PIPE3_INT_STATUS                                               0x3094
282*fb4d8502Sjsg #define mmCP_ME1_INT_STAT_DEBUG                                                 0x3095
283*fb4d8502Sjsg #define mmCP_ME2_INT_STAT_DEBUG                                                 0x3096
284*fb4d8502Sjsg #define mmCP_ME1_PIPE_PRIORITY_CNTS                                             0x3099
285*fb4d8502Sjsg #define mmCP_ME1_PIPE0_PRIORITY                                                 0x309a
286*fb4d8502Sjsg #define mmCP_ME1_PIPE1_PRIORITY                                                 0x309b
287*fb4d8502Sjsg #define mmCP_ME1_PIPE2_PRIORITY                                                 0x309c
288*fb4d8502Sjsg #define mmCP_ME1_PIPE3_PRIORITY                                                 0x309d
289*fb4d8502Sjsg #define mmCP_ME2_PIPE_PRIORITY_CNTS                                             0x309e
290*fb4d8502Sjsg #define mmCP_ME2_PIPE0_PRIORITY                                                 0x309f
291*fb4d8502Sjsg #define mmCP_ME2_PIPE1_PRIORITY                                                 0x30a0
292*fb4d8502Sjsg #define mmCP_ME2_PIPE2_PRIORITY                                                 0x30a1
293*fb4d8502Sjsg #define mmCP_ME2_PIPE3_PRIORITY                                                 0x30a2
294*fb4d8502Sjsg #define mmCP_CE_PRGRM_CNTR_START                                                0x30a3
295*fb4d8502Sjsg #define mmCP_PFP_PRGRM_CNTR_START                                               0x30a4
296*fb4d8502Sjsg #define mmCP_ME_PRGRM_CNTR_START                                                0x30a5
297*fb4d8502Sjsg #define mmCP_MEC1_PRGRM_CNTR_START                                              0x30a6
298*fb4d8502Sjsg #define mmCP_MEC2_PRGRM_CNTR_START                                              0x30a7
299*fb4d8502Sjsg #define mmCP_CE_INTR_ROUTINE_START                                              0x30a8
300*fb4d8502Sjsg #define mmCP_PFP_INTR_ROUTINE_START                                             0x30a9
301*fb4d8502Sjsg #define mmCP_ME_INTR_ROUTINE_START                                              0x30aa
302*fb4d8502Sjsg #define mmCP_MEC1_INTR_ROUTINE_START                                            0x30ab
303*fb4d8502Sjsg #define mmCP_MEC2_INTR_ROUTINE_START                                            0x30ac
304*fb4d8502Sjsg #define mmCP_CONTEXT_CNTL                                                       0x30ad
305*fb4d8502Sjsg #define mmCP_MAX_CONTEXT                                                        0x30ae
306*fb4d8502Sjsg #define mmCP_IQ_WAIT_TIME1                                                      0x30af
307*fb4d8502Sjsg #define mmCP_IQ_WAIT_TIME2                                                      0x30b0
308*fb4d8502Sjsg #define mmCP_VMID_RESET                                                         0x30b3
309*fb4d8502Sjsg #define mmCP_VMID_PREEMPT                                                       0x30b6
310*fb4d8502Sjsg #define mmCP_PQ_STATUS                                                          0x30b8
311*fb4d8502Sjsg #define mmCP_CPC_STATUS                                                         0x2084
312*fb4d8502Sjsg #define mmCP_CPC_BUSY_STAT                                                      0x2085
313*fb4d8502Sjsg #define mmCP_CPC_STALLED_STAT1                                                  0x2086
314*fb4d8502Sjsg #define mmCP_CPF_STATUS                                                         0x2087
315*fb4d8502Sjsg #define mmCP_CPF_BUSY_STAT                                                      0x2088
316*fb4d8502Sjsg #define mmCP_CPF_STALLED_STAT1                                                  0x2089
317*fb4d8502Sjsg #define mmCP_CPC_MC_CNTL                                                        0x208a
318*fb4d8502Sjsg #define mmCP_CPC_GRBM_FREE_COUNT                                                0x208b
319*fb4d8502Sjsg #define mmCP_MEC_CNTL                                                           0x208d
320*fb4d8502Sjsg #define mmCP_MEC_ME1_HEADER_DUMP                                                0x208e
321*fb4d8502Sjsg #define mmCP_MEC_ME2_HEADER_DUMP                                                0x208f
322*fb4d8502Sjsg #define mmCP_CPC_SCRATCH_INDEX                                                  0x2090
323*fb4d8502Sjsg #define mmCP_CPC_SCRATCH_DATA                                                   0x2091
324*fb4d8502Sjsg #define mmCPG_PERFCOUNTER1_SELECT                                               0xd800
325*fb4d8502Sjsg #define mmCPG_PERFCOUNTER1_LO                                                   0xd000
326*fb4d8502Sjsg #define mmCPG_PERFCOUNTER1_HI                                                   0xd001
327*fb4d8502Sjsg #define mmCPG_PERFCOUNTER0_SELECT1                                              0xd801
328*fb4d8502Sjsg #define mmCPG_PERFCOUNTER0_SELECT                                               0xd802
329*fb4d8502Sjsg #define mmCPG_PERFCOUNTER0_LO                                                   0xd002
330*fb4d8502Sjsg #define mmCPG_PERFCOUNTER0_HI                                                   0xd003
331*fb4d8502Sjsg #define mmCPC_PERFCOUNTER1_SELECT                                               0xd803
332*fb4d8502Sjsg #define mmCPC_PERFCOUNTER1_LO                                                   0xd004
333*fb4d8502Sjsg #define mmCPC_PERFCOUNTER1_HI                                                   0xd005
334*fb4d8502Sjsg #define mmCPC_PERFCOUNTER0_SELECT1                                              0xd804
335*fb4d8502Sjsg #define mmCPC_PERFCOUNTER0_SELECT                                               0xd809
336*fb4d8502Sjsg #define mmCPC_PERFCOUNTER0_LO                                                   0xd006
337*fb4d8502Sjsg #define mmCPC_PERFCOUNTER0_HI                                                   0xd007
338*fb4d8502Sjsg #define mmCPF_PERFCOUNTER1_SELECT                                               0xd805
339*fb4d8502Sjsg #define mmCPF_PERFCOUNTER1_LO                                                   0xd008
340*fb4d8502Sjsg #define mmCPF_PERFCOUNTER1_HI                                                   0xd009
341*fb4d8502Sjsg #define mmCPF_PERFCOUNTER0_SELECT1                                              0xd806
342*fb4d8502Sjsg #define mmCPF_PERFCOUNTER0_SELECT                                               0xd807
343*fb4d8502Sjsg #define mmCPF_PERFCOUNTER0_LO                                                   0xd00a
344*fb4d8502Sjsg #define mmCPF_PERFCOUNTER0_HI                                                   0xd00b
345*fb4d8502Sjsg #define mmCP_CPC_HALT_HYST_COUNT                                                0x20a7
346*fb4d8502Sjsg #define mmCP_CE_COMPARE_COUNT                                                   0x20c0
347*fb4d8502Sjsg #define mmCP_CE_DE_COUNT                                                        0x20c1
348*fb4d8502Sjsg #define mmCP_DE_CE_COUNT                                                        0x20c2
349*fb4d8502Sjsg #define mmCP_DE_LAST_INVAL_COUNT                                                0x20c3
350*fb4d8502Sjsg #define mmCP_DE_DE_COUNT                                                        0x20c4
351*fb4d8502Sjsg #define mmCP_EOP_DONE_EVENT_CNTL                                                0xc0d5
352*fb4d8502Sjsg #define mmCP_EOP_DONE_DATA_CNTL                                                 0xc0d6
353*fb4d8502Sjsg #define mmCP_EOP_DONE_ADDR_LO                                                   0xc000
354*fb4d8502Sjsg #define mmCP_EOP_DONE_ADDR_HI                                                   0xc001
355*fb4d8502Sjsg #define mmCP_EOP_DONE_DATA_LO                                                   0xc002
356*fb4d8502Sjsg #define mmCP_EOP_DONE_DATA_HI                                                   0xc003
357*fb4d8502Sjsg #define mmCP_EOP_LAST_FENCE_LO                                                  0xc004
358*fb4d8502Sjsg #define mmCP_EOP_LAST_FENCE_HI                                                  0xc005
359*fb4d8502Sjsg #define mmCP_STREAM_OUT_ADDR_LO                                                 0xc006
360*fb4d8502Sjsg #define mmCP_STREAM_OUT_ADDR_HI                                                 0xc007
361*fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT0_LO                                         0xc008
362*fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT0_HI                                         0xc009
363*fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT0_LO                                          0xc00a
364*fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT0_HI                                          0xc00b
365*fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT1_LO                                         0xc00c
366*fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT1_HI                                         0xc00d
367*fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT1_LO                                          0xc00e
368*fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT1_HI                                          0xc00f
369*fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT2_LO                                         0xc010
370*fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT2_HI                                         0xc011
371*fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT2_LO                                          0xc012
372*fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT2_HI                                          0xc013
373*fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT3_LO                                         0xc014
374*fb4d8502Sjsg #define mmCP_NUM_PRIM_WRITTEN_COUNT3_HI                                         0xc015
375*fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT3_LO                                          0xc016
376*fb4d8502Sjsg #define mmCP_NUM_PRIM_NEEDED_COUNT3_HI                                          0xc017
377*fb4d8502Sjsg #define mmCP_PIPE_STATS_ADDR_LO                                                 0xc018
378*fb4d8502Sjsg #define mmCP_PIPE_STATS_ADDR_HI                                                 0xc019
379*fb4d8502Sjsg #define mmCP_VGT_IAVERT_COUNT_LO                                                0xc01a
380*fb4d8502Sjsg #define mmCP_VGT_IAVERT_COUNT_HI                                                0xc01b
381*fb4d8502Sjsg #define mmCP_VGT_IAPRIM_COUNT_LO                                                0xc01c
382*fb4d8502Sjsg #define mmCP_VGT_IAPRIM_COUNT_HI                                                0xc01d
383*fb4d8502Sjsg #define mmCP_VGT_GSPRIM_COUNT_LO                                                0xc01e
384*fb4d8502Sjsg #define mmCP_VGT_GSPRIM_COUNT_HI                                                0xc01f
385*fb4d8502Sjsg #define mmCP_VGT_VSINVOC_COUNT_LO                                               0xc020
386*fb4d8502Sjsg #define mmCP_VGT_VSINVOC_COUNT_HI                                               0xc021
387*fb4d8502Sjsg #define mmCP_VGT_GSINVOC_COUNT_LO                                               0xc022
388*fb4d8502Sjsg #define mmCP_VGT_GSINVOC_COUNT_HI                                               0xc023
389*fb4d8502Sjsg #define mmCP_VGT_HSINVOC_COUNT_LO                                               0xc024
390*fb4d8502Sjsg #define mmCP_VGT_HSINVOC_COUNT_HI                                               0xc025
391*fb4d8502Sjsg #define mmCP_VGT_DSINVOC_COUNT_LO                                               0xc026
392*fb4d8502Sjsg #define mmCP_VGT_DSINVOC_COUNT_HI                                               0xc027
393*fb4d8502Sjsg #define mmCP_PA_CINVOC_COUNT_LO                                                 0xc028
394*fb4d8502Sjsg #define mmCP_PA_CINVOC_COUNT_HI                                                 0xc029
395*fb4d8502Sjsg #define mmCP_PA_CPRIM_COUNT_LO                                                  0xc02a
396*fb4d8502Sjsg #define mmCP_PA_CPRIM_COUNT_HI                                                  0xc02b
397*fb4d8502Sjsg #define mmCP_SC_PSINVOC_COUNT0_LO                                               0xc02c
398*fb4d8502Sjsg #define mmCP_SC_PSINVOC_COUNT0_HI                                               0xc02d
399*fb4d8502Sjsg #define mmCP_SC_PSINVOC_COUNT1_LO                                               0xc02e
400*fb4d8502Sjsg #define mmCP_SC_PSINVOC_COUNT1_HI                                               0xc02f
401*fb4d8502Sjsg #define mmCP_VGT_CSINVOC_COUNT_LO                                               0xc030
402*fb4d8502Sjsg #define mmCP_VGT_CSINVOC_COUNT_HI                                               0xc031
403*fb4d8502Sjsg #define mmCP_STRMOUT_CNTL                                                       0xc03f
404*fb4d8502Sjsg #define mmSCRATCH_REG0                                                          0xc040
405*fb4d8502Sjsg #define mmSCRATCH_REG1                                                          0xc041
406*fb4d8502Sjsg #define mmSCRATCH_REG2                                                          0xc042
407*fb4d8502Sjsg #define mmSCRATCH_REG3                                                          0xc043
408*fb4d8502Sjsg #define mmSCRATCH_REG4                                                          0xc044
409*fb4d8502Sjsg #define mmSCRATCH_REG5                                                          0xc045
410*fb4d8502Sjsg #define mmSCRATCH_REG6                                                          0xc046
411*fb4d8502Sjsg #define mmSCRATCH_REG7                                                          0xc047
412*fb4d8502Sjsg #define mmSCRATCH_UMSK                                                          0xc050
413*fb4d8502Sjsg #define mmSCRATCH_ADDR                                                          0xc051
414*fb4d8502Sjsg #define mmCP_PFP_ATOMIC_PREOP_LO                                                0xc052
415*fb4d8502Sjsg #define mmCP_PFP_ATOMIC_PREOP_HI                                                0xc053
416*fb4d8502Sjsg #define mmCP_PFP_GDS_ATOMIC0_PREOP_LO                                           0xc054
417*fb4d8502Sjsg #define mmCP_PFP_GDS_ATOMIC0_PREOP_HI                                           0xc055
418*fb4d8502Sjsg #define mmCP_PFP_GDS_ATOMIC1_PREOP_LO                                           0xc056
419*fb4d8502Sjsg #define mmCP_PFP_GDS_ATOMIC1_PREOP_HI                                           0xc057
420*fb4d8502Sjsg #define mmCP_APPEND_ADDR_LO                                                     0xc058
421*fb4d8502Sjsg #define mmCP_APPEND_ADDR_HI                                                     0xc059
422*fb4d8502Sjsg #define mmCP_APPEND_DATA                                                        0xc05a
423*fb4d8502Sjsg #define mmCP_APPEND_LAST_CS_FENCE                                               0xc05b
424*fb4d8502Sjsg #define mmCP_APPEND_LAST_PS_FENCE                                               0xc05c
425*fb4d8502Sjsg #define mmCP_ATOMIC_PREOP_LO                                                    0xc05d
426*fb4d8502Sjsg #define mmCP_ME_ATOMIC_PREOP_LO                                                 0xc05d
427*fb4d8502Sjsg #define mmCP_ATOMIC_PREOP_HI                                                    0xc05e
428*fb4d8502Sjsg #define mmCP_ME_ATOMIC_PREOP_HI                                                 0xc05e
429*fb4d8502Sjsg #define mmCP_GDS_ATOMIC0_PREOP_LO                                               0xc05f
430*fb4d8502Sjsg #define mmCP_ME_GDS_ATOMIC0_PREOP_LO                                            0xc05f
431*fb4d8502Sjsg #define mmCP_GDS_ATOMIC0_PREOP_HI                                               0xc060
432*fb4d8502Sjsg #define mmCP_ME_GDS_ATOMIC0_PREOP_HI                                            0xc060
433*fb4d8502Sjsg #define mmCP_GDS_ATOMIC1_PREOP_LO                                               0xc061
434*fb4d8502Sjsg #define mmCP_ME_GDS_ATOMIC1_PREOP_LO                                            0xc061
435*fb4d8502Sjsg #define mmCP_GDS_ATOMIC1_PREOP_HI                                               0xc062
436*fb4d8502Sjsg #define mmCP_ME_GDS_ATOMIC1_PREOP_HI                                            0xc062
437*fb4d8502Sjsg #define mmCP_ME_MC_WADDR_LO                                                     0xc069
438*fb4d8502Sjsg #define mmCP_ME_MC_WADDR_HI                                                     0xc06a
439*fb4d8502Sjsg #define mmCP_ME_MC_WDATA_LO                                                     0xc06b
440*fb4d8502Sjsg #define mmCP_ME_MC_WDATA_HI                                                     0xc06c
441*fb4d8502Sjsg #define mmCP_ME_MC_RADDR_LO                                                     0xc06d
442*fb4d8502Sjsg #define mmCP_ME_MC_RADDR_HI                                                     0xc06e
443*fb4d8502Sjsg #define mmCP_SEM_WAIT_TIMER                                                     0xc06f
444*fb4d8502Sjsg #define mmCP_SIG_SEM_ADDR_LO                                                    0xc070
445*fb4d8502Sjsg #define mmCP_SIG_SEM_ADDR_HI                                                    0xc071
446*fb4d8502Sjsg #define mmCP_SEM_INCOMPLETE_TIMER_CNTL                                          0xc072
447*fb4d8502Sjsg #define mmCP_WAIT_SEM_STATUS                                                    0xc073
448*fb4d8502Sjsg #define mmCP_WAIT_SEM_ADDR_LO                                                   0xc075
449*fb4d8502Sjsg #define mmCP_WAIT_SEM_ADDR_HI                                                   0xc076
450*fb4d8502Sjsg #define mmCP_WAIT_REG_MEM_TIMEOUT                                               0xc074
451*fb4d8502Sjsg #define mmCP_COHER_START_DELAY                                                  0xc07b
452*fb4d8502Sjsg #define mmCP_COHER_CNTL                                                         0xc07c
453*fb4d8502Sjsg #define mmCP_COHER_SIZE                                                         0xc07d
454*fb4d8502Sjsg #define mmCP_COHER_SIZE_HI                                                      0xc08c
455*fb4d8502Sjsg #define mmCP_COHER_BASE                                                         0xc07e
456*fb4d8502Sjsg #define mmCP_COHER_BASE_HI                                                      0xc079
457*fb4d8502Sjsg #define mmCP_COHER_STATUS                                                       0xc07f
458*fb4d8502Sjsg #define mmCOHER_DEST_BASE_0                                                     0xa092
459*fb4d8502Sjsg #define mmCOHER_DEST_BASE_1                                                     0xa093
460*fb4d8502Sjsg #define mmCOHER_DEST_BASE_2                                                     0xa07e
461*fb4d8502Sjsg #define mmCOHER_DEST_BASE_3                                                     0xa07f
462*fb4d8502Sjsg #define mmCOHER_DEST_BASE_HI_0                                                  0xa07a
463*fb4d8502Sjsg #define mmCOHER_DEST_BASE_HI_1                                                  0xa07b
464*fb4d8502Sjsg #define mmCOHER_DEST_BASE_HI_2                                                  0xa07c
465*fb4d8502Sjsg #define mmCOHER_DEST_BASE_HI_3                                                  0xa07d
466*fb4d8502Sjsg #define mmCP_DMA_ME_SRC_ADDR                                                    0xc080
467*fb4d8502Sjsg #define mmCP_DMA_ME_SRC_ADDR_HI                                                 0xc081
468*fb4d8502Sjsg #define mmCP_DMA_ME_DST_ADDR                                                    0xc082
469*fb4d8502Sjsg #define mmCP_DMA_ME_DST_ADDR_HI                                                 0xc083
470*fb4d8502Sjsg #define mmCP_DMA_ME_CONTROL                                                     0xc078
471*fb4d8502Sjsg #define mmCP_DMA_ME_COMMAND                                                     0xc084
472*fb4d8502Sjsg #define mmCP_DMA_PFP_SRC_ADDR                                                   0xc085
473*fb4d8502Sjsg #define mmCP_DMA_PFP_SRC_ADDR_HI                                                0xc086
474*fb4d8502Sjsg #define mmCP_DMA_PFP_DST_ADDR                                                   0xc087
475*fb4d8502Sjsg #define mmCP_DMA_PFP_DST_ADDR_HI                                                0xc088
476*fb4d8502Sjsg #define mmCP_DMA_PFP_CONTROL                                                    0xc077
477*fb4d8502Sjsg #define mmCP_DMA_PFP_COMMAND                                                    0xc089
478*fb4d8502Sjsg #define mmCP_DMA_CNTL                                                           0xc08a
479*fb4d8502Sjsg #define mmCP_DMA_READ_TAGS                                                      0xc08b
480*fb4d8502Sjsg #define mmCP_PFP_IB_CONTROL                                                     0xc08d
481*fb4d8502Sjsg #define mmCP_PFP_LOAD_CONTROL                                                   0xc08e
482*fb4d8502Sjsg #define mmCP_SCRATCH_INDEX                                                      0xc08f
483*fb4d8502Sjsg #define mmCP_SCRATCH_DATA                                                       0xc090
484*fb4d8502Sjsg #define mmCP_RB_OFFSET                                                          0xc091
485*fb4d8502Sjsg #define mmCP_IB1_OFFSET                                                         0xc092
486*fb4d8502Sjsg #define mmCP_IB2_OFFSET                                                         0xc093
487*fb4d8502Sjsg #define mmCP_IB1_PREAMBLE_BEGIN                                                 0xc094
488*fb4d8502Sjsg #define mmCP_IB1_PREAMBLE_END                                                   0xc095
489*fb4d8502Sjsg #define mmCP_IB2_PREAMBLE_BEGIN                                                 0xc096
490*fb4d8502Sjsg #define mmCP_IB2_PREAMBLE_END                                                   0xc097
491*fb4d8502Sjsg #define mmCP_STALLED_STAT1                                                      0x219d
492*fb4d8502Sjsg #define mmCP_STALLED_STAT2                                                      0x219e
493*fb4d8502Sjsg #define mmCP_STALLED_STAT3                                                      0x219c
494*fb4d8502Sjsg #define mmCP_BUSY_STAT                                                          0x219f
495*fb4d8502Sjsg #define mmCP_STAT                                                               0x21a0
496*fb4d8502Sjsg #define mmCP_ME_HEADER_DUMP                                                     0x21a1
497*fb4d8502Sjsg #define mmCP_PFP_HEADER_DUMP                                                    0x21a2
498*fb4d8502Sjsg #define mmCP_GRBM_FREE_COUNT                                                    0x21a3
499*fb4d8502Sjsg #define mmCP_CE_HEADER_DUMP                                                     0x21a4
500*fb4d8502Sjsg #define mmCP_MC_PACK_DELAY_CNT                                                  0x21a7
501*fb4d8502Sjsg #define mmCP_MC_TAG_CNTL                                                        0x21a8
502*fb4d8502Sjsg #define mmCP_MC_TAG_DATA                                                        0x21a9
503*fb4d8502Sjsg #define mmCP_CSF_STAT                                                           0x21b4
504*fb4d8502Sjsg #define mmCP_CSF_CNTL                                                           0x21b5
505*fb4d8502Sjsg #define mmCP_ME_CNTL                                                            0x21b6
506*fb4d8502Sjsg #define mmCP_CNTX_STAT                                                          0x21b8
507*fb4d8502Sjsg #define mmCP_ME_PREEMPTION                                                      0x21b9
508*fb4d8502Sjsg #define mmCP_RB0_RPTR                                                           0x21c0
509*fb4d8502Sjsg #define mmCP_RB_RPTR                                                            0x21c0
510*fb4d8502Sjsg #define mmCP_RB1_RPTR                                                           0x21bf
511*fb4d8502Sjsg #define mmCP_RB2_RPTR                                                           0x21be
512*fb4d8502Sjsg #define mmCP_RB_WPTR_DELAY                                                      0x21c1
513*fb4d8502Sjsg #define mmCP_RB_WPTR_POLL_CNTL                                                  0x21c2
514*fb4d8502Sjsg #define mmCP_CE_INIT_BASE_LO                                                    0xc0c3
515*fb4d8502Sjsg #define mmCP_CE_INIT_BASE_HI                                                    0xc0c4
516*fb4d8502Sjsg #define mmCP_CE_INIT_BUFSZ                                                      0xc0c5
517*fb4d8502Sjsg #define mmCP_CE_IB1_BASE_LO                                                     0xc0c6
518*fb4d8502Sjsg #define mmCP_CE_IB1_BASE_HI                                                     0xc0c7
519*fb4d8502Sjsg #define mmCP_CE_IB1_BUFSZ                                                       0xc0c8
520*fb4d8502Sjsg #define mmCP_CE_IB2_BASE_LO                                                     0xc0c9
521*fb4d8502Sjsg #define mmCP_CE_IB2_BASE_HI                                                     0xc0ca
522*fb4d8502Sjsg #define mmCP_CE_IB2_BUFSZ                                                       0xc0cb
523*fb4d8502Sjsg #define mmCP_IB1_BASE_LO                                                        0xc0cc
524*fb4d8502Sjsg #define mmCP_IB1_BASE_HI                                                        0xc0cd
525*fb4d8502Sjsg #define mmCP_IB1_BUFSZ                                                          0xc0ce
526*fb4d8502Sjsg #define mmCP_IB2_BASE_LO                                                        0xc0cf
527*fb4d8502Sjsg #define mmCP_IB2_BASE_HI                                                        0xc0d0
528*fb4d8502Sjsg #define mmCP_IB2_BUFSZ                                                          0xc0d1
529*fb4d8502Sjsg #define mmCP_ST_BASE_LO                                                         0xc0d2
530*fb4d8502Sjsg #define mmCP_ST_BASE_HI                                                         0xc0d3
531*fb4d8502Sjsg #define mmCP_ST_BUFSZ                                                           0xc0d4
532*fb4d8502Sjsg #define mmCP_ROQ_THRESHOLDS                                                     0x21bc
533*fb4d8502Sjsg #define mmCP_MEQ_STQ_THRESHOLD                                                  0x21bd
534*fb4d8502Sjsg #define mmCP_ROQ1_THRESHOLDS                                                    0x21d5
535*fb4d8502Sjsg #define mmCP_ROQ2_THRESHOLDS                                                    0x21d6
536*fb4d8502Sjsg #define mmCP_STQ_THRESHOLDS                                                     0x21d7
537*fb4d8502Sjsg #define mmCP_QUEUE_THRESHOLDS                                                   0x21d8
538*fb4d8502Sjsg #define mmCP_MEQ_THRESHOLDS                                                     0x21d9
539*fb4d8502Sjsg #define mmCP_ROQ_AVAIL                                                          0x21da
540*fb4d8502Sjsg #define mmCP_STQ_AVAIL                                                          0x21db
541*fb4d8502Sjsg #define mmCP_ROQ2_AVAIL                                                         0x21dc
542*fb4d8502Sjsg #define mmCP_MEQ_AVAIL                                                          0x21dd
543*fb4d8502Sjsg #define mmCP_CMD_INDEX                                                          0x21de
544*fb4d8502Sjsg #define mmCP_CMD_DATA                                                           0x21df
545*fb4d8502Sjsg #define mmCP_ROQ_RB_STAT                                                        0x21e0
546*fb4d8502Sjsg #define mmCP_ROQ_IB1_STAT                                                       0x21e1
547*fb4d8502Sjsg #define mmCP_ROQ_IB2_STAT                                                       0x21e2
548*fb4d8502Sjsg #define mmCP_STQ_STAT                                                           0x21e3
549*fb4d8502Sjsg #define mmCP_STQ_WR_STAT                                                        0x21e4
550*fb4d8502Sjsg #define mmCP_MEQ_STAT                                                           0x21e5
551*fb4d8502Sjsg #define mmCP_CEQ1_AVAIL                                                         0x21e6
552*fb4d8502Sjsg #define mmCP_CEQ2_AVAIL                                                         0x21e7
553*fb4d8502Sjsg #define mmCP_CE_ROQ_RB_STAT                                                     0x21e8
554*fb4d8502Sjsg #define mmCP_CE_ROQ_IB1_STAT                                                    0x21e9
555*fb4d8502Sjsg #define mmCP_CE_ROQ_IB2_STAT                                                    0x21ea
556*fb4d8502Sjsg #define mmCP_INT_STAT_DEBUG                                                     0x21f7
557*fb4d8502Sjsg #define mmCP_PERFMON_CNTL                                                       0xd808
558*fb4d8502Sjsg #define mmCP_PERFMON_CNTX_CNTL                                                  0xa0d8
559*fb4d8502Sjsg #define mmCP_RINGID                                                             0xa0d9
560*fb4d8502Sjsg #define mmCP_PIPEID                                                             0xa0d9
561*fb4d8502Sjsg #define mmCP_VMID                                                               0xa0da
562*fb4d8502Sjsg #define mmCP_HPD_ROQ_OFFSETS                                                    0x3240
563*fb4d8502Sjsg #define mmCP_HPD_EOP_BASE_ADDR                                                  0x3241
564*fb4d8502Sjsg #define mmCP_HPD_EOP_BASE_ADDR_HI                                               0x3242
565*fb4d8502Sjsg #define mmCP_HPD_EOP_VMID                                                       0x3243
566*fb4d8502Sjsg #define mmCP_HPD_EOP_CONTROL                                                    0x3244
567*fb4d8502Sjsg #define mmCP_MQD_BASE_ADDR                                                      0x3245
568*fb4d8502Sjsg #define mmCP_MQD_BASE_ADDR_HI                                                   0x3246
569*fb4d8502Sjsg #define mmCP_HQD_ACTIVE                                                         0x3247
570*fb4d8502Sjsg #define mmCP_HQD_VMID                                                           0x3248
571*fb4d8502Sjsg #define mmCP_HQD_PERSISTENT_STATE                                               0x3249
572*fb4d8502Sjsg #define mmCP_HQD_PIPE_PRIORITY                                                  0x324a
573*fb4d8502Sjsg #define mmCP_HQD_QUEUE_PRIORITY                                                 0x324b
574*fb4d8502Sjsg #define mmCP_HQD_QUANTUM                                                        0x324c
575*fb4d8502Sjsg #define mmCP_HQD_PQ_BASE                                                        0x324d
576*fb4d8502Sjsg #define mmCP_HQD_PQ_BASE_HI                                                     0x324e
577*fb4d8502Sjsg #define mmCP_HQD_PQ_RPTR                                                        0x324f
578*fb4d8502Sjsg #define mmCP_HQD_PQ_RPTR_REPORT_ADDR                                            0x3250
579*fb4d8502Sjsg #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI                                         0x3251
580*fb4d8502Sjsg #define mmCP_HQD_PQ_WPTR_POLL_ADDR                                              0x3252
581*fb4d8502Sjsg #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI                                           0x3253
582*fb4d8502Sjsg #define mmCP_HQD_PQ_DOORBELL_CONTROL                                            0x3254
583*fb4d8502Sjsg #define mmCP_HQD_PQ_WPTR                                                        0x3255
584*fb4d8502Sjsg #define mmCP_HQD_PQ_CONTROL                                                     0x3256
585*fb4d8502Sjsg #define mmCP_HQD_IB_BASE_ADDR                                                   0x3257
586*fb4d8502Sjsg #define mmCP_HQD_IB_BASE_ADDR_HI                                                0x3258
587*fb4d8502Sjsg #define mmCP_HQD_IB_RPTR                                                        0x3259
588*fb4d8502Sjsg #define mmCP_HQD_IB_CONTROL                                                     0x325a
589*fb4d8502Sjsg #define mmCP_HQD_IQ_TIMER                                                       0x325b
590*fb4d8502Sjsg #define mmCP_HQD_IQ_RPTR                                                        0x325c
591*fb4d8502Sjsg #define mmCP_HQD_DEQUEUE_REQUEST                                                0x325d
592*fb4d8502Sjsg #define mmCP_HQD_DMA_OFFLOAD                                                    0x325e
593*fb4d8502Sjsg #define mmCP_HQD_SEMA_CMD                                                       0x325f
594*fb4d8502Sjsg #define mmCP_HQD_MSG_TYPE                                                       0x3260
595*fb4d8502Sjsg #define mmCP_HQD_ATOMIC0_PREOP_LO                                               0x3261
596*fb4d8502Sjsg #define mmCP_HQD_ATOMIC0_PREOP_HI                                               0x3262
597*fb4d8502Sjsg #define mmCP_HQD_ATOMIC1_PREOP_LO                                               0x3263
598*fb4d8502Sjsg #define mmCP_HQD_ATOMIC1_PREOP_HI                                               0x3264
599*fb4d8502Sjsg #define mmCP_HQD_HQ_SCHEDULER0                                                  0x3265
600*fb4d8502Sjsg #define mmCP_HQD_HQ_SCHEDULER1                                                  0x3266
601*fb4d8502Sjsg #define mmCP_MQD_CONTROL                                                        0x3267
602*fb4d8502Sjsg #define mmDB_Z_READ_BASE                                                        0xa012
603*fb4d8502Sjsg #define mmDB_STENCIL_READ_BASE                                                  0xa013
604*fb4d8502Sjsg #define mmDB_Z_WRITE_BASE                                                       0xa014
605*fb4d8502Sjsg #define mmDB_STENCIL_WRITE_BASE                                                 0xa015
606*fb4d8502Sjsg #define mmDB_DEPTH_INFO                                                         0xa00f
607*fb4d8502Sjsg #define mmDB_Z_INFO                                                             0xa010
608*fb4d8502Sjsg #define mmDB_STENCIL_INFO                                                       0xa011
609*fb4d8502Sjsg #define mmDB_DEPTH_SIZE                                                         0xa016
610*fb4d8502Sjsg #define mmDB_DEPTH_SLICE                                                        0xa017
611*fb4d8502Sjsg #define mmDB_DEPTH_VIEW                                                         0xa002
612*fb4d8502Sjsg #define mmDB_RENDER_CONTROL                                                     0xa000
613*fb4d8502Sjsg #define mmDB_COUNT_CONTROL                                                      0xa001
614*fb4d8502Sjsg #define mmDB_RENDER_OVERRIDE                                                    0xa003
615*fb4d8502Sjsg #define mmDB_RENDER_OVERRIDE2                                                   0xa004
616*fb4d8502Sjsg #define mmDB_EQAA                                                               0xa201
617*fb4d8502Sjsg #define mmDB_SHADER_CONTROL                                                     0xa203
618*fb4d8502Sjsg #define mmDB_DEPTH_BOUNDS_MIN                                                   0xa008
619*fb4d8502Sjsg #define mmDB_DEPTH_BOUNDS_MAX                                                   0xa009
620*fb4d8502Sjsg #define mmDB_STENCIL_CLEAR                                                      0xa00a
621*fb4d8502Sjsg #define mmDB_DEPTH_CLEAR                                                        0xa00b
622*fb4d8502Sjsg #define mmDB_HTILE_DATA_BASE                                                    0xa005
623*fb4d8502Sjsg #define mmDB_HTILE_SURFACE                                                      0xa2af
624*fb4d8502Sjsg #define mmDB_PRELOAD_CONTROL                                                    0xa2b2
625*fb4d8502Sjsg #define mmDB_STENCILREFMASK                                                     0xa10c
626*fb4d8502Sjsg #define mmDB_STENCILREFMASK_BF                                                  0xa10d
627*fb4d8502Sjsg #define mmDB_SRESULTS_COMPARE_STATE0                                            0xa2b0
628*fb4d8502Sjsg #define mmDB_SRESULTS_COMPARE_STATE1                                            0xa2b1
629*fb4d8502Sjsg #define mmDB_DEPTH_CONTROL                                                      0xa200
630*fb4d8502Sjsg #define mmDB_STENCIL_CONTROL                                                    0xa10b
631*fb4d8502Sjsg #define mmDB_ALPHA_TO_MASK                                                      0xa2dc
632*fb4d8502Sjsg #define mmDB_PERFCOUNTER0_SELECT                                                0xdc40
633*fb4d8502Sjsg #define mmDB_PERFCOUNTER1_SELECT                                                0xdc42
634*fb4d8502Sjsg #define mmDB_PERFCOUNTER2_SELECT                                                0xdc44
635*fb4d8502Sjsg #define mmDB_PERFCOUNTER3_SELECT                                                0xdc46
636*fb4d8502Sjsg #define mmDB_PERFCOUNTER0_SELECT1                                               0xdc41
637*fb4d8502Sjsg #define mmDB_PERFCOUNTER1_SELECT1                                               0xdc43
638*fb4d8502Sjsg #define mmDB_PERFCOUNTER0_LO                                                    0xd440
639*fb4d8502Sjsg #define mmDB_PERFCOUNTER1_LO                                                    0xd442
640*fb4d8502Sjsg #define mmDB_PERFCOUNTER2_LO                                                    0xd444
641*fb4d8502Sjsg #define mmDB_PERFCOUNTER3_LO                                                    0xd446
642*fb4d8502Sjsg #define mmDB_PERFCOUNTER0_HI                                                    0xd441
643*fb4d8502Sjsg #define mmDB_PERFCOUNTER1_HI                                                    0xd443
644*fb4d8502Sjsg #define mmDB_PERFCOUNTER2_HI                                                    0xd445
645*fb4d8502Sjsg #define mmDB_PERFCOUNTER3_HI                                                    0xd447
646*fb4d8502Sjsg #define mmDB_DEBUG                                                              0x260c
647*fb4d8502Sjsg #define mmDB_DEBUG2                                                             0x260d
648*fb4d8502Sjsg #define mmDB_DEBUG3                                                             0x260e
649*fb4d8502Sjsg #define mmDB_DEBUG4                                                             0x260f
650*fb4d8502Sjsg #define mmDB_CREDIT_LIMIT                                                       0x2614
651*fb4d8502Sjsg #define mmDB_WATERMARKS                                                         0x2615
652*fb4d8502Sjsg #define mmDB_SUBTILE_CONTROL                                                    0x2616
653*fb4d8502Sjsg #define mmDB_FREE_CACHELINES                                                    0x2617
654*fb4d8502Sjsg #define mmDB_FIFO_DEPTH1                                                        0x2618
655*fb4d8502Sjsg #define mmDB_FIFO_DEPTH2                                                        0x2619
656*fb4d8502Sjsg #define mmDB_CGTT_CLK_CTRL_0                                                    0xf0a4
657*fb4d8502Sjsg #define mmDB_ZPASS_COUNT_LOW                                                    0xc3fe
658*fb4d8502Sjsg #define mmDB_ZPASS_COUNT_HI                                                     0xc3ff
659*fb4d8502Sjsg #define mmDB_RING_CONTROL                                                       0x261b
660*fb4d8502Sjsg #define mmDB_READ_DEBUG_0                                                       0x2620
661*fb4d8502Sjsg #define mmDB_READ_DEBUG_1                                                       0x2621
662*fb4d8502Sjsg #define mmDB_READ_DEBUG_2                                                       0x2622
663*fb4d8502Sjsg #define mmDB_READ_DEBUG_3                                                       0x2623
664*fb4d8502Sjsg #define mmDB_READ_DEBUG_4                                                       0x2624
665*fb4d8502Sjsg #define mmDB_READ_DEBUG_5                                                       0x2625
666*fb4d8502Sjsg #define mmDB_READ_DEBUG_6                                                       0x2626
667*fb4d8502Sjsg #define mmDB_READ_DEBUG_7                                                       0x2627
668*fb4d8502Sjsg #define mmDB_READ_DEBUG_8                                                       0x2628
669*fb4d8502Sjsg #define mmDB_READ_DEBUG_9                                                       0x2629
670*fb4d8502Sjsg #define mmDB_READ_DEBUG_A                                                       0x262a
671*fb4d8502Sjsg #define mmDB_READ_DEBUG_B                                                       0x262b
672*fb4d8502Sjsg #define mmDB_READ_DEBUG_C                                                       0x262c
673*fb4d8502Sjsg #define mmDB_READ_DEBUG_D                                                       0x262d
674*fb4d8502Sjsg #define mmDB_READ_DEBUG_E                                                       0x262e
675*fb4d8502Sjsg #define mmDB_READ_DEBUG_F                                                       0x262f
676*fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT0_LOW                                               0xc3c0
677*fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT0_HI                                                0xc3c1
678*fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT1_LOW                                               0xc3c2
679*fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT1_HI                                                0xc3c3
680*fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT2_LOW                                               0xc3c4
681*fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT2_HI                                                0xc3c5
682*fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT3_LOW                                               0xc3c6
683*fb4d8502Sjsg #define mmDB_OCCLUSION_COUNT3_HI                                                0xc3c7
684*fb4d8502Sjsg #define mmCC_RB_REDUNDANCY                                                      0x263c
685*fb4d8502Sjsg #define mmCC_RB_BACKEND_DISABLE                                                 0x263d
686*fb4d8502Sjsg #define mmGC_USER_RB_REDUNDANCY                                                 0x26de
687*fb4d8502Sjsg #define mmGC_USER_RB_BACKEND_DISABLE                                            0x26df
688*fb4d8502Sjsg #define mmGB_ADDR_CONFIG                                                        0x263e
689*fb4d8502Sjsg #define mmGB_BACKEND_MAP                                                        0x263f
690*fb4d8502Sjsg #define mmGB_GPU_ID                                                             0x2640
691*fb4d8502Sjsg #define mmCC_RB_DAISY_CHAIN                                                     0x2641
692*fb4d8502Sjsg #define mmGB_TILE_MODE0                                                         0x2644
693*fb4d8502Sjsg #define mmGB_TILE_MODE1                                                         0x2645
694*fb4d8502Sjsg #define mmGB_TILE_MODE2                                                         0x2646
695*fb4d8502Sjsg #define mmGB_TILE_MODE3                                                         0x2647
696*fb4d8502Sjsg #define mmGB_TILE_MODE4                                                         0x2648
697*fb4d8502Sjsg #define mmGB_TILE_MODE5                                                         0x2649
698*fb4d8502Sjsg #define mmGB_TILE_MODE6                                                         0x264a
699*fb4d8502Sjsg #define mmGB_TILE_MODE7                                                         0x264b
700*fb4d8502Sjsg #define mmGB_TILE_MODE8                                                         0x264c
701*fb4d8502Sjsg #define mmGB_TILE_MODE9                                                         0x264d
702*fb4d8502Sjsg #define mmGB_TILE_MODE10                                                        0x264e
703*fb4d8502Sjsg #define mmGB_TILE_MODE11                                                        0x264f
704*fb4d8502Sjsg #define mmGB_TILE_MODE12                                                        0x2650
705*fb4d8502Sjsg #define mmGB_TILE_MODE13                                                        0x2651
706*fb4d8502Sjsg #define mmGB_TILE_MODE14                                                        0x2652
707*fb4d8502Sjsg #define mmGB_TILE_MODE15                                                        0x2653
708*fb4d8502Sjsg #define mmGB_TILE_MODE16                                                        0x2654
709*fb4d8502Sjsg #define mmGB_TILE_MODE17                                                        0x2655
710*fb4d8502Sjsg #define mmGB_TILE_MODE18                                                        0x2656
711*fb4d8502Sjsg #define mmGB_TILE_MODE19                                                        0x2657
712*fb4d8502Sjsg #define mmGB_TILE_MODE20                                                        0x2658
713*fb4d8502Sjsg #define mmGB_TILE_MODE21                                                        0x2659
714*fb4d8502Sjsg #define mmGB_TILE_MODE22                                                        0x265a
715*fb4d8502Sjsg #define mmGB_TILE_MODE23                                                        0x265b
716*fb4d8502Sjsg #define mmGB_TILE_MODE24                                                        0x265c
717*fb4d8502Sjsg #define mmGB_TILE_MODE25                                                        0x265d
718*fb4d8502Sjsg #define mmGB_TILE_MODE26                                                        0x265e
719*fb4d8502Sjsg #define mmGB_TILE_MODE27                                                        0x265f
720*fb4d8502Sjsg #define mmGB_TILE_MODE28                                                        0x2660
721*fb4d8502Sjsg #define mmGB_TILE_MODE29                                                        0x2661
722*fb4d8502Sjsg #define mmGB_TILE_MODE30                                                        0x2662
723*fb4d8502Sjsg #define mmGB_TILE_MODE31                                                        0x2663
724*fb4d8502Sjsg #define mmGB_MACROTILE_MODE0                                                    0x2664
725*fb4d8502Sjsg #define mmGB_MACROTILE_MODE1                                                    0x2665
726*fb4d8502Sjsg #define mmGB_MACROTILE_MODE2                                                    0x2666
727*fb4d8502Sjsg #define mmGB_MACROTILE_MODE3                                                    0x2667
728*fb4d8502Sjsg #define mmGB_MACROTILE_MODE4                                                    0x2668
729*fb4d8502Sjsg #define mmGB_MACROTILE_MODE5                                                    0x2669
730*fb4d8502Sjsg #define mmGB_MACROTILE_MODE6                                                    0x266a
731*fb4d8502Sjsg #define mmGB_MACROTILE_MODE7                                                    0x266b
732*fb4d8502Sjsg #define mmGB_MACROTILE_MODE8                                                    0x266c
733*fb4d8502Sjsg #define mmGB_MACROTILE_MODE9                                                    0x266d
734*fb4d8502Sjsg #define mmGB_MACROTILE_MODE10                                                   0x266e
735*fb4d8502Sjsg #define mmGB_MACROTILE_MODE11                                                   0x266f
736*fb4d8502Sjsg #define mmGB_MACROTILE_MODE12                                                   0x2670
737*fb4d8502Sjsg #define mmGB_MACROTILE_MODE13                                                   0x2671
738*fb4d8502Sjsg #define mmGB_MACROTILE_MODE14                                                   0x2672
739*fb4d8502Sjsg #define mmGB_MACROTILE_MODE15                                                   0x2673
740*fb4d8502Sjsg #define mmGB_EDC_MODE                                                           0x307e
741*fb4d8502Sjsg #define mmCC_GC_EDC_CONFIG                                                      0x3098
742*fb4d8502Sjsg #define mmRAS_SIGNATURE_CONTROL                                                 0x3380
743*fb4d8502Sjsg #define mmRAS_SIGNATURE_MASK                                                    0x3381
744*fb4d8502Sjsg #define mmRAS_SX_SIGNATURE0                                                     0x3382
745*fb4d8502Sjsg #define mmRAS_SX_SIGNATURE1                                                     0x3383
746*fb4d8502Sjsg #define mmRAS_SX_SIGNATURE2                                                     0x3384
747*fb4d8502Sjsg #define mmRAS_SX_SIGNATURE3                                                     0x3385
748*fb4d8502Sjsg #define mmRAS_DB_SIGNATURE0                                                     0x338b
749*fb4d8502Sjsg #define mmRAS_PA_SIGNATURE0                                                     0x338c
750*fb4d8502Sjsg #define mmRAS_VGT_SIGNATURE0                                                    0x338d
751*fb4d8502Sjsg #define mmRAS_SQ_SIGNATURE0                                                     0x338e
752*fb4d8502Sjsg #define mmRAS_SC_SIGNATURE0                                                     0x338f
753*fb4d8502Sjsg #define mmRAS_SC_SIGNATURE1                                                     0x3390
754*fb4d8502Sjsg #define mmRAS_SC_SIGNATURE2                                                     0x3391
755*fb4d8502Sjsg #define mmRAS_SC_SIGNATURE3                                                     0x3392
756*fb4d8502Sjsg #define mmRAS_SC_SIGNATURE4                                                     0x3393
757*fb4d8502Sjsg #define mmRAS_SC_SIGNATURE5                                                     0x3394
758*fb4d8502Sjsg #define mmRAS_SC_SIGNATURE6                                                     0x3395
759*fb4d8502Sjsg #define mmRAS_SC_SIGNATURE7                                                     0x3396
760*fb4d8502Sjsg #define mmRAS_IA_SIGNATURE0                                                     0x3397
761*fb4d8502Sjsg #define mmRAS_IA_SIGNATURE1                                                     0x3398
762*fb4d8502Sjsg #define mmRAS_SPI_SIGNATURE0                                                    0x3399
763*fb4d8502Sjsg #define mmRAS_SPI_SIGNATURE1                                                    0x339a
764*fb4d8502Sjsg #define mmRAS_TA_SIGNATURE0                                                     0x339b
765*fb4d8502Sjsg #define mmRAS_TD_SIGNATURE0                                                     0x339c
766*fb4d8502Sjsg #define mmRAS_CB_SIGNATURE0                                                     0x339d
767*fb4d8502Sjsg #define mmRAS_BCI_SIGNATURE0                                                    0x339e
768*fb4d8502Sjsg #define mmRAS_BCI_SIGNATURE1                                                    0x339f
769*fb4d8502Sjsg #define mmGRBM_CAM_INDEX                                                        0x3000
770*fb4d8502Sjsg #define mmGRBM_CAM_DATA                                                         0x3001
771*fb4d8502Sjsg #define mmGRBM_CNTL                                                             0x2000
772*fb4d8502Sjsg #define mmGRBM_SKEW_CNTL                                                        0x2001
773*fb4d8502Sjsg #define mmGRBM_PWR_CNTL                                                         0x2003
774*fb4d8502Sjsg #define mmGRBM_STATUS                                                           0x2004
775*fb4d8502Sjsg #define mmGRBM_STATUS2                                                          0x2002
776*fb4d8502Sjsg #define mmGRBM_STATUS_SE0                                                       0x2005
777*fb4d8502Sjsg #define mmGRBM_STATUS_SE1                                                       0x2006
778*fb4d8502Sjsg #define mmGRBM_STATUS_SE2                                                       0x200e
779*fb4d8502Sjsg #define mmGRBM_STATUS_SE3                                                       0x200f
780*fb4d8502Sjsg #define mmGRBM_SOFT_RESET                                                       0x2008
781*fb4d8502Sjsg #define mmGRBM_DEBUG_CNTL                                                       0x2009
782*fb4d8502Sjsg #define mmGRBM_DEBUG_DATA                                                       0x200a
783*fb4d8502Sjsg #define mmGRBM_GFX_INDEX                                                        0xc200
784*fb4d8502Sjsg #define mmGRBM_GFX_CLKEN_CNTL                                                   0x200c
785*fb4d8502Sjsg #define mmGRBM_WAIT_IDLE_CLOCKS                                                 0x200d
786*fb4d8502Sjsg #define mmGRBM_DEBUG                                                            0x2014
787*fb4d8502Sjsg #define mmGRBM_DEBUG_SNAPSHOT                                                   0x2015
788*fb4d8502Sjsg #define mmGRBM_READ_ERROR                                                       0x2016
789*fb4d8502Sjsg #define mmGRBM_READ_ERROR2                                                      0x2017
790*fb4d8502Sjsg #define mmGRBM_INT_CNTL                                                         0x2018
791*fb4d8502Sjsg #define mmGRBM_PERFCOUNTER0_SELECT                                              0xd840
792*fb4d8502Sjsg #define mmGRBM_PERFCOUNTER1_SELECT                                              0xd841
793*fb4d8502Sjsg #define mmGRBM_SE0_PERFCOUNTER_SELECT                                           0xd842
794*fb4d8502Sjsg #define mmGRBM_SE1_PERFCOUNTER_SELECT                                           0xd843
795*fb4d8502Sjsg #define mmGRBM_SE2_PERFCOUNTER_SELECT                                           0xd844
796*fb4d8502Sjsg #define mmGRBM_SE3_PERFCOUNTER_SELECT                                           0xd845
797*fb4d8502Sjsg #define mmGRBM_PERFCOUNTER0_LO                                                  0xd040
798*fb4d8502Sjsg #define mmGRBM_PERFCOUNTER0_HI                                                  0xd041
799*fb4d8502Sjsg #define mmGRBM_PERFCOUNTER1_LO                                                  0xd043
800*fb4d8502Sjsg #define mmGRBM_PERFCOUNTER1_HI                                                  0xd044
801*fb4d8502Sjsg #define mmGRBM_SE0_PERFCOUNTER_LO                                               0xd045
802*fb4d8502Sjsg #define mmGRBM_SE0_PERFCOUNTER_HI                                               0xd046
803*fb4d8502Sjsg #define mmGRBM_SE1_PERFCOUNTER_LO                                               0xd047
804*fb4d8502Sjsg #define mmGRBM_SE1_PERFCOUNTER_HI                                               0xd048
805*fb4d8502Sjsg #define mmGRBM_SE2_PERFCOUNTER_LO                                               0xd049
806*fb4d8502Sjsg #define mmGRBM_SE2_PERFCOUNTER_HI                                               0xd04a
807*fb4d8502Sjsg #define mmGRBM_SE3_PERFCOUNTER_LO                                               0xd04b
808*fb4d8502Sjsg #define mmGRBM_SE3_PERFCOUNTER_HI                                               0xd04c
809*fb4d8502Sjsg #define mmGRBM_SCRATCH_REG0                                                     0x2040
810*fb4d8502Sjsg #define mmGRBM_SCRATCH_REG1                                                     0x2041
811*fb4d8502Sjsg #define mmGRBM_SCRATCH_REG2                                                     0x2042
812*fb4d8502Sjsg #define mmGRBM_SCRATCH_REG3                                                     0x2043
813*fb4d8502Sjsg #define mmGRBM_SCRATCH_REG4                                                     0x2044
814*fb4d8502Sjsg #define mmGRBM_SCRATCH_REG5                                                     0x2045
815*fb4d8502Sjsg #define mmGRBM_SCRATCH_REG6                                                     0x2046
816*fb4d8502Sjsg #define mmGRBM_SCRATCH_REG7                                                     0x2047
817*fb4d8502Sjsg #define mmDEBUG_INDEX                                                           0x203c
818*fb4d8502Sjsg #define mmDEBUG_DATA                                                            0x203d
819*fb4d8502Sjsg #define mmGRBM_NOWHERE                                                          0x203f
820*fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE                                                    0xa10f
821*fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET                                                   0xa110
822*fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE                                                    0xa111
823*fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET                                                   0xa112
824*fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE                                                    0xa113
825*fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET                                                   0xa114
826*fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_1                                                  0xa115
827*fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_2                                                  0xa11b
828*fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_3                                                  0xa121
829*fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_4                                                  0xa127
830*fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_5                                                  0xa12d
831*fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_6                                                  0xa133
832*fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_7                                                  0xa139
833*fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_8                                                  0xa13f
834*fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_9                                                  0xa145
835*fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_10                                                 0xa14b
836*fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_11                                                 0xa151
837*fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_12                                                 0xa157
838*fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_13                                                 0xa15d
839*fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_14                                                 0xa163
840*fb4d8502Sjsg #define mmPA_CL_VPORT_XSCALE_15                                                 0xa169
841*fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_1                                                 0xa116
842*fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_2                                                 0xa11c
843*fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_3                                                 0xa122
844*fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_4                                                 0xa128
845*fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_5                                                 0xa12e
846*fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_6                                                 0xa134
847*fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_7                                                 0xa13a
848*fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_8                                                 0xa140
849*fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_9                                                 0xa146
850*fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_10                                                0xa14c
851*fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_11                                                0xa152
852*fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_12                                                0xa158
853*fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_13                                                0xa15e
854*fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_14                                                0xa164
855*fb4d8502Sjsg #define mmPA_CL_VPORT_XOFFSET_15                                                0xa16a
856*fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_1                                                  0xa117
857*fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_2                                                  0xa11d
858*fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_3                                                  0xa123
859*fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_4                                                  0xa129
860*fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_5                                                  0xa12f
861*fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_6                                                  0xa135
862*fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_7                                                  0xa13b
863*fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_8                                                  0xa141
864*fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_9                                                  0xa147
865*fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_10                                                 0xa14d
866*fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_11                                                 0xa153
867*fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_12                                                 0xa159
868*fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_13                                                 0xa15f
869*fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_14                                                 0xa165
870*fb4d8502Sjsg #define mmPA_CL_VPORT_YSCALE_15                                                 0xa16b
871*fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_1                                                 0xa118
872*fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_2                                                 0xa11e
873*fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_3                                                 0xa124
874*fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_4                                                 0xa12a
875*fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_5                                                 0xa130
876*fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_6                                                 0xa136
877*fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_7                                                 0xa13c
878*fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_8                                                 0xa142
879*fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_9                                                 0xa148
880*fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_10                                                0xa14e
881*fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_11                                                0xa154
882*fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_12                                                0xa15a
883*fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_13                                                0xa160
884*fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_14                                                0xa166
885*fb4d8502Sjsg #define mmPA_CL_VPORT_YOFFSET_15                                                0xa16c
886*fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_1                                                  0xa119
887*fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_2                                                  0xa11f
888*fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_3                                                  0xa125
889*fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_4                                                  0xa12b
890*fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_5                                                  0xa131
891*fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_6                                                  0xa137
892*fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_7                                                  0xa13d
893*fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_8                                                  0xa143
894*fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_9                                                  0xa149
895*fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_10                                                 0xa14f
896*fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_11                                                 0xa155
897*fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_12                                                 0xa15b
898*fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_13                                                 0xa161
899*fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_14                                                 0xa167
900*fb4d8502Sjsg #define mmPA_CL_VPORT_ZSCALE_15                                                 0xa16d
901*fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_1                                                 0xa11a
902*fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_2                                                 0xa120
903*fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_3                                                 0xa126
904*fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_4                                                 0xa12c
905*fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_5                                                 0xa132
906*fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_6                                                 0xa138
907*fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_7                                                 0xa13e
908*fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_8                                                 0xa144
909*fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_9                                                 0xa14a
910*fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_10                                                0xa150
911*fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_11                                                0xa156
912*fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_12                                                0xa15c
913*fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_13                                                0xa162
914*fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_14                                                0xa168
915*fb4d8502Sjsg #define mmPA_CL_VPORT_ZOFFSET_15                                                0xa16e
916*fb4d8502Sjsg #define mmPA_CL_VTE_CNTL                                                        0xa206
917*fb4d8502Sjsg #define mmPA_CL_VS_OUT_CNTL                                                     0xa207
918*fb4d8502Sjsg #define mmPA_CL_NANINF_CNTL                                                     0xa208
919*fb4d8502Sjsg #define mmPA_CL_CLIP_CNTL                                                       0xa204
920*fb4d8502Sjsg #define mmPA_CL_GB_VERT_CLIP_ADJ                                                0xa2fa
921*fb4d8502Sjsg #define mmPA_CL_GB_VERT_DISC_ADJ                                                0xa2fb
922*fb4d8502Sjsg #define mmPA_CL_GB_HORZ_CLIP_ADJ                                                0xa2fc
923*fb4d8502Sjsg #define mmPA_CL_GB_HORZ_DISC_ADJ                                                0xa2fd
924*fb4d8502Sjsg #define mmPA_CL_UCP_0_X                                                         0xa16f
925*fb4d8502Sjsg #define mmPA_CL_UCP_0_Y                                                         0xa170
926*fb4d8502Sjsg #define mmPA_CL_UCP_0_Z                                                         0xa171
927*fb4d8502Sjsg #define mmPA_CL_UCP_0_W                                                         0xa172
928*fb4d8502Sjsg #define mmPA_CL_UCP_1_X                                                         0xa173
929*fb4d8502Sjsg #define mmPA_CL_UCP_1_Y                                                         0xa174
930*fb4d8502Sjsg #define mmPA_CL_UCP_1_Z                                                         0xa175
931*fb4d8502Sjsg #define mmPA_CL_UCP_1_W                                                         0xa176
932*fb4d8502Sjsg #define mmPA_CL_UCP_2_X                                                         0xa177
933*fb4d8502Sjsg #define mmPA_CL_UCP_2_Y                                                         0xa178
934*fb4d8502Sjsg #define mmPA_CL_UCP_2_Z                                                         0xa179
935*fb4d8502Sjsg #define mmPA_CL_UCP_2_W                                                         0xa17a
936*fb4d8502Sjsg #define mmPA_CL_UCP_3_X                                                         0xa17b
937*fb4d8502Sjsg #define mmPA_CL_UCP_3_Y                                                         0xa17c
938*fb4d8502Sjsg #define mmPA_CL_UCP_3_Z                                                         0xa17d
939*fb4d8502Sjsg #define mmPA_CL_UCP_3_W                                                         0xa17e
940*fb4d8502Sjsg #define mmPA_CL_UCP_4_X                                                         0xa17f
941*fb4d8502Sjsg #define mmPA_CL_UCP_4_Y                                                         0xa180
942*fb4d8502Sjsg #define mmPA_CL_UCP_4_Z                                                         0xa181
943*fb4d8502Sjsg #define mmPA_CL_UCP_4_W                                                         0xa182
944*fb4d8502Sjsg #define mmPA_CL_UCP_5_X                                                         0xa183
945*fb4d8502Sjsg #define mmPA_CL_UCP_5_Y                                                         0xa184
946*fb4d8502Sjsg #define mmPA_CL_UCP_5_Z                                                         0xa185
947*fb4d8502Sjsg #define mmPA_CL_UCP_5_W                                                         0xa186
948*fb4d8502Sjsg #define mmPA_CL_POINT_X_RAD                                                     0xa1f5
949*fb4d8502Sjsg #define mmPA_CL_POINT_Y_RAD                                                     0xa1f6
950*fb4d8502Sjsg #define mmPA_CL_POINT_SIZE                                                      0xa1f7
951*fb4d8502Sjsg #define mmPA_CL_POINT_CULL_RAD                                                  0xa1f8
952*fb4d8502Sjsg #define mmPA_CL_ENHANCE                                                         0x2285
953*fb4d8502Sjsg #define mmPA_CL_RESET_DEBUG                                                     0x2286
954*fb4d8502Sjsg #define mmPA_SU_VTX_CNTL                                                        0xa2f9
955*fb4d8502Sjsg #define mmPA_SU_POINT_SIZE                                                      0xa280
956*fb4d8502Sjsg #define mmPA_SU_POINT_MINMAX                                                    0xa281
957*fb4d8502Sjsg #define mmPA_SU_LINE_CNTL                                                       0xa282
958*fb4d8502Sjsg #define mmPA_SU_LINE_STIPPLE_CNTL                                               0xa209
959*fb4d8502Sjsg #define mmPA_SU_LINE_STIPPLE_SCALE                                              0xa20a
960*fb4d8502Sjsg #define mmPA_SU_PRIM_FILTER_CNTL                                                0xa20b
961*fb4d8502Sjsg #define mmPA_SU_SC_MODE_CNTL                                                    0xa205
962*fb4d8502Sjsg #define mmPA_SU_POLY_OFFSET_DB_FMT_CNTL                                         0xa2de
963*fb4d8502Sjsg #define mmPA_SU_POLY_OFFSET_CLAMP                                               0xa2df
964*fb4d8502Sjsg #define mmPA_SU_POLY_OFFSET_FRONT_SCALE                                         0xa2e0
965*fb4d8502Sjsg #define mmPA_SU_POLY_OFFSET_FRONT_OFFSET                                        0xa2e1
966*fb4d8502Sjsg #define mmPA_SU_POLY_OFFSET_BACK_SCALE                                          0xa2e2
967*fb4d8502Sjsg #define mmPA_SU_POLY_OFFSET_BACK_OFFSET                                         0xa2e3
968*fb4d8502Sjsg #define mmPA_SU_HARDWARE_SCREEN_OFFSET                                          0xa08d
969*fb4d8502Sjsg #define mmPA_SU_LINE_STIPPLE_VALUE                                              0xc280
970*fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER0_SELECT                                             0xd900
971*fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER0_SELECT1                                            0xd901
972*fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER1_SELECT                                             0xd902
973*fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER1_SELECT1                                            0xd903
974*fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER2_SELECT                                             0xd904
975*fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER3_SELECT                                             0xd905
976*fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER0_LO                                                 0xd100
977*fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER0_HI                                                 0xd101
978*fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER1_LO                                                 0xd102
979*fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER1_HI                                                 0xd103
980*fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER2_LO                                                 0xd104
981*fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER2_HI                                                 0xd105
982*fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER3_LO                                                 0xd106
983*fb4d8502Sjsg #define mmPA_SU_PERFCOUNTER3_HI                                                 0xd107
984*fb4d8502Sjsg #define mmPA_SC_AA_CONFIG                                                       0xa2f8
985*fb4d8502Sjsg #define mmPA_SC_AA_MASK_X0Y0_X1Y0                                               0xa30e
986*fb4d8502Sjsg #define mmPA_SC_AA_MASK_X0Y1_X1Y1                                               0xa30f
987*fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0                                     0xa2fe
988*fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1                                     0xa2ff
989*fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2                                     0xa300
990*fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3                                     0xa301
991*fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0                                     0xa302
992*fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1                                     0xa303
993*fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2                                     0xa304
994*fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3                                     0xa305
995*fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0                                     0xa306
996*fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1                                     0xa307
997*fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2                                     0xa308
998*fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3                                     0xa309
999*fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0                                     0xa30a
1000*fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1                                     0xa30b
1001*fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2                                     0xa30c
1002*fb4d8502Sjsg #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3                                     0xa30d
1003*fb4d8502Sjsg #define mmPA_SC_CENTROID_PRIORITY_0                                             0xa2f5
1004*fb4d8502Sjsg #define mmPA_SC_CENTROID_PRIORITY_1                                             0xa2f6
1005*fb4d8502Sjsg #define mmPA_SC_CLIPRECT_0_TL                                                   0xa084
1006*fb4d8502Sjsg #define mmPA_SC_CLIPRECT_0_BR                                                   0xa085
1007*fb4d8502Sjsg #define mmPA_SC_CLIPRECT_1_TL                                                   0xa086
1008*fb4d8502Sjsg #define mmPA_SC_CLIPRECT_1_BR                                                   0xa087
1009*fb4d8502Sjsg #define mmPA_SC_CLIPRECT_2_TL                                                   0xa088
1010*fb4d8502Sjsg #define mmPA_SC_CLIPRECT_2_BR                                                   0xa089
1011*fb4d8502Sjsg #define mmPA_SC_CLIPRECT_3_TL                                                   0xa08a
1012*fb4d8502Sjsg #define mmPA_SC_CLIPRECT_3_BR                                                   0xa08b
1013*fb4d8502Sjsg #define mmPA_SC_CLIPRECT_RULE                                                   0xa083
1014*fb4d8502Sjsg #define mmPA_SC_EDGERULE                                                        0xa08c
1015*fb4d8502Sjsg #define mmPA_SC_LINE_CNTL                                                       0xa2f7
1016*fb4d8502Sjsg #define mmPA_SC_LINE_STIPPLE                                                    0xa283
1017*fb4d8502Sjsg #define mmPA_SC_MODE_CNTL_0                                                     0xa292
1018*fb4d8502Sjsg #define mmPA_SC_MODE_CNTL_1                                                     0xa293
1019*fb4d8502Sjsg #define mmPA_SC_RASTER_CONFIG                                                   0xa0d4
1020*fb4d8502Sjsg #define mmPA_SC_RASTER_CONFIG_1                                                 0xa0d5
1021*fb4d8502Sjsg #define mmPA_SC_SCREEN_EXTENT_CONTROL                                           0xa0d6
1022*fb4d8502Sjsg #define mmPA_SC_GENERIC_SCISSOR_TL                                              0xa090
1023*fb4d8502Sjsg #define mmPA_SC_GENERIC_SCISSOR_BR                                              0xa091
1024*fb4d8502Sjsg #define mmPA_SC_SCREEN_SCISSOR_TL                                               0xa00c
1025*fb4d8502Sjsg #define mmPA_SC_SCREEN_SCISSOR_BR                                               0xa00d
1026*fb4d8502Sjsg #define mmPA_SC_WINDOW_OFFSET                                                   0xa080
1027*fb4d8502Sjsg #define mmPA_SC_WINDOW_SCISSOR_TL                                               0xa081
1028*fb4d8502Sjsg #define mmPA_SC_WINDOW_SCISSOR_BR                                               0xa082
1029*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_0_TL                                              0xa094
1030*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_1_TL                                              0xa096
1031*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_2_TL                                              0xa098
1032*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_3_TL                                              0xa09a
1033*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_4_TL                                              0xa09c
1034*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_5_TL                                              0xa09e
1035*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_6_TL                                              0xa0a0
1036*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_7_TL                                              0xa0a2
1037*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_8_TL                                              0xa0a4
1038*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_9_TL                                              0xa0a6
1039*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_10_TL                                             0xa0a8
1040*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_11_TL                                             0xa0aa
1041*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_12_TL                                             0xa0ac
1042*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_13_TL                                             0xa0ae
1043*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_14_TL                                             0xa0b0
1044*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_15_TL                                             0xa0b2
1045*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_0_BR                                              0xa095
1046*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_1_BR                                              0xa097
1047*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_2_BR                                              0xa099
1048*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_3_BR                                              0xa09b
1049*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_4_BR                                              0xa09d
1050*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_5_BR                                              0xa09f
1051*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_6_BR                                              0xa0a1
1052*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_7_BR                                              0xa0a3
1053*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_8_BR                                              0xa0a5
1054*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_9_BR                                              0xa0a7
1055*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_10_BR                                             0xa0a9
1056*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_11_BR                                             0xa0ab
1057*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_12_BR                                             0xa0ad
1058*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_13_BR                                             0xa0af
1059*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_14_BR                                             0xa0b1
1060*fb4d8502Sjsg #define mmPA_SC_VPORT_SCISSOR_15_BR                                             0xa0b3
1061*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_0                                                    0xa0b4
1062*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_1                                                    0xa0b6
1063*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_2                                                    0xa0b8
1064*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_3                                                    0xa0ba
1065*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_4                                                    0xa0bc
1066*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_5                                                    0xa0be
1067*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_6                                                    0xa0c0
1068*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_7                                                    0xa0c2
1069*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_8                                                    0xa0c4
1070*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_9                                                    0xa0c6
1071*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_10                                                   0xa0c8
1072*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_11                                                   0xa0ca
1073*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_12                                                   0xa0cc
1074*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_13                                                   0xa0ce
1075*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_14                                                   0xa0d0
1076*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMIN_15                                                   0xa0d2
1077*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_0                                                    0xa0b5
1078*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_1                                                    0xa0b7
1079*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_2                                                    0xa0b9
1080*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_3                                                    0xa0bb
1081*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_4                                                    0xa0bd
1082*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_5                                                    0xa0bf
1083*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_6                                                    0xa0c1
1084*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_7                                                    0xa0c3
1085*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_8                                                    0xa0c5
1086*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_9                                                    0xa0c7
1087*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_10                                                   0xa0c9
1088*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_11                                                   0xa0cb
1089*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_12                                                   0xa0cd
1090*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_13                                                   0xa0cf
1091*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_14                                                   0xa0d1
1092*fb4d8502Sjsg #define mmPA_SC_VPORT_ZMAX_15                                                   0xa0d3
1093*fb4d8502Sjsg #define mmPA_SC_ENHANCE                                                         0x22fc
1094*fb4d8502Sjsg #define mmPA_SC_FIFO_SIZE                                                       0x22f3
1095*fb4d8502Sjsg #define mmPA_SC_IF_FIFO_SIZE                                                    0x22f5
1096*fb4d8502Sjsg #define mmPA_SC_FORCE_EOV_MAX_CNTS                                              0x22c9
1097*fb4d8502Sjsg #define mmPA_SC_LINE_STIPPLE_STATE                                              0xc281
1098*fb4d8502Sjsg #define mmPA_SC_SCREEN_EXTENT_MIN_0                                             0xc284
1099*fb4d8502Sjsg #define mmPA_SC_SCREEN_EXTENT_MAX_0                                             0xc285
1100*fb4d8502Sjsg #define mmPA_SC_SCREEN_EXTENT_MIN_1                                             0xc286
1101*fb4d8502Sjsg #define mmPA_SC_SCREEN_EXTENT_MAX_1                                             0xc28b
1102*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER0_SELECT                                             0xd940
1103*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER0_SELECT1                                            0xd941
1104*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER1_SELECT                                             0xd942
1105*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER2_SELECT                                             0xd943
1106*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER3_SELECT                                             0xd944
1107*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER4_SELECT                                             0xd945
1108*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER5_SELECT                                             0xd946
1109*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER6_SELECT                                             0xd947
1110*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER7_SELECT                                             0xd948
1111*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER0_LO                                                 0xd140
1112*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER0_HI                                                 0xd141
1113*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER1_LO                                                 0xd142
1114*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER1_HI                                                 0xd143
1115*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER2_LO                                                 0xd144
1116*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER2_HI                                                 0xd145
1117*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER3_LO                                                 0xd146
1118*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER3_HI                                                 0xd147
1119*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER4_LO                                                 0xd148
1120*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER4_HI                                                 0xd149
1121*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER5_LO                                                 0xd14a
1122*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER5_HI                                                 0xd14b
1123*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER6_LO                                                 0xd14c
1124*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER6_HI                                                 0xd14d
1125*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER7_LO                                                 0xd14e
1126*fb4d8502Sjsg #define mmPA_SC_PERFCOUNTER7_HI                                                 0xd14f
1127*fb4d8502Sjsg #define mmPA_SC_P3D_TRAP_SCREEN_HV_EN                                           0xc2a0
1128*fb4d8502Sjsg #define mmPA_SC_P3D_TRAP_SCREEN_H                                               0xc2a1
1129*fb4d8502Sjsg #define mmPA_SC_P3D_TRAP_SCREEN_V                                               0xc2a2
1130*fb4d8502Sjsg #define mmPA_SC_P3D_TRAP_SCREEN_OCCURRENCE                                      0xc2a3
1131*fb4d8502Sjsg #define mmPA_SC_P3D_TRAP_SCREEN_COUNT                                           0xc2a4
1132*fb4d8502Sjsg #define mmPA_SC_HP3D_TRAP_SCREEN_HV_EN                                          0xc2a8
1133*fb4d8502Sjsg #define mmPA_SC_HP3D_TRAP_SCREEN_H                                              0xc2a9
1134*fb4d8502Sjsg #define mmPA_SC_HP3D_TRAP_SCREEN_V                                              0xc2aa
1135*fb4d8502Sjsg #define mmPA_SC_HP3D_TRAP_SCREEN_OCCURRENCE                                     0xc2ab
1136*fb4d8502Sjsg #define mmPA_SC_HP3D_TRAP_SCREEN_COUNT                                          0xc2ac
1137*fb4d8502Sjsg #define mmPA_SC_TRAP_SCREEN_HV_EN                                               0xc2b0
1138*fb4d8502Sjsg #define mmPA_SC_TRAP_SCREEN_H                                                   0xc2b1
1139*fb4d8502Sjsg #define mmPA_SC_TRAP_SCREEN_V                                                   0xc2b2
1140*fb4d8502Sjsg #define mmPA_SC_TRAP_SCREEN_OCCURRENCE                                          0xc2b3
1141*fb4d8502Sjsg #define mmPA_SC_TRAP_SCREEN_COUNT                                               0xc2b4
1142*fb4d8502Sjsg #define mmPA_SC_P3D_TRAP_SCREEN_HV_LOCK                                         0x22c0
1143*fb4d8502Sjsg #define mmPA_SC_HP3D_TRAP_SCREEN_HV_LOCK                                        0x22c1
1144*fb4d8502Sjsg #define mmPA_SC_TRAP_SCREEN_HV_LOCK                                             0x22c2
1145*fb4d8502Sjsg #define mmPA_CL_CNTL_STATUS                                                     0x2284
1146*fb4d8502Sjsg #define mmPA_SU_CNTL_STATUS                                                     0x2294
1147*fb4d8502Sjsg #define mmPA_SC_FIFO_DEPTH_CNTL                                                 0x2295
1148*fb4d8502Sjsg #define mmCGTT_PA_CLK_CTRL                                                      0xf088
1149*fb4d8502Sjsg #define mmCGTT_SC_CLK_CTRL                                                      0xf089
1150*fb4d8502Sjsg #define mmPA_SU_DEBUG_CNTL                                                      0x2280
1151*fb4d8502Sjsg #define mmPA_SU_DEBUG_DATA                                                      0x2281
1152*fb4d8502Sjsg #define mmPA_SC_DEBUG_CNTL                                                      0x22f6
1153*fb4d8502Sjsg #define mmPA_SC_DEBUG_DATA                                                      0x22f7
1154*fb4d8502Sjsg #define ixCLIPPER_DEBUG_REG00                                                   0x0
1155*fb4d8502Sjsg #define ixCLIPPER_DEBUG_REG01                                                   0x1
1156*fb4d8502Sjsg #define ixCLIPPER_DEBUG_REG02                                                   0x2
1157*fb4d8502Sjsg #define ixCLIPPER_DEBUG_REG03                                                   0x3
1158*fb4d8502Sjsg #define ixCLIPPER_DEBUG_REG04                                                   0x4
1159*fb4d8502Sjsg #define ixCLIPPER_DEBUG_REG05                                                   0x5
1160*fb4d8502Sjsg #define ixCLIPPER_DEBUG_REG06                                                   0x6
1161*fb4d8502Sjsg #define ixCLIPPER_DEBUG_REG07                                                   0x7
1162*fb4d8502Sjsg #define ixCLIPPER_DEBUG_REG08                                                   0x8
1163*fb4d8502Sjsg #define ixCLIPPER_DEBUG_REG09                                                   0x9
1164*fb4d8502Sjsg #define ixCLIPPER_DEBUG_REG10                                                   0xa
1165*fb4d8502Sjsg #define ixCLIPPER_DEBUG_REG11                                                   0xb
1166*fb4d8502Sjsg #define ixCLIPPER_DEBUG_REG12                                                   0xc
1167*fb4d8502Sjsg #define ixCLIPPER_DEBUG_REG13                                                   0xd
1168*fb4d8502Sjsg #define ixCLIPPER_DEBUG_REG14                                                   0xe
1169*fb4d8502Sjsg #define ixCLIPPER_DEBUG_REG15                                                   0xf
1170*fb4d8502Sjsg #define ixCLIPPER_DEBUG_REG16                                                   0x10
1171*fb4d8502Sjsg #define ixCLIPPER_DEBUG_REG17                                                   0x11
1172*fb4d8502Sjsg #define ixCLIPPER_DEBUG_REG18                                                   0x12
1173*fb4d8502Sjsg #define ixCLIPPER_DEBUG_REG19                                                   0x13
1174*fb4d8502Sjsg #define ixSXIFCCG_DEBUG_REG0                                                    0x14
1175*fb4d8502Sjsg #define ixSXIFCCG_DEBUG_REG1                                                    0x15
1176*fb4d8502Sjsg #define ixSXIFCCG_DEBUG_REG2                                                    0x16
1177*fb4d8502Sjsg #define ixSXIFCCG_DEBUG_REG3                                                    0x17
1178*fb4d8502Sjsg #define ixSETUP_DEBUG_REG0                                                      0x18
1179*fb4d8502Sjsg #define ixSETUP_DEBUG_REG1                                                      0x19
1180*fb4d8502Sjsg #define ixSETUP_DEBUG_REG2                                                      0x1a
1181*fb4d8502Sjsg #define ixSETUP_DEBUG_REG3                                                      0x1b
1182*fb4d8502Sjsg #define ixSETUP_DEBUG_REG4                                                      0x1c
1183*fb4d8502Sjsg #define ixSETUP_DEBUG_REG5                                                      0x1d
1184*fb4d8502Sjsg #define ixPA_SC_DEBUG_REG0                                                      0x0
1185*fb4d8502Sjsg #define ixPA_SC_DEBUG_REG1                                                      0x1
1186*fb4d8502Sjsg #define mmCOMPUTE_DISPATCH_INITIATOR                                            0x2e00
1187*fb4d8502Sjsg #define mmCOMPUTE_DIM_X                                                         0x2e01
1188*fb4d8502Sjsg #define mmCOMPUTE_DIM_Y                                                         0x2e02
1189*fb4d8502Sjsg #define mmCOMPUTE_DIM_Z                                                         0x2e03
1190*fb4d8502Sjsg #define mmCOMPUTE_START_X                                                       0x2e04
1191*fb4d8502Sjsg #define mmCOMPUTE_START_Y                                                       0x2e05
1192*fb4d8502Sjsg #define mmCOMPUTE_START_Z                                                       0x2e06
1193*fb4d8502Sjsg #define mmCOMPUTE_NUM_THREAD_X                                                  0x2e07
1194*fb4d8502Sjsg #define mmCOMPUTE_NUM_THREAD_Y                                                  0x2e08
1195*fb4d8502Sjsg #define mmCOMPUTE_NUM_THREAD_Z                                                  0x2e09
1196*fb4d8502Sjsg #define mmCOMPUTE_PIPELINESTAT_ENABLE                                           0x2e0a
1197*fb4d8502Sjsg #define mmCOMPUTE_PERFCOUNT_ENABLE                                              0x2e0b
1198*fb4d8502Sjsg #define mmCOMPUTE_PGM_LO                                                        0x2e0c
1199*fb4d8502Sjsg #define mmCOMPUTE_PGM_HI                                                        0x2e0d
1200*fb4d8502Sjsg #define mmCOMPUTE_TBA_LO                                                        0x2e0e
1201*fb4d8502Sjsg #define mmCOMPUTE_TBA_HI                                                        0x2e0f
1202*fb4d8502Sjsg #define mmCOMPUTE_TMA_LO                                                        0x2e10
1203*fb4d8502Sjsg #define mmCOMPUTE_TMA_HI                                                        0x2e11
1204*fb4d8502Sjsg #define mmCOMPUTE_PGM_RSRC1                                                     0x2e12
1205*fb4d8502Sjsg #define mmCOMPUTE_PGM_RSRC2                                                     0x2e13
1206*fb4d8502Sjsg #define mmCOMPUTE_VMID                                                          0x2e14
1207*fb4d8502Sjsg #define mmCOMPUTE_RESOURCE_LIMITS                                               0x2e15
1208*fb4d8502Sjsg #define mmCOMPUTE_STATIC_THREAD_MGMT_SE0                                        0x2e16
1209*fb4d8502Sjsg #define mmCOMPUTE_STATIC_THREAD_MGMT_SE1                                        0x2e17
1210*fb4d8502Sjsg #define mmCOMPUTE_TMPRING_SIZE                                                  0x2e18
1211*fb4d8502Sjsg #define mmCOMPUTE_STATIC_THREAD_MGMT_SE2                                        0x2e19
1212*fb4d8502Sjsg #define mmCOMPUTE_STATIC_THREAD_MGMT_SE3                                        0x2e1a
1213*fb4d8502Sjsg #define mmCOMPUTE_RESTART_X                                                     0x2e1b
1214*fb4d8502Sjsg #define mmCOMPUTE_RESTART_Y                                                     0x2e1c
1215*fb4d8502Sjsg #define mmCOMPUTE_RESTART_Z                                                     0x2e1d
1216*fb4d8502Sjsg #define mmCOMPUTE_THREAD_TRACE_ENABLE                                           0x2e1e
1217*fb4d8502Sjsg #define mmCOMPUTE_MISC_RESERVED                                                 0x2e1f
1218*fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_0                                                   0x2e40
1219*fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_1                                                   0x2e41
1220*fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_2                                                   0x2e42
1221*fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_3                                                   0x2e43
1222*fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_4                                                   0x2e44
1223*fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_5                                                   0x2e45
1224*fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_6                                                   0x2e46
1225*fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_7                                                   0x2e47
1226*fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_8                                                   0x2e48
1227*fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_9                                                   0x2e49
1228*fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_10                                                  0x2e4a
1229*fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_11                                                  0x2e4b
1230*fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_12                                                  0x2e4c
1231*fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_13                                                  0x2e4d
1232*fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_14                                                  0x2e4e
1233*fb4d8502Sjsg #define mmCOMPUTE_USER_DATA_15                                                  0x2e4f
1234*fb4d8502Sjsg #define mmCSPRIV_CONNECT                                                        0x0
1235*fb4d8502Sjsg #define mmCSPRIV_THREAD_TRACE_TG0                                               0x1e
1236*fb4d8502Sjsg #define mmCSPRIV_THREAD_TRACE_TG1                                               0x1e
1237*fb4d8502Sjsg #define mmCSPRIV_THREAD_TRACE_TG2                                               0x1e
1238*fb4d8502Sjsg #define mmCSPRIV_THREAD_TRACE_TG3                                               0x1e
1239*fb4d8502Sjsg #define mmCSPRIV_THREAD_TRACE_EVENT                                             0x1f
1240*fb4d8502Sjsg #define mmRLC_CNTL                                                              0x30c0
1241*fb4d8502Sjsg #define mmRLC_DEBUG_SELECT                                                      0x30c1
1242*fb4d8502Sjsg #define mmRLC_DEBUG                                                             0x30c2
1243*fb4d8502Sjsg #define mmRLC_MC_CNTL                                                           0x30c3
1244*fb4d8502Sjsg #define mmRLC_STAT                                                              0x30c4
1245*fb4d8502Sjsg #define mmRLC_SAFE_MODE                                                         0x313a
1246*fb4d8502Sjsg #define mmRLC_SOFT_RESET_GPU                                                    0x30c5
1247*fb4d8502Sjsg #define mmRLC_MEM_SLP_CNTL                                                      0x30c6
1248*fb4d8502Sjsg #define mmRLC_PERFMON_CNTL                                                      0xdcc0
1249*fb4d8502Sjsg #define mmRLC_PERFCOUNTER0_SELECT                                               0xdcc1
1250*fb4d8502Sjsg #define mmRLC_PERFCOUNTER1_SELECT                                               0xdcc2
1251*fb4d8502Sjsg #define mmRLC_PERFCOUNTER0_LO                                                   0xd480
1252*fb4d8502Sjsg #define mmRLC_PERFCOUNTER1_LO                                                   0xd482
1253*fb4d8502Sjsg #define mmRLC_PERFCOUNTER0_HI                                                   0xd481
1254*fb4d8502Sjsg #define mmRLC_PERFCOUNTER1_HI                                                   0xd483
1255*fb4d8502Sjsg #define mmCGTT_RLC_CLK_CTRL                                                     0xf0b8
1256*fb4d8502Sjsg #define mmRLC_LB_CNTL                                                           0x30d9
1257*fb4d8502Sjsg #define mmRLC_LB_CNTR_MAX                                                       0x30d2
1258*fb4d8502Sjsg #define mmRLC_LB_CNTR_INIT                                                      0x30db
1259*fb4d8502Sjsg #define mmRLC_LOAD_BALANCE_CNTR                                                 0x30dc
1260*fb4d8502Sjsg #define mmRLC_SAVE_AND_RESTORE_BASE                                             0x30dd
1261*fb4d8502Sjsg #define mmRLC_JUMP_TABLE_RESTORE                                                0x30de
1262*fb4d8502Sjsg #define mmRLC_DRIVER_CPDMA_STATUS                                               0x30de
1263*fb4d8502Sjsg #define mmRLC_PG_DELAY_2                                                        0x30df
1264*fb4d8502Sjsg #define mmRLC_GPM_DEBUG_SELECT                                                  0x30e0
1265*fb4d8502Sjsg #define mmRLC_GPM_DEBUG                                                         0x30e1
1266*fb4d8502Sjsg #define mmRLC_GPM_UCODE_ADDR                                                    0x30e2
1267*fb4d8502Sjsg #define mmRLC_GPM_UCODE_DATA                                                    0x30e3
1268*fb4d8502Sjsg #define mmRLC_GPU_CLOCK_COUNT_LSB                                               0x30e4
1269*fb4d8502Sjsg #define mmRLC_GPU_CLOCK_COUNT_MSB                                               0x30e5
1270*fb4d8502Sjsg #define mmRLC_CAPTURE_GPU_CLOCK_COUNT                                           0x30e6
1271*fb4d8502Sjsg #define mmRLC_UCODE_CNTL                                                        0x30e7
1272*fb4d8502Sjsg #define mmRLC_GPM_STAT                                                          0x3100
1273*fb4d8502Sjsg #define mmRLC_GPU_CLOCK_32_RES_SEL                                              0x3101
1274*fb4d8502Sjsg #define mmRLC_GPU_CLOCK_32                                                      0x3102
1275*fb4d8502Sjsg #define mmRLC_PG_CNTL                                                           0x3103
1276*fb4d8502Sjsg #define mmRLC_GPM_THREAD_PRIORITY                                               0x3104
1277*fb4d8502Sjsg #define mmRLC_GPM_THREAD_ENABLE                                                 0x3105
1278*fb4d8502Sjsg #define mmRLC_GPM_VMID_THREAD0                                                  0x3106
1279*fb4d8502Sjsg #define mmRLC_GPM_VMID_THREAD1                                                  0x3107
1280*fb4d8502Sjsg #define mmRLC_CGTT_MGCG_OVERRIDE                                                0x3108
1281*fb4d8502Sjsg #define mmRLC_CGCG_CGLS_CTRL                                                    0x3109
1282*fb4d8502Sjsg #define mmRLC_CGCG_RAMP_CTRL                                                    0x310a
1283*fb4d8502Sjsg #define mmRLC_DYN_PG_STATUS                                                     0x310b
1284*fb4d8502Sjsg #define mmRLC_DYN_PG_REQUEST                                                    0x310c
1285*fb4d8502Sjsg #define mmRLC_PG_DELAY                                                          0x310d
1286*fb4d8502Sjsg #define mmRLC_CU_STATUS                                                         0x310e
1287*fb4d8502Sjsg #define mmRLC_LB_INIT_CU_MASK                                                   0x310f
1288*fb4d8502Sjsg #define mmRLC_LB_ALWAYS_ACTIVE_CU_MASK                                          0x3110
1289*fb4d8502Sjsg #define mmRLC_LB_PARAMS                                                         0x3111
1290*fb4d8502Sjsg #define mmRLC_THREAD1_DELAY                                                     0x3112
1291*fb4d8502Sjsg #define mmRLC_PG_ALWAYS_ON_CU_MASK                                              0x3113
1292*fb4d8502Sjsg #define mmRLC_MAX_PG_CU                                                         0x3114
1293*fb4d8502Sjsg #define mmRLC_AUTO_PG_CTRL                                                      0x3115
1294*fb4d8502Sjsg #define mmRLC_SMU_GRBM_REG_SAVE_CTRL                                            0x3116
1295*fb4d8502Sjsg #define mmRLC_SMU_PG_CTRL                                                       0x3117
1296*fb4d8502Sjsg #define mmRLC_SMU_PG_WAKE_UP_CTRL                                               0x3118
1297*fb4d8502Sjsg #define mmRLC_SERDES_RD_MASTER_INDEX                                            0x3119
1298*fb4d8502Sjsg #define mmRLC_SERDES_RD_DATA_0                                                  0x311a
1299*fb4d8502Sjsg #define mmRLC_SERDES_RD_DATA_1                                                  0x311b
1300*fb4d8502Sjsg #define mmRLC_SERDES_RD_DATA_2                                                  0x311c
1301*fb4d8502Sjsg #define mmRLC_SERDES_WR_CU_MASTER_MASK                                          0x311d
1302*fb4d8502Sjsg #define mmRLC_SERDES_WR_NONCU_MASTER_MASK                                       0x311e
1303*fb4d8502Sjsg #define mmRLC_SERDES_WR_CTRL                                                    0x311f
1304*fb4d8502Sjsg #define mmRLC_SERDES_WR_DATA                                                    0x3120
1305*fb4d8502Sjsg #define mmRLC_SERDES_CU_MASTER_BUSY                                             0x3121
1306*fb4d8502Sjsg #define mmRLC_SERDES_NONCU_MASTER_BUSY                                          0x3122
1307*fb4d8502Sjsg #define mmRLC_GPM_GENERAL_0                                                     0x3123
1308*fb4d8502Sjsg #define mmRLC_GPM_GENERAL_1                                                     0x3124
1309*fb4d8502Sjsg #define mmRLC_GPM_GENERAL_2                                                     0x3125
1310*fb4d8502Sjsg #define mmRLC_GPM_GENERAL_3                                                     0x3126
1311*fb4d8502Sjsg #define mmRLC_GPM_GENERAL_4                                                     0x3127
1312*fb4d8502Sjsg #define mmRLC_GPM_GENERAL_5                                                     0x3128
1313*fb4d8502Sjsg #define mmRLC_GPM_GENERAL_6                                                     0x3129
1314*fb4d8502Sjsg #define mmRLC_GPM_GENERAL_7                                                     0x312a
1315*fb4d8502Sjsg #define mmRLC_GPM_CU_PD_TIMEOUT                                                 0x312b
1316*fb4d8502Sjsg #define mmRLC_GPM_SCRATCH_ADDR                                                  0x312c
1317*fb4d8502Sjsg #define mmRLC_GPM_SCRATCH_DATA                                                  0x312d
1318*fb4d8502Sjsg #define mmRLC_STATIC_PG_STATUS                                                  0x312e
1319*fb4d8502Sjsg #define mmRLC_GPM_PERF_COUNT_0                                                  0x312f
1320*fb4d8502Sjsg #define mmRLC_GPM_PERF_COUNT_1                                                  0x3130
1321*fb4d8502Sjsg #define mmRLC_GPR_REG1                                                          0x3139
1322*fb4d8502Sjsg #define mmRLC_GPR_REG2                                                          0x313a
1323*fb4d8502Sjsg #define mmRLC_SPM_VMID                                                          0x3131
1324*fb4d8502Sjsg #define mmRLC_SPM_INT_CNTL                                                      0x3132
1325*fb4d8502Sjsg #define mmRLC_SPM_INT_STATUS                                                    0x3133
1326*fb4d8502Sjsg #define mmRLC_SPM_DEBUG_SELECT                                                  0x3134
1327*fb4d8502Sjsg #define mmRLC_SPM_DEBUG                                                         0x3135
1328*fb4d8502Sjsg #define mmRLC_GPM_LOG_ADDR                                                      0x3136
1329*fb4d8502Sjsg #define mmRLC_GPM_LOG_SIZE                                                      0x3137
1330*fb4d8502Sjsg #define mmRLC_GPM_LOG_CONT                                                      0x3138
1331*fb4d8502Sjsg #define mmRLC_SPM_PERFMON_CNTL                                                  0xdc80
1332*fb4d8502Sjsg #define mmRLC_SPM_PERFMON_RING_BASE_LO                                          0xdc81
1333*fb4d8502Sjsg #define mmRLC_SPM_PERFMON_RING_BASE_HI                                          0xdc82
1334*fb4d8502Sjsg #define mmRLC_SPM_PERFMON_RING_SIZE                                             0xdc83
1335*fb4d8502Sjsg #define mmRLC_SPM_PERFMON_SEGMENT_SIZE                                          0xdc84
1336*fb4d8502Sjsg #define mmRLC_SPM_SE_MUXSEL_ADDR                                                0xdc85
1337*fb4d8502Sjsg #define mmRLC_SPM_SE_MUXSEL_DATA                                                0xdc86
1338*fb4d8502Sjsg #define mmRLC_SPM_CPG_PERFMON_SAMPLE_DELAY                                      0xdc87
1339*fb4d8502Sjsg #define mmRLC_SPM_CPC_PERFMON_SAMPLE_DELAY                                      0xdc88
1340*fb4d8502Sjsg #define mmRLC_SPM_CPF_PERFMON_SAMPLE_DELAY                                      0xdc89
1341*fb4d8502Sjsg #define mmRLC_SPM_CB_PERFMON_SAMPLE_DELAY                                       0xdc8a
1342*fb4d8502Sjsg #define mmRLC_SPM_DB_PERFMON_SAMPLE_DELAY                                       0xdc8b
1343*fb4d8502Sjsg #define mmRLC_SPM_PA_PERFMON_SAMPLE_DELAY                                       0xdc8c
1344*fb4d8502Sjsg #define mmRLC_SPM_GDS_PERFMON_SAMPLE_DELAY                                      0xdc8d
1345*fb4d8502Sjsg #define mmRLC_SPM_IA_PERFMON_SAMPLE_DELAY                                       0xdc8e
1346*fb4d8502Sjsg #define mmRLC_SPM_SC_PERFMON_SAMPLE_DELAY                                       0xdc90
1347*fb4d8502Sjsg #define mmRLC_SPM_TCC_PERFMON_SAMPLE_DELAY                                      0xdc91
1348*fb4d8502Sjsg #define mmRLC_SPM_TCA_PERFMON_SAMPLE_DELAY                                      0xdc92
1349*fb4d8502Sjsg #define mmRLC_SPM_TCP_PERFMON_SAMPLE_DELAY                                      0xdc93
1350*fb4d8502Sjsg #define mmRLC_SPM_TA_PERFMON_SAMPLE_DELAY                                       0xdc94
1351*fb4d8502Sjsg #define mmRLC_SPM_TD_PERFMON_SAMPLE_DELAY                                       0xdc95
1352*fb4d8502Sjsg #define mmRLC_SPM_VGT_PERFMON_SAMPLE_DELAY                                      0xdc96
1353*fb4d8502Sjsg #define mmRLC_SPM_SPI_PERFMON_SAMPLE_DELAY                                      0xdc97
1354*fb4d8502Sjsg #define mmRLC_SPM_SQG_PERFMON_SAMPLE_DELAY                                      0xdc98
1355*fb4d8502Sjsg #define mmRLC_SPM_TCS_PERFMON_SAMPLE_DELAY                                      0xdc99
1356*fb4d8502Sjsg #define mmRLC_SPM_SX_PERFMON_SAMPLE_DELAY                                       0xdc9a
1357*fb4d8502Sjsg #define mmRLC_SPM_GLOBAL_MUXSEL_ADDR                                            0xdc9b
1358*fb4d8502Sjsg #define mmRLC_SPM_GLOBAL_MUXSEL_DATA                                            0xdc9c
1359*fb4d8502Sjsg #define mmRLC_SPM_RING_RDPTR                                                    0xdc9d
1360*fb4d8502Sjsg #define mmRLC_SPM_SEGMENT_THRESHOLD                                             0xdc9e
1361*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_0                                                   0xa191
1362*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_1                                                   0xa192
1363*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_2                                                   0xa193
1364*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_3                                                   0xa194
1365*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_4                                                   0xa195
1366*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_5                                                   0xa196
1367*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_6                                                   0xa197
1368*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_7                                                   0xa198
1369*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_8                                                   0xa199
1370*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_9                                                   0xa19a
1371*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_10                                                  0xa19b
1372*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_11                                                  0xa19c
1373*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_12                                                  0xa19d
1374*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_13                                                  0xa19e
1375*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_14                                                  0xa19f
1376*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_15                                                  0xa1a0
1377*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_16                                                  0xa1a1
1378*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_17                                                  0xa1a2
1379*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_18                                                  0xa1a3
1380*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_19                                                  0xa1a4
1381*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_20                                                  0xa1a5
1382*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_21                                                  0xa1a6
1383*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_22                                                  0xa1a7
1384*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_23                                                  0xa1a8
1385*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_24                                                  0xa1a9
1386*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_25                                                  0xa1aa
1387*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_26                                                  0xa1ab
1388*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_27                                                  0xa1ac
1389*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_28                                                  0xa1ad
1390*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_29                                                  0xa1ae
1391*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_30                                                  0xa1af
1392*fb4d8502Sjsg #define mmSPI_PS_INPUT_CNTL_31                                                  0xa1b0
1393*fb4d8502Sjsg #define mmSPI_VS_OUT_CONFIG                                                     0xa1b1
1394*fb4d8502Sjsg #define mmSPI_PS_INPUT_ENA                                                      0xa1b3
1395*fb4d8502Sjsg #define mmSPI_PS_INPUT_ADDR                                                     0xa1b4
1396*fb4d8502Sjsg #define mmSPI_INTERP_CONTROL_0                                                  0xa1b5
1397*fb4d8502Sjsg #define mmSPI_PS_IN_CONTROL                                                     0xa1b6
1398*fb4d8502Sjsg #define mmSPI_BARYC_CNTL                                                        0xa1b8
1399*fb4d8502Sjsg #define mmSPI_TMPRING_SIZE                                                      0xa1ba
1400*fb4d8502Sjsg #define mmSPI_SHADER_POS_FORMAT                                                 0xa1c3
1401*fb4d8502Sjsg #define mmSPI_SHADER_Z_FORMAT                                                   0xa1c4
1402*fb4d8502Sjsg #define mmSPI_SHADER_COL_FORMAT                                                 0xa1c5
1403*fb4d8502Sjsg #define mmSPI_ARB_PRIORITY                                                      0x31c0
1404*fb4d8502Sjsg #define mmSPI_ARB_CYCLES_0                                                      0x31c1
1405*fb4d8502Sjsg #define mmSPI_ARB_CYCLES_1                                                      0x31c2
1406*fb4d8502Sjsg #define mmSPI_CDBG_SYS_GFX                                                      0x31c3
1407*fb4d8502Sjsg #define mmSPI_CDBG_SYS_HP3D                                                     0x31c4
1408*fb4d8502Sjsg #define mmSPI_CDBG_SYS_CS0                                                      0x31c5
1409*fb4d8502Sjsg #define mmSPI_CDBG_SYS_CS1                                                      0x31c6
1410*fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_GFX                                              0x31c7
1411*fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_HP3D                                             0x31c8
1412*fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS0                                              0x31c9
1413*fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS1                                              0x31ca
1414*fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS2                                              0x31cb
1415*fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS3                                              0x31cc
1416*fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS4                                              0x31cd
1417*fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS5                                              0x31ce
1418*fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS6                                              0x31cf
1419*fb4d8502Sjsg #define mmSPI_WCL_PIPE_PERCENT_CS7                                              0x31d0
1420*fb4d8502Sjsg #define mmSPI_GDBG_WAVE_CNTL                                                    0x31d1
1421*fb4d8502Sjsg #define mmSPI_GDBG_TRAP_CONFIG                                                  0x31d2
1422*fb4d8502Sjsg #define mmSPI_GDBG_TRAP_MASK                                                    0x31d3
1423*fb4d8502Sjsg #define mmSPI_GDBG_TBA_LO                                                       0x31d4
1424*fb4d8502Sjsg #define mmSPI_GDBG_TBA_HI                                                       0x31d5
1425*fb4d8502Sjsg #define mmSPI_GDBG_TMA_LO                                                       0x31d6
1426*fb4d8502Sjsg #define mmSPI_GDBG_TMA_HI                                                       0x31d7
1427*fb4d8502Sjsg #define mmSPI_GDBG_TRAP_DATA0                                                   0x31d8
1428*fb4d8502Sjsg #define mmSPI_GDBG_TRAP_DATA1                                                   0x31d9
1429*fb4d8502Sjsg #define mmSPI_RESET_DEBUG                                                       0x31da
1430*fb4d8502Sjsg #define mmSPI_COMPUTE_QUEUE_RESET                                               0x31db
1431*fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_0                                             0x31dc
1432*fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_1                                             0x31dd
1433*fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_2                                             0x31de
1434*fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_3                                             0x31df
1435*fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_4                                             0x31e0
1436*fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_5                                             0x31e1
1437*fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_6                                             0x31e2
1438*fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_7                                             0x31e3
1439*fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_8                                             0x31e4
1440*fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_CU_9                                             0x31e5
1441*fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_0                                          0x31e6
1442*fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_1                                          0x31e7
1443*fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_2                                          0x31e8
1444*fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_3                                          0x31e9
1445*fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_4                                          0x31ea
1446*fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_5                                          0x31eb
1447*fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_6                                          0x31ec
1448*fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_7                                          0x31ed
1449*fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_8                                          0x31ee
1450*fb4d8502Sjsg #define mmSPI_RESOURCE_RESERVE_EN_CU_9                                          0x31ef
1451*fb4d8502Sjsg #define mmSPI_PS_MAX_WAVE_ID                                                    0x243a
1452*fb4d8502Sjsg #define mmSPI_CONFIG_CNTL                                                       0x2440
1453*fb4d8502Sjsg #define mmSPI_DEBUG_CNTL                                                        0x2441
1454*fb4d8502Sjsg #define mmSPI_DEBUG_READ                                                        0x2442
1455*fb4d8502Sjsg #define mmSPI_PERFCOUNTER0_SELECT                                               0xd980
1456*fb4d8502Sjsg #define mmSPI_PERFCOUNTER1_SELECT                                               0xd981
1457*fb4d8502Sjsg #define mmSPI_PERFCOUNTER2_SELECT                                               0xd982
1458*fb4d8502Sjsg #define mmSPI_PERFCOUNTER3_SELECT                                               0xd983
1459*fb4d8502Sjsg #define mmSPI_PERFCOUNTER0_SELECT1                                              0xd984
1460*fb4d8502Sjsg #define mmSPI_PERFCOUNTER1_SELECT1                                              0xd985
1461*fb4d8502Sjsg #define mmSPI_PERFCOUNTER2_SELECT1                                              0xd986
1462*fb4d8502Sjsg #define mmSPI_PERFCOUNTER3_SELECT1                                              0xd987
1463*fb4d8502Sjsg #define mmSPI_PERFCOUNTER4_SELECT                                               0xd988
1464*fb4d8502Sjsg #define mmSPI_PERFCOUNTER5_SELECT                                               0xd989
1465*fb4d8502Sjsg #define mmSPI_PERFCOUNTER_BINS                                                  0xd98a
1466*fb4d8502Sjsg #define mmSPI_PERFCOUNTER0_HI                                                   0xd180
1467*fb4d8502Sjsg #define mmSPI_PERFCOUNTER0_LO                                                   0xd181
1468*fb4d8502Sjsg #define mmSPI_PERFCOUNTER1_HI                                                   0xd182
1469*fb4d8502Sjsg #define mmSPI_PERFCOUNTER1_LO                                                   0xd183
1470*fb4d8502Sjsg #define mmSPI_PERFCOUNTER2_HI                                                   0xd184
1471*fb4d8502Sjsg #define mmSPI_PERFCOUNTER2_LO                                                   0xd185
1472*fb4d8502Sjsg #define mmSPI_PERFCOUNTER3_HI                                                   0xd186
1473*fb4d8502Sjsg #define mmSPI_PERFCOUNTER3_LO                                                   0xd187
1474*fb4d8502Sjsg #define mmSPI_PERFCOUNTER4_HI                                                   0xd188
1475*fb4d8502Sjsg #define mmSPI_PERFCOUNTER4_LO                                                   0xd189
1476*fb4d8502Sjsg #define mmSPI_PERFCOUNTER5_HI                                                   0xd18a
1477*fb4d8502Sjsg #define mmSPI_PERFCOUNTER5_LO                                                   0xd18b
1478*fb4d8502Sjsg #define mmSPI_CONFIG_CNTL_1                                                     0x244f
1479*fb4d8502Sjsg #define mmSPI_DEBUG_BUSY                                                        0x2450
1480*fb4d8502Sjsg #define mmCGTS_SM_CTRL_REG                                                      0xf000
1481*fb4d8502Sjsg #define mmCGTS_RD_CTRL_REG                                                      0xf001
1482*fb4d8502Sjsg #define mmCGTS_RD_REG                                                           0xf002
1483*fb4d8502Sjsg #define mmCGTS_TCC_DISABLE                                                      0xf003
1484*fb4d8502Sjsg #define mmCGTS_USER_TCC_DISABLE                                                 0xf004
1485*fb4d8502Sjsg #define mmCGTS_CU0_SP0_CTRL_REG                                                 0xf008
1486*fb4d8502Sjsg #define mmCGTS_CU0_LDS_SQ_CTRL_REG                                              0xf009
1487*fb4d8502Sjsg #define mmCGTS_CU0_TA_SQC_CTRL_REG                                              0xf00a
1488*fb4d8502Sjsg #define mmCGTS_CU0_SP1_CTRL_REG                                                 0xf00b
1489*fb4d8502Sjsg #define mmCGTS_CU0_TD_TCP_CTRL_REG                                              0xf00c
1490*fb4d8502Sjsg #define mmCGTS_CU1_SP0_CTRL_REG                                                 0xf00d
1491*fb4d8502Sjsg #define mmCGTS_CU1_LDS_SQ_CTRL_REG                                              0xf00e
1492*fb4d8502Sjsg #define mmCGTS_CU1_TA_CTRL_REG                                                  0xf00f
1493*fb4d8502Sjsg #define mmCGTS_CU1_SP1_CTRL_REG                                                 0xf010
1494*fb4d8502Sjsg #define mmCGTS_CU1_TD_TCP_CTRL_REG                                              0xf011
1495*fb4d8502Sjsg #define mmCGTS_CU2_SP0_CTRL_REG                                                 0xf012
1496*fb4d8502Sjsg #define mmCGTS_CU2_LDS_SQ_CTRL_REG                                              0xf013
1497*fb4d8502Sjsg #define mmCGTS_CU2_TA_CTRL_REG                                                  0xf014
1498*fb4d8502Sjsg #define mmCGTS_CU2_SP1_CTRL_REG                                                 0xf015
1499*fb4d8502Sjsg #define mmCGTS_CU2_TD_TCP_CTRL_REG                                              0xf016
1500*fb4d8502Sjsg #define mmCGTS_CU3_SP0_CTRL_REG                                                 0xf017
1501*fb4d8502Sjsg #define mmCGTS_CU3_LDS_SQ_CTRL_REG                                              0xf018
1502*fb4d8502Sjsg #define mmCGTS_CU3_TA_CTRL_REG                                                  0xf019
1503*fb4d8502Sjsg #define mmCGTS_CU3_SP1_CTRL_REG                                                 0xf01a
1504*fb4d8502Sjsg #define mmCGTS_CU3_TD_TCP_CTRL_REG                                              0xf01b
1505*fb4d8502Sjsg #define mmCGTS_CU4_SP0_CTRL_REG                                                 0xf01c
1506*fb4d8502Sjsg #define mmCGTS_CU4_LDS_SQ_CTRL_REG                                              0xf01d
1507*fb4d8502Sjsg #define mmCGTS_CU4_TA_SQC_CTRL_REG                                              0xf01e
1508*fb4d8502Sjsg #define mmCGTS_CU4_SP1_CTRL_REG                                                 0xf01f
1509*fb4d8502Sjsg #define mmCGTS_CU4_TD_TCP_CTRL_REG                                              0xf020
1510*fb4d8502Sjsg #define mmCGTS_CU5_SP0_CTRL_REG                                                 0xf021
1511*fb4d8502Sjsg #define mmCGTS_CU5_LDS_SQ_CTRL_REG                                              0xf022
1512*fb4d8502Sjsg #define mmCGTS_CU5_TA_CTRL_REG                                                  0xf023
1513*fb4d8502Sjsg #define mmCGTS_CU5_SP1_CTRL_REG                                                 0xf024
1514*fb4d8502Sjsg #define mmCGTS_CU5_TD_TCP_CTRL_REG                                              0xf025
1515*fb4d8502Sjsg #define mmCGTS_CU6_SP0_CTRL_REG                                                 0xf026
1516*fb4d8502Sjsg #define mmCGTS_CU6_LDS_SQ_CTRL_REG                                              0xf027
1517*fb4d8502Sjsg #define mmCGTS_CU6_TA_CTRL_REG                                                  0xf028
1518*fb4d8502Sjsg #define mmCGTS_CU6_SP1_CTRL_REG                                                 0xf029
1519*fb4d8502Sjsg #define mmCGTS_CU6_TD_TCP_CTRL_REG                                              0xf02a
1520*fb4d8502Sjsg #define mmCGTS_CU7_SP0_CTRL_REG                                                 0xf02b
1521*fb4d8502Sjsg #define mmCGTS_CU7_LDS_SQ_CTRL_REG                                              0xf02c
1522*fb4d8502Sjsg #define mmCGTS_CU7_TA_CTRL_REG                                                  0xf02d
1523*fb4d8502Sjsg #define mmCGTS_CU7_SP1_CTRL_REG                                                 0xf02e
1524*fb4d8502Sjsg #define mmCGTS_CU7_TD_TCP_CTRL_REG                                              0xf02f
1525*fb4d8502Sjsg #define mmCGTS_CU8_SP0_CTRL_REG                                                 0xf030
1526*fb4d8502Sjsg #define mmCGTS_CU8_LDS_SQ_CTRL_REG                                              0xf031
1527*fb4d8502Sjsg #define mmCGTS_CU8_TA_SQC_CTRL_REG                                              0xf032
1528*fb4d8502Sjsg #define mmCGTS_CU8_SP1_CTRL_REG                                                 0xf033
1529*fb4d8502Sjsg #define mmCGTS_CU8_TD_TCP_CTRL_REG                                              0xf034
1530*fb4d8502Sjsg #define mmCGTS_CU9_SP0_CTRL_REG                                                 0xf035
1531*fb4d8502Sjsg #define mmCGTS_CU9_LDS_SQ_CTRL_REG                                              0xf036
1532*fb4d8502Sjsg #define mmCGTS_CU9_TA_CTRL_REG                                                  0xf037
1533*fb4d8502Sjsg #define mmCGTS_CU9_SP1_CTRL_REG                                                 0xf038
1534*fb4d8502Sjsg #define mmCGTS_CU9_TD_TCP_CTRL_REG                                              0xf039
1535*fb4d8502Sjsg #define mmCGTS_CU10_SP0_CTRL_REG                                                0xf03a
1536*fb4d8502Sjsg #define mmCGTS_CU10_LDS_SQ_CTRL_REG                                             0xf03b
1537*fb4d8502Sjsg #define mmCGTS_CU10_TA_CTRL_REG                                                 0xf03c
1538*fb4d8502Sjsg #define mmCGTS_CU10_SP1_CTRL_REG                                                0xf03d
1539*fb4d8502Sjsg #define mmCGTS_CU10_TD_TCP_CTRL_REG                                             0xf03e
1540*fb4d8502Sjsg #define mmCGTS_CU11_SP0_CTRL_REG                                                0xf03f
1541*fb4d8502Sjsg #define mmCGTS_CU11_LDS_SQ_CTRL_REG                                             0xf040
1542*fb4d8502Sjsg #define mmCGTS_CU11_TA_CTRL_REG                                                 0xf041
1543*fb4d8502Sjsg #define mmCGTS_CU11_SP1_CTRL_REG                                                0xf042
1544*fb4d8502Sjsg #define mmCGTS_CU11_TD_TCP_CTRL_REG                                             0xf043
1545*fb4d8502Sjsg #define mmCGTS_CU12_SP0_CTRL_REG                                                0xf044
1546*fb4d8502Sjsg #define mmCGTS_CU12_LDS_SQ_CTRL_REG                                             0xf045
1547*fb4d8502Sjsg #define mmCGTS_CU12_TA_SQC_CTRL_REG                                             0xf046
1548*fb4d8502Sjsg #define mmCGTS_CU12_SP1_CTRL_REG                                                0xf047
1549*fb4d8502Sjsg #define mmCGTS_CU12_TD_TCP_CTRL_REG                                             0xf048
1550*fb4d8502Sjsg #define mmCGTS_CU13_SP0_CTRL_REG                                                0xf049
1551*fb4d8502Sjsg #define mmCGTS_CU13_LDS_SQ_CTRL_REG                                             0xf04a
1552*fb4d8502Sjsg #define mmCGTS_CU13_TA_CTRL_REG                                                 0xf04b
1553*fb4d8502Sjsg #define mmCGTS_CU13_SP1_CTRL_REG                                                0xf04c
1554*fb4d8502Sjsg #define mmCGTS_CU13_TD_TCP_CTRL_REG                                             0xf04d
1555*fb4d8502Sjsg #define mmCGTS_CU14_SP0_CTRL_REG                                                0xf04e
1556*fb4d8502Sjsg #define mmCGTS_CU14_LDS_SQ_CTRL_REG                                             0xf04f
1557*fb4d8502Sjsg #define mmCGTS_CU14_TA_CTRL_REG                                                 0xf050
1558*fb4d8502Sjsg #define mmCGTS_CU14_SP1_CTRL_REG                                                0xf051
1559*fb4d8502Sjsg #define mmCGTS_CU14_TD_TCP_CTRL_REG                                             0xf052
1560*fb4d8502Sjsg #define mmCGTS_CU15_SP0_CTRL_REG                                                0xf053
1561*fb4d8502Sjsg #define mmCGTS_CU15_LDS_SQ_CTRL_REG                                             0xf054
1562*fb4d8502Sjsg #define mmCGTS_CU15_TA_CTRL_REG                                                 0xf055
1563*fb4d8502Sjsg #define mmCGTS_CU15_SP1_CTRL_REG                                                0xf056
1564*fb4d8502Sjsg #define mmCGTS_CU15_TD_TCP_CTRL_REG                                             0xf057
1565*fb4d8502Sjsg #define mmCGTT_SPI_CLK_CTRL                                                     0xf080
1566*fb4d8502Sjsg #define mmCGTT_PC_CLK_CTRL                                                      0xf081
1567*fb4d8502Sjsg #define mmCGTT_BCI_CLK_CTRL                                                     0xf082
1568*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_CNTL                                                  0x24aa
1569*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_0                                               0x24ab
1570*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_1                                               0x24ac
1571*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_2                                               0x24ad
1572*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_3                                               0x24ae
1573*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_4                                               0x24af
1574*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_5                                               0x24b0
1575*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_6                                               0x24b1
1576*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_7                                               0x24b2
1577*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_8                                               0x24b3
1578*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_LIMIT_9                                               0x24b4
1579*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_0                                              0x24b5
1580*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_1                                              0x24b6
1581*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_2                                              0x24b7
1582*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_3                                              0x24b8
1583*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_4                                              0x24b9
1584*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_5                                              0x24ba
1585*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_6                                              0x24bb
1586*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_7                                              0x24bc
1587*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_8                                              0x24bd
1588*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_9                                              0x24be
1589*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_10                                             0x24bf
1590*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_11                                             0x24c0
1591*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_12                                             0x24c1
1592*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_13                                             0x24c2
1593*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_14                                             0x24c3
1594*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_15                                             0x24c4
1595*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_16                                             0x24c5
1596*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_17                                             0x24c6
1597*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_18                                             0x24c7
1598*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_19                                             0x24c8
1599*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_STATUS_20                                             0x24c9
1600*fb4d8502Sjsg #define mmSPI_WF_LIFETIME_DEBUG                                                 0x24ca
1601*fb4d8502Sjsg #define mmSPI_SLAVE_DEBUG_BUSY                                                  0x24d3
1602*fb4d8502Sjsg #define mmSPI_LB_CTR_CTRL                                                       0x24d4
1603*fb4d8502Sjsg #define mmSPI_LB_CU_MASK                                                        0x24d5
1604*fb4d8502Sjsg #define mmSPI_LB_DATA_REG                                                       0x24d6
1605*fb4d8502Sjsg #define mmSPI_PG_ENABLE_STATIC_CU_MASK                                          0x24d7
1606*fb4d8502Sjsg #define mmSPI_GDS_CREDITS                                                       0x24d8
1607*fb4d8502Sjsg #define mmSPI_SX_EXPORT_BUFFER_SIZES                                            0x24d9
1608*fb4d8502Sjsg #define mmSPI_SX_SCOREBOARD_BUFFER_SIZES                                        0x24da
1609*fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_STATUS                                              0x24db
1610*fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_0                                             0x24dc
1611*fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_1                                             0x24dd
1612*fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_2                                             0x24de
1613*fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_3                                             0x24df
1614*fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_4                                             0x24e0
1615*fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_5                                             0x24e1
1616*fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_6                                             0x24e2
1617*fb4d8502Sjsg #define mmSPI_CSQ_WF_ACTIVE_COUNT_7                                             0x24e3
1618*fb4d8502Sjsg #define mmBCI_DEBUG_READ                                                        0x24eb
1619*fb4d8502Sjsg #define mmSPI_P0_TRAP_SCREEN_PSBA_LO                                            0x24ec
1620*fb4d8502Sjsg #define mmSPI_P0_TRAP_SCREEN_PSBA_HI                                            0x24ed
1621*fb4d8502Sjsg #define mmSPI_P0_TRAP_SCREEN_PSMA_LO                                            0x24ee
1622*fb4d8502Sjsg #define mmSPI_P0_TRAP_SCREEN_PSMA_HI                                            0x24ef
1623*fb4d8502Sjsg #define mmSPI_P0_TRAP_SCREEN_GPR_MIN                                            0x24f0
1624*fb4d8502Sjsg #define mmSPI_P1_TRAP_SCREEN_PSBA_LO                                            0x24f1
1625*fb4d8502Sjsg #define mmSPI_P1_TRAP_SCREEN_PSBA_HI                                            0x24f2
1626*fb4d8502Sjsg #define mmSPI_P1_TRAP_SCREEN_PSMA_LO                                            0x24f3
1627*fb4d8502Sjsg #define mmSPI_P1_TRAP_SCREEN_PSMA_HI                                            0x24f4
1628*fb4d8502Sjsg #define mmSPI_P1_TRAP_SCREEN_GPR_MIN                                            0x24f5
1629*fb4d8502Sjsg #define mmSPI_SHADER_TBA_LO_PS                                                  0x2c00
1630*fb4d8502Sjsg #define mmSPI_SHADER_TBA_HI_PS                                                  0x2c01
1631*fb4d8502Sjsg #define mmSPI_SHADER_TMA_LO_PS                                                  0x2c02
1632*fb4d8502Sjsg #define mmSPI_SHADER_TMA_HI_PS                                                  0x2c03
1633*fb4d8502Sjsg #define mmSPI_SHADER_PGM_LO_PS                                                  0x2c08
1634*fb4d8502Sjsg #define mmSPI_SHADER_PGM_HI_PS                                                  0x2c09
1635*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC1_PS                                               0x2c0a
1636*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC2_PS                                               0x2c0b
1637*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC3_PS                                               0x2c07
1638*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_0                                             0x2c0c
1639*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_1                                             0x2c0d
1640*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_2                                             0x2c0e
1641*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_3                                             0x2c0f
1642*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_4                                             0x2c10
1643*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_5                                             0x2c11
1644*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_6                                             0x2c12
1645*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_7                                             0x2c13
1646*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_8                                             0x2c14
1647*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_9                                             0x2c15
1648*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_10                                            0x2c16
1649*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_11                                            0x2c17
1650*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_12                                            0x2c18
1651*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_13                                            0x2c19
1652*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_14                                            0x2c1a
1653*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_PS_15                                            0x2c1b
1654*fb4d8502Sjsg #define mmSPI_SHADER_TBA_LO_VS                                                  0x2c40
1655*fb4d8502Sjsg #define mmSPI_SHADER_TBA_HI_VS                                                  0x2c41
1656*fb4d8502Sjsg #define mmSPI_SHADER_TMA_LO_VS                                                  0x2c42
1657*fb4d8502Sjsg #define mmSPI_SHADER_TMA_HI_VS                                                  0x2c43
1658*fb4d8502Sjsg #define mmSPI_SHADER_PGM_LO_VS                                                  0x2c48
1659*fb4d8502Sjsg #define mmSPI_SHADER_PGM_HI_VS                                                  0x2c49
1660*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC1_VS                                               0x2c4a
1661*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC2_VS                                               0x2c4b
1662*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC3_VS                                               0x2c46
1663*fb4d8502Sjsg #define mmSPI_SHADER_LATE_ALLOC_VS                                              0x2c47
1664*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_0                                             0x2c4c
1665*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_1                                             0x2c4d
1666*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_2                                             0x2c4e
1667*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_3                                             0x2c4f
1668*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_4                                             0x2c50
1669*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_5                                             0x2c51
1670*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_6                                             0x2c52
1671*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_7                                             0x2c53
1672*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_8                                             0x2c54
1673*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_9                                             0x2c55
1674*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_10                                            0x2c56
1675*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_11                                            0x2c57
1676*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_12                                            0x2c58
1677*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_13                                            0x2c59
1678*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_14                                            0x2c5a
1679*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_VS_15                                            0x2c5b
1680*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC2_ES_VS                                            0x2c7c
1681*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC2_LS_VS                                            0x2c7d
1682*fb4d8502Sjsg #define mmSPI_SHADER_TBA_LO_GS                                                  0x2c80
1683*fb4d8502Sjsg #define mmSPI_SHADER_TBA_HI_GS                                                  0x2c81
1684*fb4d8502Sjsg #define mmSPI_SHADER_TMA_LO_GS                                                  0x2c82
1685*fb4d8502Sjsg #define mmSPI_SHADER_TMA_HI_GS                                                  0x2c83
1686*fb4d8502Sjsg #define mmSPI_SHADER_PGM_LO_GS                                                  0x2c88
1687*fb4d8502Sjsg #define mmSPI_SHADER_PGM_HI_GS                                                  0x2c89
1688*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC1_GS                                               0x2c8a
1689*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC2_GS                                               0x2c8b
1690*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC3_GS                                               0x2c87
1691*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_GS_0                                             0x2c8c
1692*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_GS_1                                             0x2c8d
1693*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_GS_2                                             0x2c8e
1694*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_GS_3                                             0x2c8f
1695*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_GS_4                                             0x2c90
1696*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_GS_5                                             0x2c91
1697*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_GS_6                                             0x2c92
1698*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_GS_7                                             0x2c93
1699*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_GS_8                                             0x2c94
1700*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_GS_9                                             0x2c95
1701*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_GS_10                                            0x2c96
1702*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_GS_11                                            0x2c97
1703*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_GS_12                                            0x2c98
1704*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_GS_13                                            0x2c99
1705*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_GS_14                                            0x2c9a
1706*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_GS_15                                            0x2c9b
1707*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC2_ES_GS                                            0x2cbc
1708*fb4d8502Sjsg #define mmSPI_SHADER_TBA_LO_ES                                                  0x2cc0
1709*fb4d8502Sjsg #define mmSPI_SHADER_TBA_HI_ES                                                  0x2cc1
1710*fb4d8502Sjsg #define mmSPI_SHADER_TMA_LO_ES                                                  0x2cc2
1711*fb4d8502Sjsg #define mmSPI_SHADER_TMA_HI_ES                                                  0x2cc3
1712*fb4d8502Sjsg #define mmSPI_SHADER_PGM_LO_ES                                                  0x2cc8
1713*fb4d8502Sjsg #define mmSPI_SHADER_PGM_HI_ES                                                  0x2cc9
1714*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC1_ES                                               0x2cca
1715*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC2_ES                                               0x2ccb
1716*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC3_ES                                               0x2cc7
1717*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_0                                             0x2ccc
1718*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_1                                             0x2ccd
1719*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_2                                             0x2cce
1720*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_3                                             0x2ccf
1721*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_4                                             0x2cd0
1722*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_5                                             0x2cd1
1723*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_6                                             0x2cd2
1724*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_7                                             0x2cd3
1725*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_8                                             0x2cd4
1726*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_9                                             0x2cd5
1727*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_10                                            0x2cd6
1728*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_11                                            0x2cd7
1729*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_12                                            0x2cd8
1730*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_13                                            0x2cd9
1731*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_14                                            0x2cda
1732*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_ES_15                                            0x2cdb
1733*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC2_LS_ES                                            0x2cfd
1734*fb4d8502Sjsg #define mmSPI_SHADER_TBA_LO_HS                                                  0x2d00
1735*fb4d8502Sjsg #define mmSPI_SHADER_TBA_HI_HS                                                  0x2d01
1736*fb4d8502Sjsg #define mmSPI_SHADER_TMA_LO_HS                                                  0x2d02
1737*fb4d8502Sjsg #define mmSPI_SHADER_TMA_HI_HS                                                  0x2d03
1738*fb4d8502Sjsg #define mmSPI_SHADER_PGM_LO_HS                                                  0x2d08
1739*fb4d8502Sjsg #define mmSPI_SHADER_PGM_HI_HS                                                  0x2d09
1740*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC1_HS                                               0x2d0a
1741*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC2_HS                                               0x2d0b
1742*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC3_HS                                               0x2d07
1743*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_HS_0                                             0x2d0c
1744*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_HS_1                                             0x2d0d
1745*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_HS_2                                             0x2d0e
1746*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_HS_3                                             0x2d0f
1747*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_HS_4                                             0x2d10
1748*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_HS_5                                             0x2d11
1749*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_HS_6                                             0x2d12
1750*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_HS_7                                             0x2d13
1751*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_HS_8                                             0x2d14
1752*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_HS_9                                             0x2d15
1753*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_HS_10                                            0x2d16
1754*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_HS_11                                            0x2d17
1755*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_HS_12                                            0x2d18
1756*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_HS_13                                            0x2d19
1757*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_HS_14                                            0x2d1a
1758*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_HS_15                                            0x2d1b
1759*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC2_LS_HS                                            0x2d3d
1760*fb4d8502Sjsg #define mmSPI_SHADER_TBA_LO_LS                                                  0x2d40
1761*fb4d8502Sjsg #define mmSPI_SHADER_TBA_HI_LS                                                  0x2d41
1762*fb4d8502Sjsg #define mmSPI_SHADER_TMA_LO_LS                                                  0x2d42
1763*fb4d8502Sjsg #define mmSPI_SHADER_TMA_HI_LS                                                  0x2d43
1764*fb4d8502Sjsg #define mmSPI_SHADER_PGM_LO_LS                                                  0x2d48
1765*fb4d8502Sjsg #define mmSPI_SHADER_PGM_HI_LS                                                  0x2d49
1766*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC1_LS                                               0x2d4a
1767*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC2_LS                                               0x2d4b
1768*fb4d8502Sjsg #define mmSPI_SHADER_PGM_RSRC3_LS                                               0x2d47
1769*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_0                                             0x2d4c
1770*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_1                                             0x2d4d
1771*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_2                                             0x2d4e
1772*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_3                                             0x2d4f
1773*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_4                                             0x2d50
1774*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_5                                             0x2d51
1775*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_6                                             0x2d52
1776*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_7                                             0x2d53
1777*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_8                                             0x2d54
1778*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_9                                             0x2d55
1779*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_10                                            0x2d56
1780*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_11                                            0x2d57
1781*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_12                                            0x2d58
1782*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_13                                            0x2d59
1783*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_14                                            0x2d5a
1784*fb4d8502Sjsg #define mmSPI_SHADER_USER_DATA_LS_15                                            0x2d5b
1785*fb4d8502Sjsg #define mmSQ_CONFIG                                                             0x2300
1786*fb4d8502Sjsg #define mmSQC_CONFIG                                                            0x2301
1787*fb4d8502Sjsg #define mmSQC_CACHES                                                            0xc348
1788*fb4d8502Sjsg #define mmSQ_RANDOM_WAVE_PRI                                                    0x2303
1789*fb4d8502Sjsg #define mmSQ_REG_CREDITS                                                        0x2304
1790*fb4d8502Sjsg #define mmSQ_FIFO_SIZES                                                         0x2305
1791*fb4d8502Sjsg #define mmSQ_INTERRUPT_AUTO_MASK                                                0x2314
1792*fb4d8502Sjsg #define mmSQ_INTERRUPT_MSG_CTRL                                                 0x2315
1793*fb4d8502Sjsg #define mmSQ_PERFCOUNTER_CTRL                                                   0xd9e0
1794*fb4d8502Sjsg #define mmSQ_PERFCOUNTER_MASK                                                   0xd9e1
1795*fb4d8502Sjsg #define mmSQ_PERFCOUNTER_CTRL2                                                  0xd9e2
1796*fb4d8502Sjsg #define mmCC_SQC_BANK_DISABLE                                                   0x2307
1797*fb4d8502Sjsg #define mmUSER_SQC_BANK_DISABLE                                                 0x2308
1798*fb4d8502Sjsg #define mmSQ_PERFCOUNTER0_LO                                                    0xd1c0
1799*fb4d8502Sjsg #define mmSQ_PERFCOUNTER1_LO                                                    0xd1c2
1800*fb4d8502Sjsg #define mmSQ_PERFCOUNTER2_LO                                                    0xd1c4
1801*fb4d8502Sjsg #define mmSQ_PERFCOUNTER3_LO                                                    0xd1c6
1802*fb4d8502Sjsg #define mmSQ_PERFCOUNTER4_LO                                                    0xd1c8
1803*fb4d8502Sjsg #define mmSQ_PERFCOUNTER5_LO                                                    0xd1ca
1804*fb4d8502Sjsg #define mmSQ_PERFCOUNTER6_LO                                                    0xd1cc
1805*fb4d8502Sjsg #define mmSQ_PERFCOUNTER7_LO                                                    0xd1ce
1806*fb4d8502Sjsg #define mmSQ_PERFCOUNTER8_LO                                                    0xd1d0
1807*fb4d8502Sjsg #define mmSQ_PERFCOUNTER9_LO                                                    0xd1d2
1808*fb4d8502Sjsg #define mmSQ_PERFCOUNTER10_LO                                                   0xd1d4
1809*fb4d8502Sjsg #define mmSQ_PERFCOUNTER11_LO                                                   0xd1d6
1810*fb4d8502Sjsg #define mmSQ_PERFCOUNTER12_LO                                                   0xd1d8
1811*fb4d8502Sjsg #define mmSQ_PERFCOUNTER13_LO                                                   0xd1da
1812*fb4d8502Sjsg #define mmSQ_PERFCOUNTER14_LO                                                   0xd1dc
1813*fb4d8502Sjsg #define mmSQ_PERFCOUNTER15_LO                                                   0xd1de
1814*fb4d8502Sjsg #define mmSQ_PERFCOUNTER0_HI                                                    0xd1c1
1815*fb4d8502Sjsg #define mmSQ_PERFCOUNTER1_HI                                                    0xd1c3
1816*fb4d8502Sjsg #define mmSQ_PERFCOUNTER2_HI                                                    0xd1c5
1817*fb4d8502Sjsg #define mmSQ_PERFCOUNTER3_HI                                                    0xd1c7
1818*fb4d8502Sjsg #define mmSQ_PERFCOUNTER4_HI                                                    0xd1c9
1819*fb4d8502Sjsg #define mmSQ_PERFCOUNTER5_HI                                                    0xd1cb
1820*fb4d8502Sjsg #define mmSQ_PERFCOUNTER6_HI                                                    0xd1cd
1821*fb4d8502Sjsg #define mmSQ_PERFCOUNTER7_HI                                                    0xd1cf
1822*fb4d8502Sjsg #define mmSQ_PERFCOUNTER8_HI                                                    0xd1d1
1823*fb4d8502Sjsg #define mmSQ_PERFCOUNTER9_HI                                                    0xd1d3
1824*fb4d8502Sjsg #define mmSQ_PERFCOUNTER10_HI                                                   0xd1d5
1825*fb4d8502Sjsg #define mmSQ_PERFCOUNTER11_HI                                                   0xd1d7
1826*fb4d8502Sjsg #define mmSQ_PERFCOUNTER12_HI                                                   0xd1d9
1827*fb4d8502Sjsg #define mmSQ_PERFCOUNTER13_HI                                                   0xd1db
1828*fb4d8502Sjsg #define mmSQ_PERFCOUNTER14_HI                                                   0xd1dd
1829*fb4d8502Sjsg #define mmSQ_PERFCOUNTER15_HI                                                   0xd1df
1830*fb4d8502Sjsg #define mmSQ_PERFCOUNTER0_SELECT                                                0xd9c0
1831*fb4d8502Sjsg #define mmSQ_PERFCOUNTER1_SELECT                                                0xd9c1
1832*fb4d8502Sjsg #define mmSQ_PERFCOUNTER2_SELECT                                                0xd9c2
1833*fb4d8502Sjsg #define mmSQ_PERFCOUNTER3_SELECT                                                0xd9c3
1834*fb4d8502Sjsg #define mmSQ_PERFCOUNTER4_SELECT                                                0xd9c4
1835*fb4d8502Sjsg #define mmSQ_PERFCOUNTER5_SELECT                                                0xd9c5
1836*fb4d8502Sjsg #define mmSQ_PERFCOUNTER6_SELECT                                                0xd9c6
1837*fb4d8502Sjsg #define mmSQ_PERFCOUNTER7_SELECT                                                0xd9c7
1838*fb4d8502Sjsg #define mmSQ_PERFCOUNTER8_SELECT                                                0xd9c8
1839*fb4d8502Sjsg #define mmSQ_PERFCOUNTER9_SELECT                                                0xd9c9
1840*fb4d8502Sjsg #define mmSQ_PERFCOUNTER10_SELECT                                               0xd9ca
1841*fb4d8502Sjsg #define mmSQ_PERFCOUNTER11_SELECT                                               0xd9cb
1842*fb4d8502Sjsg #define mmSQ_PERFCOUNTER12_SELECT                                               0xd9cc
1843*fb4d8502Sjsg #define mmSQ_PERFCOUNTER13_SELECT                                               0xd9cd
1844*fb4d8502Sjsg #define mmSQ_PERFCOUNTER14_SELECT                                               0xd9ce
1845*fb4d8502Sjsg #define mmSQ_PERFCOUNTER15_SELECT                                               0xd9cf
1846*fb4d8502Sjsg #define mmCGTT_SQ_CLK_CTRL                                                      0xf08c
1847*fb4d8502Sjsg #define mmCGTT_SQG_CLK_CTRL                                                     0xf08d
1848*fb4d8502Sjsg #define mmSQ_ALU_CLK_CTRL                                                       0xf08e
1849*fb4d8502Sjsg #define mmSQ_TEX_CLK_CTRL                                                       0xf08f
1850*fb4d8502Sjsg #define mmSQ_LDS_CLK_CTRL                                                       0xf090
1851*fb4d8502Sjsg #define mmSQ_POWER_THROTTLE                                                     0xf091
1852*fb4d8502Sjsg #define mmSQ_POWER_THROTTLE2                                                    0xf092
1853*fb4d8502Sjsg #define mmSQ_TIME_HI                                                            0x237c
1854*fb4d8502Sjsg #define mmSQ_TIME_LO                                                            0x237d
1855*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_BASE                                                  0x2380
1856*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_BASE2                                                 0x2385
1857*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_SIZE                                                  0x2381
1858*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_MASK                                                  0x2382
1859*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_USERDATA_0                                            0xc340
1860*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_USERDATA_1                                            0xc341
1861*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_USERDATA_2                                            0xc342
1862*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_USERDATA_3                                            0xc343
1863*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_MODE                                                  0x238e
1864*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_CTRL                                                  0x238f
1865*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_TOKEN_MASK                                            0x2383
1866*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_TOKEN_MASK2                                           0x2386
1867*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_PERF_MASK                                             0x2384
1868*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WPTR                                                  0x238c
1869*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_STATUS                                                0x238d
1870*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_CNTR                                                  0x2390
1871*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_HIWATER                                               0x2392
1872*fb4d8502Sjsg #define mmSQ_LB_CTR_CTRL                                                        0x2398
1873*fb4d8502Sjsg #define mmSQ_LB_DATA_ALU_CYCLES                                                 0x2399
1874*fb4d8502Sjsg #define mmSQ_LB_DATA_TEX_CYCLES                                                 0x239a
1875*fb4d8502Sjsg #define mmSQ_LB_DATA_ALU_STALLS                                                 0x239b
1876*fb4d8502Sjsg #define mmSQ_LB_DATA_TEX_STALLS                                                 0x239c
1877*fb4d8502Sjsg #define mmSQC_SECDED_CNT                                                        0x23a0
1878*fb4d8502Sjsg #define mmSQ_SEC_CNT                                                            0x23a1
1879*fb4d8502Sjsg #define mmSQ_DED_CNT                                                            0x23a2
1880*fb4d8502Sjsg #define mmSQ_DED_INFO                                                           0x23a3
1881*fb4d8502Sjsg #define mmSQ_BUF_RSRC_WORD0                                                     0x23c0
1882*fb4d8502Sjsg #define mmSQ_BUF_RSRC_WORD1                                                     0x23c1
1883*fb4d8502Sjsg #define mmSQ_BUF_RSRC_WORD2                                                     0x23c2
1884*fb4d8502Sjsg #define mmSQ_BUF_RSRC_WORD3                                                     0x23c3
1885*fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD0                                                     0x23c4
1886*fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD1                                                     0x23c5
1887*fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD2                                                     0x23c6
1888*fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD3                                                     0x23c7
1889*fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD4                                                     0x23c8
1890*fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD5                                                     0x23c9
1891*fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD6                                                     0x23ca
1892*fb4d8502Sjsg #define mmSQ_IMG_RSRC_WORD7                                                     0x23cb
1893*fb4d8502Sjsg #define mmSQ_IMG_SAMP_WORD0                                                     0x23cc
1894*fb4d8502Sjsg #define mmSQ_IMG_SAMP_WORD1                                                     0x23cd
1895*fb4d8502Sjsg #define mmSQ_IMG_SAMP_WORD2                                                     0x23ce
1896*fb4d8502Sjsg #define mmSQ_IMG_SAMP_WORD3                                                     0x23cf
1897*fb4d8502Sjsg #define mmSQ_FLAT_SCRATCH_WORD0                                                 0x23d0
1898*fb4d8502Sjsg #define mmSQ_FLAT_SCRATCH_WORD1                                                 0x23d1
1899*fb4d8502Sjsg #define mmSQ_IND_INDEX                                                          0x2378
1900*fb4d8502Sjsg #define mmSQ_IND_CMD                                                            0x237a
1901*fb4d8502Sjsg #define mmSQ_CMD                                                                0x237b
1902*fb4d8502Sjsg #define mmSQ_IND_DATA                                                           0x2379
1903*fb4d8502Sjsg #define mmSQ_REG_TIMESTAMP                                                      0x2374
1904*fb4d8502Sjsg #define mmSQ_CMD_TIMESTAMP                                                      0x2375
1905*fb4d8502Sjsg #define mmSQ_HV_VMID_CTRL                                                       0xf840
1906*fb4d8502Sjsg #define ixSQ_WAVE_INST_DW0                                                      0x1a
1907*fb4d8502Sjsg #define ixSQ_WAVE_INST_DW1                                                      0x1b
1908*fb4d8502Sjsg #define ixSQ_WAVE_PC_LO                                                         0x18
1909*fb4d8502Sjsg #define ixSQ_WAVE_PC_HI                                                         0x19
1910*fb4d8502Sjsg #define ixSQ_WAVE_IB_DBG0                                                       0x1c
1911*fb4d8502Sjsg #define ixSQ_WAVE_EXEC_LO                                                       0x27e
1912*fb4d8502Sjsg #define ixSQ_WAVE_EXEC_HI                                                       0x27f
1913*fb4d8502Sjsg #define ixSQ_WAVE_STATUS                                                        0x12
1914*fb4d8502Sjsg #define ixSQ_WAVE_MODE                                                          0x11
1915*fb4d8502Sjsg #define ixSQ_WAVE_TRAPSTS                                                       0x13
1916*fb4d8502Sjsg #define ixSQ_WAVE_HW_ID                                                         0x14
1917*fb4d8502Sjsg #define ixSQ_WAVE_GPR_ALLOC                                                     0x15
1918*fb4d8502Sjsg #define ixSQ_WAVE_LDS_ALLOC                                                     0x16
1919*fb4d8502Sjsg #define ixSQ_WAVE_IB_STS                                                        0x17
1920*fb4d8502Sjsg #define ixSQ_WAVE_M0                                                            0x27c
1921*fb4d8502Sjsg #define ixSQ_WAVE_TBA_LO                                                        0x26c
1922*fb4d8502Sjsg #define ixSQ_WAVE_TBA_HI                                                        0x26d
1923*fb4d8502Sjsg #define ixSQ_WAVE_TMA_LO                                                        0x26e
1924*fb4d8502Sjsg #define ixSQ_WAVE_TMA_HI                                                        0x26f
1925*fb4d8502Sjsg #define ixSQ_WAVE_TTMP0                                                         0x270
1926*fb4d8502Sjsg #define ixSQ_WAVE_TTMP1                                                         0x271
1927*fb4d8502Sjsg #define ixSQ_WAVE_TTMP2                                                         0x272
1928*fb4d8502Sjsg #define ixSQ_WAVE_TTMP3                                                         0x273
1929*fb4d8502Sjsg #define ixSQ_WAVE_TTMP4                                                         0x274
1930*fb4d8502Sjsg #define ixSQ_WAVE_TTMP5                                                         0x275
1931*fb4d8502Sjsg #define ixSQ_WAVE_TTMP6                                                         0x276
1932*fb4d8502Sjsg #define ixSQ_WAVE_TTMP7                                                         0x277
1933*fb4d8502Sjsg #define ixSQ_WAVE_TTMP8                                                         0x278
1934*fb4d8502Sjsg #define ixSQ_WAVE_TTMP9                                                         0x279
1935*fb4d8502Sjsg #define ixSQ_WAVE_TTMP10                                                        0x27a
1936*fb4d8502Sjsg #define ixSQ_WAVE_TTMP11                                                        0x27b
1937*fb4d8502Sjsg #define mmSQ_DEBUG_STS_GLOBAL                                                   0x2309
1938*fb4d8502Sjsg #define mmSQ_DEBUG_STS_GLOBAL2                                                  0x2310
1939*fb4d8502Sjsg #define mmSQ_DEBUG_STS_GLOBAL3                                                  0x2311
1940*fb4d8502Sjsg #define ixSQ_DEBUG_STS_LOCAL                                                    0x8
1941*fb4d8502Sjsg #define ixSQ_DEBUG_CTRL_LOCAL                                                   0x9
1942*fb4d8502Sjsg #define mmSH_MEM_BASES                                                          0x230a
1943*fb4d8502Sjsg #define mmSH_MEM_APE1_BASE                                                      0x230b
1944*fb4d8502Sjsg #define mmSH_MEM_APE1_LIMIT                                                     0x230c
1945*fb4d8502Sjsg #define mmSH_MEM_CONFIG                                                         0x230d
1946*fb4d8502Sjsg #define mmSQC_POLICY                                                            0x230e
1947*fb4d8502Sjsg #define mmSQC_VOLATILE                                                          0x230f
1948*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_CMN                                              0x23b0
1949*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_INST                                             0x23b0
1950*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_INST_PC_1_OF_2                                   0x23b0
1951*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_INST_PC_2_OF_2                                   0x23b1
1952*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_INST_USERDATA_1_OF_2                             0x23b0
1953*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_INST_USERDATA_2_OF_2                             0x23b1
1954*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_TIMESTAMP_1_OF_2                                 0x23b0
1955*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_TIMESTAMP_2_OF_2                                 0x23b1
1956*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_WAVE                                             0x23b0
1957*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_MISC                                             0x23b0
1958*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_WAVE_START                                       0x23b0
1959*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_REG_1_OF_2                                       0x23b0
1960*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_REG_2_OF_2                                       0x23b0
1961*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_REG_CS_1_OF_2                                    0x23b0
1962*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_REG_CS_2_OF_2                                    0x23b0
1963*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_EVENT                                            0x23b0
1964*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_ISSUE                                            0x23b0
1965*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_PERF_1_OF_2                                      0x23b0
1966*fb4d8502Sjsg #define mmSQ_THREAD_TRACE_WORD_PERF_2_OF_2                                      0x23b1
1967*fb4d8502Sjsg #define ixSQ_INTERRUPT_WORD_CMN                                                 0x20c0
1968*fb4d8502Sjsg #define ixSQ_INTERRUPT_WORD_AUTO                                                0x20c0
1969*fb4d8502Sjsg #define ixSQ_INTERRUPT_WORD_WAVE                                                0x20c0
1970*fb4d8502Sjsg #define mmSQ_SOP2                                                               0x237f
1971*fb4d8502Sjsg #define mmSQ_VOP1                                                               0x237f
1972*fb4d8502Sjsg #define mmSQ_MTBUF_1                                                            0x237f
1973*fb4d8502Sjsg #define mmSQ_EXP_1                                                              0x237f
1974*fb4d8502Sjsg #define mmSQ_MUBUF_1                                                            0x237f
1975*fb4d8502Sjsg #define mmSQ_INST                                                               0x237f
1976*fb4d8502Sjsg #define mmSQ_EXP_0                                                              0x237f
1977*fb4d8502Sjsg #define mmSQ_MUBUF_0                                                            0x237f
1978*fb4d8502Sjsg #define mmSQ_VOP3_0                                                             0x237f
1979*fb4d8502Sjsg #define mmSQ_VOP2                                                               0x237f
1980*fb4d8502Sjsg #define mmSQ_MTBUF_0                                                            0x237f
1981*fb4d8502Sjsg #define mmSQ_SOPP                                                               0x237f
1982*fb4d8502Sjsg #define mmSQ_FLAT_0                                                             0x237f
1983*fb4d8502Sjsg #define mmSQ_VOP3_0_SDST_ENC                                                    0x237f
1984*fb4d8502Sjsg #define mmSQ_MIMG_1                                                             0x237f
1985*fb4d8502Sjsg #define mmSQ_SMRD                                                               0x237f
1986*fb4d8502Sjsg #define mmSQ_SOP1                                                               0x237f
1987*fb4d8502Sjsg #define mmSQ_SOPC                                                               0x237f
1988*fb4d8502Sjsg #define mmSQ_FLAT_1                                                             0x237f
1989*fb4d8502Sjsg #define mmSQ_DS_1                                                               0x237f
1990*fb4d8502Sjsg #define mmSQ_VOP3_1                                                             0x237f
1991*fb4d8502Sjsg #define mmSQ_MIMG_0                                                             0x237f
1992*fb4d8502Sjsg #define mmSQ_SOPK                                                               0x237f
1993*fb4d8502Sjsg #define mmSQ_DS_0                                                               0x237f
1994*fb4d8502Sjsg #define mmSQ_VOPC                                                               0x237f
1995*fb4d8502Sjsg #define mmSQ_VINTRP                                                             0x237f
1996*fb4d8502Sjsg #define mmCGTT_SX_CLK_CTRL0                                                     0xf094
1997*fb4d8502Sjsg #define mmCGTT_SX_CLK_CTRL1                                                     0xf095
1998*fb4d8502Sjsg #define mmCGTT_SX_CLK_CTRL2                                                     0xf096
1999*fb4d8502Sjsg #define mmCGTT_SX_CLK_CTRL3                                                     0xf097
2000*fb4d8502Sjsg #define mmCGTT_SX_CLK_CTRL4                                                     0xf098
2001*fb4d8502Sjsg #define mmSX_DEBUG_BUSY                                                         0x2414
2002*fb4d8502Sjsg #define mmSX_DEBUG_BUSY_2                                                       0x2415
2003*fb4d8502Sjsg #define mmSX_DEBUG_BUSY_3                                                       0x2416
2004*fb4d8502Sjsg #define mmSX_DEBUG_BUSY_4                                                       0x2417
2005*fb4d8502Sjsg #define mmSX_DEBUG_1                                                            0x2418
2006*fb4d8502Sjsg #define mmSX_PERFCOUNTER0_SELECT                                                0xda40
2007*fb4d8502Sjsg #define mmSX_PERFCOUNTER1_SELECT                                                0xda41
2008*fb4d8502Sjsg #define mmSX_PERFCOUNTER2_SELECT                                                0xda42
2009*fb4d8502Sjsg #define mmSX_PERFCOUNTER3_SELECT                                                0xda43
2010*fb4d8502Sjsg #define mmSX_PERFCOUNTER0_SELECT1                                               0xda44
2011*fb4d8502Sjsg #define mmSX_PERFCOUNTER1_SELECT1                                               0xda45
2012*fb4d8502Sjsg #define mmSX_PERFCOUNTER0_LO                                                    0xd240
2013*fb4d8502Sjsg #define mmSX_PERFCOUNTER0_HI                                                    0xd241
2014*fb4d8502Sjsg #define mmSX_PERFCOUNTER1_LO                                                    0xd242
2015*fb4d8502Sjsg #define mmSX_PERFCOUNTER1_HI                                                    0xd243
2016*fb4d8502Sjsg #define mmSX_PERFCOUNTER2_LO                                                    0xd244
2017*fb4d8502Sjsg #define mmSX_PERFCOUNTER2_HI                                                    0xd245
2018*fb4d8502Sjsg #define mmSX_PERFCOUNTER3_LO                                                    0xd246
2019*fb4d8502Sjsg #define mmSX_PERFCOUNTER3_HI                                                    0xd247
2020*fb4d8502Sjsg #define mmTCC_CTRL                                                              0x2b80
2021*fb4d8502Sjsg #define mmTCC_EDC_COUNTER                                                       0x2b82
2022*fb4d8502Sjsg #define mmTCC_REDUNDANCY                                                        0x2b83
2023*fb4d8502Sjsg #define mmTCC_CGTT_SCLK_CTRL                                                    0xf0ac
2024*fb4d8502Sjsg #define mmTCA_CGTT_SCLK_CTRL                                                    0xf0ad
2025*fb4d8502Sjsg #define mmTCS_CGTT_SCLK_CTRL                                                    0xf0ae
2026*fb4d8502Sjsg #define mmTCC_PERFCOUNTER0_SELECT                                               0xdb80
2027*fb4d8502Sjsg #define mmTCC_PERFCOUNTER1_SELECT                                               0xdb82
2028*fb4d8502Sjsg #define mmTCC_PERFCOUNTER0_SELECT1                                              0xdb81
2029*fb4d8502Sjsg #define mmTCC_PERFCOUNTER1_SELECT1                                              0xdb83
2030*fb4d8502Sjsg #define mmTCC_PERFCOUNTER2_SELECT                                               0xdb84
2031*fb4d8502Sjsg #define mmTCC_PERFCOUNTER3_SELECT                                               0xdb85
2032*fb4d8502Sjsg #define mmTCC_PERFCOUNTER0_LO                                                   0xd380
2033*fb4d8502Sjsg #define mmTCC_PERFCOUNTER1_LO                                                   0xd382
2034*fb4d8502Sjsg #define mmTCC_PERFCOUNTER2_LO                                                   0xd384
2035*fb4d8502Sjsg #define mmTCC_PERFCOUNTER3_LO                                                   0xd386
2036*fb4d8502Sjsg #define mmTCC_PERFCOUNTER0_HI                                                   0xd381
2037*fb4d8502Sjsg #define mmTCC_PERFCOUNTER1_HI                                                   0xd383
2038*fb4d8502Sjsg #define mmTCC_PERFCOUNTER2_HI                                                   0xd385
2039*fb4d8502Sjsg #define mmTCC_PERFCOUNTER3_HI                                                   0xd387
2040*fb4d8502Sjsg #define mmTCA_CTRL                                                              0x2bc0
2041*fb4d8502Sjsg #define mmTCA_PERFCOUNTER0_SELECT                                               0xdb90
2042*fb4d8502Sjsg #define mmTCA_PERFCOUNTER1_SELECT                                               0xdb92
2043*fb4d8502Sjsg #define mmTCA_PERFCOUNTER0_SELECT1                                              0xdb91
2044*fb4d8502Sjsg #define mmTCA_PERFCOUNTER1_SELECT1                                              0xdb93
2045*fb4d8502Sjsg #define mmTCA_PERFCOUNTER2_SELECT                                               0xdb94
2046*fb4d8502Sjsg #define mmTCA_PERFCOUNTER3_SELECT                                               0xdb95
2047*fb4d8502Sjsg #define mmTCA_PERFCOUNTER0_LO                                                   0xd390
2048*fb4d8502Sjsg #define mmTCA_PERFCOUNTER1_LO                                                   0xd392
2049*fb4d8502Sjsg #define mmTCA_PERFCOUNTER2_LO                                                   0xd394
2050*fb4d8502Sjsg #define mmTCA_PERFCOUNTER3_LO                                                   0xd396
2051*fb4d8502Sjsg #define mmTCA_PERFCOUNTER0_HI                                                   0xd391
2052*fb4d8502Sjsg #define mmTCA_PERFCOUNTER1_HI                                                   0xd393
2053*fb4d8502Sjsg #define mmTCA_PERFCOUNTER2_HI                                                   0xd395
2054*fb4d8502Sjsg #define mmTCA_PERFCOUNTER3_HI                                                   0xd397
2055*fb4d8502Sjsg #define mmTCS_CTRL                                                              0x2be0
2056*fb4d8502Sjsg #define mmTCS_PERFCOUNTER0_SELECT                                               0xdba0
2057*fb4d8502Sjsg #define mmTCS_PERFCOUNTER0_SELECT1                                              0xdba1
2058*fb4d8502Sjsg #define mmTCS_PERFCOUNTER1_SELECT                                               0xdba2
2059*fb4d8502Sjsg #define mmTCS_PERFCOUNTER2_SELECT                                               0xdba3
2060*fb4d8502Sjsg #define mmTCS_PERFCOUNTER3_SELECT                                               0xdba4
2061*fb4d8502Sjsg #define mmTCS_PERFCOUNTER0_LO                                                   0xd3a0
2062*fb4d8502Sjsg #define mmTCS_PERFCOUNTER1_LO                                                   0xd3a2
2063*fb4d8502Sjsg #define mmTCS_PERFCOUNTER2_LO                                                   0xd3a4
2064*fb4d8502Sjsg #define mmTCS_PERFCOUNTER3_LO                                                   0xd3a6
2065*fb4d8502Sjsg #define mmTCS_PERFCOUNTER0_HI                                                   0xd3a1
2066*fb4d8502Sjsg #define mmTCS_PERFCOUNTER1_HI                                                   0xd3a3
2067*fb4d8502Sjsg #define mmTCS_PERFCOUNTER2_HI                                                   0xd3a5
2068*fb4d8502Sjsg #define mmTCS_PERFCOUNTER3_HI                                                   0xd3a7
2069*fb4d8502Sjsg #define mmTA_BC_BASE_ADDR                                                       0xa020
2070*fb4d8502Sjsg #define mmTA_BC_BASE_ADDR_HI                                                    0xa021
2071*fb4d8502Sjsg #define mmTD_CNTL                                                               0x2525
2072*fb4d8502Sjsg #define mmTD_STATUS                                                             0x2526
2073*fb4d8502Sjsg #define mmTD_DEBUG_INDEX                                                        0x2528
2074*fb4d8502Sjsg #define mmTD_DEBUG_DATA                                                         0x2529
2075*fb4d8502Sjsg #define mmTD_PERFCOUNTER0_SELECT                                                0xdb00
2076*fb4d8502Sjsg #define mmTD_PERFCOUNTER1_SELECT                                                0xdb02
2077*fb4d8502Sjsg #define mmTD_PERFCOUNTER0_SELECT1                                               0xdb01
2078*fb4d8502Sjsg #define mmTD_PERFCOUNTER0_LO                                                    0xd300
2079*fb4d8502Sjsg #define mmTD_PERFCOUNTER1_LO                                                    0xd302
2080*fb4d8502Sjsg #define mmTD_PERFCOUNTER0_HI                                                    0xd301
2081*fb4d8502Sjsg #define mmTD_PERFCOUNTER1_HI                                                    0xd303
2082*fb4d8502Sjsg #define mmTD_SCRATCH                                                            0x2533
2083*fb4d8502Sjsg #define mmTA_CNTL                                                               0x2541
2084*fb4d8502Sjsg #define mmTA_CNTL_AUX                                                           0x2542
2085*fb4d8502Sjsg #define mmTA_RESERVED_010C                                                      0x2543
2086*fb4d8502Sjsg #define mmTA_CS_BC_BASE_ADDR                                                    0xc380
2087*fb4d8502Sjsg #define mmTA_CS_BC_BASE_ADDR_HI                                                 0xc381
2088*fb4d8502Sjsg #define mmTA_STATUS                                                             0x2548
2089*fb4d8502Sjsg #define mmTA_DEBUG_INDEX                                                        0x254c
2090*fb4d8502Sjsg #define mmTA_DEBUG_DATA                                                         0x254d
2091*fb4d8502Sjsg #define mmTA_PERFCOUNTER0_SELECT                                                0xdac0
2092*fb4d8502Sjsg #define mmTA_PERFCOUNTER1_SELECT                                                0xdac2
2093*fb4d8502Sjsg #define mmTA_PERFCOUNTER0_SELECT1                                               0xdac1
2094*fb4d8502Sjsg #define mmTA_PERFCOUNTER0_LO                                                    0xd2c0
2095*fb4d8502Sjsg #define mmTA_PERFCOUNTER1_LO                                                    0xd2c2
2096*fb4d8502Sjsg #define mmTA_PERFCOUNTER0_HI                                                    0xd2c1
2097*fb4d8502Sjsg #define mmTA_PERFCOUNTER1_HI                                                    0xd2c3
2098*fb4d8502Sjsg #define mmTA_SCRATCH                                                            0x2564
2099*fb4d8502Sjsg #define mmSH_HIDDEN_PRIVATE_BASE_VMID                                           0x2580
2100*fb4d8502Sjsg #define mmSH_STATIC_MEM_CONFIG                                                  0x2581
2101*fb4d8502Sjsg #define mmTCP_INVALIDATE                                                        0x2b00
2102*fb4d8502Sjsg #define mmTCP_STATUS                                                            0x2b01
2103*fb4d8502Sjsg #define mmTCP_CNTL                                                              0x2b02
2104*fb4d8502Sjsg #define mmTCP_CHAN_STEER_LO                                                     0x2b03
2105*fb4d8502Sjsg #define mmTCP_CHAN_STEER_HI                                                     0x2b04
2106*fb4d8502Sjsg #define mmTCP_ADDR_CONFIG                                                       0x2b05
2107*fb4d8502Sjsg #define mmTCP_CREDIT                                                            0x2b06
2108*fb4d8502Sjsg #define mmTCP_PERFCOUNTER0_SELECT                                               0xdb40
2109*fb4d8502Sjsg #define mmTCP_PERFCOUNTER1_SELECT                                               0xdb42
2110*fb4d8502Sjsg #define mmTCP_PERFCOUNTER0_SELECT1                                              0xdb41
2111*fb4d8502Sjsg #define mmTCP_PERFCOUNTER1_SELECT1                                              0xdb43
2112*fb4d8502Sjsg #define mmTCP_PERFCOUNTER2_SELECT                                               0xdb44
2113*fb4d8502Sjsg #define mmTCP_PERFCOUNTER3_SELECT                                               0xdb45
2114*fb4d8502Sjsg #define mmTCP_PERFCOUNTER0_LO                                                   0xd340
2115*fb4d8502Sjsg #define mmTCP_PERFCOUNTER1_LO                                                   0xd342
2116*fb4d8502Sjsg #define mmTCP_PERFCOUNTER2_LO                                                   0xd344
2117*fb4d8502Sjsg #define mmTCP_PERFCOUNTER3_LO                                                   0xd346
2118*fb4d8502Sjsg #define mmTCP_PERFCOUNTER0_HI                                                   0xd341
2119*fb4d8502Sjsg #define mmTCP_PERFCOUNTER1_HI                                                   0xd343
2120*fb4d8502Sjsg #define mmTCP_PERFCOUNTER2_HI                                                   0xd345
2121*fb4d8502Sjsg #define mmTCP_PERFCOUNTER3_HI                                                   0xd347
2122*fb4d8502Sjsg #define mmTCP_BUFFER_ADDR_HASH_CNTL                                             0x2b16
2123*fb4d8502Sjsg #define mmTCP_EDC_COUNTER                                                       0x2b17
2124*fb4d8502Sjsg #define mmTC_CFG_L1_LOAD_POLICY0                                                0x2b1a
2125*fb4d8502Sjsg #define mmTC_CFG_L1_LOAD_POLICY1                                                0x2b1b
2126*fb4d8502Sjsg #define mmTC_CFG_L1_STORE_POLICY                                                0x2b1c
2127*fb4d8502Sjsg #define mmTC_CFG_L2_LOAD_POLICY0                                                0x2b1d
2128*fb4d8502Sjsg #define mmTC_CFG_L2_LOAD_POLICY1                                                0x2b1e
2129*fb4d8502Sjsg #define mmTC_CFG_L2_STORE_POLICY0                                               0x2b1f
2130*fb4d8502Sjsg #define mmTC_CFG_L2_STORE_POLICY1                                               0x2b20
2131*fb4d8502Sjsg #define mmTC_CFG_L2_ATOMIC_POLICY                                               0x2b21
2132*fb4d8502Sjsg #define mmTC_CFG_L1_VOLATILE                                                    0x2b22
2133*fb4d8502Sjsg #define mmTC_CFG_L2_VOLATILE                                                    0x2b23
2134*fb4d8502Sjsg #define mmTCP_WATCH0_ADDR_H                                                     0x32a0
2135*fb4d8502Sjsg #define mmTCP_WATCH1_ADDR_H                                                     0x32a3
2136*fb4d8502Sjsg #define mmTCP_WATCH2_ADDR_H                                                     0x32a6
2137*fb4d8502Sjsg #define mmTCP_WATCH3_ADDR_H                                                     0x32a9
2138*fb4d8502Sjsg #define mmTCP_WATCH0_ADDR_L                                                     0x32a1
2139*fb4d8502Sjsg #define mmTCP_WATCH1_ADDR_L                                                     0x32a4
2140*fb4d8502Sjsg #define mmTCP_WATCH2_ADDR_L                                                     0x32a7
2141*fb4d8502Sjsg #define mmTCP_WATCH3_ADDR_L                                                     0x32aa
2142*fb4d8502Sjsg #define mmTCP_WATCH0_CNTL                                                       0x32a2
2143*fb4d8502Sjsg #define mmTCP_WATCH1_CNTL                                                       0x32a5
2144*fb4d8502Sjsg #define mmTCP_WATCH2_CNTL                                                       0x32a8
2145*fb4d8502Sjsg #define mmTCP_WATCH3_CNTL                                                       0x32ab
2146*fb4d8502Sjsg #define mmTD_CGTT_CTRL                                                          0xf09c
2147*fb4d8502Sjsg #define mmTA_CGTT_CTRL                                                          0xf09d
2148*fb4d8502Sjsg #define mmCGTT_TCP_CLK_CTRL                                                     0xf09e
2149*fb4d8502Sjsg #define mmCGTT_TCI_CLK_CTRL                                                     0xf09f
2150*fb4d8502Sjsg #define mmTCI_STATUS                                                            0x2b61
2151*fb4d8502Sjsg #define mmTCI_CNTL_1                                                            0x2b62
2152*fb4d8502Sjsg #define mmTCI_CNTL_2                                                            0x2b63
2153*fb4d8502Sjsg #define mmGDS_CONFIG                                                            0x25c0
2154*fb4d8502Sjsg #define mmGDS_CNTL_STATUS                                                       0x25c1
2155*fb4d8502Sjsg #define mmGDS_ENHANCE                                                           0x25c2
2156*fb4d8502Sjsg #define mmGDS_PROTECTION_FAULT                                                  0x25c3
2157*fb4d8502Sjsg #define mmGDS_VM_PROTECTION_FAULT                                               0x25c4
2158*fb4d8502Sjsg #define mmGDS_SECDED_CNT                                                        0x25c5
2159*fb4d8502Sjsg #define mmGDS_GRBM_SECDED_CNT                                                   0x25c6
2160*fb4d8502Sjsg #define mmGDS_OA_DED                                                            0x25c7
2161*fb4d8502Sjsg #define mmGDS_DEBUG_CNTL                                                        0x25c8
2162*fb4d8502Sjsg #define mmGDS_DEBUG_DATA                                                        0x25c9
2163*fb4d8502Sjsg #define mmCGTT_GDS_CLK_CTRL                                                     0xf0a0
2164*fb4d8502Sjsg #define mmGDS_RD_ADDR                                                           0xc400
2165*fb4d8502Sjsg #define mmGDS_RD_DATA                                                           0xc401
2166*fb4d8502Sjsg #define mmGDS_RD_BURST_ADDR                                                     0xc402
2167*fb4d8502Sjsg #define mmGDS_RD_BURST_COUNT                                                    0xc403
2168*fb4d8502Sjsg #define mmGDS_RD_BURST_DATA                                                     0xc404
2169*fb4d8502Sjsg #define mmGDS_WR_ADDR                                                           0xc405
2170*fb4d8502Sjsg #define mmGDS_WR_DATA                                                           0xc406
2171*fb4d8502Sjsg #define mmGDS_WR_BURST_ADDR                                                     0xc407
2172*fb4d8502Sjsg #define mmGDS_WR_BURST_DATA                                                     0xc408
2173*fb4d8502Sjsg #define mmGDS_WRITE_COMPLETE                                                    0xc409
2174*fb4d8502Sjsg #define mmGDS_ATOM_CNTL                                                         0xc40a
2175*fb4d8502Sjsg #define mmGDS_ATOM_COMPLETE                                                     0xc40b
2176*fb4d8502Sjsg #define mmGDS_ATOM_BASE                                                         0xc40c
2177*fb4d8502Sjsg #define mmGDS_ATOM_SIZE                                                         0xc40d
2178*fb4d8502Sjsg #define mmGDS_ATOM_OFFSET0                                                      0xc40e
2179*fb4d8502Sjsg #define mmGDS_ATOM_OFFSET1                                                      0xc40f
2180*fb4d8502Sjsg #define mmGDS_ATOM_DST                                                          0xc410
2181*fb4d8502Sjsg #define mmGDS_ATOM_OP                                                           0xc411
2182*fb4d8502Sjsg #define mmGDS_ATOM_SRC0                                                         0xc412
2183*fb4d8502Sjsg #define mmGDS_ATOM_SRC0_U                                                       0xc413
2184*fb4d8502Sjsg #define mmGDS_ATOM_SRC1                                                         0xc414
2185*fb4d8502Sjsg #define mmGDS_ATOM_SRC1_U                                                       0xc415
2186*fb4d8502Sjsg #define mmGDS_ATOM_READ0                                                        0xc416
2187*fb4d8502Sjsg #define mmGDS_ATOM_READ0_U                                                      0xc417
2188*fb4d8502Sjsg #define mmGDS_ATOM_READ1                                                        0xc418
2189*fb4d8502Sjsg #define mmGDS_ATOM_READ1_U                                                      0xc419
2190*fb4d8502Sjsg #define mmGDS_GWS_RESOURCE_CNTL                                                 0xc41a
2191*fb4d8502Sjsg #define mmGDS_GWS_RESOURCE                                                      0xc41b
2192*fb4d8502Sjsg #define mmGDS_GWS_RESOURCE_CNT                                                  0xc41c
2193*fb4d8502Sjsg #define mmGDS_OA_CNTL                                                           0xc41d
2194*fb4d8502Sjsg #define mmGDS_OA_COUNTER                                                        0xc41e
2195*fb4d8502Sjsg #define mmGDS_OA_ADDRESS                                                        0xc41f
2196*fb4d8502Sjsg #define mmGDS_OA_INCDEC                                                         0xc420
2197*fb4d8502Sjsg #define ixGDS_DEBUG_REG0                                                        0x0
2198*fb4d8502Sjsg #define ixGDS_DEBUG_REG1                                                        0x1
2199*fb4d8502Sjsg #define ixGDS_DEBUG_REG2                                                        0x2
2200*fb4d8502Sjsg #define ixGDS_DEBUG_REG3                                                        0x3
2201*fb4d8502Sjsg #define ixGDS_DEBUG_REG4                                                        0x4
2202*fb4d8502Sjsg #define ixGDS_DEBUG_REG5                                                        0x5
2203*fb4d8502Sjsg #define ixGDS_DEBUG_REG6                                                        0x6
2204*fb4d8502Sjsg #define mmGDS_PERFCOUNTER0_SELECT                                               0xda80
2205*fb4d8502Sjsg #define mmGDS_PERFCOUNTER1_SELECT                                               0xda81
2206*fb4d8502Sjsg #define mmGDS_PERFCOUNTER2_SELECT                                               0xda82
2207*fb4d8502Sjsg #define mmGDS_PERFCOUNTER3_SELECT                                               0xda83
2208*fb4d8502Sjsg #define mmGDS_PERFCOUNTER0_LO                                                   0xd280
2209*fb4d8502Sjsg #define mmGDS_PERFCOUNTER1_LO                                                   0xd282
2210*fb4d8502Sjsg #define mmGDS_PERFCOUNTER2_LO                                                   0xd284
2211*fb4d8502Sjsg #define mmGDS_PERFCOUNTER3_LO                                                   0xd286
2212*fb4d8502Sjsg #define mmGDS_PERFCOUNTER0_HI                                                   0xd281
2213*fb4d8502Sjsg #define mmGDS_PERFCOUNTER1_HI                                                   0xd283
2214*fb4d8502Sjsg #define mmGDS_PERFCOUNTER2_HI                                                   0xd285
2215*fb4d8502Sjsg #define mmGDS_PERFCOUNTER3_HI                                                   0xd287
2216*fb4d8502Sjsg #define mmGDS_PERFCOUNTER0_SELECT1                                              0xda84
2217*fb4d8502Sjsg #define mmGDS_VMID0_BASE                                                        0x3300
2218*fb4d8502Sjsg #define mmGDS_VMID1_BASE                                                        0x3302
2219*fb4d8502Sjsg #define mmGDS_VMID2_BASE                                                        0x3304
2220*fb4d8502Sjsg #define mmGDS_VMID3_BASE                                                        0x3306
2221*fb4d8502Sjsg #define mmGDS_VMID4_BASE                                                        0x3308
2222*fb4d8502Sjsg #define mmGDS_VMID5_BASE                                                        0x330a
2223*fb4d8502Sjsg #define mmGDS_VMID6_BASE                                                        0x330c
2224*fb4d8502Sjsg #define mmGDS_VMID7_BASE                                                        0x330e
2225*fb4d8502Sjsg #define mmGDS_VMID8_BASE                                                        0x3310
2226*fb4d8502Sjsg #define mmGDS_VMID9_BASE                                                        0x3312
2227*fb4d8502Sjsg #define mmGDS_VMID10_BASE                                                       0x3314
2228*fb4d8502Sjsg #define mmGDS_VMID11_BASE                                                       0x3316
2229*fb4d8502Sjsg #define mmGDS_VMID12_BASE                                                       0x3318
2230*fb4d8502Sjsg #define mmGDS_VMID13_BASE                                                       0x331a
2231*fb4d8502Sjsg #define mmGDS_VMID14_BASE                                                       0x331c
2232*fb4d8502Sjsg #define mmGDS_VMID15_BASE                                                       0x331e
2233*fb4d8502Sjsg #define mmGDS_VMID0_SIZE                                                        0x3301
2234*fb4d8502Sjsg #define mmGDS_VMID1_SIZE                                                        0x3303
2235*fb4d8502Sjsg #define mmGDS_VMID2_SIZE                                                        0x3305
2236*fb4d8502Sjsg #define mmGDS_VMID3_SIZE                                                        0x3307
2237*fb4d8502Sjsg #define mmGDS_VMID4_SIZE                                                        0x3309
2238*fb4d8502Sjsg #define mmGDS_VMID5_SIZE                                                        0x330b
2239*fb4d8502Sjsg #define mmGDS_VMID6_SIZE                                                        0x330d
2240*fb4d8502Sjsg #define mmGDS_VMID7_SIZE                                                        0x330f
2241*fb4d8502Sjsg #define mmGDS_VMID8_SIZE                                                        0x3311
2242*fb4d8502Sjsg #define mmGDS_VMID9_SIZE                                                        0x3313
2243*fb4d8502Sjsg #define mmGDS_VMID10_SIZE                                                       0x3315
2244*fb4d8502Sjsg #define mmGDS_VMID11_SIZE                                                       0x3317
2245*fb4d8502Sjsg #define mmGDS_VMID12_SIZE                                                       0x3319
2246*fb4d8502Sjsg #define mmGDS_VMID13_SIZE                                                       0x331b
2247*fb4d8502Sjsg #define mmGDS_VMID14_SIZE                                                       0x331d
2248*fb4d8502Sjsg #define mmGDS_VMID15_SIZE                                                       0x331f
2249*fb4d8502Sjsg #define mmGDS_GWS_VMID0                                                         0x3320
2250*fb4d8502Sjsg #define mmGDS_GWS_VMID1                                                         0x3321
2251*fb4d8502Sjsg #define mmGDS_GWS_VMID2                                                         0x3322
2252*fb4d8502Sjsg #define mmGDS_GWS_VMID3                                                         0x3323
2253*fb4d8502Sjsg #define mmGDS_GWS_VMID4                                                         0x3324
2254*fb4d8502Sjsg #define mmGDS_GWS_VMID5                                                         0x3325
2255*fb4d8502Sjsg #define mmGDS_GWS_VMID6                                                         0x3326
2256*fb4d8502Sjsg #define mmGDS_GWS_VMID7                                                         0x3327
2257*fb4d8502Sjsg #define mmGDS_GWS_VMID8                                                         0x3328
2258*fb4d8502Sjsg #define mmGDS_GWS_VMID9                                                         0x3329
2259*fb4d8502Sjsg #define mmGDS_GWS_VMID10                                                        0x332a
2260*fb4d8502Sjsg #define mmGDS_GWS_VMID11                                                        0x332b
2261*fb4d8502Sjsg #define mmGDS_GWS_VMID12                                                        0x332c
2262*fb4d8502Sjsg #define mmGDS_GWS_VMID13                                                        0x332d
2263*fb4d8502Sjsg #define mmGDS_GWS_VMID14                                                        0x332e
2264*fb4d8502Sjsg #define mmGDS_GWS_VMID15                                                        0x332f
2265*fb4d8502Sjsg #define mmGDS_OA_VMID0                                                          0x3330
2266*fb4d8502Sjsg #define mmGDS_OA_VMID1                                                          0x3331
2267*fb4d8502Sjsg #define mmGDS_OA_VMID2                                                          0x3332
2268*fb4d8502Sjsg #define mmGDS_OA_VMID3                                                          0x3333
2269*fb4d8502Sjsg #define mmGDS_OA_VMID4                                                          0x3334
2270*fb4d8502Sjsg #define mmGDS_OA_VMID5                                                          0x3335
2271*fb4d8502Sjsg #define mmGDS_OA_VMID6                                                          0x3336
2272*fb4d8502Sjsg #define mmGDS_OA_VMID7                                                          0x3337
2273*fb4d8502Sjsg #define mmGDS_OA_VMID8                                                          0x3338
2274*fb4d8502Sjsg #define mmGDS_OA_VMID9                                                          0x3339
2275*fb4d8502Sjsg #define mmGDS_OA_VMID10                                                         0x333a
2276*fb4d8502Sjsg #define mmGDS_OA_VMID11                                                         0x333b
2277*fb4d8502Sjsg #define mmGDS_OA_VMID12                                                         0x333c
2278*fb4d8502Sjsg #define mmGDS_OA_VMID13                                                         0x333d
2279*fb4d8502Sjsg #define mmGDS_OA_VMID14                                                         0x333e
2280*fb4d8502Sjsg #define mmGDS_OA_VMID15                                                         0x333f
2281*fb4d8502Sjsg #define mmGDS_GWS_RESET0                                                        0x3344
2282*fb4d8502Sjsg #define mmGDS_GWS_RESET1                                                        0x3345
2283*fb4d8502Sjsg #define mmGDS_GWS_RESOURCE_RESET                                                0x3346
2284*fb4d8502Sjsg #define mmGDS_COMPUTE_MAX_WAVE_ID                                               0x3348
2285*fb4d8502Sjsg #define mmGDS_OA_RESET_MASK                                                     0x3349
2286*fb4d8502Sjsg #define mmGDS_OA_RESET                                                          0x334a
2287*fb4d8502Sjsg #define mmCS_COPY_STATE                                                         0xa1f3
2288*fb4d8502Sjsg #define mmGFX_COPY_STATE                                                        0xa1f4
2289*fb4d8502Sjsg #define mmVGT_DRAW_INITIATOR                                                    0xa1fc
2290*fb4d8502Sjsg #define mmVGT_EVENT_INITIATOR                                                   0xa2a4
2291*fb4d8502Sjsg #define mmVGT_EVENT_ADDRESS_REG                                                 0xa1fe
2292*fb4d8502Sjsg #define mmVGT_DMA_BASE_HI                                                       0xa1f9
2293*fb4d8502Sjsg #define mmVGT_DMA_BASE                                                          0xa1fa
2294*fb4d8502Sjsg #define mmVGT_DMA_INDEX_TYPE                                                    0xa29f
2295*fb4d8502Sjsg #define mmVGT_DMA_NUM_INSTANCES                                                 0xa2a2
2296*fb4d8502Sjsg #define mmIA_ENHANCE                                                            0xa29c
2297*fb4d8502Sjsg #define mmVGT_DMA_SIZE                                                          0xa29d
2298*fb4d8502Sjsg #define mmVGT_DMA_MAX_SIZE                                                      0xa29e
2299*fb4d8502Sjsg #define mmVGT_DMA_PRIMITIVE_TYPE                                                0x2271
2300*fb4d8502Sjsg #define mmVGT_DMA_CONTROL                                                       0x2272
2301*fb4d8502Sjsg #define mmVGT_IMMED_DATA                                                        0xa1fd
2302*fb4d8502Sjsg #define mmVGT_INDEX_TYPE                                                        0xc243
2303*fb4d8502Sjsg #define mmVGT_NUM_INDICES                                                       0xc24c
2304*fb4d8502Sjsg #define mmVGT_NUM_INSTANCES                                                     0xc24d
2305*fb4d8502Sjsg #define mmVGT_PRIMITIVE_TYPE                                                    0xc242
2306*fb4d8502Sjsg #define mmVGT_PRIMITIVEID_EN                                                    0xa2a1
2307*fb4d8502Sjsg #define mmVGT_PRIMITIVEID_RESET                                                 0xa2a3
2308*fb4d8502Sjsg #define mmVGT_VTX_CNT_EN                                                        0xa2ae
2309*fb4d8502Sjsg #define mmVGT_REUSE_OFF                                                         0xa2ad
2310*fb4d8502Sjsg #define mmVGT_INSTANCE_STEP_RATE_0                                              0xa2a8
2311*fb4d8502Sjsg #define mmVGT_INSTANCE_STEP_RATE_1                                              0xa2a9
2312*fb4d8502Sjsg #define mmVGT_MAX_VTX_INDX                                                      0xa100
2313*fb4d8502Sjsg #define mmVGT_MIN_VTX_INDX                                                      0xa101
2314*fb4d8502Sjsg #define mmVGT_INDX_OFFSET                                                       0xa102
2315*fb4d8502Sjsg #define mmVGT_VERTEX_REUSE_BLOCK_CNTL                                           0xa316
2316*fb4d8502Sjsg #define mmVGT_OUT_DEALLOC_CNTL                                                  0xa317
2317*fb4d8502Sjsg #define mmVGT_MULTI_PRIM_IB_RESET_INDX                                          0xa103
2318*fb4d8502Sjsg #define mmVGT_MULTI_PRIM_IB_RESET_EN                                            0xa2a5
2319*fb4d8502Sjsg #define mmVGT_ENHANCE                                                           0xa294
2320*fb4d8502Sjsg #define mmVGT_OUTPUT_PATH_CNTL                                                  0xa284
2321*fb4d8502Sjsg #define mmVGT_HOS_CNTL                                                          0xa285
2322*fb4d8502Sjsg #define mmVGT_HOS_MAX_TESS_LEVEL                                                0xa286
2323*fb4d8502Sjsg #define mmVGT_HOS_MIN_TESS_LEVEL                                                0xa287
2324*fb4d8502Sjsg #define mmVGT_HOS_REUSE_DEPTH                                                   0xa288
2325*fb4d8502Sjsg #define mmVGT_GROUP_PRIM_TYPE                                                   0xa289
2326*fb4d8502Sjsg #define mmVGT_GROUP_FIRST_DECR                                                  0xa28a
2327*fb4d8502Sjsg #define mmVGT_GROUP_DECR                                                        0xa28b
2328*fb4d8502Sjsg #define mmVGT_GROUP_VECT_0_CNTL                                                 0xa28c
2329*fb4d8502Sjsg #define mmVGT_GROUP_VECT_1_CNTL                                                 0xa28d
2330*fb4d8502Sjsg #define mmVGT_GROUP_VECT_0_FMT_CNTL                                             0xa28e
2331*fb4d8502Sjsg #define mmVGT_GROUP_VECT_1_FMT_CNTL                                             0xa28f
2332*fb4d8502Sjsg #define mmVGT_VTX_VECT_EJECT_REG                                                0x222c
2333*fb4d8502Sjsg #define mmVGT_DMA_DATA_FIFO_DEPTH                                               0x222d
2334*fb4d8502Sjsg #define mmVGT_DMA_REQ_FIFO_DEPTH                                                0x222e
2335*fb4d8502Sjsg #define mmVGT_DRAW_INIT_FIFO_DEPTH                                              0x222f
2336*fb4d8502Sjsg #define mmVGT_LAST_COPY_STATE                                                   0x2230
2337*fb4d8502Sjsg #define mmCC_GC_SHADER_ARRAY_CONFIG                                             0x226f
2338*fb4d8502Sjsg #define mmGC_USER_SHADER_ARRAY_CONFIG                                           0x2270
2339*fb4d8502Sjsg #define mmVGT_GS_MODE                                                           0xa290
2340*fb4d8502Sjsg #define mmVGT_GS_ONCHIP_CNTL                                                    0xa291
2341*fb4d8502Sjsg #define mmVGT_GS_OUT_PRIM_TYPE                                                  0xa29b
2342*fb4d8502Sjsg #define mmVGT_CACHE_INVALIDATION                                                0x2231
2343*fb4d8502Sjsg #define mmVGT_RESET_DEBUG                                                       0x2232
2344*fb4d8502Sjsg #define mmVGT_STRMOUT_DELAY                                                     0x2233
2345*fb4d8502Sjsg #define mmVGT_FIFO_DEPTHS                                                       0x2234
2346*fb4d8502Sjsg #define mmVGT_GS_PER_ES                                                         0xa295
2347*fb4d8502Sjsg #define mmVGT_ES_PER_GS                                                         0xa296
2348*fb4d8502Sjsg #define mmVGT_GS_PER_VS                                                         0xa297
2349*fb4d8502Sjsg #define mmVGT_GS_VERTEX_REUSE                                                   0x2235
2350*fb4d8502Sjsg #define mmVGT_MC_LAT_CNTL                                                       0x2236
2351*fb4d8502Sjsg #define mmIA_CNTL_STATUS                                                        0x2237
2352*fb4d8502Sjsg #define mmVGT_STRMOUT_CONFIG                                                    0xa2e5
2353*fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_SIZE_0                                             0xa2b4
2354*fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_SIZE_1                                             0xa2b8
2355*fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_SIZE_2                                             0xa2bc
2356*fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_SIZE_3                                             0xa2c0
2357*fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_OFFSET_0                                           0xa2b7
2358*fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_OFFSET_1                                           0xa2bb
2359*fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_OFFSET_2                                           0xa2bf
2360*fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_OFFSET_3                                           0xa2c3
2361*fb4d8502Sjsg #define mmVGT_STRMOUT_VTX_STRIDE_0                                              0xa2b5
2362*fb4d8502Sjsg #define mmVGT_STRMOUT_VTX_STRIDE_1                                              0xa2b9
2363*fb4d8502Sjsg #define mmVGT_STRMOUT_VTX_STRIDE_2                                              0xa2bd
2364*fb4d8502Sjsg #define mmVGT_STRMOUT_VTX_STRIDE_3                                              0xa2c1
2365*fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_CONFIG                                             0xa2e6
2366*fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_0                                      0xc244
2367*fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_1                                      0xc245
2368*fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_2                                      0xc246
2369*fb4d8502Sjsg #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_3                                      0xc247
2370*fb4d8502Sjsg #define mmVGT_STRMOUT_DRAW_OPAQUE_OFFSET                                        0xa2ca
2371*fb4d8502Sjsg #define mmVGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE                            0xa2cb
2372*fb4d8502Sjsg #define mmVGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE                                 0xa2cc
2373*fb4d8502Sjsg #define mmVGT_GS_MAX_VERT_OUT                                                   0xa2ce
2374*fb4d8502Sjsg #define mmIA_VMID_OVERRIDE                                                      0x2260
2375*fb4d8502Sjsg #define mmVGT_SHADER_STAGES_EN                                                  0xa2d5
2376*fb4d8502Sjsg #define mmVGT_LS_HS_CONFIG                                                      0xa2d6
2377*fb4d8502Sjsg #define mmVGT_DMA_LS_HS_CONFIG                                                  0x2273
2378*fb4d8502Sjsg #define mmVGT_TF_PARAM                                                          0xa2db
2379*fb4d8502Sjsg #define mmVGT_TF_RING_SIZE                                                      0xc24e
2380*fb4d8502Sjsg #define mmVGT_SYS_CONFIG                                                        0x2263
2381*fb4d8502Sjsg #define mmVGT_HS_OFFCHIP_PARAM                                                  0xc24f
2382*fb4d8502Sjsg #define mmVGT_TF_MEMORY_BASE                                                    0xc250
2383*fb4d8502Sjsg #define mmVGT_GS_INSTANCE_CNT                                                   0xa2e4
2384*fb4d8502Sjsg #define mmIA_MULTI_VGT_PARAM                                                    0xa2aa
2385*fb4d8502Sjsg #define mmVGT_VS_MAX_WAVE_ID                                                    0x2268
2386*fb4d8502Sjsg #define mmVGT_ESGS_RING_SIZE                                                    0xc240
2387*fb4d8502Sjsg #define mmVGT_GSVS_RING_SIZE                                                    0xc241
2388*fb4d8502Sjsg #define mmVGT_GSVS_RING_OFFSET_1                                                0xa298
2389*fb4d8502Sjsg #define mmVGT_GSVS_RING_OFFSET_2                                                0xa299
2390*fb4d8502Sjsg #define mmVGT_GSVS_RING_OFFSET_3                                                0xa29a
2391*fb4d8502Sjsg #define mmVGT_ESGS_RING_ITEMSIZE                                                0xa2ab
2392*fb4d8502Sjsg #define mmVGT_GSVS_RING_ITEMSIZE                                                0xa2ac
2393*fb4d8502Sjsg #define mmVGT_GS_VERT_ITEMSIZE                                                  0xa2d7
2394*fb4d8502Sjsg #define mmVGT_GS_VERT_ITEMSIZE_1                                                0xa2d8
2395*fb4d8502Sjsg #define mmVGT_GS_VERT_ITEMSIZE_2                                                0xa2d9
2396*fb4d8502Sjsg #define mmVGT_GS_VERT_ITEMSIZE_3                                                0xa2da
2397*fb4d8502Sjsg #define mmWD_CNTL_STATUS                                                        0x223f
2398*fb4d8502Sjsg #define mmWD_ENHANCE                                                            0xa2a0
2399*fb4d8502Sjsg #define mmGFX_PIPE_CONTROL                                                      0x226d
2400*fb4d8502Sjsg #define mmGFX_PIPE_PRIORITY                                                     0xf87f
2401*fb4d8502Sjsg #define mmCGTT_VGT_CLK_CTRL                                                     0xf084
2402*fb4d8502Sjsg #define mmCGTT_IA_CLK_CTRL                                                      0xf085
2403*fb4d8502Sjsg #define mmCGTT_WD_CLK_CTRL                                                      0xf086
2404*fb4d8502Sjsg #define mmVGT_DEBUG_CNTL                                                        0x2238
2405*fb4d8502Sjsg #define mmVGT_DEBUG_DATA                                                        0x2239
2406*fb4d8502Sjsg #define mmIA_DEBUG_CNTL                                                         0x223a
2407*fb4d8502Sjsg #define mmIA_DEBUG_DATA                                                         0x223b
2408*fb4d8502Sjsg #define mmVGT_CNTL_STATUS                                                       0x223c
2409*fb4d8502Sjsg #define mmWD_DEBUG_CNTL                                                         0x223d
2410*fb4d8502Sjsg #define mmWD_DEBUG_DATA                                                         0x223e
2411*fb4d8502Sjsg #define mmCC_GC_PRIM_CONFIG                                                     0x2240
2412*fb4d8502Sjsg #define mmGC_USER_PRIM_CONFIG                                                   0x2241
2413*fb4d8502Sjsg #define ixWD_DEBUG_REG0                                                         0x0
2414*fb4d8502Sjsg #define ixWD_DEBUG_REG1                                                         0x1
2415*fb4d8502Sjsg #define ixWD_DEBUG_REG2                                                         0x2
2416*fb4d8502Sjsg #define ixWD_DEBUG_REG3                                                         0x3
2417*fb4d8502Sjsg #define ixWD_DEBUG_REG4                                                         0x4
2418*fb4d8502Sjsg #define ixWD_DEBUG_REG5                                                         0x5
2419*fb4d8502Sjsg #define ixIA_DEBUG_REG0                                                         0x0
2420*fb4d8502Sjsg #define ixIA_DEBUG_REG1                                                         0x1
2421*fb4d8502Sjsg #define ixIA_DEBUG_REG2                                                         0x2
2422*fb4d8502Sjsg #define ixIA_DEBUG_REG3                                                         0x3
2423*fb4d8502Sjsg #define ixIA_DEBUG_REG4                                                         0x4
2424*fb4d8502Sjsg #define ixIA_DEBUG_REG5                                                         0x5
2425*fb4d8502Sjsg #define ixIA_DEBUG_REG6                                                         0x6
2426*fb4d8502Sjsg #define ixIA_DEBUG_REG7                                                         0x7
2427*fb4d8502Sjsg #define ixIA_DEBUG_REG8                                                         0x8
2428*fb4d8502Sjsg #define ixIA_DEBUG_REG9                                                         0x9
2429*fb4d8502Sjsg #define ixVGT_DEBUG_REG0                                                        0x0
2430*fb4d8502Sjsg #define ixVGT_DEBUG_REG1                                                        0x1
2431*fb4d8502Sjsg #define ixVGT_DEBUG_REG2                                                        0x1e
2432*fb4d8502Sjsg #define ixVGT_DEBUG_REG3                                                        0x1f
2433*fb4d8502Sjsg #define ixVGT_DEBUG_REG4                                                        0x20
2434*fb4d8502Sjsg #define ixVGT_DEBUG_REG5                                                        0x21
2435*fb4d8502Sjsg #define ixVGT_DEBUG_REG6                                                        0x22
2436*fb4d8502Sjsg #define ixVGT_DEBUG_REG7                                                        0x23
2437*fb4d8502Sjsg #define ixVGT_DEBUG_REG8                                                        0x8
2438*fb4d8502Sjsg #define ixVGT_DEBUG_REG9                                                        0x9
2439*fb4d8502Sjsg #define ixVGT_DEBUG_REG10                                                       0xa
2440*fb4d8502Sjsg #define ixVGT_DEBUG_REG11                                                       0xb
2441*fb4d8502Sjsg #define ixVGT_DEBUG_REG12                                                       0xc
2442*fb4d8502Sjsg #define ixVGT_DEBUG_REG13                                                       0xd
2443*fb4d8502Sjsg #define ixVGT_DEBUG_REG14                                                       0xe
2444*fb4d8502Sjsg #define ixVGT_DEBUG_REG15                                                       0xf
2445*fb4d8502Sjsg #define ixVGT_DEBUG_REG16                                                       0x10
2446*fb4d8502Sjsg #define ixVGT_DEBUG_REG17                                                       0x11
2447*fb4d8502Sjsg #define ixVGT_DEBUG_REG18                                                       0x7
2448*fb4d8502Sjsg #define ixVGT_DEBUG_REG19                                                       0x13
2449*fb4d8502Sjsg #define ixVGT_DEBUG_REG20                                                       0x14
2450*fb4d8502Sjsg #define ixVGT_DEBUG_REG21                                                       0x15
2451*fb4d8502Sjsg #define ixVGT_DEBUG_REG22                                                       0x16
2452*fb4d8502Sjsg #define ixVGT_DEBUG_REG23                                                       0x17
2453*fb4d8502Sjsg #define ixVGT_DEBUG_REG24                                                       0x18
2454*fb4d8502Sjsg #define ixVGT_DEBUG_REG25                                                       0x19
2455*fb4d8502Sjsg #define ixVGT_DEBUG_REG26                                                       0x24
2456*fb4d8502Sjsg #define ixVGT_DEBUG_REG27                                                       0x1b
2457*fb4d8502Sjsg #define ixVGT_DEBUG_REG28                                                       0x1c
2458*fb4d8502Sjsg #define ixVGT_DEBUG_REG29                                                       0x1d
2459*fb4d8502Sjsg #define ixVGT_DEBUG_REG30                                                       0x25
2460*fb4d8502Sjsg #define ixVGT_DEBUG_REG31                                                       0x26
2461*fb4d8502Sjsg #define ixVGT_DEBUG_REG32                                                       0x27
2462*fb4d8502Sjsg #define ixVGT_DEBUG_REG33                                                       0x28
2463*fb4d8502Sjsg #define ixVGT_DEBUG_REG34                                                       0x29
2464*fb4d8502Sjsg #define ixVGT_DEBUG_REG35                                                       0x2a
2465*fb4d8502Sjsg #define mmVGT_PERFCOUNTER_SEID_MASK                                             0xd894
2466*fb4d8502Sjsg #define mmVGT_PERFCOUNTER0_SELECT                                               0xd88c
2467*fb4d8502Sjsg #define mmVGT_PERFCOUNTER1_SELECT                                               0xd88d
2468*fb4d8502Sjsg #define mmVGT_PERFCOUNTER2_SELECT                                               0xd88e
2469*fb4d8502Sjsg #define mmVGT_PERFCOUNTER3_SELECT                                               0xd88f
2470*fb4d8502Sjsg #define mmVGT_PERFCOUNTER0_SELECT1                                              0xd890
2471*fb4d8502Sjsg #define mmVGT_PERFCOUNTER1_SELECT1                                              0xd891
2472*fb4d8502Sjsg #define mmVGT_PERFCOUNTER0_LO                                                   0xd090
2473*fb4d8502Sjsg #define mmVGT_PERFCOUNTER1_LO                                                   0xd092
2474*fb4d8502Sjsg #define mmVGT_PERFCOUNTER2_LO                                                   0xd094
2475*fb4d8502Sjsg #define mmVGT_PERFCOUNTER3_LO                                                   0xd096
2476*fb4d8502Sjsg #define mmVGT_PERFCOUNTER0_HI                                                   0xd091
2477*fb4d8502Sjsg #define mmVGT_PERFCOUNTER1_HI                                                   0xd093
2478*fb4d8502Sjsg #define mmVGT_PERFCOUNTER2_HI                                                   0xd095
2479*fb4d8502Sjsg #define mmVGT_PERFCOUNTER3_HI                                                   0xd097
2480*fb4d8502Sjsg #define mmIA_PERFCOUNTER0_SELECT                                                0xd884
2481*fb4d8502Sjsg #define mmIA_PERFCOUNTER1_SELECT                                                0xd885
2482*fb4d8502Sjsg #define mmIA_PERFCOUNTER2_SELECT                                                0xd886
2483*fb4d8502Sjsg #define mmIA_PERFCOUNTER3_SELECT                                                0xd887
2484*fb4d8502Sjsg #define mmIA_PERFCOUNTER0_SELECT1                                               0xd888
2485*fb4d8502Sjsg #define mmIA_PERFCOUNTER0_LO                                                    0xd088
2486*fb4d8502Sjsg #define mmIA_PERFCOUNTER1_LO                                                    0xd08a
2487*fb4d8502Sjsg #define mmIA_PERFCOUNTER2_LO                                                    0xd08c
2488*fb4d8502Sjsg #define mmIA_PERFCOUNTER3_LO                                                    0xd08e
2489*fb4d8502Sjsg #define mmIA_PERFCOUNTER0_HI                                                    0xd089
2490*fb4d8502Sjsg #define mmIA_PERFCOUNTER1_HI                                                    0xd08b
2491*fb4d8502Sjsg #define mmIA_PERFCOUNTER2_HI                                                    0xd08d
2492*fb4d8502Sjsg #define mmIA_PERFCOUNTER3_HI                                                    0xd08f
2493*fb4d8502Sjsg #define mmWD_PERFCOUNTER0_SELECT                                                0xd880
2494*fb4d8502Sjsg #define mmWD_PERFCOUNTER1_SELECT                                                0xd881
2495*fb4d8502Sjsg #define mmWD_PERFCOUNTER2_SELECT                                                0xd882
2496*fb4d8502Sjsg #define mmWD_PERFCOUNTER3_SELECT                                                0xd883
2497*fb4d8502Sjsg #define mmWD_PERFCOUNTER0_LO                                                    0xd080
2498*fb4d8502Sjsg #define mmWD_PERFCOUNTER1_LO                                                    0xd082
2499*fb4d8502Sjsg #define mmWD_PERFCOUNTER2_LO                                                    0xd084
2500*fb4d8502Sjsg #define mmWD_PERFCOUNTER3_LO                                                    0xd086
2501*fb4d8502Sjsg #define mmWD_PERFCOUNTER0_HI                                                    0xd081
2502*fb4d8502Sjsg #define mmWD_PERFCOUNTER1_HI                                                    0xd083
2503*fb4d8502Sjsg #define mmWD_PERFCOUNTER2_HI                                                    0xd085
2504*fb4d8502Sjsg #define mmWD_PERFCOUNTER3_HI                                                    0xd087
2505*fb4d8502Sjsg #define mmDIDT_IND_INDEX                                                        0x3280
2506*fb4d8502Sjsg #define mmDIDT_IND_DATA                                                         0x3281
2507*fb4d8502Sjsg #define ixDIDT_SQ_CTRL0                                                         0x0
2508*fb4d8502Sjsg #define ixDIDT_SQ_CTRL1                                                         0x1
2509*fb4d8502Sjsg #define ixDIDT_SQ_CTRL2                                                         0x2
2510*fb4d8502Sjsg #define ixDIDT_SQ_WEIGHT0_3                                                     0x10
2511*fb4d8502Sjsg #define ixDIDT_SQ_WEIGHT4_7                                                     0x11
2512*fb4d8502Sjsg #define ixDIDT_SQ_WEIGHT8_11                                                    0x12
2513*fb4d8502Sjsg #define ixDIDT_DB_CTRL0                                                         0x20
2514*fb4d8502Sjsg #define ixDIDT_DB_CTRL1                                                         0x21
2515*fb4d8502Sjsg #define ixDIDT_DB_CTRL2                                                         0x22
2516*fb4d8502Sjsg #define ixDIDT_DB_WEIGHT0_3                                                     0x30
2517*fb4d8502Sjsg #define ixDIDT_DB_WEIGHT4_7                                                     0x31
2518*fb4d8502Sjsg #define ixDIDT_DB_WEIGHT8_11                                                    0x32
2519*fb4d8502Sjsg #define ixDIDT_TD_CTRL0                                                         0x40
2520*fb4d8502Sjsg #define ixDIDT_TD_CTRL1                                                         0x41
2521*fb4d8502Sjsg #define ixDIDT_TD_CTRL2                                                         0x42
2522*fb4d8502Sjsg #define ixDIDT_TD_WEIGHT0_3                                                     0x50
2523*fb4d8502Sjsg #define ixDIDT_TD_WEIGHT4_7                                                     0x51
2524*fb4d8502Sjsg #define ixDIDT_TD_WEIGHT8_11                                                    0x52
2525*fb4d8502Sjsg #define ixDIDT_TCP_CTRL0                                                        0x60
2526*fb4d8502Sjsg #define ixDIDT_TCP_CTRL1                                                        0x61
2527*fb4d8502Sjsg #define ixDIDT_TCP_CTRL2                                                        0x62
2528*fb4d8502Sjsg #define ixDIDT_TCP_WEIGHT0_3                                                    0x70
2529*fb4d8502Sjsg #define ixDIDT_TCP_WEIGHT4_7                                                    0x71
2530*fb4d8502Sjsg #define ixDIDT_TCP_WEIGHT8_11                                                   0x72
2531*fb4d8502Sjsg 
2532*fb4d8502Sjsg #endif /* GFX_7_0_D_H */
2533