1*ad8b1aafSjsg /* 2*ad8b1aafSjsg * Copyright 2016 Advanced Micro Devices, Inc. 3*ad8b1aafSjsg * 4*ad8b1aafSjsg * Permission is hereby granted, free of charge, to any person obtaining a 5*ad8b1aafSjsg * copy of this software and associated documentation files (the "Software"), 6*ad8b1aafSjsg * to deal in the Software without restriction, including without limitation 7*ad8b1aafSjsg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*ad8b1aafSjsg * and/or sell copies of the Software, and to permit persons to whom the 9*ad8b1aafSjsg * Software is furnished to do so, subject to the following conditions: 10*ad8b1aafSjsg * 11*ad8b1aafSjsg * The above copyright notice and this permission notice shall be included in 12*ad8b1aafSjsg * all copies or substantial portions of the Software. 13*ad8b1aafSjsg * 14*ad8b1aafSjsg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*ad8b1aafSjsg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*ad8b1aafSjsg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*ad8b1aafSjsg * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18*ad8b1aafSjsg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19*ad8b1aafSjsg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20*ad8b1aafSjsg * OTHER DEALINGS IN THE SOFTWARE. 21*ad8b1aafSjsg * 22*ad8b1aafSjsg */ 23*ad8b1aafSjsg #ifndef _VEGA10_POWERTUNE_H_ 24*ad8b1aafSjsg #define _VEGA10_POWERTUNE_H_ 25*ad8b1aafSjsg 26*ad8b1aafSjsg enum vega10_pt_config_reg_type { 27*ad8b1aafSjsg VEGA10_CONFIGREG_MMR = 0, 28*ad8b1aafSjsg VEGA10_CONFIGREG_SMC_IND, 29*ad8b1aafSjsg VEGA10_CONFIGREG_DIDT_IND, 30*ad8b1aafSjsg VEGA10_CONFIGREG_CACHE, 31*ad8b1aafSjsg VEGA10_CONFIGREG_MAX 32*ad8b1aafSjsg }; 33*ad8b1aafSjsg 34*ad8b1aafSjsg enum vega10_didt_config_reg_type { 35*ad8b1aafSjsg VEGA10_CONFIGREG_DIDT = 0, 36*ad8b1aafSjsg VEGA10_CONFIGREG_GCCAC, 37*ad8b1aafSjsg VEGA10_CONFIGREG_SECAC 38*ad8b1aafSjsg }; 39*ad8b1aafSjsg 40*ad8b1aafSjsg /* PowerContainment Features */ 41*ad8b1aafSjsg #define POWERCONTAINMENT_FEATURE_DTE 0x00000001 42*ad8b1aafSjsg #define POWERCONTAINMENT_FEATURE_TDCLimit 0x00000002 43*ad8b1aafSjsg #define POWERCONTAINMENT_FEATURE_PkgPwrLimit 0x00000004 44*ad8b1aafSjsg 45*ad8b1aafSjsg struct vega10_pt_config_reg { 46*ad8b1aafSjsg uint32_t offset; 47*ad8b1aafSjsg uint32_t mask; 48*ad8b1aafSjsg uint32_t shift; 49*ad8b1aafSjsg uint32_t value; 50*ad8b1aafSjsg enum vega10_pt_config_reg_type type; 51*ad8b1aafSjsg }; 52*ad8b1aafSjsg 53*ad8b1aafSjsg struct vega10_didt_config_reg { 54*ad8b1aafSjsg uint32_t offset; 55*ad8b1aafSjsg uint32_t mask; 56*ad8b1aafSjsg uint32_t shift; 57*ad8b1aafSjsg uint32_t value; 58*ad8b1aafSjsg }; 59*ad8b1aafSjsg 60*ad8b1aafSjsg struct vega10_pt_defaults { 61*ad8b1aafSjsg uint8_t SviLoadLineEn; 62*ad8b1aafSjsg uint8_t SviLoadLineVddC; 63*ad8b1aafSjsg uint8_t TDC_VDDC_ThrottleReleaseLimitPerc; 64*ad8b1aafSjsg uint8_t TDC_MAWt; 65*ad8b1aafSjsg uint8_t TdcWaterfallCtl; 66*ad8b1aafSjsg uint8_t DTEAmbientTempBase; 67*ad8b1aafSjsg }; 68*ad8b1aafSjsg 69*ad8b1aafSjsg void vega10_initialize_power_tune_defaults(struct pp_hwmgr *hwmgr); 70*ad8b1aafSjsg int vega10_populate_bapm_parameters_in_dpm_table(struct pp_hwmgr *hwmgr); 71*ad8b1aafSjsg int vega10_populate_pm_fuses(struct pp_hwmgr *hwmgr); 72*ad8b1aafSjsg int vega10_enable_smc_cac(struct pp_hwmgr *hwmgr); 73*ad8b1aafSjsg int vega10_enable_power_containment(struct pp_hwmgr *hwmgr); 74*ad8b1aafSjsg int vega10_set_power_limit(struct pp_hwmgr *hwmgr, uint32_t n); 75*ad8b1aafSjsg int vega10_power_control_set_level(struct pp_hwmgr *hwmgr); 76*ad8b1aafSjsg int vega10_disable_power_containment(struct pp_hwmgr *hwmgr); 77*ad8b1aafSjsg 78*ad8b1aafSjsg int vega10_enable_didt_config(struct pp_hwmgr *hwmgr); 79*ad8b1aafSjsg int vega10_disable_didt_config(struct pp_hwmgr *hwmgr); 80*ad8b1aafSjsg 81*ad8b1aafSjsg #endif /* _VEGA10_POWERTUNE_H_ */ 82*ad8b1aafSjsg 83