1*1bb76ff1Sjsg /* 2*1bb76ff1Sjsg * Copyright 2018 Advanced Micro Devices, Inc. 3*1bb76ff1Sjsg * 4*1bb76ff1Sjsg * Permission is hereby granted, free of charge, to any person obtaining a 5*1bb76ff1Sjsg * copy of this software and associated documentation files (the "Software"), 6*1bb76ff1Sjsg * to deal in the Software without restriction, including without limitation 7*1bb76ff1Sjsg * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*1bb76ff1Sjsg * and/or sell copies of the Software, and to permit persons to whom the 9*1bb76ff1Sjsg * Software is furnished to do so, subject to the following conditions: 10*1bb76ff1Sjsg * 11*1bb76ff1Sjsg * The above copyright notice and this permission notice shall be included in 12*1bb76ff1Sjsg * all copies or substantial portions of the Software. 13*1bb76ff1Sjsg * 14*1bb76ff1Sjsg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*1bb76ff1Sjsg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*1bb76ff1Sjsg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*1bb76ff1Sjsg * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18*1bb76ff1Sjsg * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19*1bb76ff1Sjsg * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20*1bb76ff1Sjsg * OTHER DEALINGS IN THE SOFTWARE. 21*1bb76ff1Sjsg * 22*1bb76ff1Sjsg */ 23*1bb76ff1Sjsg 24*1bb76ff1Sjsg #ifndef VEGA20_PP_SMC_H 25*1bb76ff1Sjsg #define VEGA20_PP_SMC_H 26*1bb76ff1Sjsg 27*1bb76ff1Sjsg #pragma pack(push, 1) 28*1bb76ff1Sjsg 29*1bb76ff1Sjsg // SMU Response Codes: 30*1bb76ff1Sjsg #define PPSMC_Result_OK 0x1 31*1bb76ff1Sjsg #define PPSMC_Result_Failed 0xFF 32*1bb76ff1Sjsg #define PPSMC_Result_UnknownCmd 0xFE 33*1bb76ff1Sjsg #define PPSMC_Result_CmdRejectedPrereq 0xFD 34*1bb76ff1Sjsg #define PPSMC_Result_CmdRejectedBusy 0xFC 35*1bb76ff1Sjsg 36*1bb76ff1Sjsg // Message Definitions: 37*1bb76ff1Sjsg #define PPSMC_MSG_TestMessage 0x1 38*1bb76ff1Sjsg #define PPSMC_MSG_GetSmuVersion 0x2 39*1bb76ff1Sjsg #define PPSMC_MSG_GetDriverIfVersion 0x3 40*1bb76ff1Sjsg #define PPSMC_MSG_SetAllowedFeaturesMaskLow 0x4 41*1bb76ff1Sjsg #define PPSMC_MSG_SetAllowedFeaturesMaskHigh 0x5 42*1bb76ff1Sjsg #define PPSMC_MSG_EnableAllSmuFeatures 0x6 43*1bb76ff1Sjsg #define PPSMC_MSG_DisableAllSmuFeatures 0x7 44*1bb76ff1Sjsg #define PPSMC_MSG_EnableSmuFeaturesLow 0x8 45*1bb76ff1Sjsg #define PPSMC_MSG_EnableSmuFeaturesHigh 0x9 46*1bb76ff1Sjsg #define PPSMC_MSG_DisableSmuFeaturesLow 0xA 47*1bb76ff1Sjsg #define PPSMC_MSG_DisableSmuFeaturesHigh 0xB 48*1bb76ff1Sjsg #define PPSMC_MSG_GetEnabledSmuFeaturesLow 0xC 49*1bb76ff1Sjsg #define PPSMC_MSG_GetEnabledSmuFeaturesHigh 0xD 50*1bb76ff1Sjsg #define PPSMC_MSG_SetWorkloadMask 0xE 51*1bb76ff1Sjsg #define PPSMC_MSG_SetPptLimit 0xF 52*1bb76ff1Sjsg #define PPSMC_MSG_SetDriverDramAddrHigh 0x10 53*1bb76ff1Sjsg #define PPSMC_MSG_SetDriverDramAddrLow 0x11 54*1bb76ff1Sjsg #define PPSMC_MSG_SetToolsDramAddrHigh 0x12 55*1bb76ff1Sjsg #define PPSMC_MSG_SetToolsDramAddrLow 0x13 56*1bb76ff1Sjsg #define PPSMC_MSG_TransferTableSmu2Dram 0x14 57*1bb76ff1Sjsg #define PPSMC_MSG_TransferTableDram2Smu 0x15 58*1bb76ff1Sjsg #define PPSMC_MSG_UseDefaultPPTable 0x16 59*1bb76ff1Sjsg #define PPSMC_MSG_UseBackupPPTable 0x17 60*1bb76ff1Sjsg #define PPSMC_MSG_RunBtc 0x18 61*1bb76ff1Sjsg #define PPSMC_MSG_RequestI2CBus 0x19 62*1bb76ff1Sjsg #define PPSMC_MSG_ReleaseI2CBus 0x1A 63*1bb76ff1Sjsg #define PPSMC_MSG_SetFloorSocVoltage 0x21 64*1bb76ff1Sjsg #define PPSMC_MSG_SoftReset 0x22 65*1bb76ff1Sjsg #define PPSMC_MSG_StartBacoMonitor 0x23 66*1bb76ff1Sjsg #define PPSMC_MSG_CancelBacoMonitor 0x24 67*1bb76ff1Sjsg #define PPSMC_MSG_EnterBaco 0x25 68*1bb76ff1Sjsg #define PPSMC_MSG_SetSoftMinByFreq 0x26 69*1bb76ff1Sjsg #define PPSMC_MSG_SetSoftMaxByFreq 0x27 70*1bb76ff1Sjsg #define PPSMC_MSG_SetHardMinByFreq 0x28 71*1bb76ff1Sjsg #define PPSMC_MSG_SetHardMaxByFreq 0x29 72*1bb76ff1Sjsg #define PPSMC_MSG_GetMinDpmFreq 0x2A 73*1bb76ff1Sjsg #define PPSMC_MSG_GetMaxDpmFreq 0x2B 74*1bb76ff1Sjsg #define PPSMC_MSG_GetDpmFreqByIndex 0x2C 75*1bb76ff1Sjsg #define PPSMC_MSG_GetDpmClockFreq 0x2D 76*1bb76ff1Sjsg #define PPSMC_MSG_GetSsVoltageByDpm 0x2E 77*1bb76ff1Sjsg #define PPSMC_MSG_SetMemoryChannelConfig 0x2F 78*1bb76ff1Sjsg #define PPSMC_MSG_SetGeminiMode 0x30 79*1bb76ff1Sjsg #define PPSMC_MSG_SetGeminiApertureHigh 0x31 80*1bb76ff1Sjsg #define PPSMC_MSG_SetGeminiApertureLow 0x32 81*1bb76ff1Sjsg #define PPSMC_MSG_SetMinLinkDpmByIndex 0x33 82*1bb76ff1Sjsg #define PPSMC_MSG_OverridePcieParameters 0x34 83*1bb76ff1Sjsg #define PPSMC_MSG_OverDriveSetPercentage 0x35 84*1bb76ff1Sjsg #define PPSMC_MSG_SetMinDeepSleepDcefclk 0x36 85*1bb76ff1Sjsg #define PPSMC_MSG_ReenableAcDcInterrupt 0x37 86*1bb76ff1Sjsg #define PPSMC_MSG_NotifyPowerSource 0x38 87*1bb76ff1Sjsg #define PPSMC_MSG_SetUclkFastSwitch 0x39 88*1bb76ff1Sjsg #define PPSMC_MSG_SetUclkDownHyst 0x3A 89*1bb76ff1Sjsg //#define PPSMC_MSG_GfxDeviceDriverReset 0x3B 90*1bb76ff1Sjsg #define PPSMC_MSG_GetCurrentRpm 0x3C 91*1bb76ff1Sjsg #define PPSMC_MSG_SetVideoFps 0x3D 92*1bb76ff1Sjsg #define PPSMC_MSG_SetTjMax 0x3E 93*1bb76ff1Sjsg #define PPSMC_MSG_SetFanTemperatureTarget 0x3F 94*1bb76ff1Sjsg #define PPSMC_MSG_PrepareMp1ForUnload 0x40 95*1bb76ff1Sjsg #define PPSMC_MSG_DramLogSetDramAddrHigh 0x41 96*1bb76ff1Sjsg #define PPSMC_MSG_DramLogSetDramAddrLow 0x42 97*1bb76ff1Sjsg #define PPSMC_MSG_DramLogSetDramSize 0x43 98*1bb76ff1Sjsg #define PPSMC_MSG_SetFanMaxRpm 0x44 99*1bb76ff1Sjsg #define PPSMC_MSG_SetFanMinPwm 0x45 100*1bb76ff1Sjsg #define PPSMC_MSG_ConfigureGfxDidt 0x46 101*1bb76ff1Sjsg #define PPSMC_MSG_NumOfDisplays 0x47 102*1bb76ff1Sjsg #define PPSMC_MSG_RemoveMargins 0x48 103*1bb76ff1Sjsg #define PPSMC_MSG_ReadSerialNumTop32 0x49 104*1bb76ff1Sjsg #define PPSMC_MSG_ReadSerialNumBottom32 0x4A 105*1bb76ff1Sjsg #define PPSMC_MSG_SetSystemVirtualDramAddrHigh 0x4B 106*1bb76ff1Sjsg #define PPSMC_MSG_SetSystemVirtualDramAddrLow 0x4C 107*1bb76ff1Sjsg #define PPSMC_MSG_WaflTest 0x4D 108*1bb76ff1Sjsg #define PPSMC_MSG_SetFclkGfxClkRatio 0x4E 109*1bb76ff1Sjsg // Unused ID 0x4F to 0x50 110*1bb76ff1Sjsg #define PPSMC_MSG_AllowGfxOff 0x51 111*1bb76ff1Sjsg #define PPSMC_MSG_DisallowGfxOff 0x52 112*1bb76ff1Sjsg #define PPSMC_MSG_GetPptLimit 0x53 113*1bb76ff1Sjsg #define PPSMC_MSG_GetDcModeMaxDpmFreq 0x54 114*1bb76ff1Sjsg #define PPSMC_MSG_GetDebugData 0x55 115*1bb76ff1Sjsg #define PPSMC_MSG_SetXgmiMode 0x56 116*1bb76ff1Sjsg #define PPSMC_MSG_RunAfllBtc 0x57 117*1bb76ff1Sjsg #define PPSMC_MSG_ExitBaco 0x58 118*1bb76ff1Sjsg #define PPSMC_MSG_PrepareMp1ForReset 0x59 119*1bb76ff1Sjsg #define PPSMC_MSG_PrepareMp1ForShutdown 0x5A 120*1bb76ff1Sjsg #define PPSMC_MSG_SetMGpuFanBoostLimitRpm 0x5D 121*1bb76ff1Sjsg #define PPSMC_MSG_GetAVFSVoltageByDpm 0x5F 122*1bb76ff1Sjsg #define PPSMC_MSG_BacoWorkAroundFlushVDCI 0x60 123*1bb76ff1Sjsg #define PPSMC_MSG_DFCstateControl 0x63 124*1bb76ff1Sjsg #define PPSMC_Message_Count 0x64 125*1bb76ff1Sjsg 126*1bb76ff1Sjsg typedef uint32_t PPSMC_Result; 127*1bb76ff1Sjsg typedef uint32_t PPSMC_Msg; 128*1bb76ff1Sjsg 129*1bb76ff1Sjsg #pragma pack(pop) 130*1bb76ff1Sjsg 131*1bb76ff1Sjsg #endif 132