15ca02815Sjsg /* SPDX-License-Identifier: MIT */ 25ca02815Sjsg /* 35ca02815Sjsg * Copyright © 2019 Intel Corporation 45ca02815Sjsg */ 55ca02815Sjsg 65ca02815Sjsg #ifndef __INTEL_DMC_H__ 75ca02815Sjsg #define __INTEL_DMC_H__ 85ca02815Sjsg 9*f005ef32Sjsg #include <linux/types.h> 105ca02815Sjsg 111bb76ff1Sjsg struct drm_i915_error_state_buf; 125ca02815Sjsg #define drm_i915_private inteldrm_softc 135ca02815Sjsg struct drm_i915_private; 14*f005ef32Sjsg enum pipe; 155ca02815Sjsg 16*f005ef32Sjsg void intel_dmc_init(struct drm_i915_private *i915); 175ca02815Sjsg void intel_dmc_load_program(struct drm_i915_private *i915); 181bb76ff1Sjsg void intel_dmc_disable_program(struct drm_i915_private *i915); 19*f005ef32Sjsg void intel_dmc_enable_pipe(struct drm_i915_private *i915, enum pipe pipe); 20*f005ef32Sjsg void intel_dmc_disable_pipe(struct drm_i915_private *i915, enum pipe pipe); 21*f005ef32Sjsg void intel_dmc_fini(struct drm_i915_private *i915); 22*f005ef32Sjsg void intel_dmc_suspend(struct drm_i915_private *i915); 23*f005ef32Sjsg void intel_dmc_resume(struct drm_i915_private *i915); 245ca02815Sjsg bool intel_dmc_has_payload(struct drm_i915_private *i915); 251bb76ff1Sjsg void intel_dmc_debugfs_register(struct drm_i915_private *i915); 261bb76ff1Sjsg void intel_dmc_print_error_state(struct drm_i915_error_state_buf *m, 271bb76ff1Sjsg struct drm_i915_private *i915); 281bb76ff1Sjsg 291bb76ff1Sjsg void assert_dmc_loaded(struct drm_i915_private *i915); 305ca02815Sjsg 315ca02815Sjsg #endif /* __INTEL_DMC_H__ */ 32