1*1bb76ff1Sjsg /* SPDX-License-Identifier: MIT */ 2*1bb76ff1Sjsg /* 3*1bb76ff1Sjsg * Copyright © 2022 Intel Corporation 4*1bb76ff1Sjsg */ 5*1bb76ff1Sjsg 6*1bb76ff1Sjsg #ifndef __I915_GEM_DMABUF_H__ 7*1bb76ff1Sjsg #define __I915_GEM_DMABUF_H__ 8*1bb76ff1Sjsg 9*1bb76ff1Sjsg struct drm_gem_object; 10*1bb76ff1Sjsg struct drm_device; 11*1bb76ff1Sjsg struct dma_buf; 12*1bb76ff1Sjsg 13*1bb76ff1Sjsg struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev, 14*1bb76ff1Sjsg struct dma_buf *dma_buf); 15*1bb76ff1Sjsg 16*1bb76ff1Sjsg struct dma_buf *i915_gem_prime_export(struct drm_gem_object *gem_obj, int flags); 17*1bb76ff1Sjsg 18*1bb76ff1Sjsg #endif /* __I915_GEM_DMABUF_H__ */ 19