xref: /openbsd/sys/dev/pci/drm/i915/i915_suspend.c (revision 1bb76ff1)
1746fbbdbSjsg /*
2746fbbdbSjsg  *
3746fbbdbSjsg  * Copyright 2008 (c) Intel Corporation
4746fbbdbSjsg  *   Jesse Barnes <jbarnes@virtuousgeek.org>
5746fbbdbSjsg  *
6746fbbdbSjsg  * Permission is hereby granted, free of charge, to any person obtaining a
7746fbbdbSjsg  * copy of this software and associated documentation files (the
8746fbbdbSjsg  * "Software"), to deal in the Software without restriction, including
9746fbbdbSjsg  * without limitation the rights to use, copy, modify, merge, publish,
10746fbbdbSjsg  * distribute, sub license, and/or sell copies of the Software, and to
11746fbbdbSjsg  * permit persons to whom the Software is furnished to do so, subject to
12746fbbdbSjsg  * the following conditions:
13746fbbdbSjsg  *
14746fbbdbSjsg  * The above copyright notice and this permission notice (including the
15746fbbdbSjsg  * next paragraph) shall be included in all copies or substantial portions
16746fbbdbSjsg  * of the Software.
17746fbbdbSjsg  *
18746fbbdbSjsg  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19746fbbdbSjsg  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20746fbbdbSjsg  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21746fbbdbSjsg  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22746fbbdbSjsg  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23746fbbdbSjsg  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24746fbbdbSjsg  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25746fbbdbSjsg  */
26746fbbdbSjsg 
275ca02815Sjsg #include "display/intel_de.h"
28c349dbc7Sjsg #include "display/intel_gmbus.h"
29c349dbc7Sjsg #include "display/intel_vga.h"
30c349dbc7Sjsg 
31c349dbc7Sjsg #include "i915_drv.h"
32746fbbdbSjsg #include "i915_reg.h"
33c349dbc7Sjsg #include "i915_suspend.h"
34*1bb76ff1Sjsg #include "intel_pci_config.h"
35746fbbdbSjsg 
intel_save_swf(struct drm_i915_private * dev_priv)365ca02815Sjsg static void intel_save_swf(struct drm_i915_private *dev_priv)
37746fbbdbSjsg {
385ca02815Sjsg 	int i;
39ad8b1aafSjsg 
405ca02815Sjsg 	/* Scratch space */
415ca02815Sjsg 	if (GRAPHICS_VER(dev_priv) == 2 && IS_MOBILE(dev_priv)) {
425ca02815Sjsg 		for (i = 0; i < 7; i++) {
435ca02815Sjsg 			dev_priv->regfile.saveSWF0[i] = intel_de_read(dev_priv, SWF0(i));
445ca02815Sjsg 			dev_priv->regfile.saveSWF1[i] = intel_de_read(dev_priv, SWF1(i));
455ca02815Sjsg 		}
465ca02815Sjsg 		for (i = 0; i < 3; i++)
475ca02815Sjsg 			dev_priv->regfile.saveSWF3[i] = intel_de_read(dev_priv, SWF3(i));
485ca02815Sjsg 	} else if (GRAPHICS_VER(dev_priv) == 2) {
495ca02815Sjsg 		for (i = 0; i < 7; i++)
505ca02815Sjsg 			dev_priv->regfile.saveSWF1[i] = intel_de_read(dev_priv, SWF1(i));
515ca02815Sjsg 	} else if (HAS_GMCH(dev_priv)) {
525ca02815Sjsg 		for (i = 0; i < 16; i++) {
535ca02815Sjsg 			dev_priv->regfile.saveSWF0[i] = intel_de_read(dev_priv, SWF0(i));
545ca02815Sjsg 			dev_priv->regfile.saveSWF1[i] = intel_de_read(dev_priv, SWF1(i));
555ca02815Sjsg 		}
565ca02815Sjsg 		for (i = 0; i < 3; i++)
575ca02815Sjsg 			dev_priv->regfile.saveSWF3[i] = intel_de_read(dev_priv, SWF3(i));
585ca02815Sjsg 	}
59746fbbdbSjsg }
60746fbbdbSjsg 
intel_restore_swf(struct drm_i915_private * dev_priv)615ca02815Sjsg static void intel_restore_swf(struct drm_i915_private *dev_priv)
625ca02815Sjsg {
635ca02815Sjsg 	int i;
645ca02815Sjsg 
655ca02815Sjsg 	/* Scratch space */
665ca02815Sjsg 	if (GRAPHICS_VER(dev_priv) == 2 && IS_MOBILE(dev_priv)) {
675ca02815Sjsg 		for (i = 0; i < 7; i++) {
685ca02815Sjsg 			intel_de_write(dev_priv, SWF0(i), dev_priv->regfile.saveSWF0[i]);
695ca02815Sjsg 			intel_de_write(dev_priv, SWF1(i), dev_priv->regfile.saveSWF1[i]);
705ca02815Sjsg 		}
715ca02815Sjsg 		for (i = 0; i < 3; i++)
725ca02815Sjsg 			intel_de_write(dev_priv, SWF3(i), dev_priv->regfile.saveSWF3[i]);
735ca02815Sjsg 	} else if (GRAPHICS_VER(dev_priv) == 2) {
745ca02815Sjsg 		for (i = 0; i < 7; i++)
755ca02815Sjsg 			intel_de_write(dev_priv, SWF1(i), dev_priv->regfile.saveSWF1[i]);
765ca02815Sjsg 	} else if (HAS_GMCH(dev_priv)) {
775ca02815Sjsg 		for (i = 0; i < 16; i++) {
785ca02815Sjsg 			intel_de_write(dev_priv, SWF0(i), dev_priv->regfile.saveSWF0[i]);
795ca02815Sjsg 			intel_de_write(dev_priv, SWF1(i), dev_priv->regfile.saveSWF1[i]);
805ca02815Sjsg 		}
815ca02815Sjsg 		for (i = 0; i < 3; i++)
825ca02815Sjsg 			intel_de_write(dev_priv, SWF3(i), dev_priv->regfile.saveSWF3[i]);
835ca02815Sjsg 	}
845ca02815Sjsg }
855ca02815Sjsg 
i915_save_display(struct drm_i915_private * dev_priv)865ca02815Sjsg void i915_save_display(struct drm_i915_private *dev_priv)
87746fbbdbSjsg {
88ad8b1aafSjsg 	struct pci_dev *pdev = dev_priv->drm.pdev;
89ad8b1aafSjsg 
905ca02815Sjsg 	if (!HAS_DISPLAY(dev_priv))
915ca02815Sjsg 		return;
925ca02815Sjsg 
935ca02815Sjsg 	/* Display arbitration control */
945ca02815Sjsg 	if (GRAPHICS_VER(dev_priv) <= 4)
955ca02815Sjsg 		dev_priv->regfile.saveDSPARB = intel_de_read(dev_priv, DSPARB);
965ca02815Sjsg 
975ca02815Sjsg 	if (GRAPHICS_VER(dev_priv) == 4)
985ca02815Sjsg 		pci_read_config_word(pdev, GCDGMBUS,
995ca02815Sjsg 				     &dev_priv->regfile.saveGCDGMBUS);
1005ca02815Sjsg 
1015ca02815Sjsg 	intel_save_swf(dev_priv);
1025ca02815Sjsg }
1035ca02815Sjsg 
i915_restore_display(struct drm_i915_private * dev_priv)1045ca02815Sjsg void i915_restore_display(struct drm_i915_private *dev_priv)
1055ca02815Sjsg {
1065ca02815Sjsg 	struct pci_dev *pdev = dev_priv->drm.pdev;
1075ca02815Sjsg 
1085ca02815Sjsg 	if (!HAS_DISPLAY(dev_priv))
1095ca02815Sjsg 		return;
1105ca02815Sjsg 
1115ca02815Sjsg 	intel_restore_swf(dev_priv);
1125ca02815Sjsg 
1135ca02815Sjsg 	if (GRAPHICS_VER(dev_priv) == 4)
114ad8b1aafSjsg 		pci_write_config_word(pdev, GCDGMBUS,
115ad8b1aafSjsg 				      dev_priv->regfile.saveGCDGMBUS);
116ad8b1aafSjsg 
117746fbbdbSjsg 	/* Display arbitration */
1185ca02815Sjsg 	if (GRAPHICS_VER(dev_priv) <= 4)
1195ca02815Sjsg 		intel_de_write(dev_priv, DSPARB, dev_priv->regfile.saveDSPARB);
120746fbbdbSjsg 
121c349dbc7Sjsg 	intel_vga_redisable(dev_priv);
122ad8b1aafSjsg 
123ad8b1aafSjsg 	intel_gmbus_reset(dev_priv);
124746fbbdbSjsg }
125