1 /** 2 * \file radeon_drv.c 3 * ATI Radeon driver 4 * 5 * \author Gareth Hughes <gareth@valinux.com> 6 */ 7 8 /* 9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 10 * All Rights Reserved. 11 * 12 * Permission is hereby granted, free of charge, to any person obtaining a 13 * copy of this software and associated documentation files (the "Software"), 14 * to deal in the Software without restriction, including without limitation 15 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 16 * and/or sell copies of the Software, and to permit persons to whom the 17 * Software is furnished to do so, subject to the following conditions: 18 * 19 * The above copyright notice and this permission notice (including the next 20 * paragraph) shall be included in all copies or substantial portions of the 21 * Software. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 29 * OTHER DEALINGS IN THE SOFTWARE. 30 */ 31 32 33 #include <linux/compat.h> 34 #include <linux/console.h> 35 #include <linux/module.h> 36 #include <linux/pm_runtime.h> 37 #include <linux/vga_switcheroo.h> 38 #include <linux/mmu_notifier.h> 39 #include <linux/pci.h> 40 41 #include <drm/drm_agpsupport.h> 42 #include <drm/drm_crtc_helper.h> 43 #include <drm/drm_drv.h> 44 #include <drm/drm_fb_helper.h> 45 #include <drm/drm_file.h> 46 #include <drm/drm_gem.h> 47 #include <drm/drm_ioctl.h> 48 #include <drm/drm_pciids.h> 49 #include <drm/drm_probe_helper.h> 50 #include <drm/drm_vblank.h> 51 #include <drm/radeon_drm.h> 52 53 #include "radeon_drv.h" 54 #include "radeon.h" 55 56 /* 57 * KMS wrapper. 58 * - 2.0.0 - initial interface 59 * - 2.1.0 - add square tiling interface 60 * - 2.2.0 - add r6xx/r7xx const buffer support 61 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs 62 * - 2.4.0 - add crtc id query 63 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen 64 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500) 65 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs 66 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query 67 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query 68 * 2.10.0 - fusion 2D tiling 69 * 2.11.0 - backend map, initial compute support for the CS checker 70 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS 71 * 2.13.0 - virtual memory support, streamout 72 * 2.14.0 - add evergreen tiling informations 73 * 2.15.0 - add max_pipes query 74 * 2.16.0 - fix evergreen 2D tiled surface calculation 75 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx 76 * 2.18.0 - r600-eg: allow "invalid" DB formats 77 * 2.19.0 - r600-eg: MSAA textures 78 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query 79 * 2.21.0 - r600-r700: FMASK and CMASK 80 * 2.22.0 - r600 only: RESOLVE_BOX allowed 81 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880 82 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures 83 * 2.25.0 - eg+: new info request for num SE and num SH 84 * 2.26.0 - r600-eg: fix htile size computation 85 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA 86 * 2.28.0 - r600-eg: Add MEM_WRITE packet support 87 * 2.29.0 - R500 FP16 color clear registers 88 * 2.30.0 - fix for FMASK texturing 89 * 2.31.0 - Add fastfb support for rs690 90 * 2.32.0 - new info request for rings working 91 * 2.33.0 - Add SI tiling mode array query 92 * 2.34.0 - Add CIK tiling mode array query 93 * 2.35.0 - Add CIK macrotile mode array query 94 * 2.36.0 - Fix CIK DCE tiling setup 95 * 2.37.0 - allow GS ring setup on r6xx/r7xx 96 * 2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN), 97 * CIK: 1D and linear tiling modes contain valid PIPE_CONFIG 98 * 2.39.0 - Add INFO query for number of active CUs 99 * 2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting 100 * CS to GPU on >= r600 101 * 2.41.0 - evergreen/cayman: Add SET_BASE/DRAW_INDIRECT command parsing support 102 * 2.42.0 - Add VCE/VUI (Video Usability Information) support 103 * 2.43.0 - RADEON_INFO_GPU_RESET_COUNTER 104 * 2.44.0 - SET_APPEND_CNT packet3 support 105 * 2.45.0 - Allow setting shader registers using DMA/COPY packet3 on SI 106 * 2.46.0 - Add PFP_SYNC_ME support on evergreen 107 * 2.47.0 - Add UVD_NO_OP register support 108 * 2.48.0 - TA_CS_BC_BASE_ADDR allowed on SI 109 * 2.49.0 - DRM_RADEON_GEM_INFO ioctl returns correct vram_size/visible values 110 * 2.50.0 - Allows unaligned shader loads on CIK. (needed by OpenGL) 111 */ 112 #define KMS_DRIVER_MAJOR 2 113 #define KMS_DRIVER_MINOR 50 114 #define KMS_DRIVER_PATCHLEVEL 0 115 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); 116 void radeon_driver_unload_kms(struct drm_device *dev); 117 void radeon_driver_lastclose_kms(struct drm_device *dev); 118 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv); 119 void radeon_driver_postclose_kms(struct drm_device *dev, 120 struct drm_file *file_priv); 121 int radeon_suspend_kms(struct drm_device *dev, bool suspend, 122 bool fbcon, bool freeze); 123 int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon); 124 void radeon_driver_irq_preinstall_kms(struct drm_device *dev); 125 int radeon_driver_irq_postinstall_kms(struct drm_device *dev); 126 void radeon_driver_irq_uninstall_kms(struct drm_device *dev); 127 irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg); 128 void radeon_gem_object_free(struct drm_gem_object *obj); 129 int radeon_gem_object_open(struct drm_gem_object *obj, 130 struct drm_file *file_priv); 131 void radeon_gem_object_close(struct drm_gem_object *obj, 132 struct drm_file *file_priv); 133 struct dma_buf *radeon_gem_prime_export(struct drm_gem_object *gobj, 134 int flags); 135 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int crtc, 136 unsigned int flags, int *vpos, int *hpos, 137 ktime_t *stime, ktime_t *etime, 138 const struct drm_display_mode *mode); 139 extern bool radeon_is_px(struct drm_device *dev); 140 extern const struct drm_ioctl_desc radeon_ioctls_kms[]; 141 extern int radeon_max_kms_ioctl; 142 #ifdef __linux__ 143 int radeon_mmap(struct file *filp, struct vm_area_struct *vma); 144 #else 145 struct uvm_object *radeon_mmap(struct file *, vm_prot_t, voff_t, vsize_t); 146 #endif 147 int radeon_mode_dumb_mmap(struct drm_file *filp, 148 struct drm_device *dev, 149 uint32_t handle, uint64_t *offset_p); 150 int radeon_mode_dumb_create(struct drm_file *file_priv, 151 struct drm_device *dev, 152 struct drm_mode_create_dumb *args); 153 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj); 154 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev, 155 struct dma_buf_attachment *, 156 struct sg_table *sg); 157 int radeon_gem_prime_pin(struct drm_gem_object *obj); 158 void radeon_gem_prime_unpin(struct drm_gem_object *obj); 159 void *radeon_gem_prime_vmap(struct drm_gem_object *obj); 160 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); 161 162 /* atpx handler */ 163 #if defined(CONFIG_VGA_SWITCHEROO) 164 void radeon_register_atpx_handler(void); 165 void radeon_unregister_atpx_handler(void); 166 bool radeon_has_atpx_dgpu_power_cntl(void); 167 bool radeon_is_atpx_hybrid(void); 168 #else 169 #ifdef notyet 170 static inline void radeon_register_atpx_handler(void) {} 171 static inline void radeon_unregister_atpx_handler(void) {} 172 static inline bool radeon_has_atpx_dgpu_power_cntl(void) { return false; } 173 static inline bool radeon_is_atpx_hybrid(void) { return false; } 174 #endif 175 #endif 176 177 int radeon_no_wb; 178 int radeon_modeset = -1; 179 int radeon_dynclks = -1; 180 int radeon_r4xx_atom = 0; 181 int radeon_agpmode = -1; 182 int radeon_vram_limit = 0; 183 int radeon_gart_size = -1; /* auto */ 184 int radeon_benchmarking = 0; 185 int radeon_testing = 0; 186 int radeon_connector_table = 0; 187 int radeon_tv = 1; 188 int radeon_audio = -1; 189 int radeon_disp_priority = 0; 190 int radeon_hw_i2c = 0; 191 int radeon_pcie_gen2 = -1; 192 int radeon_msi = -1; 193 int radeon_lockup_timeout = 10000; 194 int radeon_fastfb = 0; 195 int radeon_dpm = -1; 196 int radeon_aspm = -1; 197 int radeon_runtime_pm = -1; 198 int radeon_hard_reset = 0; 199 int radeon_vm_size = 8; 200 int radeon_vm_block_size = -1; 201 int radeon_deep_color = 0; 202 int radeon_use_pflipirq = 2; 203 int radeon_bapm = -1; 204 int radeon_backlight = -1; 205 int radeon_auxch = -1; 206 int radeon_mst = 0; 207 int radeon_uvd = 1; 208 int radeon_vce = 1; 209 210 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); 211 module_param_named(no_wb, radeon_no_wb, int, 0444); 212 213 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); 214 module_param_named(modeset, radeon_modeset, int, 0400); 215 216 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks"); 217 module_param_named(dynclks, radeon_dynclks, int, 0444); 218 219 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx"); 220 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444); 221 222 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes"); 223 module_param_named(vramlimit, radeon_vram_limit, int, 0600); 224 225 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)"); 226 module_param_named(agpmode, radeon_agpmode, int, 0444); 227 228 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)"); 229 module_param_named(gartsize, radeon_gart_size, int, 0600); 230 231 MODULE_PARM_DESC(benchmark, "Run benchmark"); 232 module_param_named(benchmark, radeon_benchmarking, int, 0444); 233 234 MODULE_PARM_DESC(test, "Run tests"); 235 module_param_named(test, radeon_testing, int, 0444); 236 237 MODULE_PARM_DESC(connector_table, "Force connector table"); 238 module_param_named(connector_table, radeon_connector_table, int, 0444); 239 240 MODULE_PARM_DESC(tv, "TV enable (0 = disable)"); 241 module_param_named(tv, radeon_tv, int, 0444); 242 243 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)"); 244 module_param_named(audio, radeon_audio, int, 0444); 245 246 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)"); 247 module_param_named(disp_priority, radeon_disp_priority, int, 0444); 248 249 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)"); 250 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444); 251 252 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)"); 253 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444); 254 255 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)"); 256 module_param_named(msi, radeon_msi, int, 0444); 257 258 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 10000 = 10 seconds, 0 = disable)"); 259 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444); 260 261 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)"); 262 module_param_named(fastfb, radeon_fastfb, int, 0444); 263 264 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)"); 265 module_param_named(dpm, radeon_dpm, int, 0444); 266 267 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)"); 268 module_param_named(aspm, radeon_aspm, int, 0444); 269 270 MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)"); 271 module_param_named(runpm, radeon_runtime_pm, int, 0444); 272 273 MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))"); 274 module_param_named(hard_reset, radeon_hard_reset, int, 0444); 275 276 MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)"); 277 module_param_named(vm_size, radeon_vm_size, int, 0444); 278 279 MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)"); 280 module_param_named(vm_block_size, radeon_vm_block_size, int, 0444); 281 282 MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))"); 283 module_param_named(deep_color, radeon_deep_color, int, 0444); 284 285 MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))"); 286 module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444); 287 288 MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)"); 289 module_param_named(bapm, radeon_bapm, int, 0444); 290 291 MODULE_PARM_DESC(backlight, "backlight support (1 = enable, 0 = disable, -1 = auto)"); 292 module_param_named(backlight, radeon_backlight, int, 0444); 293 294 MODULE_PARM_DESC(auxch, "Use native auxch experimental support (1 = enable, 0 = disable, -1 = auto)"); 295 module_param_named(auxch, radeon_auxch, int, 0444); 296 297 MODULE_PARM_DESC(mst, "DisplayPort MST experimental support (1 = enable, 0 = disable)"); 298 module_param_named(mst, radeon_mst, int, 0444); 299 300 MODULE_PARM_DESC(uvd, "uvd enable/disable uvd support (1 = enable, 0 = disable)"); 301 module_param_named(uvd, radeon_uvd, int, 0444); 302 303 MODULE_PARM_DESC(vce, "vce enable/disable vce support (1 = enable, 0 = disable)"); 304 module_param_named(vce, radeon_vce, int, 0444); 305 306 int radeon_si_support = 1; 307 MODULE_PARM_DESC(si_support, "SI support (1 = enabled (default), 0 = disabled)"); 308 module_param_named(si_support, radeon_si_support, int, 0444); 309 310 int radeon_cik_support = 1; 311 MODULE_PARM_DESC(cik_support, "CIK support (1 = enabled (default), 0 = disabled)"); 312 module_param_named(cik_support, radeon_cik_support, int, 0444); 313 314 const struct pci_device_id radeondrm_pciidlist[] = { 315 radeon_PCI_IDS 316 }; 317 318 MODULE_DEVICE_TABLE(pci, pciidlist); 319 320 #ifdef notyet 321 static struct drm_driver kms_driver; 322 #endif 323 324 bool radeon_device_is_virtual(void); 325 326 #ifdef __linux__ 327 static int radeon_pci_probe(struct pci_dev *pdev, 328 const struct pci_device_id *ent) 329 { 330 unsigned long flags = 0; 331 struct drm_device *dev; 332 int ret; 333 334 if (!ent) 335 return -ENODEV; /* Avoid NULL-ptr deref in drm_get_pci_dev */ 336 337 flags = ent->driver_data; 338 339 if (!radeon_si_support) { 340 switch (flags & RADEON_FAMILY_MASK) { 341 case CHIP_TAHITI: 342 case CHIP_PITCAIRN: 343 case CHIP_VERDE: 344 case CHIP_OLAND: 345 case CHIP_HAINAN: 346 dev_info(&pdev->dev, 347 "SI support disabled by module param\n"); 348 return -ENODEV; 349 } 350 } 351 if (!radeon_cik_support) { 352 switch (flags & RADEON_FAMILY_MASK) { 353 case CHIP_KAVERI: 354 case CHIP_BONAIRE: 355 case CHIP_HAWAII: 356 case CHIP_KABINI: 357 case CHIP_MULLINS: 358 dev_info(&pdev->dev, 359 "CIK support disabled by module param\n"); 360 return -ENODEV; 361 } 362 } 363 364 if (vga_switcheroo_client_probe_defer(pdev)) 365 return -EPROBE_DEFER; 366 367 /* Get rid of things like offb */ 368 ret = drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, "radeondrmfb"); 369 if (ret) 370 return ret; 371 372 dev = drm_dev_alloc(&kms_driver, &pdev->dev); 373 if (IS_ERR(dev)) 374 return PTR_ERR(dev); 375 376 ret = pci_enable_device(pdev); 377 if (ret) 378 goto err_free; 379 380 dev->pdev = pdev; 381 #ifdef __alpha__ 382 dev->hose = pdev->sysdata; 383 #endif 384 385 pci_set_drvdata(pdev, dev); 386 387 if (pci_find_capability(dev->pdev, PCI_CAP_ID_AGP)) 388 dev->agp = drm_agp_init(dev); 389 if (dev->agp) { 390 dev->agp->agp_mtrr = arch_phys_wc_add( 391 dev->agp->agp_info.aper_base, 392 dev->agp->agp_info.aper_size * 393 1024 * 1024); 394 } 395 396 ret = drm_dev_register(dev, ent->driver_data); 397 if (ret) 398 goto err_agp; 399 400 return 0; 401 402 err_agp: 403 if (dev->agp) 404 arch_phys_wc_del(dev->agp->agp_mtrr); 405 kfree(dev->agp); 406 pci_disable_device(pdev); 407 err_free: 408 drm_dev_put(dev); 409 return ret; 410 } 411 412 static void 413 radeon_pci_remove(struct pci_dev *pdev) 414 { 415 struct drm_device *dev = pci_get_drvdata(pdev); 416 417 drm_put_dev(dev); 418 } 419 420 static void 421 radeon_pci_shutdown(struct pci_dev *pdev) 422 { 423 /* if we are running in a VM, make sure the device 424 * torn down properly on reboot/shutdown 425 */ 426 if (radeon_device_is_virtual()) 427 radeon_pci_remove(pdev); 428 429 #if defined(CONFIG_PPC64) || defined(CONFIG_MACH_LOONGSON64) 430 /* 431 * Some adapters need to be suspended before a 432 * shutdown occurs in order to prevent an error 433 * during kexec, shutdown or reboot. 434 * Make this power and Loongson specific because 435 * it breaks some other boards. 436 */ 437 radeon_suspend_kms(pci_get_drvdata(pdev), true, true, false); 438 #endif 439 } 440 441 static int radeon_pmops_suspend(struct device *dev) 442 { 443 struct drm_device *drm_dev = dev_get_drvdata(dev); 444 return radeon_suspend_kms(drm_dev, true, true, false); 445 } 446 447 static int radeon_pmops_resume(struct device *dev) 448 { 449 struct drm_device *drm_dev = dev_get_drvdata(dev); 450 451 /* GPU comes up enabled by the bios on resume */ 452 if (radeon_is_px(drm_dev)) { 453 pm_runtime_disable(dev); 454 pm_runtime_set_active(dev); 455 pm_runtime_enable(dev); 456 } 457 458 return radeon_resume_kms(drm_dev, true, true); 459 } 460 461 static int radeon_pmops_freeze(struct device *dev) 462 { 463 struct drm_device *drm_dev = dev_get_drvdata(dev); 464 return radeon_suspend_kms(drm_dev, false, true, true); 465 } 466 467 static int radeon_pmops_thaw(struct device *dev) 468 { 469 struct drm_device *drm_dev = dev_get_drvdata(dev); 470 return radeon_resume_kms(drm_dev, false, true); 471 } 472 473 static int radeon_pmops_runtime_suspend(struct device *dev) 474 { 475 struct pci_dev *pdev = to_pci_dev(dev); 476 struct drm_device *drm_dev = pci_get_drvdata(pdev); 477 int ret; 478 479 if (!radeon_is_px(drm_dev)) { 480 pm_runtime_forbid(dev); 481 return -EBUSY; 482 } 483 484 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 485 drm_kms_helper_poll_disable(drm_dev); 486 487 ret = radeon_suspend_kms(drm_dev, false, false, false); 488 pci_save_state(pdev); 489 pci_disable_device(pdev); 490 pci_ignore_hotplug(pdev); 491 if (radeon_is_atpx_hybrid()) 492 pci_set_power_state(pdev, PCI_D3cold); 493 else if (!radeon_has_atpx_dgpu_power_cntl()) 494 pci_set_power_state(pdev, PCI_D3hot); 495 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; 496 497 return 0; 498 } 499 500 static int radeon_pmops_runtime_resume(struct device *dev) 501 { 502 struct pci_dev *pdev = to_pci_dev(dev); 503 struct drm_device *drm_dev = pci_get_drvdata(pdev); 504 int ret; 505 506 if (!radeon_is_px(drm_dev)) 507 return -EINVAL; 508 509 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 510 511 if (radeon_is_atpx_hybrid() || 512 !radeon_has_atpx_dgpu_power_cntl()) 513 pci_set_power_state(pdev, PCI_D0); 514 pci_restore_state(pdev); 515 ret = pci_enable_device(pdev); 516 if (ret) 517 return ret; 518 pci_set_master(pdev); 519 520 ret = radeon_resume_kms(drm_dev, false, false); 521 drm_kms_helper_poll_enable(drm_dev); 522 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; 523 return 0; 524 } 525 526 static int radeon_pmops_runtime_idle(struct device *dev) 527 { 528 struct drm_device *drm_dev = dev_get_drvdata(dev); 529 struct drm_crtc *crtc; 530 531 if (!radeon_is_px(drm_dev)) { 532 pm_runtime_forbid(dev); 533 return -EBUSY; 534 } 535 536 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) { 537 if (crtc->enabled) { 538 DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); 539 return -EBUSY; 540 } 541 } 542 543 pm_runtime_mark_last_busy(dev); 544 pm_runtime_autosuspend(dev); 545 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ 546 return 1; 547 } 548 549 long radeon_drm_ioctl(struct file *filp, 550 unsigned int cmd, unsigned long arg) 551 { 552 struct drm_file *file_priv = filp->private_data; 553 struct drm_device *dev; 554 long ret; 555 dev = file_priv->minor->dev; 556 ret = pm_runtime_get_sync(dev->dev); 557 if (ret < 0) { 558 pm_runtime_put_autosuspend(dev->dev); 559 return ret; 560 } 561 562 ret = drm_ioctl(filp, cmd, arg); 563 564 pm_runtime_mark_last_busy(dev->dev); 565 pm_runtime_put_autosuspend(dev->dev); 566 return ret; 567 } 568 569 #ifdef CONFIG_COMPAT 570 static long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) 571 { 572 unsigned int nr = DRM_IOCTL_NR(cmd); 573 int ret; 574 575 if (nr < DRM_COMMAND_BASE) 576 return drm_compat_ioctl(filp, cmd, arg); 577 578 ret = radeon_drm_ioctl(filp, cmd, arg); 579 580 return ret; 581 } 582 #endif 583 584 static const struct dev_pm_ops radeon_pm_ops = { 585 .suspend = radeon_pmops_suspend, 586 .resume = radeon_pmops_resume, 587 .freeze = radeon_pmops_freeze, 588 .thaw = radeon_pmops_thaw, 589 .poweroff = radeon_pmops_freeze, 590 .restore = radeon_pmops_resume, 591 .runtime_suspend = radeon_pmops_runtime_suspend, 592 .runtime_resume = radeon_pmops_runtime_resume, 593 .runtime_idle = radeon_pmops_runtime_idle, 594 }; 595 596 static const struct file_operations radeon_driver_kms_fops = { 597 .owner = THIS_MODULE, 598 .open = drm_open, 599 .release = drm_release, 600 .unlocked_ioctl = radeon_drm_ioctl, 601 .mmap = radeon_mmap, 602 .poll = drm_poll, 603 .read = drm_read, 604 #ifdef CONFIG_COMPAT 605 .compat_ioctl = radeon_kms_compat_ioctl, 606 #endif 607 }; 608 609 #endif /* __linux__ */ 610 611 struct drm_driver kms_driver = { 612 .driver_features = 613 DRIVER_GEM | DRIVER_RENDER, 614 #ifdef notyet 615 .load = radeon_driver_load_kms, 616 #endif 617 .open = radeon_driver_open_kms, 618 #ifdef __OpenBSD__ 619 .mmap = radeon_mmap, 620 #endif 621 .postclose = radeon_driver_postclose_kms, 622 .lastclose = radeon_driver_lastclose_kms, 623 #ifdef notyet 624 .unload = radeon_driver_unload_kms, 625 #endif 626 .irq_preinstall = radeon_driver_irq_preinstall_kms, 627 .irq_postinstall = radeon_driver_irq_postinstall_kms, 628 .irq_uninstall = radeon_driver_irq_uninstall_kms, 629 .irq_handler = radeon_driver_irq_handler_kms, 630 .ioctls = radeon_ioctls_kms, 631 .gem_free_object_unlocked = radeon_gem_object_free, 632 .gem_open_object = radeon_gem_object_open, 633 .gem_close_object = radeon_gem_object_close, 634 #ifdef __OpenBSD__ 635 .gem_size = sizeof(struct radeon_bo), 636 #endif 637 .dumb_create = radeon_mode_dumb_create, 638 .dumb_map_offset = radeon_mode_dumb_mmap, 639 #ifdef __linux__ 640 .fops = &radeon_driver_kms_fops, 641 #endif 642 643 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 644 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 645 .gem_prime_export = radeon_gem_prime_export, 646 #ifdef notyet 647 .gem_prime_pin = radeon_gem_prime_pin, 648 .gem_prime_unpin = radeon_gem_prime_unpin, 649 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table, 650 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table, 651 .gem_prime_vmap = radeon_gem_prime_vmap, 652 .gem_prime_vunmap = radeon_gem_prime_vunmap, 653 #endif 654 655 .name = DRIVER_NAME, 656 .desc = DRIVER_DESC, 657 .date = DRIVER_DATE, 658 .major = KMS_DRIVER_MAJOR, 659 .minor = KMS_DRIVER_MINOR, 660 .patchlevel = KMS_DRIVER_PATCHLEVEL, 661 }; 662 663 #ifdef notyet 664 static struct drm_driver *driver; 665 #endif 666 #ifdef __linux__ 667 static struct pci_driver *pdriver; 668 669 static struct pci_driver radeon_kms_pci_driver = { 670 .name = DRIVER_NAME, 671 .id_table = pciidlist, 672 .probe = radeon_pci_probe, 673 .remove = radeon_pci_remove, 674 .shutdown = radeon_pci_shutdown, 675 .driver.pm = &radeon_pm_ops, 676 }; 677 #endif /* __linux__ */ 678 679 #ifdef notyet 680 static int __init radeon_init(void) 681 { 682 if (vgacon_text_force() && radeon_modeset == -1) { 683 DRM_INFO("VGACON disable radeon kernel modesetting.\n"); 684 radeon_modeset = 0; 685 } 686 /* set to modesetting by default if not nomodeset */ 687 if (radeon_modeset == -1) 688 radeon_modeset = 1; 689 690 if (radeon_modeset == 1) { 691 DRM_INFO("radeon kernel modesetting enabled.\n"); 692 driver = &kms_driver; 693 #ifdef __linux__ 694 pdriver = &radeon_kms_pci_driver; 695 #endif 696 driver->driver_features |= DRIVER_MODESET; 697 driver->num_ioctls = radeon_max_kms_ioctl; 698 radeon_register_atpx_handler(); 699 700 } else { 701 DRM_ERROR("No UMS support in radeon module!\n"); 702 return -EINVAL; 703 } 704 705 return pci_register_driver(pdriver); 706 } 707 708 static void __exit radeon_exit(void) 709 { 710 pci_unregister_driver(pdriver); 711 radeon_unregister_atpx_handler(); 712 mmu_notifier_synchronize(); 713 } 714 #endif /* notyet */ 715 716 module_init(radeon_init); 717 module_exit(radeon_exit); 718 719 MODULE_AUTHOR(DRIVER_AUTHOR); 720 MODULE_DESCRIPTION(DRIVER_DESC); 721 MODULE_LICENSE("GPL and additional rights"); 722