1 /* $OpenBSD: eap.c,v 1.10 2000/08/16 14:13:13 kevlo Exp $ */ 2 /* $NetBSD: eap.c,v 1.25 1999/02/18 07:59:30 mycroft Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson <augustss@netbsd.org> and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Debugging: Andreas Gustafsson <gson@araneus.fi> 42 * Testing: Chuck Cranor <chuck@maria.wustl.edu> 43 * Phil Nelson <phil@cs.wwu.edu> 44 */ 45 46 /* 47 * Ensoniq AudoiPCI ES1370 + AK4531 driver. 48 * Data sheets can be found at 49 * http://www.ensoniq.com/multimedia/semi_html/html/es1370.zip 50 * and 51 * http://www.akm.com/pdf/4531.pdf 52 * 53 * Added Creative Ensoniq support: ES1371 + AC97 = hack city. 54 * -- Ezra Story <ezy@panix.com> 55 * Check es1371.zip from above, and the Audio Codec 97 spec from 56 * intel.com. 57 */ 58 59 60 #include <sys/param.h> 61 #include <sys/systm.h> 62 #include <sys/kernel.h> 63 #include <sys/malloc.h> 64 #include <sys/device.h> 65 66 #include <dev/pci/pcidevs.h> 67 #include <dev/pci/pcivar.h> 68 69 #include <sys/audioio.h> 70 #include <dev/audio_if.h> 71 #include <dev/mulaw.h> 72 #include <dev/auconv.h> 73 #include <dev/ic/ac97.h> 74 75 #include <machine/bus.h> 76 77 struct cfdriver eap_cd = { 78 NULL, "eap", DV_DULL 79 }; 80 81 #define PCI_CBIO 0x10 82 83 #define EAP_ICSC 0x00 /* interrupt / chip select control */ 84 #define EAP_SERR_DISABLE 0x00000001 85 #define EAP_CDC_EN 0x00000002 86 #define EAP_JYSTK_EN 0x00000004 87 #define EAP_UART_EN 0x00000008 88 #define EAP_ADC_EN 0x00000010 89 #define EAP_DAC2_EN 0x00000020 90 #define EAP_DAC1_EN 0x00000040 91 #define EAP_BREQ 0x00000080 92 #define EAP_XTCL0 0x00000100 93 #define EAP_M_CB 0x00000200 94 #define EAP_CCB_INTRM 0x00000400 95 #define EAP_DAC_SYNC 0x00000800 96 #define EAP_WTSRSEL 0x00003000 97 #define EAP_WTSRSEL_5 0x00000000 98 #define EAP_WTSRSEL_11 0x00001000 99 #define EAP_WTSRSEL_22 0x00002000 100 #define EAP_WTSRSEL_44 0x00003000 101 #define EAP_M_SBB 0x00004000 102 #define EAP_MSFMTSEL 0x00008000 103 #define EAP_SET_PCLKDIV(n) (((n)&0x1fff)<<16) 104 #define EAP_GET_PCLKDIV(n) (((n)>>16)&0x1fff) 105 #define EAP_PCLKBITS 0x1fff0000 106 #define EAP_XTCL1 0x40000000 107 #define EAP_ADC_STOP 0x80000000 108 #define E1371_SYNC_RES (1<<14) 109 110 #define EAP_ICSS 0x04 /* interrupt / chip select status */ 111 #define EAP_I_ADC 0x00000001 112 #define EAP_I_DAC2 0x00000002 113 #define EAP_I_DAC1 0x00000004 114 #define EAP_I_UART 0x00000008 115 #define EAP_I_MCCB 0x00000010 116 #define EAP_VC 0x00000060 117 #define EAP_CWRIP 0x00000100 118 #define EAP_CBUSY 0x00000200 119 #define EAP_CSTAT 0x00000400 120 #define CT5880_AC97_RESET 0x20000000 121 #define EAP_INTR 0x80000000 122 123 #define EAP_UART_DATA 0x08 124 #define EAP_UART_STATUS 0x09 125 #define EAP_UART_CONTROL 0x09 126 #define EAP_MEMPAGE 0x0c 127 #define EAP_CODEC 0x10 128 #define EAP_SET_CODEC(a,d) (((a)<<8) | (d)) 129 130 /* ES1371 Registers */ 131 #define E1371_CODEC 0x14 132 #define E1371_CODEC_WIP (1<<30) 133 #define E1371_CODEC_VALID (1<<31) 134 #define E1371_CODEC_READ (1<<23) 135 #define E1371_SET_CODEC(a,d) (((a)<<16) | (d)) 136 #define E1371_SRC 0x10 137 #define E1371_SRC_RAMWE (1<<24) 138 #define E1371_SRC_RBUSY (1<<23) 139 #define E1371_SRC_DISABLE (1<<22) 140 #define E1371_SRC_DISP1 (1<<21) 141 #define E1371_SRC_DISP2 (1<<20) 142 #define E1371_SRC_DISREC (1<<19) 143 #define E1371_SRC_ADDR(a) ((a)<<25) 144 #define E1371_SRC_STATE_MASK 0x870000 145 #define E1371_SRC_STATE_OK 0x010000 146 #define E1371_SRC_DATA(d) (d) 147 #define E1371_SRC_DATAMASK 0xffff 148 #define E1371_LEGACY 0x18 149 150 /* ES1371 Sample rate converter registers */ 151 #define ESRC_ADC 0x78 152 #define ESRC_DAC1 0x74 153 #define ESRC_DAC2 0x70 154 #define ESRC_ADC_VOLL 0x6c 155 #define ESRC_ADC_VOLR 0x6d 156 #define ESRC_DAC1_VOLL 0x7c 157 #define ESRC_DAC1_VOLR 0x7d 158 #define ESRC_DAC2_VOLL 0x7e 159 #define ESRC_DAC2_VOLR 0x7f 160 #define ESRC_TRUNC_N 0x00 161 #define ESRC_IREGS 0x01 162 #define ESRC_ACF 0x02 163 #define ESRC_VFF 0x03 164 #define ESRC_SET_TRUNC(n) ((n)<<9) 165 #define ESRC_SET_N(n) ((n)<<4) 166 #define ESRC_SMF 0x8000 167 #define ESRC_SET_VFI(n) ((n)<<10) 168 #define ESRC_SET_ACI(n) (n) 169 #define ESRC_SET_ADC_VOL(n) ((n)<<8) 170 #define ESRC_SET_DAC_VOLI(n) ((n)<<12) 171 #define ESRC_SET_DAC_VOLF(n) (n) 172 #define SRC_MAGIC ((1<15)|(1<<13)|(1<<11)|(1<<9)) 173 174 175 #define EAP_SIC 0x20 176 #define EAP_P1_S_MB 0x00000001 177 #define EAP_P1_S_EB 0x00000002 178 #define EAP_P2_S_MB 0x00000004 179 #define EAP_P2_S_EB 0x00000008 180 #define EAP_R1_S_MB 0x00000010 181 #define EAP_R1_S_EB 0x00000020 182 #define EAP_P2_DAC_SEN 0x00000040 183 #define EAP_P1_SCT_RLD 0x00000080 184 #define EAP_P1_INTR_EN 0x00000100 185 #define EAP_P2_INTR_EN 0x00000200 186 #define EAP_R1_INTR_EN 0x00000400 187 #define EAP_P1_PAUSE 0x00000800 188 #define EAP_P2_PAUSE 0x00001000 189 #define EAP_P1_LOOP_SEL 0x00002000 190 #define EAP_P2_LOOP_SEL 0x00004000 191 #define EAP_R1_LOOP_SEL 0x00008000 192 #define EAP_SET_P2_ST_INC(i) ((i) << 16) 193 #define EAP_SET_P2_END_INC(i) ((i) << 19) 194 #define EAP_INC_BITS 0x003f0000 195 196 #define EAP_DAC1_CSR 0x24 197 #define EAP_DAC2_CSR 0x28 198 #define EAP_ADC_CSR 0x2c 199 #define EAP_GET_CURRSAMP(r) ((r) >> 16) 200 201 #define EAP_DAC_PAGE 0xc 202 #define EAP_ADC_PAGE 0xd 203 #define EAP_UART_PAGE1 0xe 204 #define EAP_UART_PAGE2 0xf 205 206 #define EAP_DAC1_ADDR 0x30 207 #define EAP_DAC1_SIZE 0x34 208 #define EAP_DAC2_ADDR 0x38 209 #define EAP_DAC2_SIZE 0x3c 210 #define EAP_ADC_ADDR 0x30 211 #define EAP_ADC_SIZE 0x34 212 #define EAP_SET_SIZE(c,s) (((c)<<16) | (s)) 213 214 #define EAP_READ_TIMEOUT 0x1000 215 #define EAP_WRITE_TIMEOUT 0x1000 216 217 218 #define EAP_XTAL_FREQ 1411200 /* 22.5792 / 16 MHz */ 219 220 /* AK4531 registers */ 221 #define AK_MASTER_L 0x00 222 #define AK_MASTER_R 0x01 223 #define AK_VOICE_L 0x02 224 #define AK_VOICE_R 0x03 225 #define AK_FM_L 0x04 226 #define AK_FM_R 0x05 227 #define AK_CD_L 0x06 228 #define AK_CD_R 0x07 229 #define AK_LINE_L 0x08 230 #define AK_LINE_R 0x09 231 #define AK_AUX_L 0x0a 232 #define AK_AUX_R 0x0b 233 #define AK_MONO1 0x0c 234 #define AK_MONO2 0x0d 235 #define AK_MIC 0x0e 236 #define AK_MONO 0x0f 237 #define AK_OUT_MIXER1 0x10 238 #define AK_M_FM_L 0x40 239 #define AK_M_FM_R 0x20 240 #define AK_M_LINE_L 0x10 241 #define AK_M_LINE_R 0x08 242 #define AK_M_CD_L 0x04 243 #define AK_M_CD_R 0x02 244 #define AK_M_MIC 0x01 245 #define AK_OUT_MIXER2 0x11 246 #define AK_M_AUX_L 0x20 247 #define AK_M_AUX_R 0x10 248 #define AK_M_VOICE_L 0x08 249 #define AK_M_VOICE_R 0x04 250 #define AK_M_MONO2 0x02 251 #define AK_M_MONO1 0x01 252 #define AK_IN_MIXER1_L 0x12 253 #define AK_IN_MIXER1_R 0x13 254 #define AK_IN_MIXER2_L 0x14 255 #define AK_IN_MIXER2_R 0x15 256 #define AK_M_TMIC 0x80 257 #define AK_M_TMONO1 0x40 258 #define AK_M_TMONO2 0x20 259 #define AK_M2_AUX_L 0x10 260 #define AK_M2_AUX_R 0x08 261 #define AK_M_VOICE 0x04 262 #define AK_M2_MONO2 0x02 263 #define AK_M2_MONO1 0x01 264 #define AK_RESET 0x16 265 #define AK_PD 0x02 266 #define AK_NRST 0x01 267 #define AK_CS 0x17 268 #define AK_ADSEL 0x18 269 #define AK_MGAIN 0x19 270 #define AK_NPORTS 0x20 271 272 #define MAX_NPORTS AK_NPORTS 273 274 /* Not sensical for AC97? */ 275 #define VOL_TO_ATT5(v) (0x1f - ((v) >> 3)) 276 #define VOL_TO_GAIN5(v) VOL_TO_ATT5(v) 277 #define ATT5_TO_VOL(v) ((0x1f - (v)) << 3) 278 #define GAIN5_TO_VOL(v) ATT5_TO_VOL(v) 279 #define VOL_0DB 200 280 281 /* Futzable parms */ 282 #define EAP_MASTER_VOL 0 283 #define EAP_VOICE_VOL 1 284 #define EAP_FM_VOL 2 285 #define EAP_VIDEO_VOL 2 /* ES1371 */ 286 #define EAP_CD_VOL 3 287 #define EAP_LINE_VOL 4 288 #define EAP_AUX_VOL 5 289 #define EAP_MIC_VOL 6 290 #define EAP_RECORD_SOURCE 7 291 #define EAP_OUTPUT_SELECT 8 292 #define EAP_MIC_PREAMP 9 293 #define EAP_OUTPUT_CLASS 10 294 #define EAP_RECORD_CLASS 11 295 #define EAP_INPUT_CLASS 12 296 297 /* Debug */ 298 #ifdef AUDIO_DEBUG 299 #define DPRINTF(x) if (eapdebug) printf x 300 #define DPRINTFN(n,x) if (eapdebug>(n)) printf x 301 int eapdebug = 20; 302 #else 303 #define DPRINTF(x) 304 #define DPRINTFN(n,x) 305 #endif 306 307 int eap_match __P((struct device *, void *, void *)); 308 void eap_attach __P((struct device *, struct device *, void *)); 309 int eap_intr __P((void *)); 310 311 struct eap_dma { 312 bus_dmamap_t map; 313 caddr_t addr; 314 bus_dma_segment_t segs[1]; 315 int nsegs; 316 size_t size; 317 struct eap_dma *next; 318 }; 319 #define DMAADDR(p) ((p)->map->dm_segs[0].ds_addr) 320 #define KERNADDR(p) ((void *)((p)->addr)) 321 322 struct eap_softc { 323 struct device sc_dev; /* base device */ 324 void *sc_ih; /* interrupt vectoring */ 325 bus_space_tag_t iot; 326 bus_space_handle_t ioh; 327 bus_dma_tag_t sc_dmatag; /* DMA tag */ 328 329 struct eap_dma *sc_dmas; 330 331 void (*sc_pintr)(void *); /* dma completion intr handler */ 332 void *sc_parg; /* arg for sc_intr() */ 333 #ifdef DIAGNOSTIC 334 char sc_prun; 335 #endif 336 337 void (*sc_rintr)(void *); /* dma completion intr handler */ 338 void *sc_rarg; /* arg for sc_intr() */ 339 #ifdef DIAGNOSTIC 340 char sc_rrun; 341 #endif 342 343 u_short sc_port[MAX_NPORTS]; /* mirror of the hardware setting */ 344 u_int sc_record_source; /* recording source mask */ 345 u_int sc_output_source; /* output source mask */ 346 u_int sc_mic_preamp; 347 char sc_1371; /* Using ES1371/AC97 codec */ 348 349 struct ac97_codec_if *codec_if; 350 struct ac97_host_if host_if; 351 }; 352 353 int eap_allocmem __P((struct eap_softc *, size_t, size_t, struct eap_dma *)); 354 int eap_freemem __P((struct eap_softc *, struct eap_dma *)); 355 356 #define EWRITE2(sc, r, x) bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)) 357 #define EWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)) 358 #define EREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r)) 359 #define EREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r)) 360 361 struct cfattach eap_ca = { 362 sizeof(struct eap_softc), eap_match, eap_attach 363 }; 364 365 int eap_open __P((void *, int)); 366 void eap_close __P((void *)); 367 int eap_query_encoding __P((void *, struct audio_encoding *)); 368 int eap_set_params __P((void *, int, int, struct audio_params *, struct audio_params *)); 369 int eap_round_blocksize __P((void *, int)); 370 int eap_trigger_output __P((void *, void *, void *, int, void (*)(void *), 371 void *, struct audio_params *)); 372 int eap_trigger_input __P((void *, void *, void *, int, void (*)(void *), 373 void *, struct audio_params *)); 374 int eap_halt_output __P((void *)); 375 int eap_halt_input __P((void *)); 376 void eap_write_codec __P((struct eap_softc *, int, int)); 377 int eap_getdev __P((void *, struct audio_device *)); 378 int eap_mixer_set_port __P((void *, mixer_ctrl_t *)); 379 int eap_mixer_get_port __P((void *, mixer_ctrl_t *)); 380 int eap1371_mixer_set_port __P((void *, mixer_ctrl_t *)); 381 int eap1371_mixer_get_port __P((void *, mixer_ctrl_t *)); 382 int eap_query_devinfo __P((void *, mixer_devinfo_t *)); 383 void *eap_malloc __P((void *, u_long, int, int)); 384 void eap_free __P((void *, void *, int)); 385 u_long eap_round_buffersize __P((void *, u_long)); 386 int eap_mappage __P((void *, void *, int, int)); 387 int eap_get_props __P((void *)); 388 void eap_set_mixer __P((struct eap_softc *sc, int a, int d)); 389 int eap1371_src_wait __P((struct eap_softc *sc)); 390 void eap1371_set_adc_rate __P((struct eap_softc *sc, int rate)); 391 void eap1371_set_dac_rate __P((struct eap_softc *sc, int rate, int which)); 392 int eap1371_src_read __P((struct eap_softc *sc, int a)); 393 void eap1371_src_write __P((struct eap_softc *sc, int a, int d)); 394 int eap1371_query_devinfo __P((void *addr, mixer_devinfo_t *dip)); 395 396 int eap1371_attach_codec __P((void *sc, struct ac97_codec_if *)); 397 int eap1371_read_codec __P((void *sc, u_int8_t a, u_int16_t *d)); 398 int eap1371_write_codec __P((void *sc, u_int8_t a, u_int16_t d)); 399 void eap1371_reset_codec __P((void *sc)); 400 int eap1371_get_portnum_by_name __P((struct eap_softc *, char *, char *, 401 char *)); 402 403 struct audio_hw_if eap1370_hw_if = { 404 eap_open, 405 eap_close, 406 NULL, 407 eap_query_encoding, 408 eap_set_params, 409 eap_round_blocksize, 410 NULL, 411 NULL, 412 NULL, 413 NULL, 414 NULL, 415 eap_halt_output, 416 eap_halt_input, 417 NULL, 418 eap_getdev, 419 NULL, 420 eap_mixer_set_port, 421 eap_mixer_get_port, 422 eap_query_devinfo, 423 eap_malloc, 424 eap_free, 425 eap_round_buffersize, 426 eap_mappage, 427 eap_get_props, 428 eap_trigger_output, 429 eap_trigger_input, 430 }; 431 432 struct audio_hw_if eap1371_hw_if = { 433 eap_open, 434 eap_close, 435 NULL, 436 eap_query_encoding, 437 eap_set_params, 438 eap_round_blocksize, 439 NULL, 440 NULL, 441 NULL, 442 NULL, 443 NULL, 444 eap_halt_output, 445 eap_halt_input, 446 NULL, 447 eap_getdev, 448 NULL, 449 eap1371_mixer_set_port, 450 eap1371_mixer_get_port, 451 eap1371_query_devinfo, 452 eap_malloc, 453 eap_free, 454 eap_round_buffersize, 455 eap_mappage, 456 eap_get_props, 457 eap_trigger_output, 458 eap_trigger_input, 459 }; 460 461 struct audio_device eap_device = { 462 "Ensoniq AudioPCI", 463 "", 464 "eap" 465 }; 466 467 int 468 eap_match(parent, match, aux) 469 struct device *parent; 470 void *match; 471 void *aux; 472 { 473 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 474 475 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_ENSONIQ && 476 PCI_VENDOR(pa->pa_id) != PCI_VENDOR_CREATIVELABS) 477 return (0); 478 479 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENSONIQ_AUDIOPCI || 480 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENSONIQ_AUDIOPCI97 || 481 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENSONIQ_CT5880 || 482 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CREATIVELABS_EV1938) 483 return (1); 484 485 return (0); 486 } 487 488 void 489 eap_write_codec(sc, a, d) 490 struct eap_softc *sc; 491 int a, d; 492 { 493 494 int icss, to; 495 496 to = EAP_WRITE_TIMEOUT; 497 do { 498 icss = EREAD4(sc, EAP_ICSS); 499 DPRINTFN(5,("eap: codec %d prog: icss=0x%08x\n", a, icss)); 500 if (!to--) { 501 printf("eap: timeout writing to codec\n"); 502 return; 503 } 504 } while (icss & EAP_CWRIP); /* XXX could use CSTAT here */ 505 EWRITE4(sc, EAP_CODEC, EAP_SET_CODEC(a, d)); 506 } 507 508 509 int 510 eap1371_read_codec(sc_, a, d) 511 void *sc_; 512 u_int8_t a; 513 u_int16_t *d; 514 { 515 struct eap_softc *sc = sc_; 516 int to; 517 int cdc, src; 518 519 to = EAP_WRITE_TIMEOUT; 520 do { 521 cdc = EREAD4(sc, E1371_CODEC); 522 if (!to--) { 523 printf("eap: timeout writing to codec\n"); 524 return 1; 525 } 526 } while (cdc & E1371_CODEC_WIP); 527 528 /* just do it */ 529 src = (eap1371_src_wait(sc) & (E1371_SRC_DISABLE | E1371_SRC_DISP1 | 530 E1371_SRC_DISP2 | E1371_SRC_DISREC)) ; 531 532 EWRITE4(sc, E1371_SRC, src | 0x10000); 533 534 for (to = 0; to < EAP_READ_TIMEOUT; to++) { 535 if (!(EREAD4(sc, E1371_SRC) & E1371_SRC_STATE_MASK)) 536 break; 537 538 delay(1); 539 } 540 541 for (to = 0; to < EAP_WRITE_TIMEOUT; to++) { 542 if ((EREAD4(sc, E1371_SRC) & E1371_SRC_STATE_MASK) == 543 E1371_SRC_STATE_OK) 544 break; 545 546 delay(1); 547 } 548 549 EWRITE4(sc, E1371_CODEC, E1371_SET_CODEC(a, 0) | E1371_CODEC_READ); 550 551 eap1371_src_wait(sc); 552 EWRITE4(sc, E1371_SRC, src); 553 554 for (to = 0; to < EAP_READ_TIMEOUT; to++) { 555 if ((cdc = EREAD4(sc, E1371_CODEC)) & E1371_CODEC_VALID) 556 break; 557 } 558 559 if (to == EAP_WRITE_TIMEOUT) { 560 DPRINTF(("eap1371: read codec timeout\n")); 561 } 562 563 *d = cdc & 0xffff; 564 565 DPRINTFN(10, ("eap1371: reading codec (%x) = %x\n", a, *d)); 566 567 return (0); 568 } 569 570 int 571 eap1371_write_codec(sc_, a, d) 572 void *sc_; 573 u_int8_t a; 574 u_int16_t d; 575 { 576 struct eap_softc *sc = sc_; 577 int to; 578 int cdc, src; 579 580 to = EAP_WRITE_TIMEOUT; 581 do { 582 cdc = EREAD4(sc, E1371_CODEC); 583 if (!to--) { 584 printf("eap: timeout writing to codec\n"); 585 return 1; 586 } 587 } while (cdc & E1371_CODEC_WIP); 588 589 /* just do it */ 590 src = (eap1371_src_wait(sc) & (E1371_SRC_DISABLE | E1371_SRC_DISP1 | 591 E1371_SRC_DISP2 | E1371_SRC_DISREC)) ; 592 593 EWRITE4(sc, E1371_SRC, src | 0x10000); 594 595 for (to = 0; to < EAP_WRITE_TIMEOUT; to++) { 596 if (!(EREAD4(sc, E1371_SRC) & E1371_SRC_STATE_MASK)) 597 break; 598 599 delay(1); 600 } 601 602 for (to = 0; to < EAP_WRITE_TIMEOUT; to++) { 603 if ((EREAD4(sc, E1371_SRC) & E1371_SRC_STATE_MASK) == 604 E1371_SRC_STATE_OK) 605 break; 606 607 delay(1); 608 } 609 610 EWRITE4(sc, E1371_CODEC, E1371_SET_CODEC(a, d)); 611 612 eap1371_src_wait(sc); 613 EWRITE4(sc, E1371_SRC, src); 614 615 DPRINTFN(10, ("eap1371: writing codec %x --> %x\n", d, a)); 616 617 return (0); 618 } 619 620 int 621 eap1371_src_wait(sc) 622 struct eap_softc *sc; 623 { 624 int to; 625 int src; 626 627 for (to = 0; to < EAP_READ_TIMEOUT; to++) { 628 src = EREAD4(sc, E1371_SRC); 629 if (!(src & E1371_SRC_RBUSY)) 630 return src; 631 delay(1); 632 } 633 634 635 printf("eap: timeout waiting for sample rate" 636 "converter\n"); 637 638 return src; 639 } 640 641 int 642 eap1371_src_read(sc, a) 643 struct eap_softc *sc; 644 int a; 645 { 646 int r, to; 647 int src; 648 649 src = eap1371_src_wait(sc); 650 651 EWRITE4(sc, E1371_SRC, 652 (src & (E1371_SRC_DISABLE | E1371_SRC_DISP1 | 653 E1371_SRC_DISP2 | E1371_SRC_DISREC)) | 654 E1371_SRC_ADDR(a) | 0x10000UL); 655 656 r = eap1371_src_wait(sc); 657 658 if ((r & E1371_SRC_STATE_MASK) != E1371_SRC_STATE_OK) { 659 for (to = 0; to < EAP_READ_TIMEOUT; to++) { 660 r = EREAD4(sc, E1371_SRC); 661 if ((r & E1371_SRC_STATE_MASK) == 662 E1371_SRC_STATE_OK) break; 663 } 664 } 665 666 EWRITE4 (sc, E1371_SRC, 667 (src & (E1371_SRC_DISABLE | E1371_SRC_DISP1 | 668 E1371_SRC_DISP2 | E1371_SRC_DISREC)) | 669 E1371_SRC_ADDR(a)); 670 671 return r; 672 } 673 674 void 675 eap1371_src_write(sc, a, d) 676 struct eap_softc *sc; 677 int a,d; 678 { 679 int r; 680 681 r = eap1371_src_wait(sc); 682 r &= (E1371_SRC_DISABLE | E1371_SRC_DISP1 | 683 E1371_SRC_DISP2 | E1371_SRC_DISREC); 684 r |= E1371_SRC_RAMWE | E1371_SRC_ADDR(a) | E1371_SRC_DATA(d); 685 EWRITE4(sc, E1371_SRC, r); 686 } 687 688 void 689 eap1371_set_adc_rate(sc, rate) 690 struct eap_softc *sc; 691 int rate; 692 { 693 int freq, n, truncm; 694 int out; 695 696 /* Whatever, it works, so I'll leave it :) */ 697 698 if (rate > 48000) 699 rate = 48000; 700 if (rate < 4000) 701 rate = 4000; 702 n = rate / 3000; 703 if ((1 << n) & SRC_MAGIC) 704 n--; 705 truncm = ((21 * n) - 1) | 1; 706 freq = ((48000 << 15) / rate) * n; 707 if (rate >= 24000) { 708 if (truncm > 239) 709 truncm = 239; 710 out = ESRC_SET_TRUNC((239 - truncm) / 2); 711 } else { 712 if (truncm > 119) 713 truncm = 119; 714 out = ESRC_SMF | ESRC_SET_TRUNC((119 - truncm) / 2); 715 } 716 out |= ESRC_SET_N(n); 717 eap1371_src_write(sc, ESRC_ADC+ESRC_TRUNC_N, out); 718 719 720 out = eap1371_src_read(sc, ESRC_ADC+ESRC_IREGS) & 0xff; 721 eap1371_src_write(sc, ESRC_ADC+ESRC_IREGS, out | 722 ESRC_SET_VFI(freq >> 15)); 723 eap1371_src_write(sc, ESRC_ADC+ESRC_VFF, freq & 0x7fff); 724 eap1371_src_write(sc, ESRC_ADC_VOLL, ESRC_SET_ADC_VOL(n)); 725 eap1371_src_write(sc, ESRC_ADC_VOLR, ESRC_SET_ADC_VOL(n)); 726 } 727 728 void 729 eap1371_set_dac_rate(sc, rate, which) 730 struct eap_softc *sc; 731 int rate; 732 int which; 733 { 734 int dac = (which == 1) ? ESRC_DAC1 : ESRC_DAC2; 735 int freq, r; 736 737 /* Whatever, it works, so I'll leave it :) */ 738 739 if (rate > 48000) 740 rate = 48000; 741 if (rate < 4000) 742 rate = 4000; 743 freq = ((rate << 15) + 1500) / 3000; 744 745 eap1371_src_wait(sc); 746 r = EREAD4(sc, E1371_SRC) & (E1371_SRC_DISABLE | 747 E1371_SRC_DISP2 | E1371_SRC_DISP1 | E1371_SRC_DISREC); 748 r |= (which == 1) ? E1371_SRC_DISP1 : E1371_SRC_DISP2; 749 EWRITE4(sc, E1371_SRC, r); 750 r = eap1371_src_read(sc, dac + ESRC_IREGS) & 0x00ff; 751 eap1371_src_write(sc, dac + ESRC_IREGS, r | ((freq >> 5) & 0xfc00)); 752 eap1371_src_write(sc, dac + ESRC_VFF, freq & 0x7fff); 753 r = EREAD4(sc, E1371_SRC) & (E1371_SRC_DISABLE | 754 E1371_SRC_DISP2 | E1371_SRC_DISP1 | E1371_SRC_DISREC); 755 r &= ~((which == 1) ? E1371_SRC_DISP1 : E1371_SRC_DISP2); 756 EWRITE4(sc, E1371_SRC, r); 757 } 758 759 void 760 eap_attach(parent, self, aux) 761 struct device *parent; 762 struct device *self; 763 void *aux; 764 { 765 struct eap_softc *sc = (struct eap_softc *)self; 766 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 767 pci_chipset_tag_t pc = pa->pa_pc; 768 struct audio_hw_if *eap_hw_if; 769 char const *intrstr; 770 pci_intr_handle_t ih; 771 pcireg_t csr; 772 mixer_ctrl_t ctl; 773 int i; 774 int revision; 775 776 sc->sc_1371 = 777 !(PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENSONIQ_AUDIOPCI); 778 revision = PCI_REVISION(pa->pa_class); 779 780 /* Map I/O register */ 781 if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 782 &sc->iot, &sc->ioh, NULL, NULL)) { 783 printf("\n%s: can't map i/o space\n", sc->sc_dev.dv_xname); 784 return; 785 } 786 787 sc->sc_dmatag = pa->pa_dmat; 788 789 /* Enable the device. */ 790 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 791 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 792 csr | PCI_COMMAND_MASTER_ENABLE); 793 794 /* Map and establish the interrupt. */ 795 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, 796 pa->pa_intrline, &ih)) { 797 printf("\n%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 798 return; 799 } 800 intrstr = pci_intr_string(pc, ih); 801 sc->sc_ih = pci_intr_establish(pc, ih, IPL_AUDIO, eap_intr, sc, 802 sc->sc_dev.dv_xname); 803 if (sc->sc_ih == NULL) { 804 printf("\n%s: couldn't establish interrupt", 805 sc->sc_dev.dv_xname); 806 if (intrstr != NULL) 807 printf(" at %s", intrstr); 808 printf("\n"); 809 return; 810 } 811 printf(": %s\n", intrstr); 812 813 if (!sc->sc_1371) { 814 /* Enable interrupts and looping mode. */ 815 /* enable the parts we need */ 816 EWRITE4(sc, EAP_SIC, EAP_P2_INTR_EN | EAP_R1_INTR_EN); 817 EWRITE4(sc, EAP_ICSC, EAP_CDC_EN); 818 819 /* reset codec */ 820 /* normal operation */ 821 /* select codec clocks */ 822 eap_write_codec(sc, AK_RESET, AK_PD); 823 eap_write_codec(sc, AK_RESET, AK_PD | AK_NRST); 824 eap_write_codec(sc, AK_CS, 0x0); 825 826 eap_hw_if = &eap1370_hw_if; 827 828 /* Enable all relevant mixer switches. */ 829 ctl.dev = EAP_OUTPUT_SELECT; 830 ctl.type = AUDIO_MIXER_SET; 831 ctl.un.mask = 1 << EAP_VOICE_VOL | 1 << EAP_FM_VOL | 832 1 << EAP_CD_VOL | 1 << EAP_LINE_VOL | 1 << EAP_AUX_VOL | 833 1 << EAP_MIC_VOL; 834 eap_hw_if->set_port(sc, &ctl); 835 836 ctl.type = AUDIO_MIXER_VALUE; 837 ctl.un.value.num_channels = 1; 838 for (ctl.dev = EAP_MASTER_VOL; ctl.dev < EAP_MIC_VOL; 839 ctl.dev++) { 840 ctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = VOL_0DB; 841 eap_hw_if->set_port(sc, &ctl); 842 } 843 ctl.un.value.level[AUDIO_MIXER_LEVEL_MONO] = 0; 844 eap_hw_if->set_port(sc, &ctl); 845 ctl.dev = EAP_MIC_PREAMP; 846 ctl.type = AUDIO_MIXER_ENUM; 847 ctl.un.ord = 0; 848 eap_hw_if->set_port(sc, &ctl); 849 ctl.dev = EAP_RECORD_SOURCE; 850 ctl.type = AUDIO_MIXER_SET; 851 ctl.un.mask = 1 << EAP_MIC_VOL; 852 eap_hw_if->set_port(sc, &ctl); 853 } else { 854 int error; 855 856 /* clean slate */ 857 EWRITE4(sc, EAP_SIC, 0); 858 EWRITE4(sc, EAP_ICSC, 0); 859 EWRITE4(sc, E1371_LEGACY, 0); 860 861 /* It seems that revision 7 and greater of the AUDIOPCI 97 862 are actually CT5880 */ 863 if ((PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENSONIQ_CT5880) || 864 ((PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENSONIQ_AUDIOPCI97) 865 && (revision >= 7))) { 866 EWRITE4(sc, EAP_ICSS, CT5880_AC97_RESET); 867 868 delay(20000); 869 } 870 871 /* Reset from es1371's perspective */ 872 EWRITE4(sc, EAP_ICSC, E1371_SYNC_RES); 873 delay(20); 874 EWRITE4(sc, EAP_ICSC, 0); 875 876 /* must properly reprogram sample rate converter, 877 * or it locks up. Set some defaults for the life of the 878 * machine, and set up a sb default sample rate. 879 */ 880 EWRITE4(sc, E1371_SRC, E1371_SRC_DISABLE); 881 for (i=0; i<0x80; i++) 882 eap1371_src_write(sc, i, 0); 883 eap1371_src_write(sc, ESRC_DAC1+ESRC_TRUNC_N, ESRC_SET_N(16)); 884 eap1371_src_write(sc, ESRC_DAC2+ESRC_TRUNC_N, ESRC_SET_N(16)); 885 eap1371_src_write(sc, ESRC_DAC1+ESRC_IREGS, ESRC_SET_VFI(16)); 886 eap1371_src_write(sc, ESRC_DAC2+ESRC_IREGS, ESRC_SET_VFI(16)); 887 eap1371_src_write(sc, ESRC_ADC_VOLL, ESRC_SET_ADC_VOL(16)); 888 eap1371_src_write(sc, ESRC_ADC_VOLR, ESRC_SET_ADC_VOL(16)); 889 eap1371_src_write(sc, ESRC_DAC1_VOLL, ESRC_SET_DAC_VOLI(1)); 890 eap1371_src_write(sc, ESRC_DAC1_VOLR, ESRC_SET_DAC_VOLI(1)); 891 eap1371_src_write(sc, ESRC_DAC2_VOLL, ESRC_SET_DAC_VOLI(1)); 892 eap1371_src_write(sc, ESRC_DAC2_VOLR, ESRC_SET_DAC_VOLI(1)); 893 eap1371_set_adc_rate(sc, 22050); 894 eap1371_set_dac_rate(sc, 22050, 1); 895 eap1371_set_dac_rate(sc, 22050, 2); 896 897 EWRITE4(sc, E1371_SRC, 0); 898 899 /* Reset codec */ 900 901 /* Interrupt enable */ 902 sc->host_if.arg = sc; 903 sc->host_if.attach = eap1371_attach_codec; 904 sc->host_if.read = eap1371_read_codec; 905 906 sc->host_if.write = eap1371_write_codec; 907 sc->host_if.reset = eap1371_reset_codec; 908 909 if ((error = ac97_attach(&sc->host_if)) == 0) { 910 /* Interrupt enable */ 911 EWRITE4(sc, EAP_SIC, EAP_P2_INTR_EN | EAP_R1_INTR_EN); 912 } else 913 return; 914 915 eap_hw_if = &eap1371_hw_if; 916 917 /* Just enable the DAC and master volumes by default */ 918 ctl.type = AUDIO_MIXER_ENUM; 919 ctl.un.ord = 0; /* off */ 920 ctl.dev = eap1371_get_portnum_by_name(sc, AudioCoutputs, 921 AudioNmaster, AudioNmute); 922 eap1371_mixer_set_port(sc, &ctl); 923 ctl.dev = eap1371_get_portnum_by_name(sc, AudioCinputs, 924 AudioNdac, AudioNmute); 925 eap1371_mixer_set_port(sc, &ctl); 926 ctl.dev = eap1371_get_portnum_by_name(sc, AudioCrecord, 927 AudioNvolume, AudioNmute); 928 eap1371_mixer_set_port(sc, &ctl); 929 930 931 ctl.dev = eap1371_get_portnum_by_name(sc, AudioCrecord, 932 AudioNsource, NULL); 933 ctl.type = AUDIO_MIXER_ENUM; 934 ctl.un.ord = 0; 935 eap1371_mixer_set_port(sc, &ctl); 936 937 } 938 939 audio_attach_mi(eap_hw_if, sc, &sc->sc_dev); 940 } 941 942 int 943 eap1371_attach_codec(sc_, codec_if) 944 void *sc_; 945 struct ac97_codec_if *codec_if; 946 { 947 struct eap_softc *sc = sc_; 948 949 sc->codec_if = codec_if; 950 return (0); 951 } 952 953 void 954 eap1371_reset_codec(sc_) 955 void *sc_; 956 { 957 struct eap_softc *sc = sc_; 958 u_int32_t icsc = EREAD4(sc, EAP_ICSC); 959 960 EWRITE4(sc, EAP_ICSC, icsc | E1371_SYNC_RES); 961 delay(100); 962 EWRITE4(sc, EAP_ICSC, icsc & ~E1371_SYNC_RES); 963 964 return; 965 } 966 967 int 968 eap_intr(p) 969 void *p; 970 { 971 struct eap_softc *sc = p; 972 u_int32_t intr, sic; 973 974 intr = EREAD4(sc, EAP_ICSS); 975 if (!(intr & EAP_INTR)) 976 return (0); 977 sic = EREAD4(sc, EAP_SIC); 978 DPRINTFN(5, ("eap_intr: ICSS=0x%08x, SIC=0x%08x\n", intr, sic)); 979 if (intr & EAP_I_ADC) { 980 /* 981 * XXX This is a hack! 982 * The EAP chip sometimes generates the recording interrupt 983 * while it is still transferring the data. To make sure 984 * it has all arrived we busy wait until the count is right. 985 * The transfer we are waiting for is 8 longwords. 986 */ 987 int s, nw, n; 988 989 EWRITE4(sc, EAP_MEMPAGE, EAP_ADC_PAGE); 990 s = EREAD4(sc, EAP_ADC_CSR); 991 nw = ((s & 0xffff) + 1) >> 2; /* # of words in DMA */ 992 n = 0; 993 while (((EREAD4(sc, EAP_ADC_SIZE) >> 16) + 8) % nw == 0) { 994 delay(10); 995 if (++n > 100) { 996 printf("eapintr: dma fix timeout"); 997 break; 998 } 999 } 1000 /* Continue with normal interrupt handling. */ 1001 EWRITE4(sc, EAP_SIC, sic & ~EAP_R1_INTR_EN); 1002 EWRITE4(sc, EAP_SIC, sic | EAP_R1_INTR_EN); 1003 if (sc->sc_rintr) 1004 sc->sc_rintr(sc->sc_rarg); 1005 } 1006 if (intr & EAP_I_DAC2) { 1007 EWRITE4(sc, EAP_SIC, sic & ~EAP_P2_INTR_EN); 1008 EWRITE4(sc, EAP_SIC, sic | EAP_P2_INTR_EN); 1009 if (sc->sc_pintr) 1010 sc->sc_pintr(sc->sc_parg); 1011 } 1012 return (1); 1013 } 1014 1015 int 1016 eap_allocmem(sc, size, align, p) 1017 struct eap_softc *sc; 1018 size_t size; 1019 size_t align; 1020 struct eap_dma *p; 1021 { 1022 int error; 1023 1024 p->size = size; 1025 error = bus_dmamem_alloc(sc->sc_dmatag, p->size, align, 0, 1026 p->segs, sizeof(p->segs)/sizeof(p->segs[0]), 1027 &p->nsegs, BUS_DMA_NOWAIT); 1028 if (error) 1029 return (error); 1030 1031 error = bus_dmamem_map(sc->sc_dmatag, p->segs, p->nsegs, p->size, 1032 &p->addr, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 1033 if (error) 1034 goto free; 1035 1036 error = bus_dmamap_create(sc->sc_dmatag, p->size, 1, p->size, 1037 0, BUS_DMA_NOWAIT, &p->map); 1038 if (error) 1039 goto unmap; 1040 1041 error = bus_dmamap_load(sc->sc_dmatag, p->map, p->addr, p->size, NULL, 1042 BUS_DMA_NOWAIT); 1043 if (error) 1044 goto destroy; 1045 return (0); 1046 1047 destroy: 1048 bus_dmamap_destroy(sc->sc_dmatag, p->map); 1049 unmap: 1050 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size); 1051 free: 1052 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs); 1053 return (error); 1054 } 1055 1056 int 1057 eap_freemem(sc, p) 1058 struct eap_softc *sc; 1059 struct eap_dma *p; 1060 { 1061 bus_dmamap_unload(sc->sc_dmatag, p->map); 1062 bus_dmamap_destroy(sc->sc_dmatag, p->map); 1063 bus_dmamem_unmap(sc->sc_dmatag, p->addr, p->size); 1064 bus_dmamem_free(sc->sc_dmatag, p->segs, p->nsegs); 1065 return (0); 1066 } 1067 1068 int 1069 eap_open(addr, flags) 1070 void *addr; 1071 int flags; 1072 { 1073 return (0); 1074 } 1075 1076 /* 1077 * Close function is called at splaudio(). 1078 */ 1079 void 1080 eap_close(addr) 1081 void *addr; 1082 { 1083 struct eap_softc *sc = addr; 1084 1085 eap_halt_output(sc); 1086 eap_halt_input(sc); 1087 1088 sc->sc_pintr = 0; 1089 sc->sc_rintr = 0; 1090 } 1091 1092 int 1093 eap_query_encoding(addr, fp) 1094 void *addr; 1095 struct audio_encoding *fp; 1096 { 1097 switch (fp->index) { 1098 case 0: 1099 strcpy(fp->name, AudioEulinear); 1100 fp->encoding = AUDIO_ENCODING_ULINEAR; 1101 fp->precision = 8; 1102 fp->flags = 0; 1103 return (0); 1104 case 1: 1105 strcpy(fp->name, AudioEmulaw); 1106 fp->encoding = AUDIO_ENCODING_ULAW; 1107 fp->precision = 8; 1108 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1109 return (0); 1110 case 2: 1111 strcpy(fp->name, AudioEalaw); 1112 fp->encoding = AUDIO_ENCODING_ALAW; 1113 fp->precision = 8; 1114 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1115 return (0); 1116 case 3: 1117 strcpy(fp->name, AudioEslinear); 1118 fp->encoding = AUDIO_ENCODING_SLINEAR; 1119 fp->precision = 8; 1120 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1121 return (0); 1122 case 4: 1123 strcpy(fp->name, AudioEslinear_le); 1124 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 1125 fp->precision = 16; 1126 fp->flags = 0; 1127 return (0); 1128 case 5: 1129 strcpy(fp->name, AudioEulinear_le); 1130 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 1131 fp->precision = 16; 1132 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1133 return (0); 1134 case 6: 1135 strcpy(fp->name, AudioEslinear_be); 1136 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 1137 fp->precision = 16; 1138 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1139 return (0); 1140 case 7: 1141 strcpy(fp->name, AudioEulinear_be); 1142 fp->encoding = AUDIO_ENCODING_ULINEAR_BE; 1143 fp->precision = 16; 1144 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 1145 return (0); 1146 default: 1147 return (EINVAL); 1148 } 1149 } 1150 1151 int 1152 eap_set_params(addr, setmode, usemode, play, rec) 1153 void *addr; 1154 int setmode, usemode; 1155 struct audio_params *play, *rec; 1156 { 1157 struct eap_softc *sc = addr; 1158 struct audio_params *p; 1159 int mode; 1160 u_int32_t div; 1161 1162 /* 1163 * The es1370 only has one clock, so make the sample rates match. 1164 */ 1165 if (!sc->sc_1371) { 1166 if (play->sample_rate != rec->sample_rate && 1167 usemode == (AUMODE_PLAY | AUMODE_RECORD)) { 1168 if (setmode == AUMODE_PLAY) { 1169 rec->sample_rate = play->sample_rate; 1170 setmode |= AUMODE_RECORD; 1171 } else if (setmode == AUMODE_RECORD) { 1172 play->sample_rate = rec->sample_rate; 1173 setmode |= AUMODE_PLAY; 1174 } else 1175 return (EINVAL); 1176 } 1177 } 1178 1179 for (mode = AUMODE_RECORD; mode != -1; 1180 mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) { 1181 if ((setmode & mode) == 0) 1182 continue; 1183 1184 p = mode == AUMODE_PLAY ? play : rec; 1185 1186 if (p->sample_rate < 4000 || p->sample_rate > 48000 || 1187 (p->precision != 8 && p->precision != 16) || 1188 (p->channels != 1 && p->channels != 2)) 1189 return (EINVAL); 1190 1191 p->factor = 1; 1192 p->sw_code = 0; 1193 switch (p->encoding) { 1194 case AUDIO_ENCODING_SLINEAR_BE: 1195 if (p->precision == 16) 1196 p->sw_code = swap_bytes; 1197 else 1198 p->sw_code = change_sign8; 1199 break; 1200 case AUDIO_ENCODING_SLINEAR_LE: 1201 if (p->precision != 16) 1202 p->sw_code = change_sign8; 1203 break; 1204 case AUDIO_ENCODING_ULINEAR_BE: 1205 if (p->precision == 16) { 1206 if (mode == AUMODE_PLAY) 1207 p->sw_code = swap_bytes_change_sign16; 1208 else 1209 p->sw_code = change_sign16_swap_bytes; 1210 } 1211 break; 1212 case AUDIO_ENCODING_ULINEAR_LE: 1213 if (p->precision == 16) 1214 p->sw_code = change_sign16; 1215 break; 1216 case AUDIO_ENCODING_ULAW: 1217 if (mode == AUMODE_PLAY) { 1218 p->factor = 2; 1219 p->sw_code = mulaw_to_slinear16; 1220 } else 1221 p->sw_code = ulinear8_to_mulaw; 1222 break; 1223 case AUDIO_ENCODING_ALAW: 1224 if (mode == AUMODE_PLAY) { 1225 p->factor = 2; 1226 p->sw_code = alaw_to_slinear16; 1227 } else 1228 p->sw_code = ulinear8_to_alaw; 1229 break; 1230 default: 1231 return (EINVAL); 1232 } 1233 } 1234 1235 if (sc->sc_1371) { 1236 eap1371_set_dac_rate(sc, play->sample_rate, 1); 1237 eap1371_set_dac_rate(sc, play->sample_rate, 2); 1238 eap1371_set_adc_rate(sc, rec->sample_rate); 1239 } else { 1240 /* Set the speed */ 1241 DPRINTFN(2, ("eap_set_params: old ICSC = 0x%08x\n", 1242 EREAD4(sc, EAP_ICSC))); 1243 div = EREAD4(sc, EAP_ICSC) & ~EAP_PCLKBITS; 1244 /* 1245 * XXX 1246 * The -2 isn't documented, but seemed to make the wall 1247 * time match 1248 * what I expect. - mycroft 1249 */ 1250 if (usemode == AUMODE_RECORD) 1251 div |= EAP_SET_PCLKDIV(EAP_XTAL_FREQ / 1252 rec->sample_rate - 2); 1253 else 1254 div |= EAP_SET_PCLKDIV(EAP_XTAL_FREQ / 1255 play->sample_rate - 2); 1256 div |= EAP_CCB_INTRM; 1257 EWRITE4(sc, EAP_ICSC, div); 1258 DPRINTFN(2, ("eap_set_params: set ICSC = 0x%08x\n", div)); 1259 } 1260 1261 return (0); 1262 } 1263 1264 int 1265 eap_round_blocksize(addr, blk) 1266 void *addr; 1267 int blk; 1268 { 1269 return (blk & -32); /* keep good alignment */ 1270 } 1271 1272 int 1273 eap_trigger_output(addr, start, end, blksize, intr, arg, param) 1274 void *addr; 1275 void *start, *end; 1276 int blksize; 1277 void (*intr) __P((void *)); 1278 void *arg; 1279 struct audio_params *param; 1280 { 1281 struct eap_softc *sc = addr; 1282 struct eap_dma *p; 1283 u_int32_t icsc, sic; 1284 int sampshift; 1285 int idx; 1286 1287 #ifdef DIAGNOSTIC 1288 if (sc->sc_prun) 1289 panic("eap_trigger_output: already running"); 1290 sc->sc_prun = 1; 1291 #endif 1292 1293 DPRINTFN(1, ("eap_trigger_output: sc=%p start=%p end=%p " 1294 "blksize=%d intr=%p(%p)\n", addr, start, end, blksize, intr, arg)); 1295 sc->sc_pintr = intr; 1296 sc->sc_parg = arg; 1297 1298 sic = EREAD4(sc, EAP_SIC); 1299 sic &= ~(EAP_P2_S_EB | EAP_P2_S_MB | EAP_INC_BITS | EAP_P2_INTR_EN); 1300 sic |= EAP_SET_P2_ST_INC(0) | EAP_SET_P2_END_INC(param->precision * param->factor / 8); 1301 sampshift = 0; 1302 if (param->precision * param->factor == 16) { 1303 sic |= EAP_P2_S_EB; 1304 sampshift++; 1305 } 1306 if (param->channels == 2) { 1307 sic |= EAP_P2_S_MB; 1308 sampshift++; 1309 } 1310 1311 DPRINTFN(1, ("set SIC=0x%08x\n", sic)); 1312 EWRITE4(sc, EAP_SIC, sic); 1313 EWRITE4(sc, EAP_SIC, sic | EAP_P2_INTR_EN); 1314 1315 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1316 ; 1317 if (!p) { 1318 printf("eap_trigger_output: bad addr %p\n", start); 1319 return (EINVAL); 1320 } 1321 1322 DPRINTF(("eap_trigger_output: DAC2_ADDR=0x%x, DAC2_SIZE=0x%x\n", 1323 (int)DMAADDR(p), 1324 EAP_SET_SIZE(0, (((char *)end - (char *)start) >> 2) - 1))); 1325 EWRITE4(sc, EAP_MEMPAGE, EAP_DAC_PAGE); 1326 EWRITE4(sc, EAP_DAC2_ADDR, DMAADDR(p)); 1327 EWRITE4(sc, EAP_DAC2_SIZE, 1328 EAP_SET_SIZE(0, (((char *)end - (char *)start) >> 2) - 1)); 1329 1330 EWRITE4(sc, EAP_DAC2_CSR, (blksize >> sampshift) - 1); 1331 icsc = EREAD4(sc, EAP_ICSC); 1332 1333 if (sc->sc_1371) 1334 EWRITE4(sc, E1371_SRC, 0); 1335 1336 EWRITE4(sc, EAP_ICSC, icsc | EAP_DAC2_EN); 1337 1338 1339 for (idx = 0; idx < 3; idx++) { 1340 DPRINTFN (1, ("icsc=%08x sic=%08x dac2csr=%08x icss=%08x src=%08x\n", 1341 EREAD4(sc, EAP_ICSC), 1342 EREAD4(sc, EAP_SIC), 1343 EREAD4(sc, EAP_DAC2_CSR), 1344 EREAD4(sc, EAP_ICSS), 1345 EREAD4(sc, E1371_SRC))); 1346 1347 delay(1000); 1348 } 1349 1350 return (0); 1351 } 1352 1353 1354 1355 int 1356 eap_trigger_input(addr, start, end, blksize, intr, arg, param) 1357 void *addr; 1358 void *start, *end; 1359 int blksize; 1360 void (*intr) __P((void *)); 1361 void *arg; 1362 struct audio_params *param; 1363 { 1364 struct eap_softc *sc = addr; 1365 struct eap_dma *p; 1366 u_int32_t icsc, sic; 1367 int sampshift; 1368 1369 #ifdef DIAGNOSTIC 1370 if (sc->sc_rrun) 1371 panic("eap_trigger_input: already running"); 1372 sc->sc_rrun = 1; 1373 #endif 1374 1375 DPRINTFN(1, ("eap_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n", 1376 addr, start, end, blksize, intr, arg)); 1377 sc->sc_rintr = intr; 1378 sc->sc_rarg = arg; 1379 1380 sic = EREAD4(sc, EAP_SIC); 1381 sic &= ~(EAP_R1_S_EB | EAP_R1_S_MB); 1382 sampshift = 0; 1383 if (param->precision * param->factor == 16) { 1384 sic |= EAP_R1_S_EB; 1385 sampshift++; 1386 } 1387 if (param->channels == 2) { 1388 sic |= EAP_R1_S_MB; 1389 sampshift++; 1390 } 1391 DPRINTFN(1, ("set SIC=0x%08x\n", sic)); 1392 1393 EWRITE4(sc, EAP_SIC, sic); 1394 1395 for (p = sc->sc_dmas; p && KERNADDR(p) != start; p = p->next) 1396 ; 1397 if (!p) { 1398 printf("eap_trigger_input: bad addr %p\n", start); 1399 return (EINVAL); 1400 } 1401 1402 DPRINTF(("eap_trigger_input: ADC_ADDR=0x%x, ADC_SIZE=0x%x\n", 1403 (int)DMAADDR(p), 1404 EAP_SET_SIZE(0, (((char *)end - (char *)start) >> 2) - 1))); 1405 EWRITE4(sc, EAP_MEMPAGE, EAP_ADC_PAGE); 1406 EWRITE4(sc, EAP_ADC_ADDR, DMAADDR(p)); 1407 EWRITE4(sc, EAP_ADC_SIZE, 1408 EAP_SET_SIZE(0, (((char *)end - (char *)start) >> 2) - 1)); 1409 1410 EWRITE4(sc, EAP_ADC_CSR, (blksize >> sampshift) - 1); 1411 1412 if (sc->sc_1371) 1413 EWRITE4(sc, E1371_SRC, 0); 1414 1415 icsc = EREAD4(sc, EAP_ICSC); 1416 EWRITE4(sc, EAP_ICSC, icsc | EAP_ADC_EN); 1417 1418 DPRINTFN(1, ("eap_trigger_input: set ICSC = 0x%08x\n", icsc)); 1419 1420 return (0); 1421 } 1422 1423 int 1424 eap_halt_output(addr) 1425 void *addr; 1426 { 1427 struct eap_softc *sc = addr; 1428 u_int32_t icsc; 1429 1430 DPRINTF(("eap: eap_halt_output\n")); 1431 icsc = EREAD4(sc, EAP_ICSC); 1432 EWRITE4(sc, EAP_ICSC, icsc & ~EAP_DAC2_EN); 1433 #ifdef DIAGNOSTIC 1434 sc->sc_prun = 0; 1435 #endif 1436 return (0); 1437 } 1438 1439 int 1440 eap_halt_input(addr) 1441 void *addr; 1442 { 1443 struct eap_softc *sc = addr; 1444 u_int32_t icsc; 1445 1446 DPRINTF(("eap: eap_halt_input\n")); 1447 icsc = EREAD4(sc, EAP_ICSC); 1448 EWRITE4(sc, EAP_ICSC, icsc & ~EAP_ADC_EN); 1449 #ifdef DIAGNOSTIC 1450 sc->sc_rrun = 0; 1451 #endif 1452 return (0); 1453 } 1454 1455 int 1456 eap_getdev(addr, retp) 1457 void *addr; 1458 struct audio_device *retp; 1459 { 1460 *retp = eap_device; 1461 return (0); 1462 } 1463 1464 int 1465 eap1371_mixer_set_port(addr, cp) 1466 void *addr; 1467 mixer_ctrl_t *cp; 1468 { 1469 struct eap_softc *sc = addr; 1470 1471 return ((sc->codec_if->vtbl->mixer_set_port)(sc->codec_if, 1472 cp)); 1473 } 1474 1475 int 1476 eap1371_mixer_get_port(addr, cp) 1477 void *addr; 1478 mixer_ctrl_t *cp; 1479 { 1480 struct eap_softc *sc = addr; 1481 1482 return ((sc->codec_if->vtbl->mixer_get_port)(sc->codec_if, 1483 cp)); 1484 } 1485 1486 int 1487 eap1371_query_devinfo(addr, dip) 1488 void *addr; 1489 mixer_devinfo_t *dip; 1490 { 1491 struct eap_softc *sc = addr; 1492 1493 return ((sc->codec_if->vtbl->query_devinfo)(sc->codec_if, dip)); 1494 } 1495 1496 int 1497 eap1371_get_portnum_by_name(sc, class, device, qualifier) 1498 struct eap_softc *sc; 1499 char *class, *device, *qualifier; 1500 { 1501 return ((sc->codec_if->vtbl->get_portnum_by_name)(sc->codec_if, class, 1502 device, qualifier)); 1503 } 1504 1505 void 1506 eap_set_mixer(sc, a, d) 1507 struct eap_softc *sc; 1508 int a, d; 1509 { 1510 eap_write_codec(sc, a, d); 1511 1512 sc->sc_port[a] = d; 1513 DPRINTFN(1, ("eap_mixer_set_port port 0x%02x = 0x%02x\n", a, d)); 1514 } 1515 1516 int 1517 eap_mixer_set_port(addr, cp) 1518 void *addr; 1519 mixer_ctrl_t *cp; 1520 { 1521 struct eap_softc *sc = addr; 1522 int lval, rval, l, r, la, ra; 1523 int l1, r1, l2, r2, m, o1, o2; 1524 1525 if (cp->dev == EAP_RECORD_SOURCE) { 1526 if (cp->type != AUDIO_MIXER_SET) 1527 return (EINVAL); 1528 m = sc->sc_record_source = cp->un.mask; 1529 l1 = l2 = r1 = r2 = 0; 1530 if (m & (1 << EAP_VOICE_VOL)) 1531 l2 |= AK_M_VOICE, r2 |= AK_M_VOICE; 1532 if (m & (1 << EAP_FM_VOL)) 1533 l1 |= AK_M_FM_L, r1 |= AK_M_FM_R; 1534 if (m & (1 << EAP_CD_VOL)) 1535 l1 |= AK_M_CD_L, r1 |= AK_M_CD_R; 1536 if (m & (1 << EAP_LINE_VOL)) 1537 l1 |= AK_M_LINE_L, r1 |= AK_M_LINE_R; 1538 if (m & (1 << EAP_AUX_VOL)) 1539 l2 |= AK_M2_AUX_L, r2 |= AK_M2_AUX_R; 1540 if (m & (1 << EAP_MIC_VOL)) 1541 l2 |= AK_M_TMIC, r2 |= AK_M_TMIC; 1542 eap_set_mixer(sc, AK_IN_MIXER1_L, l1); 1543 eap_set_mixer(sc, AK_IN_MIXER1_R, r1); 1544 eap_set_mixer(sc, AK_IN_MIXER2_L, l2); 1545 eap_set_mixer(sc, AK_IN_MIXER2_R, r2); 1546 return (0); 1547 } 1548 if (cp->dev == EAP_OUTPUT_SELECT) { 1549 if (cp->type != AUDIO_MIXER_SET) 1550 return (EINVAL); 1551 m = sc->sc_output_source = cp->un.mask; 1552 o1 = o2 = 0; 1553 if (m & (1 << EAP_VOICE_VOL)) 1554 o2 |= AK_M_VOICE_L | AK_M_VOICE_R; 1555 if (m & (1 << EAP_FM_VOL)) 1556 o1 |= AK_M_FM_L | AK_M_FM_R; 1557 if (m & (1 << EAP_CD_VOL)) 1558 o1 |= AK_M_CD_L | AK_M_CD_R; 1559 if (m & (1 << EAP_LINE_VOL)) 1560 o1 |= AK_M_LINE_L | AK_M_LINE_R; 1561 if (m & (1 << EAP_AUX_VOL)) 1562 o2 |= AK_M_AUX_L | AK_M_AUX_R; 1563 if (m & (1 << EAP_MIC_VOL)) 1564 o1 |= AK_M_MIC; 1565 eap_set_mixer(sc, AK_OUT_MIXER1, o1); 1566 eap_set_mixer(sc, AK_OUT_MIXER2, o2); 1567 return (0); 1568 } 1569 if (cp->dev == EAP_MIC_PREAMP) { 1570 if (cp->type != AUDIO_MIXER_ENUM) 1571 return (EINVAL); 1572 if (cp->un.ord != 0 && cp->un.ord != 1) 1573 return (EINVAL); 1574 sc->sc_mic_preamp = cp->un.ord; 1575 eap_set_mixer(sc, AK_MGAIN, cp->un.ord); 1576 return (0); 1577 } 1578 if (cp->type != AUDIO_MIXER_VALUE) 1579 return (EINVAL); 1580 if (cp->un.value.num_channels == 1) 1581 lval = rval = cp->un.value.level[AUDIO_MIXER_LEVEL_MONO]; 1582 else if (cp->un.value.num_channels == 2) { 1583 lval = cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT]; 1584 rval = cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT]; 1585 } else 1586 return (EINVAL); 1587 ra = -1; 1588 switch (cp->dev) { 1589 case EAP_MASTER_VOL: 1590 l = VOL_TO_ATT5(lval); 1591 r = VOL_TO_ATT5(rval); 1592 la = AK_MASTER_L; 1593 ra = AK_MASTER_R; 1594 break; 1595 case EAP_MIC_VOL: 1596 if (cp->un.value.num_channels != 1) 1597 return (EINVAL); 1598 la = AK_MIC; 1599 goto lr; 1600 case EAP_VOICE_VOL: 1601 la = AK_VOICE_L; 1602 ra = AK_VOICE_R; 1603 goto lr; 1604 case EAP_FM_VOL: 1605 la = AK_FM_L; 1606 ra = AK_FM_R; 1607 goto lr; 1608 case EAP_CD_VOL: 1609 la = AK_CD_L; 1610 ra = AK_CD_R; 1611 goto lr; 1612 case EAP_LINE_VOL: 1613 la = AK_LINE_L; 1614 ra = AK_LINE_R; 1615 goto lr; 1616 case EAP_AUX_VOL: 1617 la = AK_AUX_L; 1618 ra = AK_AUX_R; 1619 lr: 1620 l = VOL_TO_GAIN5(lval); 1621 r = VOL_TO_GAIN5(rval); 1622 break; 1623 default: 1624 return (EINVAL); 1625 } 1626 eap_set_mixer(sc, la, l); 1627 if (ra >= 0) { 1628 eap_set_mixer(sc, ra, r); 1629 } 1630 return (0); 1631 } 1632 1633 int 1634 eap_mixer_get_port(addr, cp) 1635 void *addr; 1636 mixer_ctrl_t *cp; 1637 { 1638 struct eap_softc *sc = addr; 1639 int la, ra, l, r; 1640 1641 switch (cp->dev) { 1642 case EAP_RECORD_SOURCE: 1643 if (cp->type != AUDIO_MIXER_SET) 1644 return (EINVAL); 1645 cp->un.mask = sc->sc_record_source; 1646 return (0); 1647 case EAP_OUTPUT_SELECT: 1648 if (cp->type != AUDIO_MIXER_SET) 1649 return (EINVAL); 1650 cp->un.mask = sc->sc_output_source; 1651 return (0); 1652 case EAP_MIC_PREAMP: 1653 if (cp->type != AUDIO_MIXER_ENUM) 1654 return (EINVAL); 1655 cp->un.ord = sc->sc_mic_preamp; 1656 return (0); 1657 case EAP_MASTER_VOL: 1658 l = ATT5_TO_VOL(sc->sc_port[AK_MASTER_L]); 1659 r = ATT5_TO_VOL(sc->sc_port[AK_MASTER_R]); 1660 break; 1661 case EAP_MIC_VOL: 1662 if (cp->un.value.num_channels != 1) 1663 return (EINVAL); 1664 la = ra = AK_MIC; 1665 goto lr; 1666 case EAP_VOICE_VOL: 1667 la = AK_VOICE_L; 1668 ra = AK_VOICE_R; 1669 goto lr; 1670 case EAP_FM_VOL: 1671 la = AK_FM_L; 1672 ra = AK_FM_R; 1673 goto lr; 1674 case EAP_CD_VOL: 1675 la = AK_CD_L; 1676 ra = AK_CD_R; 1677 goto lr; 1678 case EAP_LINE_VOL: 1679 la = AK_LINE_L; 1680 ra = AK_LINE_R; 1681 goto lr; 1682 case EAP_AUX_VOL: 1683 la = AK_AUX_L; 1684 ra = AK_AUX_R; 1685 lr: 1686 l = GAIN5_TO_VOL(sc->sc_port[la]); 1687 r = GAIN5_TO_VOL(sc->sc_port[ra]); 1688 break; 1689 default: 1690 return (EINVAL); 1691 } 1692 if (cp->un.value.num_channels == 1) 1693 cp->un.value.level[AUDIO_MIXER_LEVEL_MONO] = (l+r) / 2; 1694 else if (cp->un.value.num_channels == 2) { 1695 cp->un.value.level[AUDIO_MIXER_LEVEL_LEFT] = l; 1696 cp->un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = r; 1697 } else 1698 return (EINVAL); 1699 return (0); 1700 } 1701 1702 int 1703 eap_query_devinfo(addr, dip) 1704 void *addr; 1705 mixer_devinfo_t *dip; 1706 { 1707 switch (dip->index) { 1708 case EAP_MASTER_VOL: 1709 dip->type = AUDIO_MIXER_VALUE; 1710 dip->mixer_class = EAP_OUTPUT_CLASS; 1711 dip->prev = dip->next = AUDIO_MIXER_LAST; 1712 strcpy(dip->label.name, AudioNmaster); 1713 dip->un.v.num_channels = 2; 1714 strcpy(dip->un.v.units.name, AudioNvolume); 1715 return (0); 1716 case EAP_VOICE_VOL: 1717 dip->type = AUDIO_MIXER_VALUE; 1718 dip->mixer_class = EAP_INPUT_CLASS; 1719 dip->prev = AUDIO_MIXER_LAST; 1720 dip->next = AUDIO_MIXER_LAST; 1721 strcpy(dip->label.name, AudioNdac); 1722 dip->un.v.num_channels = 2; 1723 strcpy(dip->un.v.units.name, AudioNvolume); 1724 return (0); 1725 case EAP_FM_VOL: 1726 dip->type = AUDIO_MIXER_VALUE; 1727 dip->mixer_class = EAP_INPUT_CLASS; 1728 dip->prev = AUDIO_MIXER_LAST; 1729 dip->next = AUDIO_MIXER_LAST; 1730 strcpy(dip->label.name, AudioNfmsynth); 1731 dip->un.v.num_channels = 2; 1732 strcpy(dip->un.v.units.name, AudioNvolume); 1733 return (0); 1734 case EAP_CD_VOL: 1735 dip->type = AUDIO_MIXER_VALUE; 1736 dip->mixer_class = EAP_INPUT_CLASS; 1737 dip->prev = AUDIO_MIXER_LAST; 1738 dip->next = AUDIO_MIXER_LAST; 1739 strcpy(dip->label.name, AudioNcd); 1740 dip->un.v.num_channels = 2; 1741 strcpy(dip->un.v.units.name, AudioNvolume); 1742 return (0); 1743 case EAP_LINE_VOL: 1744 dip->type = AUDIO_MIXER_VALUE; 1745 dip->mixer_class = EAP_INPUT_CLASS; 1746 dip->prev = AUDIO_MIXER_LAST; 1747 dip->next = AUDIO_MIXER_LAST; 1748 strcpy(dip->label.name, AudioNline); 1749 dip->un.v.num_channels = 2; 1750 strcpy(dip->un.v.units.name, AudioNvolume); 1751 return (0); 1752 case EAP_AUX_VOL: 1753 dip->type = AUDIO_MIXER_VALUE; 1754 dip->mixer_class = EAP_INPUT_CLASS; 1755 dip->prev = AUDIO_MIXER_LAST; 1756 dip->next = AUDIO_MIXER_LAST; 1757 strcpy(dip->label.name, AudioNaux); 1758 dip->un.v.num_channels = 2; 1759 strcpy(dip->un.v.units.name, AudioNvolume); 1760 return (0); 1761 case EAP_MIC_VOL: 1762 dip->type = AUDIO_MIXER_VALUE; 1763 dip->mixer_class = EAP_INPUT_CLASS; 1764 dip->prev = AUDIO_MIXER_LAST; 1765 dip->next = EAP_MIC_PREAMP; 1766 strcpy(dip->label.name, AudioNmicrophone); 1767 dip->un.v.num_channels = 1; 1768 strcpy(dip->un.v.units.name, AudioNvolume); 1769 return (0); 1770 case EAP_RECORD_SOURCE: 1771 dip->mixer_class = EAP_RECORD_CLASS; 1772 dip->prev = dip->next = AUDIO_MIXER_LAST; 1773 strcpy(dip->label.name, AudioNsource); 1774 dip->type = AUDIO_MIXER_SET; 1775 dip->un.s.num_mem = 6; 1776 strcpy(dip->un.s.member[0].label.name, AudioNmicrophone); 1777 dip->un.s.member[0].mask = 1 << EAP_MIC_VOL; 1778 strcpy(dip->un.s.member[1].label.name, AudioNcd); 1779 dip->un.s.member[1].mask = 1 << EAP_CD_VOL; 1780 strcpy(dip->un.s.member[2].label.name, AudioNline); 1781 dip->un.s.member[2].mask = 1 << EAP_LINE_VOL; 1782 strcpy(dip->un.s.member[3].label.name, AudioNfmsynth); 1783 dip->un.s.member[3].mask = 1 << EAP_FM_VOL; 1784 strcpy(dip->un.s.member[4].label.name, AudioNaux); 1785 dip->un.s.member[4].mask = 1 << EAP_AUX_VOL; 1786 strcpy(dip->un.s.member[5].label.name, AudioNdac); 1787 dip->un.s.member[5].mask = 1 << EAP_VOICE_VOL; 1788 return (0); 1789 case EAP_OUTPUT_SELECT: 1790 dip->mixer_class = EAP_OUTPUT_CLASS; 1791 dip->prev = dip->next = AUDIO_MIXER_LAST; 1792 strcpy(dip->label.name, AudioNselect); 1793 dip->type = AUDIO_MIXER_SET; 1794 dip->un.s.num_mem = 6; 1795 strcpy(dip->un.s.member[0].label.name, AudioNmicrophone); 1796 dip->un.s.member[0].mask = 1 << EAP_MIC_VOL; 1797 strcpy(dip->un.s.member[1].label.name, AudioNcd); 1798 dip->un.s.member[1].mask = 1 << EAP_CD_VOL; 1799 strcpy(dip->un.s.member[2].label.name, AudioNline); 1800 dip->un.s.member[2].mask = 1 << EAP_LINE_VOL; 1801 strcpy(dip->un.s.member[3].label.name, AudioNfmsynth); 1802 dip->un.s.member[3].mask = 1 << EAP_FM_VOL; 1803 strcpy(dip->un.s.member[4].label.name, AudioNaux); 1804 dip->un.s.member[4].mask = 1 << EAP_AUX_VOL; 1805 strcpy(dip->un.s.member[5].label.name, AudioNdac); 1806 dip->un.s.member[5].mask = 1 << EAP_VOICE_VOL; 1807 return (0); 1808 case EAP_MIC_PREAMP: 1809 dip->type = AUDIO_MIXER_ENUM; 1810 dip->mixer_class = EAP_INPUT_CLASS; 1811 dip->prev = EAP_MIC_VOL; 1812 dip->next = AUDIO_MIXER_LAST; 1813 strcpy(dip->label.name, AudioNpreamp); 1814 dip->un.e.num_mem = 2; 1815 strcpy(dip->un.e.member[0].label.name, AudioNoff); 1816 dip->un.e.member[0].ord = 0; 1817 strcpy(dip->un.e.member[1].label.name, AudioNon); 1818 dip->un.e.member[1].ord = 1; 1819 return (0); 1820 case EAP_OUTPUT_CLASS: 1821 dip->type = AUDIO_MIXER_CLASS; 1822 dip->mixer_class = EAP_OUTPUT_CLASS; 1823 dip->next = dip->prev = AUDIO_MIXER_LAST; 1824 strcpy(dip->label.name, AudioCoutputs); 1825 return (0); 1826 case EAP_RECORD_CLASS: 1827 dip->type = AUDIO_MIXER_CLASS; 1828 dip->mixer_class = EAP_RECORD_CLASS; 1829 dip->next = dip->prev = AUDIO_MIXER_LAST; 1830 strcpy(dip->label.name, AudioCrecord); 1831 return (0); 1832 case EAP_INPUT_CLASS: 1833 dip->type = AUDIO_MIXER_CLASS; 1834 dip->mixer_class = EAP_INPUT_CLASS; 1835 dip->next = dip->prev = AUDIO_MIXER_LAST; 1836 strcpy(dip->label.name, AudioCinputs); 1837 return (0); 1838 } 1839 return (ENXIO); 1840 } 1841 1842 void * 1843 eap_malloc(addr, size, pool, flags) 1844 void *addr; 1845 u_long size; 1846 int pool, flags; 1847 { 1848 struct eap_softc *sc = addr; 1849 struct eap_dma *p; 1850 int error; 1851 1852 p = malloc(sizeof(*p), pool, flags); 1853 if (!p) 1854 return (0); 1855 error = eap_allocmem(sc, size, 16, p); 1856 if (error) { 1857 free(p, pool); 1858 return (0); 1859 } 1860 p->next = sc->sc_dmas; 1861 sc->sc_dmas = p; 1862 return (KERNADDR(p)); 1863 } 1864 1865 void 1866 eap_free(addr, ptr, pool) 1867 void *addr; 1868 void *ptr; 1869 int pool; 1870 { 1871 struct eap_softc *sc = addr; 1872 struct eap_dma **p; 1873 1874 for (p = &sc->sc_dmas; *p; p = &(*p)->next) { 1875 if (KERNADDR(*p) == ptr) { 1876 eap_freemem(sc, *p); 1877 *p = (*p)->next; 1878 free(*p, pool); 1879 return; 1880 } 1881 } 1882 } 1883 1884 u_long 1885 eap_round_buffersize(addr, size) 1886 void *addr; 1887 u_long size; 1888 { 1889 return (size); 1890 } 1891 1892 int 1893 eap_mappage(addr, mem, off, prot) 1894 void *addr; 1895 void *mem; 1896 int off; 1897 int prot; 1898 { 1899 struct eap_softc *sc = addr; 1900 struct eap_dma *p; 1901 1902 if (off < 0) 1903 return (-1); 1904 for (p = sc->sc_dmas; p && KERNADDR(p) != mem; p = p->next) 1905 ; 1906 if (!p) 1907 return (-1); 1908 return (bus_dmamem_mmap(sc->sc_dmatag, p->segs, p->nsegs, 1909 off, prot, BUS_DMA_WAITOK)); 1910 } 1911 1912 int 1913 eap_get_props(addr) 1914 void *addr; 1915 { 1916 return (AUDIO_PROP_MMAP | AUDIO_PROP_INDEPENDENT | 1917 AUDIO_PROP_FULLDUPLEX); 1918 } 1919