xref: /openbsd/sys/dev/pci/ichiic.c (revision a5a63700)
1*a5a63700Sderaadt /*	$OpenBSD: ichiic.c,v 1.6 2006/01/01 20:52:26 deraadt Exp $	*/
23b00bf77Sgrange 
33b00bf77Sgrange /*
43b00bf77Sgrange  * Copyright (c) 2005 Alexander Yurchenko <grange@openbsd.org>
53b00bf77Sgrange  *
63b00bf77Sgrange  * Permission to use, copy, modify, and distribute this software for any
73b00bf77Sgrange  * purpose with or without fee is hereby granted, provided that the above
83b00bf77Sgrange  * copyright notice and this permission notice appear in all copies.
93b00bf77Sgrange  *
103b00bf77Sgrange  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
113b00bf77Sgrange  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
123b00bf77Sgrange  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
133b00bf77Sgrange  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
143b00bf77Sgrange  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
153b00bf77Sgrange  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
163b00bf77Sgrange  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
173b00bf77Sgrange  */
183b00bf77Sgrange 
193b00bf77Sgrange /*
203b00bf77Sgrange  * Intel ICH SMBus controller driver.
213b00bf77Sgrange  */
223b00bf77Sgrange 
233b00bf77Sgrange #include <sys/param.h>
243b00bf77Sgrange #include <sys/systm.h>
253b00bf77Sgrange #include <sys/device.h>
263b00bf77Sgrange #include <sys/kernel.h>
273b00bf77Sgrange #include <sys/lock.h>
283b00bf77Sgrange #include <sys/proc.h>
293b00bf77Sgrange 
303b00bf77Sgrange #include <machine/bus.h>
313b00bf77Sgrange 
323b00bf77Sgrange #include <dev/pci/pcidevs.h>
333b00bf77Sgrange #include <dev/pci/pcireg.h>
343b00bf77Sgrange #include <dev/pci/pcivar.h>
353b00bf77Sgrange 
363b00bf77Sgrange #include <dev/pci/ichreg.h>
373b00bf77Sgrange 
383b00bf77Sgrange #include <dev/i2c/i2cvar.h>
393b00bf77Sgrange 
403b00bf77Sgrange #ifdef ICHIIC_DEBUG
413b00bf77Sgrange #define DPRINTF(x) printf x
423b00bf77Sgrange #else
433b00bf77Sgrange #define DPRINTF(x)
443b00bf77Sgrange #endif
453b00bf77Sgrange 
463b00bf77Sgrange #define ICHIIC_DELAY	100
473b00bf77Sgrange #define ICHIIC_TIMEOUT	1
483b00bf77Sgrange 
493b00bf77Sgrange struct ichiic_softc {
503b00bf77Sgrange 	struct device		sc_dev;
513b00bf77Sgrange 
523b00bf77Sgrange 	bus_space_tag_t		sc_iot;
533b00bf77Sgrange 	bus_space_handle_t	sc_ioh;
543b00bf77Sgrange 	void *			sc_ih;
55749dbd03Sgrange 	int			sc_poll;
563b00bf77Sgrange 
573b00bf77Sgrange 	struct i2c_controller	sc_i2c_tag;
583b00bf77Sgrange 	struct lock		sc_i2c_lock;
59c17198b5Sgrange 	struct {
603b00bf77Sgrange 		i2c_op_t     op;
613b00bf77Sgrange 		void *       buf;
623b00bf77Sgrange 		size_t       len;
633b00bf77Sgrange 		int          flags;
64c17198b5Sgrange 		volatile int error;
653b00bf77Sgrange 	}			sc_i2c_xfer;
663b00bf77Sgrange };
673b00bf77Sgrange 
683b00bf77Sgrange int	ichiic_match(struct device *, void *, void *);
693b00bf77Sgrange void	ichiic_attach(struct device *, struct device *, void *);
703b00bf77Sgrange 
713b00bf77Sgrange int	ichiic_i2c_acquire_bus(void *, int);
723b00bf77Sgrange void	ichiic_i2c_release_bus(void *, int);
733b00bf77Sgrange int	ichiic_i2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, size_t,
743b00bf77Sgrange 	    void *, size_t, int);
753b00bf77Sgrange 
763b00bf77Sgrange int	ichiic_intr(void *);
773b00bf77Sgrange 
783b00bf77Sgrange struct cfattach ichiic_ca = {
793b00bf77Sgrange 	sizeof(struct ichiic_softc),
803b00bf77Sgrange 	ichiic_match,
813b00bf77Sgrange 	ichiic_attach
823b00bf77Sgrange };
833b00bf77Sgrange 
843b00bf77Sgrange struct cfdriver ichiic_cd = {
853b00bf77Sgrange 	NULL, "ichiic", DV_DULL
863b00bf77Sgrange };
873b00bf77Sgrange 
883b00bf77Sgrange const struct pci_matchid ichiic_ids[] = {
893b00bf77Sgrange 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AA_SMB },
903b00bf77Sgrange 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AB_SMB },
913b00bf77Sgrange 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BA_SMB },
923b00bf77Sgrange 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801CA_SMB },
933b00bf77Sgrange 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DB_SMB },
943b00bf77Sgrange 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801EB_SMB },
953b00bf77Sgrange 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6300ESB_SMB },
963b00bf77Sgrange 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_SMB },
973b00bf77Sgrange 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801GB_SMB }
983b00bf77Sgrange };
993b00bf77Sgrange 
1003b00bf77Sgrange int
1013b00bf77Sgrange ichiic_match(struct device *parent, void *match, void *aux)
1023b00bf77Sgrange {
1033b00bf77Sgrange 	return (pci_matchbyid(aux, ichiic_ids,
1043b00bf77Sgrange 	    sizeof(ichiic_ids) / sizeof(ichiic_ids[0])));
1053b00bf77Sgrange }
1063b00bf77Sgrange 
1073b00bf77Sgrange void
1083b00bf77Sgrange ichiic_attach(struct device *parent, struct device *self, void *aux)
1093b00bf77Sgrange {
1103b00bf77Sgrange 	struct ichiic_softc *sc = (struct ichiic_softc *)self;
1113b00bf77Sgrange 	struct pci_attach_args *pa = aux;
1123b00bf77Sgrange 	struct i2cbus_attach_args iba;
113749dbd03Sgrange 	pcireg_t conf;
1143b00bf77Sgrange 	bus_size_t iosize;
1153b00bf77Sgrange 	pci_intr_handle_t ih;
1163b00bf77Sgrange 	const char *intrstr = NULL;
1173b00bf77Sgrange 
1183b00bf77Sgrange 	/* Map I/O space */
1193b00bf77Sgrange 	if (pci_mapreg_map(pa, ICH_SMB_BASE, PCI_MAPREG_TYPE_IO, 0,
1203b00bf77Sgrange 	    &sc->sc_iot, &sc->sc_ioh, NULL, &iosize, 0)) {
1213b00bf77Sgrange 		printf(": can't map I/O space\n");
1223b00bf77Sgrange 		return;
1233b00bf77Sgrange 	}
1243b00bf77Sgrange 
125749dbd03Sgrange 	/* Read configuration */
126749dbd03Sgrange 	conf = pci_conf_read(pa->pa_pc, pa->pa_tag, ICH_SMB_HOSTC);
127749dbd03Sgrange 	DPRINTF((": conf 0x%x", conf));
128749dbd03Sgrange 
129749dbd03Sgrange 	if (conf & ICH_SMB_HOSTC_SMIEN) {
130749dbd03Sgrange 		printf(": SMI");
131749dbd03Sgrange 		sc->sc_poll = 1;
132749dbd03Sgrange 	} else {
1333b00bf77Sgrange 		/* Install interrupt handler */
1343b00bf77Sgrange 		if (pci_intr_map(pa, &ih)) {
1353b00bf77Sgrange 			printf(": can't map interrupt\n");
1363b00bf77Sgrange 			goto fail;
1373b00bf77Sgrange 		}
1383b00bf77Sgrange 		intrstr = pci_intr_string(pa->pa_pc, ih);
139749dbd03Sgrange 		sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO,
140749dbd03Sgrange 		    ichiic_intr, sc, sc->sc_dev.dv_xname);
1413b00bf77Sgrange 		if (sc->sc_ih == NULL) {
1423b00bf77Sgrange 			printf(": can't establish interrupt");
1433b00bf77Sgrange 			if (intrstr != NULL)
1443b00bf77Sgrange 				printf(" at %s", intrstr);
1453b00bf77Sgrange 			printf("\n");
1463b00bf77Sgrange 			goto fail;
1473b00bf77Sgrange 		}
1483b00bf77Sgrange 		printf(": %s", intrstr);
149749dbd03Sgrange 	}
1503b00bf77Sgrange 
1513b00bf77Sgrange 	/* Enable controller */
1523b00bf77Sgrange 	pci_conf_write(pa->pa_pc, pa->pa_tag, ICH_SMB_HOSTC,
153749dbd03Sgrange 	    conf | ICH_SMB_HOSTC_HSTEN);
1543b00bf77Sgrange 
1553b00bf77Sgrange 	printf("\n");
1563b00bf77Sgrange 
1573b00bf77Sgrange 	/* Attach I2C bus */
1583b00bf77Sgrange 	lockinit(&sc->sc_i2c_lock, PRIBIO | PCATCH, "iiclk", 0, 0);
1593b00bf77Sgrange 	sc->sc_i2c_tag.ic_cookie = sc;
1603b00bf77Sgrange 	sc->sc_i2c_tag.ic_acquire_bus = ichiic_i2c_acquire_bus;
1613b00bf77Sgrange 	sc->sc_i2c_tag.ic_release_bus = ichiic_i2c_release_bus;
1623b00bf77Sgrange 	sc->sc_i2c_tag.ic_exec = ichiic_i2c_exec;
163*a5a63700Sderaadt 
164*a5a63700Sderaadt 	bzero(&iba, sizeof iba);
1653b00bf77Sgrange 	iba.iba_name = "iic";
1663b00bf77Sgrange 	iba.iba_tag = &sc->sc_i2c_tag;
1673b00bf77Sgrange 	config_found(self, &iba, iicbus_print);
1683b00bf77Sgrange 
1693b00bf77Sgrange 	return;
1703b00bf77Sgrange 
1713b00bf77Sgrange fail:
1723b00bf77Sgrange 	bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize);
1733b00bf77Sgrange }
1743b00bf77Sgrange 
1753b00bf77Sgrange int
1763b00bf77Sgrange ichiic_i2c_acquire_bus(void *cookie, int flags)
1773b00bf77Sgrange {
1783b00bf77Sgrange 	struct ichiic_softc *sc = cookie;
1793b00bf77Sgrange 
1807ecfa26eSgrange 	if (cold || sc->sc_poll || (flags & I2C_F_POLL))
1813b00bf77Sgrange 		return (0);
1823b00bf77Sgrange 
1833b00bf77Sgrange 	return (lockmgr(&sc->sc_i2c_lock, LK_EXCLUSIVE, NULL));
1843b00bf77Sgrange }
1853b00bf77Sgrange 
1863b00bf77Sgrange void
1873b00bf77Sgrange ichiic_i2c_release_bus(void *cookie, int flags)
1883b00bf77Sgrange {
1893b00bf77Sgrange 	struct ichiic_softc *sc = cookie;
1903b00bf77Sgrange 
1917ecfa26eSgrange 	if (cold || sc->sc_poll || (flags & I2C_F_POLL))
1923b00bf77Sgrange 		return;
1933b00bf77Sgrange 
1943b00bf77Sgrange 	lockmgr(&sc->sc_i2c_lock, LK_RELEASE, NULL);
1953b00bf77Sgrange }
1963b00bf77Sgrange 
1973b00bf77Sgrange int
1983b00bf77Sgrange ichiic_i2c_exec(void *cookie, i2c_op_t op, i2c_addr_t addr,
1993b00bf77Sgrange     const void *cmdbuf, size_t cmdlen, void *buf, size_t len, int flags)
2003b00bf77Sgrange {
2013b00bf77Sgrange 	struct ichiic_softc *sc = cookie;
2023b00bf77Sgrange 	u_int8_t *b;
2033b00bf77Sgrange 	u_int8_t ctl, st;
2043b00bf77Sgrange 	int retries;
2053b00bf77Sgrange 
2063b00bf77Sgrange 	DPRINTF(("%s: exec op %d, addr 0x%x, cmdlen %d, len %d, "
207749dbd03Sgrange 	    "flags 0x%x, status 0x%b\n", sc->sc_dev.dv_xname, op, addr,
208749dbd03Sgrange 	    cmdlen, len, flags, bus_space_read_1(sc->sc_iot, sc->sc_ioh,
209749dbd03Sgrange 	    ICH_SMB_HS), ICH_SMB_HS_BITS));
210749dbd03Sgrange 
2117ecfa26eSgrange 	if (cold || sc->sc_poll)
212749dbd03Sgrange 		flags |= I2C_F_POLL;
2133b00bf77Sgrange 
2143b00bf77Sgrange 	if (!I2C_OP_STOP_P(op) || cmdlen > 1 || len > 2)
2153b00bf77Sgrange 		return (1);
2163b00bf77Sgrange 
2173b00bf77Sgrange 	/* Setup transfer */
2183b00bf77Sgrange 	sc->sc_i2c_xfer.op = op;
2193b00bf77Sgrange 	sc->sc_i2c_xfer.buf = buf;
2203b00bf77Sgrange 	sc->sc_i2c_xfer.len = len;
2213b00bf77Sgrange 	sc->sc_i2c_xfer.flags = flags;
2223b00bf77Sgrange 	sc->sc_i2c_xfer.error = 0;
2233b00bf77Sgrange 
2243b00bf77Sgrange 	/* Set slave address and transfer direction */
2253b00bf77Sgrange 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, ICH_SMB_TXSLVA,
2263b00bf77Sgrange 	    ICH_SMB_TXSLVA_ADDR(addr) |
2273b00bf77Sgrange 	    (I2C_OP_READ_P(op) ? ICH_SMB_TXSLVA_READ : 0));
2283b00bf77Sgrange 
2293b00bf77Sgrange 	b = (void *)cmdbuf;
2303b00bf77Sgrange 	if (cmdlen > 0)
2313b00bf77Sgrange 		/* Set command byte */
2323b00bf77Sgrange 		bus_space_write_1(sc->sc_iot, sc->sc_ioh, ICH_SMB_HCMD, b[0]);
2333b00bf77Sgrange 
2343b00bf77Sgrange 	if (I2C_OP_WRITE_P(op)) {
2353b00bf77Sgrange 		/* Write data */
2363b00bf77Sgrange 		b = buf;
2373b00bf77Sgrange 		if (len > 0)
2383b00bf77Sgrange 			bus_space_write_1(sc->sc_iot, sc->sc_ioh,
2393b00bf77Sgrange 			    ICH_SMB_HD0, b[0]);
2403b00bf77Sgrange 		if (len > 1)
2413b00bf77Sgrange 			bus_space_write_1(sc->sc_iot, sc->sc_ioh,
2423b00bf77Sgrange 			    ICH_SMB_HD1, b[1]);
2433b00bf77Sgrange 	}
2443b00bf77Sgrange 
2453b00bf77Sgrange 	/* Set SMBus command */
2463b00bf77Sgrange 	if (len == 0)
2473b00bf77Sgrange 		ctl = ICH_SMB_HC_CMD_BYTE;
2483b00bf77Sgrange 	else if (len == 1)
2493b00bf77Sgrange 		ctl = ICH_SMB_HC_CMD_BDATA;
2503b00bf77Sgrange 	else if (len == 2)
2513b00bf77Sgrange 		ctl = ICH_SMB_HC_CMD_WDATA;
2523b00bf77Sgrange 
2533b00bf77Sgrange 	if ((flags & I2C_F_POLL) == 0)
2543b00bf77Sgrange 		ctl |= ICH_SMB_HC_INTREN;
2553b00bf77Sgrange 
2563b00bf77Sgrange 	/* Start transaction */
2573b00bf77Sgrange 	ctl |= ICH_SMB_HC_START;
2583b00bf77Sgrange 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, ICH_SMB_HC, ctl);
2593b00bf77Sgrange 
2603b00bf77Sgrange 	if (flags & I2C_F_POLL) {
2613b00bf77Sgrange 		/* Poll for completion */
2623b00bf77Sgrange 		DELAY(ICHIIC_DELAY);
2633b00bf77Sgrange 		for (retries = 1000; retries > 0; retries--) {
2643b00bf77Sgrange 			st = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
2653b00bf77Sgrange 			    ICH_SMB_HS);
2663b00bf77Sgrange 			if ((st & ICH_SMB_HS_BUSY) == 0)
2673b00bf77Sgrange 				break;
2683b00bf77Sgrange 			DELAY(ICHIIC_DELAY);
2693b00bf77Sgrange 		}
2703b00bf77Sgrange 		if (st & ICH_SMB_HS_BUSY) {
271749dbd03Sgrange 			printf("%s: timeout, status 0x%b\n",
272749dbd03Sgrange 			    sc->sc_dev.dv_xname, st, ICH_SMB_HS_BITS);
2733b00bf77Sgrange 			return (1);
2743b00bf77Sgrange 		}
2753b00bf77Sgrange 		ichiic_intr(sc);
2763b00bf77Sgrange 	} else {
277c17198b5Sgrange 		/* Wait for interrupt */
2783b00bf77Sgrange 		if (tsleep(sc, PRIBIO, "iicexec", ICHIIC_TIMEOUT * hz))
2793b00bf77Sgrange 			return (1);
2803b00bf77Sgrange 	}
2813b00bf77Sgrange 
2823b00bf77Sgrange 	if (sc->sc_i2c_xfer.error)
2833b00bf77Sgrange 		return (1);
2843b00bf77Sgrange 
2853b00bf77Sgrange 	return (0);
2863b00bf77Sgrange }
2873b00bf77Sgrange 
2883b00bf77Sgrange int
2893b00bf77Sgrange ichiic_intr(void *arg)
2903b00bf77Sgrange {
2913b00bf77Sgrange 	struct ichiic_softc *sc = arg;
2923b00bf77Sgrange 	u_int8_t st;
2933b00bf77Sgrange 	u_int8_t *b;
2943b00bf77Sgrange 	size_t len;
2953b00bf77Sgrange 
2963b00bf77Sgrange 	/* Read status */
2973b00bf77Sgrange 	st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ICH_SMB_HS);
2983b00bf77Sgrange 	if ((st & ICH_SMB_HS_BUSY) != 0 || (st & (ICH_SMB_HS_INTR |
2993b00bf77Sgrange 	    ICH_SMB_HS_DEVERR | ICH_SMB_HS_BUSERR | ICH_SMB_HS_FAILED |
3003b00bf77Sgrange 	    ICH_SMB_HS_SMBAL | ICH_SMB_HS_BDONE)) == 0)
3013b00bf77Sgrange 		/* Interrupt was not for us */
3023b00bf77Sgrange 		return (0);
3033b00bf77Sgrange 
3043b00bf77Sgrange 	DPRINTF(("%s: intr st 0x%b\n", sc->sc_dev.dv_xname, st,
3053b00bf77Sgrange 	    ICH_SMB_HS_BITS));
3063b00bf77Sgrange 
3073b00bf77Sgrange 	/* Clear status bits */
3083b00bf77Sgrange 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, ICH_SMB_HS, st);
3093b00bf77Sgrange 
3103b00bf77Sgrange 	/* Check for errors */
3113b00bf77Sgrange 	if (st & (ICH_SMB_HS_DEVERR | ICH_SMB_HS_BUSERR | ICH_SMB_HS_FAILED)) {
3123b00bf77Sgrange 		sc->sc_i2c_xfer.error = 1;
3133b00bf77Sgrange 		goto done;
3143b00bf77Sgrange 	}
3153b00bf77Sgrange 
3163b00bf77Sgrange 	if (st & ICH_SMB_HS_INTR) {
3173b00bf77Sgrange 		if (I2C_OP_WRITE_P(sc->sc_i2c_xfer.op))
3183b00bf77Sgrange 			goto done;
3193b00bf77Sgrange 
3203b00bf77Sgrange 		/* Read data */
3213b00bf77Sgrange 		b = sc->sc_i2c_xfer.buf;
3223b00bf77Sgrange 		len = sc->sc_i2c_xfer.len;
3233b00bf77Sgrange 		if (len > 0)
3243b00bf77Sgrange 			b[0] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
3253b00bf77Sgrange 			    ICH_SMB_HD0);
3263b00bf77Sgrange 		if (len > 1)
3273b00bf77Sgrange 			b[1] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
3283b00bf77Sgrange 			    ICH_SMB_HD1);
3293b00bf77Sgrange 	}
3303b00bf77Sgrange 
3313b00bf77Sgrange done:
3323b00bf77Sgrange 	if ((sc->sc_i2c_xfer.flags & I2C_F_POLL) == 0)
3333b00bf77Sgrange 		wakeup(sc);
3343b00bf77Sgrange 	return (1);
3353b00bf77Sgrange }
336