1 /* $OpenBSD: if_jmevar.h,v 1.6 2013/12/07 07:22:37 brad Exp $ */ 2 /*- 3 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice unmodified, this list of conditions, and the following 11 * disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: src/sys/dev/jme/if_jmevar.h,v 1.1 2008/05/27 01:42:01 yongari Exp $ 29 * $DragonFly: src/sys/dev/netif/jme/if_jmevar.h,v 1.4 2008/09/13 04:04:39 sephe Exp $ 30 */ 31 32 #ifndef _IF_JMEVAR_H 33 #define _IF_JMEVAR_H 34 35 /* 36 * JMC250 supports upto 1024 descriptors and the number of 37 * descriptors should be multiple of 16. 38 */ 39 #define JME_TX_RING_CNT 384 40 #define JME_RX_RING_CNT 256 41 /* 42 * Tx/Rx descriptor queue base should be 16bytes aligned and 43 * should not cross 4G bytes boundary on the 64bits address 44 * mode. 45 */ 46 #define JME_TX_RING_ALIGN 16 47 #define JME_RX_RING_ALIGN 16 48 #define JME_TSO_MAXSEGSIZE 4096 49 #define JME_TSO_MAXSIZE (65535 + sizeof(struct ether_vlan_header)) 50 #define JME_MAXTXSEGS 32 51 #define JME_RX_BUF_ALIGN sizeof(uint64_t) 52 #define JME_SSB_ALIGN 16 53 54 #define JME_ADDR_LO(x) ((uint64_t) (x) & 0xFFFFFFFF) 55 #define JME_ADDR_HI(x) ((uint64_t) (x) >> 32) 56 57 #define JME_MSI_MESSAGES 8 58 #define JME_MSIX_MESSAGES 8 59 60 /* Water mark to kick reclaiming Tx buffers. */ 61 #define JME_TX_DESC_HIWAT (JME_TX_RING_CNT - (((JME_TX_RING_CNT) * 3) / 10)) 62 63 /* 64 * JMC250 can send 9K jumbo frame on Tx path and can receive 65 * 65535 bytes. 66 */ 67 #define JME_JUMBO_FRAMELEN 9216 68 #define JME_JUMBO_MTU \ 69 (JME_JUMBO_FRAMELEN - sizeof(struct ether_vlan_header) - \ 70 ETHER_HDR_LEN - ETHER_CRC_LEN) 71 #define JME_MAX_MTU \ 72 (ETHER_MAX_LEN + sizeof(struct ether_vlan_header) - \ 73 ETHER_HDR_LEN - ETHER_CRC_LEN) 74 /* 75 * JMC250 can't handle Tx checksum offload/TSO if frame length 76 * is larger than its FIFO size(2K). It's also good idea to not 77 * use jumbo frame if hardware is running at half-duplex media. 78 * Because the jumbo frame may not fit into the Tx FIFO, 79 * collisions make hardware fetch frame from host memory with 80 * DMA again which in turn slows down Tx performance 81 * significantly. 82 */ 83 #define JME_TX_FIFO_SIZE 2000 84 /* 85 * JMC250 has just 4K Rx FIFO. To support jumbo frame that is 86 * larger than 4K bytes in length, Rx FIFO threshold should be 87 * adjusted to minimize Rx FIFO overrun. 88 */ 89 #define JME_RX_FIFO_SIZE 4000 90 91 #define JME_DESC_INC(x, y) ((x) = ((x) + 1) % (y)) 92 93 #define JME_PROC_MIN 10 94 #define JME_PROC_DEFAULT (JME_RX_RING_CNT / 2) 95 #define JME_PROC_MAX (JME_RX_RING_CNT - 1) 96 97 struct jme_txdesc { 98 struct mbuf *tx_m; 99 bus_dmamap_t tx_dmamap; 100 int tx_ndesc; 101 struct jme_desc *tx_desc; 102 }; 103 104 struct jme_rxdesc { 105 struct mbuf *rx_m; 106 bus_dmamap_t rx_dmamap; 107 struct jme_desc *rx_desc; 108 }; 109 110 struct jme_chain_data{ 111 bus_dma_tag_t jme_ring_tag; 112 bus_dma_tag_t jme_buffer_tag; 113 bus_dma_tag_t jme_ssb_tag; 114 bus_dmamap_t jme_ssb_map; 115 struct jme_txdesc jme_txdesc[JME_TX_RING_CNT]; 116 bus_dma_tag_t jme_rx_tag; 117 struct jme_rxdesc jme_rxdesc[JME_RX_RING_CNT]; 118 bus_dmamap_t jme_tx_ring_map; 119 bus_dma_segment_t jme_tx_ring_seg; 120 bus_dmamap_t jme_rx_ring_map; 121 bus_dma_segment_t jme_rx_ring_seg; 122 bus_dmamap_t jme_rx_sparemap; 123 124 int jme_tx_prod; 125 int jme_tx_cons; 126 int jme_tx_cnt; 127 128 int jme_rx_cons; 129 int jme_rxlen; 130 struct mbuf *jme_rxhead; 131 struct mbuf *jme_rxtail; 132 }; 133 134 struct jme_ring_data { 135 struct jme_desc *jme_tx_ring; 136 bus_dma_segment_t jme_tx_ring_seg; 137 bus_addr_t jme_tx_ring_paddr; 138 struct jme_desc *jme_rx_ring; 139 bus_dma_segment_t jme_rx_ring_seg; 140 bus_addr_t jme_rx_ring_paddr; 141 struct jme_ssb *jme_ssb_block; 142 bus_dma_segment_t jme_ssb_block_seg; 143 bus_addr_t jme_ssb_block_paddr; 144 }; 145 146 #define JME_TX_RING_ADDR(sc, i) \ 147 ((sc)->jme_rdata.jme_tx_ring_paddr + sizeof(struct jme_desc) * (i)) 148 #define JME_RX_RING_ADDR(sc, i) \ 149 ((sc)->jme_rdata.jme_rx_ring_paddr + sizeof(struct jme_desc) * (i)) 150 151 #define JME_TX_RING_SIZE \ 152 (sizeof(struct jme_desc) * JME_TX_RING_CNT) 153 #define JME_RX_RING_SIZE \ 154 (sizeof(struct jme_desc) * JME_RX_RING_CNT) 155 #define JME_SSB_SIZE sizeof(struct jme_ssb) 156 157 struct jme_dmamap_ctx { 158 int nsegs; 159 bus_dma_segment_t *segs; 160 }; 161 162 /* 163 * Software state per device. 164 */ 165 struct jme_softc { 166 struct device sc_dev; 167 struct arpcom sc_arpcom; 168 169 int jme_mem_rid; 170 struct resource *jme_mem_res; 171 bus_space_tag_t jme_mem_bt; 172 bus_space_handle_t jme_mem_bh; 173 bus_size_t jme_mem_size; 174 bus_dma_tag_t sc_dmat; 175 pci_chipset_tag_t jme_pct; 176 pcitag_t jme_pcitag; 177 uint8_t jme_revfm; 178 179 int jme_irq_rid; 180 struct resource *jme_irq_res; 181 void *sc_irq_handle; 182 183 struct mii_data sc_miibus; 184 int jme_phyaddr; 185 186 uint32_t jme_tx_dma_size; 187 uint32_t jme_rx_dma_size; 188 189 uint32_t jme_caps; 190 #define JME_CAP_FPGA 0x0001 191 #define JME_CAP_PCIE 0x0002 192 #define JME_CAP_PMCAP 0x0004 193 #define JME_CAP_FASTETH 0x0008 194 #define JME_CAP_JUMBO 0x0010 195 196 uint32_t jme_workaround; 197 #define JME_WA_CRCERRORS 0x0001 198 #define JME_WA_PACKETLOSS 0x0002 199 200 uint32_t jme_flags; 201 #define JME_FLAG_MSI 0x0001 202 #define JME_FLAG_MSIX 0x0002 203 #define JME_FLAG_DETACH 0x0004 204 #define JME_FLAG_LINK 0x0008 205 206 struct timeout jme_tick_ch; 207 struct jme_chain_data jme_cdata; 208 struct jme_ring_data jme_rdata; 209 uint32_t jme_txcsr; 210 uint32_t jme_rxcsr; 211 212 /* 213 * Sysctl variables 214 */ 215 int jme_process_limit; 216 int jme_tx_coal_to; 217 int jme_tx_coal_pkt; 218 int jme_rx_coal_to; 219 int jme_rx_coal_pkt; 220 }; 221 222 /* Register access macros. */ 223 #define CSR_WRITE_4(_sc, reg, val) \ 224 bus_space_write_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg), (val)) 225 #define CSR_READ_4(_sc, reg) \ 226 bus_space_read_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg)) 227 228 #define JME_MAXERR 5 229 230 #define JME_RXCHAIN_RESET(_sc) \ 231 do { \ 232 (_sc)->jme_cdata.jme_rxhead = NULL; \ 233 (_sc)->jme_cdata.jme_rxtail = NULL; \ 234 (_sc)->jme_cdata.jme_rxlen = 0; \ 235 } while (0) 236 237 #define JME_TX_TIMEOUT 5 238 #define JME_TIMEOUT 1000 239 #define JME_PHY_TIMEOUT 1000 240 #define JME_EEPROM_TIMEOUT 1000 241 242 #define JME_TXD_RSVD 1 243 244 #endif 245