1*0f9e9ec2Sjsg /* $OpenBSD: igc_base.h,v 1.4 2024/05/13 01:15:51 jsg Exp $ */ 283306792Spatrick /*- 383306792Spatrick * Copyright 2021 Intel Corp 483306792Spatrick * Copyright 2021 Rubicon Communications, LLC (Netgate) 583306792Spatrick * SPDX-License-Identifier: BSD-3-Clause 683306792Spatrick * 783306792Spatrick * $FreeBSD$ 883306792Spatrick */ 983306792Spatrick 1083306792Spatrick #ifndef _IGC_BASE_H_ 1183306792Spatrick #define _IGC_BASE_H_ 1283306792Spatrick 1383306792Spatrick /* Forward declaration */ 1483306792Spatrick struct igc_hw; 1583306792Spatrick 1683306792Spatrick int igc_init_hw_base(struct igc_hw *hw); 1783306792Spatrick void igc_power_down_phy_copper_base(struct igc_hw *hw); 1883306792Spatrick int igc_acquire_phy_base(struct igc_hw *hw); 1983306792Spatrick void igc_release_phy_base(struct igc_hw *hw); 2083306792Spatrick 2183306792Spatrick /* Transmit Descriptor - Advanced */ 2283306792Spatrick union igc_adv_tx_desc { 2383306792Spatrick struct { 2483306792Spatrick uint64_t buffer_addr; /* Address of descriptor's data buf */ 2583306792Spatrick uint32_t cmd_type_len; 2683306792Spatrick uint32_t olinfo_status; 2783306792Spatrick } read; 2883306792Spatrick struct { 2983306792Spatrick uint64_t rsvd; /* Reserved */ 3083306792Spatrick uint32_t nxtseq_seed; 3183306792Spatrick uint32_t status; 3283306792Spatrick } wb; 3383306792Spatrick }; 3483306792Spatrick 3583306792Spatrick /* Context descriptors */ 3683306792Spatrick struct igc_adv_tx_context_desc { 3783306792Spatrick uint32_t vlan_macip_lens; 3883306792Spatrick union { 3983306792Spatrick uint32_t launch_time; 4083306792Spatrick uint32_t seqnum_seed; 4183306792Spatrick }; 4283306792Spatrick uint32_t type_tucmd_mlhl; 4383306792Spatrick uint32_t mss_l4len_idx; 4483306792Spatrick }; 4583306792Spatrick 4683306792Spatrick /* Adv Transmit Descriptor Config Masks */ 472dad3cbaSmbuhl #define IGC_ADVTXD_DTALEN_MASK 0x0000FFFF 4883306792Spatrick #define IGC_ADVTXD_DTYP_CTXT 0x00200000 /* Advanced Context Descriptor */ 4983306792Spatrick #define IGC_ADVTXD_DTYP_DATA 0x00300000 /* Advanced Data Descriptor */ 5083306792Spatrick #define IGC_ADVTXD_DCMD_EOP 0x01000000 /* End of Packet */ 5183306792Spatrick #define IGC_ADVTXD_DCMD_IFCS 0x02000000 /* Insert FCS (Ethernet CRC) */ 5283306792Spatrick #define IGC_ADVTXD_DCMD_RS 0x08000000 /* Report Status */ 5383306792Spatrick #define IGC_ADVTXD_DCMD_DDTYP_ISCSI 0x10000000 /* DDP hdr type or iSCSI */ 5483306792Spatrick #define IGC_ADVTXD_DCMD_DEXT 0x20000000 /* Descriptor extension (1=Adv) */ 5583306792Spatrick #define IGC_ADVTXD_DCMD_VLE 0x40000000 /* VLAN pkt enable */ 5683306792Spatrick #define IGC_ADVTXD_DCMD_TSE 0x80000000 /* TCP Seg enable */ 5783306792Spatrick #define IGC_ADVTXD_MAC_LINKSEC 0x00040000 /* Apply LinkSec on pkt */ 5883306792Spatrick #define IGC_ADVTXD_MAC_TSTAMP 0x00080000 /* IEEE1588 Timestamp pkt */ 5983306792Spatrick #define IGC_ADVTXD_STAT_SN_CRC 0x00000002 /* NXTSEQ/SEED prsnt in WB */ 6083306792Spatrick #define IGC_ADVTXD_IDX_SHIFT 4 /* Adv desc Index shift */ 6183306792Spatrick #define IGC_ADVTXD_POPTS_ISCO_1ST 0x00000000 /* 1st TSO of iSCSI PDU */ 6283306792Spatrick #define IGC_ADVTXD_POPTS_ISCO_MDL 0x00000800 /* Middle TSO of iSCSI PDU */ 6383306792Spatrick #define IGC_ADVTXD_POPTS_ISCO_LAST 0x00001000 /* Last TSO of iSCSI PDU */ 6483306792Spatrick /* 1st & Last TSO-full iSCSI PDU*/ 6583306792Spatrick #define IGC_ADVTXD_POPTS_ISCO_FULL 0x00001800 6683306792Spatrick #define IGC_ADVTXD_POPTS_IPSEC 0x00000400 /* IPSec offload request */ 6783306792Spatrick #define IGC_ADVTXD_PAYLEN_SHIFT 14 /* Adv desc PAYLEN shift */ 682011187aSmbuhl #define IGC_ADVTXD_PAYLEN_MASK 0xFFFFD000 /* Adv desc PAYLEN shift */ 6983306792Spatrick 7083306792Spatrick /* Advanced Transmit Context Descriptor Config */ 7183306792Spatrick #define IGC_ADVTXD_MACLEN_SHIFT 9 /* Adv ctxt desc mac len shift */ 7283306792Spatrick #define IGC_ADVTXD_VLAN_SHIFT 16 /* Adv ctxt vlan tag shift */ 7383306792Spatrick #define IGC_ADVTXD_TUCMD_IPV4 0x00000400 /* IP Packet Type: 1=IPv4 */ 7483306792Spatrick #define IGC_ADVTXD_TUCMD_IPV6 0x00000000 /* IP Packet Type: 0=IPv6 */ 7583306792Spatrick #define IGC_ADVTXD_TUCMD_L4T_UDP 0x00000000 /* L4 Packet TYPE of UDP */ 7683306792Spatrick #define IGC_ADVTXD_TUCMD_L4T_TCP 0x00000800 /* L4 Packet TYPE of TCP */ 7783306792Spatrick #define IGC_ADVTXD_TUCMD_L4T_SCTP 0x00001000 /* L4 Packet TYPE of SCTP */ 7883306792Spatrick #define IGC_ADVTXD_TUCMD_IPSEC_TYPE_ESP 0x00002000 /* IPSec Type ESP */ 7983306792Spatrick /* IPSec Encrypt Enable for ESP */ 8083306792Spatrick #define IGC_ADVTXD_TUCMD_IPSEC_ENCRYPT_EN 0x00004000 8183306792Spatrick /* Req requires Markers and CRC */ 8283306792Spatrick #define IGC_ADVTXD_TUCMD_MKRREQ 0x00002000 8383306792Spatrick #define IGC_ADVTXD_L4LEN_SHIFT 8 /* Adv ctxt L4LEN shift */ 8483306792Spatrick #define IGC_ADVTXD_MSS_SHIFT 16 /* Adv ctxt MSS shift */ 8583306792Spatrick /* Adv ctxt IPSec SA IDX mask */ 8683306792Spatrick #define IGC_ADVTXD_IPSEC_SA_INDEX_MASK 0x000000FF 8783306792Spatrick /* Adv ctxt IPSec ESP len mask */ 8883306792Spatrick #define IGC_ADVTXD_IPSEC_ESP_LEN_MASK 0x000000FF 8983306792Spatrick 9083306792Spatrick #define IGC_RAR_ENTRIES_BASE 16 9183306792Spatrick 9283306792Spatrick /* Receive Descriptor - Advanced */ 9383306792Spatrick union igc_adv_rx_desc { 9483306792Spatrick struct { 9583306792Spatrick uint64_t pkt_addr; /* Packet buffer address */ 9683306792Spatrick uint64_t hdr_addr; /* Header buffer address */ 9783306792Spatrick } read; 9883306792Spatrick struct { 9983306792Spatrick struct { 10083306792Spatrick union { 10183306792Spatrick uint32_t data; 10283306792Spatrick struct { 10383306792Spatrick uint16_t pkt_info; /* Pkt type */ 10483306792Spatrick /* Split Header, header buffer len */ 10583306792Spatrick uint16_t hdr_info; 10683306792Spatrick } hs_rss; 10783306792Spatrick } lo_dword; 10883306792Spatrick union { 10983306792Spatrick uint32_t rss; /* RSS hash */ 11083306792Spatrick struct { 11183306792Spatrick uint16_t ip_id; /* IP id */ 11283306792Spatrick uint16_t csum; /* Packet checksum */ 11383306792Spatrick } csum_ip; 11483306792Spatrick } hi_dword; 11583306792Spatrick } lower; 11683306792Spatrick struct { 11783306792Spatrick uint32_t status_error; /* ext status/error */ 11883306792Spatrick uint16_t length; /* Packet length */ 11983306792Spatrick uint16_t vlan; /* VLAN tag */ 12083306792Spatrick } upper; 12183306792Spatrick } wb; /* writeback */ 12283306792Spatrick }; 12383306792Spatrick 12483306792Spatrick /* Additional Transmit Descriptor Control definitions */ 12583306792Spatrick #define IGC_TXDCTL_QUEUE_ENABLE 0x02000000 /* Ena specific Tx Queue */ 12683306792Spatrick 12783306792Spatrick /* Additional Receive Descriptor Control definitions */ 12883306792Spatrick #define IGC_RXDCTL_QUEUE_ENABLE 0x02000000 /* Ena specific Rx Queue */ 12983306792Spatrick 13083306792Spatrick /* SRRCTL bit definitions */ 13183306792Spatrick #define IGC_SRRCTL_BSIZEPKT_SHIFT 10 /* Shift _right_ */ 13283306792Spatrick #define IGC_SRRCTL_BSIZEHDRSIZE_SHIFT 2 /* Shift _left_ */ 13383306792Spatrick #define IGC_SRRCTL_DESCTYPE_ADV_ONEBUF 0x02000000 13483306792Spatrick 13583306792Spatrick #endif /* _IGC_BASE_H_ */ 136